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Diffstat (limited to 'llvm/test/CodeGen/RISCV/rvv/vfrec7.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/rvv/vfrec7.ll30
1 files changed, 15 insertions, 15 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vfrec7.ll b/llvm/test/CodeGen/RISCV/rvv/vfrec7.ll
index 98d82144a333..e185e8d56870 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vfrec7.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vfrec7.ll
@@ -19,7 +19,7 @@ define <vscale x 1 x half> @intrinsic_vfrec7_v_nxv1f16_nxv1f16(<vscale x 1 x hal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x half> @llvm.riscv.vfrec7.nxv1f16(
- <vscale x 1 x half> undef,
+ <vscale x 1 x half> poison,
<vscale x 1 x half> %0,
iXLen 0, iXLen %1)
@@ -65,7 +65,7 @@ define <vscale x 2 x half> @intrinsic_vfrec7_v_nxv2f16_nxv2f16(<vscale x 2 x hal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x half> @llvm.riscv.vfrec7.nxv2f16(
- <vscale x 2 x half> undef,
+ <vscale x 2 x half> poison,
<vscale x 2 x half> %0,
iXLen 0, iXLen %1)
@@ -111,7 +111,7 @@ define <vscale x 4 x half> @intrinsic_vfrec7_v_nxv4f16_nxv4f16(<vscale x 4 x hal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x half> @llvm.riscv.vfrec7.nxv4f16(
- <vscale x 4 x half> undef,
+ <vscale x 4 x half> poison,
<vscale x 4 x half> %0,
iXLen 0, iXLen %1)
@@ -157,7 +157,7 @@ define <vscale x 8 x half> @intrinsic_vfrec7_v_nxv8f16_nxv8f16(<vscale x 8 x hal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x half> @llvm.riscv.vfrec7.nxv8f16(
- <vscale x 8 x half> undef,
+ <vscale x 8 x half> poison,
<vscale x 8 x half> %0,
iXLen 0, iXLen %1)
@@ -203,7 +203,7 @@ define <vscale x 16 x half> @intrinsic_vfrec7_v_nxv16f16_nxv16f16(<vscale x 16 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x half> @llvm.riscv.vfrec7.nxv16f16(
- <vscale x 16 x half> undef,
+ <vscale x 16 x half> poison,
<vscale x 16 x half> %0,
iXLen 0, iXLen %1)
@@ -249,7 +249,7 @@ define <vscale x 32 x half> @intrinsic_vfrec7_v_nxv32f16_nxv32f16(<vscale x 32 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x half> @llvm.riscv.vfrec7.nxv32f16(
- <vscale x 32 x half> undef,
+ <vscale x 32 x half> poison,
<vscale x 32 x half> %0,
iXLen 0, iXLen %1)
@@ -295,7 +295,7 @@ define <vscale x 1 x float> @intrinsic_vfrec7_v_nxv1f32_nxv1f32(<vscale x 1 x fl
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfrec7.nxv1f32(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
iXLen 0, iXLen %1)
@@ -341,7 +341,7 @@ define <vscale x 2 x float> @intrinsic_vfrec7_v_nxv2f32_nxv2f32(<vscale x 2 x fl
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfrec7.nxv2f32(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
iXLen 0, iXLen %1)
@@ -387,7 +387,7 @@ define <vscale x 4 x float> @intrinsic_vfrec7_v_nxv4f32_nxv4f32(<vscale x 4 x fl
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfrec7.nxv4f32(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
iXLen 0, iXLen %1)
@@ -433,7 +433,7 @@ define <vscale x 8 x float> @intrinsic_vfrec7_v_nxv8f32_nxv8f32(<vscale x 8 x fl
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfrec7.nxv8f32(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
iXLen 0, iXLen %1)
@@ -479,7 +479,7 @@ define <vscale x 16 x float> @intrinsic_vfrec7_v_nxv16f32_nxv16f32(<vscale x 16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vfrec7.nxv16f32(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
iXLen 0, iXLen %1)
@@ -525,7 +525,7 @@ define <vscale x 1 x double> @intrinsic_vfrec7_v_nxv1f64_nxv1f64(<vscale x 1 x d
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfrec7.nxv1f64(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
iXLen 0, iXLen %1)
@@ -571,7 +571,7 @@ define <vscale x 2 x double> @intrinsic_vfrec7_v_nxv2f64_nxv2f64(<vscale x 2 x d
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfrec7.nxv2f64(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
iXLen 0, iXLen %1)
@@ -617,7 +617,7 @@ define <vscale x 4 x double> @intrinsic_vfrec7_v_nxv4f64_nxv4f64(<vscale x 4 x d
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfrec7.nxv4f64(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
iXLen 0, iXLen %1)
@@ -663,7 +663,7 @@ define <vscale x 8 x double> @intrinsic_vfrec7_v_nxv8f64_nxv8f64(<vscale x 8 x d
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfrec7.nxv8f64(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
iXLen 0, iXLen %1)