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Diffstat (limited to 'llvm/test/CodeGen/RISCV/rvv/vfadd.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/rvv/vfadd.ll60
1 files changed, 30 insertions, 30 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vfadd.ll b/llvm/test/CodeGen/RISCV/rvv/vfadd.ll
index e5f7545eea6f..10f7d922efee 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vfadd.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vfadd.ll
@@ -30,7 +30,7 @@ define <vscale x 1 x half> @intrinsic_vfadd_vv_nxv1f16_nxv1f16_nxv1f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x half> @llvm.riscv.vfadd.nxv1f16.nxv1f16(
- <vscale x 1 x half> undef,
+ <vscale x 1 x half> poison,
<vscale x 1 x half> %0,
<vscale x 1 x half> %1,
iXLen 0, iXLen %2)
@@ -80,7 +80,7 @@ define <vscale x 2 x half> @intrinsic_vfadd_vv_nxv2f16_nxv2f16_nxv2f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x half> @llvm.riscv.vfadd.nxv2f16.nxv2f16(
- <vscale x 2 x half> undef,
+ <vscale x 2 x half> poison,
<vscale x 2 x half> %0,
<vscale x 2 x half> %1,
iXLen 0, iXLen %2)
@@ -130,7 +130,7 @@ define <vscale x 4 x half> @intrinsic_vfadd_vv_nxv4f16_nxv4f16_nxv4f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x half> @llvm.riscv.vfadd.nxv4f16.nxv4f16(
- <vscale x 4 x half> undef,
+ <vscale x 4 x half> poison,
<vscale x 4 x half> %0,
<vscale x 4 x half> %1,
iXLen 0, iXLen %2)
@@ -180,7 +180,7 @@ define <vscale x 8 x half> @intrinsic_vfadd_vv_nxv8f16_nxv8f16_nxv8f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x half> @llvm.riscv.vfadd.nxv8f16.nxv8f16(
- <vscale x 8 x half> undef,
+ <vscale x 8 x half> poison,
<vscale x 8 x half> %0,
<vscale x 8 x half> %1,
iXLen 0, iXLen %2)
@@ -230,7 +230,7 @@ define <vscale x 16 x half> @intrinsic_vfadd_vv_nxv16f16_nxv16f16_nxv16f16(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x half> @llvm.riscv.vfadd.nxv16f16.nxv16f16(
- <vscale x 16 x half> undef,
+ <vscale x 16 x half> poison,
<vscale x 16 x half> %0,
<vscale x 16 x half> %1,
iXLen 0, iXLen %2)
@@ -280,7 +280,7 @@ define <vscale x 32 x half> @intrinsic_vfadd_vv_nxv32f16_nxv32f16_nxv32f16(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x half> @llvm.riscv.vfadd.nxv32f16.nxv32f16(
- <vscale x 32 x half> undef,
+ <vscale x 32 x half> poison,
<vscale x 32 x half> %0,
<vscale x 32 x half> %1,
iXLen 0, iXLen %2)
@@ -331,7 +331,7 @@ define <vscale x 1 x float> @intrinsic_vfadd_vv_nxv1f32_nxv1f32_nxv1f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
<vscale x 1 x float> %1,
iXLen 0, iXLen %2)
@@ -381,7 +381,7 @@ define <vscale x 2 x float> @intrinsic_vfadd_vv_nxv2f32_nxv2f32_nxv2f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfadd.nxv2f32.nxv2f32(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
<vscale x 2 x float> %1,
iXLen 0, iXLen %2)
@@ -431,7 +431,7 @@ define <vscale x 4 x float> @intrinsic_vfadd_vv_nxv4f32_nxv4f32_nxv4f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfadd.nxv4f32.nxv4f32(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
<vscale x 4 x float> %1,
iXLen 0, iXLen %2)
@@ -481,7 +481,7 @@ define <vscale x 8 x float> @intrinsic_vfadd_vv_nxv8f32_nxv8f32_nxv8f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfadd.nxv8f32.nxv8f32(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
<vscale x 8 x float> %1,
iXLen 0, iXLen %2)
@@ -531,7 +531,7 @@ define <vscale x 16 x float> @intrinsic_vfadd_vv_nxv16f32_nxv16f32_nxv16f32(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vfadd.nxv16f32.nxv16f32(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
<vscale x 16 x float> %1,
iXLen 0, iXLen %2)
@@ -582,7 +582,7 @@ define <vscale x 1 x double> @intrinsic_vfadd_vv_nxv1f64_nxv1f64_nxv1f64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
<vscale x 1 x double> %1,
iXLen 0, iXLen %2)
@@ -632,7 +632,7 @@ define <vscale x 2 x double> @intrinsic_vfadd_vv_nxv2f64_nxv2f64_nxv2f64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfadd.nxv2f64.nxv2f64(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
<vscale x 2 x double> %1,
iXLen 0, iXLen %2)
@@ -682,7 +682,7 @@ define <vscale x 4 x double> @intrinsic_vfadd_vv_nxv4f64_nxv4f64_nxv4f64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfadd.nxv4f64.nxv4f64(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
<vscale x 4 x double> %1,
iXLen 0, iXLen %2)
@@ -732,7 +732,7 @@ define <vscale x 8 x double> @intrinsic_vfadd_vv_nxv8f64_nxv8f64_nxv8f64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfadd.nxv8f64.nxv8f64(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
<vscale x 8 x double> %1,
iXLen 0, iXLen %2)
@@ -783,7 +783,7 @@ define <vscale x 1 x half> @intrinsic_vfadd_vf_nxv1f16_nxv1f16_f16(<vscale x 1 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x half> @llvm.riscv.vfadd.nxv1f16.f16(
- <vscale x 1 x half> undef,
+ <vscale x 1 x half> poison,
<vscale x 1 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -833,7 +833,7 @@ define <vscale x 2 x half> @intrinsic_vfadd_vf_nxv2f16_nxv2f16_f16(<vscale x 2 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x half> @llvm.riscv.vfadd.nxv2f16.f16(
- <vscale x 2 x half> undef,
+ <vscale x 2 x half> poison,
<vscale x 2 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -883,7 +883,7 @@ define <vscale x 4 x half> @intrinsic_vfadd_vf_nxv4f16_nxv4f16_f16(<vscale x 4 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x half> @llvm.riscv.vfadd.nxv4f16.f16(
- <vscale x 4 x half> undef,
+ <vscale x 4 x half> poison,
<vscale x 4 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -933,7 +933,7 @@ define <vscale x 8 x half> @intrinsic_vfadd_vf_nxv8f16_nxv8f16_f16(<vscale x 8 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x half> @llvm.riscv.vfadd.nxv8f16.f16(
- <vscale x 8 x half> undef,
+ <vscale x 8 x half> poison,
<vscale x 8 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -983,7 +983,7 @@ define <vscale x 16 x half> @intrinsic_vfadd_vf_nxv16f16_nxv16f16_f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x half> @llvm.riscv.vfadd.nxv16f16.f16(
- <vscale x 16 x half> undef,
+ <vscale x 16 x half> poison,
<vscale x 16 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -1033,7 +1033,7 @@ define <vscale x 32 x half> @intrinsic_vfadd_vf_nxv32f16_nxv32f16_f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x half> @llvm.riscv.vfadd.nxv32f16.f16(
- <vscale x 32 x half> undef,
+ <vscale x 32 x half> poison,
<vscale x 32 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -1083,7 +1083,7 @@ define <vscale x 1 x float> @intrinsic_vfadd_vf_nxv1f32_nxv1f32_f32(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.f32(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -1133,7 +1133,7 @@ define <vscale x 2 x float> @intrinsic_vfadd_vf_nxv2f32_nxv2f32_f32(<vscale x 2
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfadd.nxv2f32.f32(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -1183,7 +1183,7 @@ define <vscale x 4 x float> @intrinsic_vfadd_vf_nxv4f32_nxv4f32_f32(<vscale x 4
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfadd.nxv4f32.f32(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -1233,7 +1233,7 @@ define <vscale x 8 x float> @intrinsic_vfadd_vf_nxv8f32_nxv8f32_f32(<vscale x 8
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfadd.nxv8f32.f32(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -1283,7 +1283,7 @@ define <vscale x 16 x float> @intrinsic_vfadd_vf_nxv16f32_nxv16f32_f32(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vfadd.nxv16f32.f32(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -1333,7 +1333,7 @@ define <vscale x 1 x double> @intrinsic_vfadd_vf_nxv1f64_nxv1f64_f64(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.f64(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
double %1,
iXLen 0, iXLen %2)
@@ -1383,7 +1383,7 @@ define <vscale x 2 x double> @intrinsic_vfadd_vf_nxv2f64_nxv2f64_f64(<vscale x 2
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfadd.nxv2f64.f64(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
double %1,
iXLen 0, iXLen %2)
@@ -1433,7 +1433,7 @@ define <vscale x 4 x double> @intrinsic_vfadd_vf_nxv4f64_nxv4f64_f64(<vscale x 4
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfadd.nxv4f64.f64(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
double %1,
iXLen 0, iXLen %2)
@@ -1483,7 +1483,7 @@ define <vscale x 8 x double> @intrinsic_vfadd_vf_nxv8f64_nxv8f64_f64(<vscale x 8
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfadd.nxv8f64.f64(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
double %1,
iXLen 0, iXLen %2)
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 14:55:43 +0000