1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vclmulh.ll b/llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
index 287c8e95d1f4..b1acb6d1ca3d 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
@@ -18,7 +18,7 @@ define <vscale x 1 x i64> @intrinsic_vclmulh_vv_nxv1i64_nxv1i64(<vscale x 1 x i6
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 1 x i64> @llvm.riscv.vclmulh.nxv1i64.nxv1i64(
-    <vscale x 1 x i64> undef,
+    <vscale x 1 x i64> poison,
     <vscale x 1 x i64> %0,
     <vscale x 1 x i64> %1,
     iXLen %2)
@@ -65,7 +65,7 @@ define <vscale x 2 x i64> @intrinsic_vclmulh_vv_nxv2i64_nxv2i64(<vscale x 2 x i6
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 2 x i64> @llvm.riscv.vclmulh.nxv2i64.nxv2i64(
-    <vscale x 2 x i64> undef,
+    <vscale x 2 x i64> poison,
     <vscale x 2 x i64> %0,
     <vscale x 2 x i64> %1,
     iXLen %2)
@@ -112,7 +112,7 @@ define <vscale x 4 x i64> @intrinsic_vclmulh_vv_nxv4i64_nxv4i64(<vscale x 4 x i6
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 4 x i64> @llvm.riscv.vclmulh.nxv4i64.nxv4i64(
-    <vscale x 4 x i64> undef,
+    <vscale x 4 x i64> poison,
     <vscale x 4 x i64> %0,
     <vscale x 4 x i64> %1,
     iXLen %2)
@@ -159,7 +159,7 @@ define <vscale x 8 x i64> @intrinsic_vclmulh_vv_nxv8i64_nxv8i64(<vscale x 8 x i6
 ; CHECK-NEXT:    ret
 entry:
   %a = call <vscale x 8 x i64> @llvm.riscv.vclmulh.nxv8i64.nxv8i64(
-    <vscale x 8 x i64> undef,
+    <vscale x 8 x i64> poison,
     <vscale x 8 x i64> %0,
     <vscale x 8 x i64> %1,
     iXLen %2)
@@ -219,7 +219,7 @@ define <vscale x 1 x i64> @intrinsic_vclmulh_vx_nxv1i64_i64(<vscale x 1 x i64> %
 ; RV64-NEXT:    ret
 entry:
   %a = call <vscale x 1 x i64> @llvm.riscv.vclmulh.nxv1i64.i64(
-    <vscale x 1 x i64> undef,
+    <vscale x 1 x i64> poison,
     <vscale x 1 x i64> %0,
     i64 %1,
     iXLen %2)
@@ -290,7 +290,7 @@ define <vscale x 2 x i64> @intrinsic_vclmulh_vx_nxv2i64_i64(<vscale x 2 x i64> %
 ; RV64-NEXT:    ret
 entry:
   %a = call <vscale x 2 x i64> @llvm.riscv.vclmulh.nxv2i64.i64(
-    <vscale x 2 x i64> undef,
+    <vscale x 2 x i64> poison,
     <vscale x 2 x i64> %0,
     i64 %1,
     iXLen %2)
@@ -361,7 +361,7 @@ define <vscale x 4 x i64> @intrinsic_vclmulh_vx_nxv4i64_i64(<vscale x 4 x i64> %
 ; RV64-NEXT:    ret
 entry:
   %a = call <vscale x 4 x i64> @llvm.riscv.vclmulh.nxv4i64.i64(
-    <vscale x 4 x i64> undef,
+    <vscale x 4 x i64> poison,
     <vscale x 4 x i64> %0,
     i64 %1,
     iXLen %2)
@@ -432,7 +432,7 @@ define <vscale x 8 x i64> @intrinsic_vclmulh_vx_nxv8i64_i64(<vscale x 8 x i64> %
 ; RV64-NEXT:    ret
 entry:
   %a = call <vscale x 8 x i64> @llvm.riscv.vclmulh.nxv8i64.i64(
-    <vscale x 8 x i64> undef,
+    <vscale x 8 x i64> poison,
     <vscale x 8 x i64> %0,
     i64 %1,
     iXLen %2)