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-rw-r--r--llvm/test/CodeGen/RISCV/rvv/pr157177.ll20
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/pr157177.ll b/llvm/test/CodeGen/RISCV/rvv/pr157177.ll
new file mode 100644
index 000000000000..adf857f833a4
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/pr157177.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s
+
+define <vscale x 8 x i1> @main(<120 x i1> %0) #0 {
+; CHECK-LABEL: main:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: li a0, 128
+; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma
+; CHECK-NEXT: vfirst.m a0, v0
+; CHECK-NEXT: seqz a0, a0
+; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma
+; CHECK-NEXT: vmv.v.x v8, a0
+; CHECK-NEXT: vmsne.vi v0, v8, 0
+; CHECK-NEXT: ret
+entry:
+ %1 = extractelement <120 x i1> %0, i64 0
+ %2 = insertelement <vscale x 8 x i1> zeroinitializer, i1 %1, i64 0
+ %3 = shufflevector <vscale x 8 x i1> %2, <vscale x 8 x i1> zeroinitializer, <vscale x 8 x i32> zeroinitializer
+ ret <vscale x 8 x i1> %3
+}