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-rw-r--r--llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll252
1 files changed, 242 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll b/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
index aa65ebecbe56..c367b265ff95 100644
--- a/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
+++ b/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV32I %s
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs -mattr=+experimental-xqcili< %s \
+; RUN: | FileCheck -check-prefix=RV32IXQCILI %s
; RUN: llc -mtriple=riscv32 -verify-machineinstrs -code-model=medium < %s \
; RUN: | FileCheck -check-prefix=RV32I-MEDIUM %s
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
@@ -32,6 +34,13 @@ define dso_local i64 @load_g_0() nounwind {
; RV32I-NEXT: lw a1, %lo(g_0+4)(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_g_0:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, g_0
+; RV32IXQCILI-NEXT: lw a0, 0(a1)
+; RV32IXQCILI-NEXT: lw a1, 4(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_g_0:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:
@@ -70,11 +79,18 @@ define dso_local i64 @load_g_1() nounwind {
; RV32I-LABEL: load_g_1:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: lui a1, %hi(g_1)
-; RV32I-NEXT: lw a0, %lo(g_1)(a1)
; RV32I-NEXT: addi a1, a1, %lo(g_1)
+; RV32I-NEXT: lw a0, 0(a1)
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_g_1:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, g_1
+; RV32IXQCILI-NEXT: lw a0, 0(a1)
+; RV32IXQCILI-NEXT: lw a1, 4(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_g_1:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi1:
@@ -113,11 +129,18 @@ define dso_local i64 @load_g_2() nounwind {
; RV32I-LABEL: load_g_2:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: lui a1, %hi(g_2)
-; RV32I-NEXT: lw a0, %lo(g_2)(a1)
; RV32I-NEXT: addi a1, a1, %lo(g_2)
+; RV32I-NEXT: lw a0, 0(a1)
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_g_2:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, g_2
+; RV32IXQCILI-NEXT: lw a0, 0(a1)
+; RV32IXQCILI-NEXT: lw a1, 4(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_g_2:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi2:
@@ -156,11 +179,18 @@ define dso_local i64 @load_g_4() nounwind {
; RV32I-LABEL: load_g_4:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: lui a1, %hi(g_4)
-; RV32I-NEXT: lw a0, %lo(g_4)(a1)
; RV32I-NEXT: addi a1, a1, %lo(g_4)
+; RV32I-NEXT: lw a0, 0(a1)
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_g_4:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, g_4
+; RV32IXQCILI-NEXT: lw a0, 0(a1)
+; RV32IXQCILI-NEXT: lw a1, 4(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_g_4:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi3:
@@ -203,6 +233,13 @@ define dso_local i64 @load_g_8() nounwind {
; RV32I-NEXT: lw a1, %lo(g_8+4)(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_g_8:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, g_8
+; RV32IXQCILI-NEXT: lw a0, 0(a1)
+; RV32IXQCILI-NEXT: lw a1, 4(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_g_8:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi4:
@@ -245,6 +282,13 @@ define dso_local i64 @load_g_16() nounwind {
; RV32I-NEXT: lw a1, %lo(g_16+4)(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_g_16:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, g_16
+; RV32IXQCILI-NEXT: lw a0, 0(a1)
+; RV32IXQCILI-NEXT: lw a1, 4(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_g_16:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi5:
@@ -283,11 +327,18 @@ define dso_local void @store_g_4() nounwind {
; RV32I-LABEL: store_g_4:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: lui a0, %hi(g_4)
-; RV32I-NEXT: sw zero, %lo(g_4)(a0)
; RV32I-NEXT: addi a0, a0, %lo(g_4)
+; RV32I-NEXT: sw zero, 0(a0)
; RV32I-NEXT: sw zero, 4(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: store_g_4:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a0, g_4
+; RV32IXQCILI-NEXT: sw zero, 0(a0)
+; RV32IXQCILI-NEXT: sw zero, 4(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: store_g_4:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi6:
@@ -330,6 +381,13 @@ define dso_local void @store_g_8() nounwind {
; RV32I-NEXT: sw zero, %lo(g_8)(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: store_g_8:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a0, g_8
+; RV32IXQCILI-NEXT: sw zero, 0(a0)
+; RV32IXQCILI-NEXT: sw zero, 4(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: store_g_8:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi7:
@@ -378,6 +436,14 @@ define dso_local void @inc_g_i32() nounwind {
; RV32I-NEXT: sw a1, %lo(g_4_i32)(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: inc_g_i32:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a0, g_4_i32
+; RV32IXQCILI-NEXT: lw a1, 0(a0)
+; RV32IXQCILI-NEXT: addi a1, a1, 1
+; RV32IXQCILI-NEXT: sw a1, 0(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: inc_g_i32:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi8:
@@ -434,6 +500,12 @@ define dso_local i32 @load_ga() local_unnamed_addr #0 {
; RV32I-NEXT: lw a0, %lo(ga+4)(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_ga:
+; RV32IXQCILI: # %bb.0:
+; RV32IXQCILI-NEXT: qc.e.li a0, ga
+; RV32IXQCILI-NEXT: lw a0, 4(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_ga:
; RV32I-MEDIUM: # %bb.0:
; RV32I-MEDIUM-NEXT: .Lpcrel_hi9:
@@ -479,6 +551,13 @@ define dso_local i64 @load_ga_8() nounwind {
; RV32I-NEXT: lw a1, 12(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_ga_8:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, ga_8
+; RV32IXQCILI-NEXT: lw a0, 8(a1)
+; RV32IXQCILI-NEXT: lw a1, 12(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_ga_8:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi10:
@@ -521,6 +600,13 @@ define dso_local i64 @load_ga_16() nounwind {
; RV32I-NEXT: lw a1, %lo(ga_16+12)(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_ga_16:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a1, ga_16
+; RV32IXQCILI-NEXT: lw a0, 8(a1)
+; RV32IXQCILI-NEXT: lw a1, 12(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_ga_16:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi11:
@@ -565,6 +651,14 @@ define dso_local ptr @load_ba_1() nounwind {
; RV32I-NEXT: lw a0, %lo(.Ltmp0)(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_ba_1:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: .Ltmp0: # Block address taken
+; RV32IXQCILI-NEXT: # %bb.1: # %label
+; RV32IXQCILI-NEXT: qc.e.li a0, .Ltmp0
+; RV32IXQCILI-NEXT: lw a0, 0(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_ba_1:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Ltmp0: # Block address taken
@@ -615,6 +709,14 @@ define dso_local ptr @load_ba_2() nounwind {
; RV32I-NEXT: lw a0, %lo(.Ltmp1+8)(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_ba_2:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: .Ltmp1: # Block address taken
+; RV32IXQCILI-NEXT: # %bb.1: # %label
+; RV32IXQCILI-NEXT: qc.e.li a0, .Ltmp1
+; RV32IXQCILI-NEXT: lw a0, 8(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_ba_2:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Ltmp1: # Block address taken
@@ -665,18 +767,27 @@ define dso_local i64 @load_tl_4() nounwind {
; RV32I-LABEL: load_tl_4:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: lui a0, %tprel_hi(tl_4)
-; RV32I-NEXT: add a1, a0, tp, %tprel_add(tl_4)
-; RV32I-NEXT: lw a0, %tprel_lo(tl_4)(a1)
-; RV32I-NEXT: addi a1, a1, %tprel_lo(tl_4)
+; RV32I-NEXT: add a0, a0, tp, %tprel_add(tl_4)
+; RV32I-NEXT: addi a1, a0, %tprel_lo(tl_4)
+; RV32I-NEXT: lw a0, 0(a1)
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_tl_4:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: lui a0, %tprel_hi(tl_4)
+; RV32IXQCILI-NEXT: add a0, a0, tp, %tprel_add(tl_4)
+; RV32IXQCILI-NEXT: addi a1, a0, %tprel_lo(tl_4)
+; RV32IXQCILI-NEXT: lw a0, 0(a1)
+; RV32IXQCILI-NEXT: lw a1, 4(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_tl_4:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: lui a0, %tprel_hi(tl_4)
-; RV32I-MEDIUM-NEXT: add a1, a0, tp, %tprel_add(tl_4)
-; RV32I-MEDIUM-NEXT: lw a0, %tprel_lo(tl_4)(a1)
-; RV32I-MEDIUM-NEXT: addi a1, a1, %tprel_lo(tl_4)
+; RV32I-MEDIUM-NEXT: add a0, a0, tp, %tprel_add(tl_4)
+; RV32I-MEDIUM-NEXT: addi a1, a0, %tprel_lo(tl_4)
+; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
; RV32I-MEDIUM-NEXT: ret
;
@@ -714,6 +825,14 @@ define dso_local i64 @load_tl_8() nounwind {
; RV32I-NEXT: lw a1, %tprel_lo(tl_8+4)(a1)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_tl_8:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: lui a0, %tprel_hi(tl_8)
+; RV32IXQCILI-NEXT: add a1, a0, tp, %tprel_add(tl_8)
+; RV32IXQCILI-NEXT: lw a0, %tprel_lo(tl_8)(a1)
+; RV32IXQCILI-NEXT: lw a1, %tprel_lo(tl_8+4)(a1)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_tl_8:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: lui a0, %tprel_hi(tl_8)
@@ -754,6 +873,12 @@ define dso_local i64 @load_const_ok() nounwind {
; RV32I-NEXT: lw a1, 2044(zero)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_const_ok:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: lw a0, 2040(zero)
+; RV32IXQCILI-NEXT: lw a1, 2044(zero)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_const_ok:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: lw a0, 2040(zero)
@@ -787,6 +912,13 @@ define dso_local i64 @load_cost_overflow() nounwind {
; RV32I-NEXT: lw a0, 2044(zero)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_cost_overflow:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: lui a0, 1
+; RV32IXQCILI-NEXT: lw a1, -2048(a0)
+; RV32IXQCILI-NEXT: lw a0, 2044(zero)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_cost_overflow:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: lui a0, 1
@@ -820,6 +952,12 @@ define dso_local i32 @load_const_medium() nounwind {
; RV32I-NEXT: lw a0, -16(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_const_medium:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: lui a0, 1
+; RV32IXQCILI-NEXT: lw a0, -16(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_const_medium:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: lui a0, 1
@@ -858,6 +996,12 @@ define dso_local i32 @load_const_large() nounwind {
; RV32I-NEXT: lw a0, -2048(a0)
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: load_const_large:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: lui a0, 524288
+; RV32IXQCILI-NEXT: lw a0, -2048(a0)
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: load_const_large:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: lui a0, 524288
@@ -957,6 +1101,71 @@ define i64 @fold_addi_from_different_bb(i64 %k, i64 %n, ptr %a) nounwind {
; RV32I-NEXT: addi sp, sp, 48
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: fold_addi_from_different_bb:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: addi sp, sp, -48
+; RV32IXQCILI-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s5, 20(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s6, 16(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: sw s7, 12(sp) # 4-byte Folded Spill
+; RV32IXQCILI-NEXT: mv s2, a4
+; RV32IXQCILI-NEXT: mv s4, a3
+; RV32IXQCILI-NEXT: mv s3, a2
+; RV32IXQCILI-NEXT: beqz a3, .LBB20_3
+; RV32IXQCILI-NEXT: # %bb.1: # %entry
+; RV32IXQCILI-NEXT: srli a1, s4, 31
+; RV32IXQCILI-NEXT: beqz a1, .LBB20_4
+; RV32IXQCILI-NEXT: .LBB20_2:
+; RV32IXQCILI-NEXT: li s6, 0
+; RV32IXQCILI-NEXT: li s5, 0
+; RV32IXQCILI-NEXT: j .LBB20_6
+; RV32IXQCILI-NEXT: .LBB20_3:
+; RV32IXQCILI-NEXT: seqz a1, s3
+; RV32IXQCILI-NEXT: bnez a1, .LBB20_2
+; RV32IXQCILI-NEXT: .LBB20_4: # %for.body.lr.ph
+; RV32IXQCILI-NEXT: li s1, 0
+; RV32IXQCILI-NEXT: li s0, 0
+; RV32IXQCILI-NEXT: li s6, 0
+; RV32IXQCILI-NEXT: li s5, 0
+; RV32IXQCILI-NEXT: slli a0, a0, 4
+; RV32IXQCILI-NEXT: add s7, s2, a0
+; RV32IXQCILI-NEXT: .LBB20_5: # %for.body
+; RV32IXQCILI-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IXQCILI-NEXT: mv a0, s2
+; RV32IXQCILI-NEXT: call f
+; RV32IXQCILI-NEXT: lw a0, 8(s7)
+; RV32IXQCILI-NEXT: lw a1, 12(s7)
+; RV32IXQCILI-NEXT: addi s1, s1, 1
+; RV32IXQCILI-NEXT: seqz a2, s1
+; RV32IXQCILI-NEXT: add s0, s0, a2
+; RV32IXQCILI-NEXT: xor a2, s1, s3
+; RV32IXQCILI-NEXT: add a1, a1, s5
+; RV32IXQCILI-NEXT: xor a3, s0, s4
+; RV32IXQCILI-NEXT: or a2, a2, a3
+; RV32IXQCILI-NEXT: add s6, s6, a0
+; RV32IXQCILI-NEXT: sltu s5, s6, a0
+; RV32IXQCILI-NEXT: add s5, s5, a1
+; RV32IXQCILI-NEXT: bnez a2, .LBB20_5
+; RV32IXQCILI-NEXT: .LBB20_6: # %for.cond.cleanup
+; RV32IXQCILI-NEXT: mv a0, s6
+; RV32IXQCILI-NEXT: mv a1, s5
+; RV32IXQCILI-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
+; RV32IXQCILI-NEXT: addi sp, sp, 48
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: fold_addi_from_different_bb:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: addi sp, sp, -48
@@ -1172,6 +1381,17 @@ define i32 @crash() {
; RV32I-NEXT: li a0, 0
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: crash:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: li a0, 1
+; RV32IXQCILI-NEXT: qc.e.li a1, g
+; RV32IXQCILI-NEXT: add a0, a0, a1
+; RV32IXQCILI-NEXT: lbu a0, 400(a0)
+; RV32IXQCILI-NEXT: seqz a0, a0
+; RV32IXQCILI-NEXT: sw a0, 0(zero)
+; RV32IXQCILI-NEXT: li a0, 0
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: crash:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi14:
@@ -1243,6 +1463,18 @@ define i1 @pr134525() nounwind {
; RV32I-NEXT: and a0, a0, a2
; RV32I-NEXT: ret
;
+; RV32IXQCILI-LABEL: pr134525:
+; RV32IXQCILI: # %bb.0: # %entry
+; RV32IXQCILI-NEXT: qc.e.li a0, ki_end
+; RV32IXQCILI-NEXT: lui a1, 523776
+; RV32IXQCILI-NEXT: qc.li a2, 131073
+; RV32IXQCILI-NEXT: add a1, a1, a0
+; RV32IXQCILI-NEXT: sltu a2, a1, a2
+; RV32IXQCILI-NEXT: sltu a0, a1, a0
+; RV32IXQCILI-NEXT: not a0, a0
+; RV32IXQCILI-NEXT: and a0, a0, a2
+; RV32IXQCILI-NEXT: ret
+;
; RV32I-MEDIUM-LABEL: pr134525:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .Lpcrel_hi15:
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 14:55:13 +0000