diff options
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/setcc-logic.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/setcc-logic.ll | 245 |
1 files changed, 123 insertions, 122 deletions
diff --git a/llvm/test/CodeGen/PowerPC/setcc-logic.ll b/llvm/test/CodeGen/PowerPC/setcc-logic.ll index 1c3ac17666e2..5ebfec68695f 100644 --- a/llvm/test/CodeGen/PowerPC/setcc-logic.ll +++ b/llvm/test/CodeGen/PowerPC/setcc-logic.ll @@ -1,12 +1,13 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -ppc-gpr-icmps=all -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown -ppc-convert-rr-to-ri=true | FileCheck %s +; RUN: llc < %s -ppc-gpr-icmps=all -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown -ppc-convert-rr-to-ri=true \ +; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck %s define zeroext i1 @all_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: all_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: blr %a = icmp eq i32 %P, 0 %b = icmp eq i32 %Q, 0 @@ -17,9 +18,9 @@ define zeroext i1 @all_bits_clear(i32 %P, i32 %Q) { define zeroext i1 @all_sign_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp sgt i32 %P, -1 %b = icmp sgt i32 %Q, -1 @@ -30,11 +31,11 @@ define zeroext i1 @all_sign_bits_clear(i32 %P, i32 %Q) { define zeroext i1 @all_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: all_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: li 4, -1 -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: li r4, -1 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: blr %a = icmp eq i32 %P, -1 %b = icmp eq i32 %Q, -1 @@ -45,8 +46,8 @@ define zeroext i1 @all_bits_set(i32 %P, i32 %Q) { define zeroext i1 @all_sign_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 ; CHECK-NEXT: blr %a = icmp slt i32 %P, 0 %b = icmp slt i32 %Q, 0 @@ -57,10 +58,10 @@ define zeroext i1 @all_sign_bits_set(i32 %P, i32 %Q) { define zeroext i1 @any_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: any_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp ne i32 %P, 0 %b = icmp ne i32 %Q, 0 @@ -71,8 +72,8 @@ define zeroext i1 @any_bits_set(i32 %P, i32 %Q) { define zeroext i1 @any_sign_bits_set(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_set: ; CHECK: # %bb.0: -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 ; CHECK-NEXT: blr %a = icmp slt i32 %P, 0 %b = icmp slt i32 %Q, 0 @@ -83,12 +84,12 @@ define zeroext i1 @any_sign_bits_set(i32 %P, i32 %Q) { define zeroext i1 @any_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: any_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: li 4, -1 -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: li r4, -1 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp ne i32 %P, -1 %b = icmp ne i32 %Q, -1 @@ -99,9 +100,9 @@ define zeroext i1 @any_bits_clear(i32 %P, i32 %Q) { define zeroext i1 @any_sign_bits_clear(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_clear: ; CHECK: # %bb.0: -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: rlwinm r3, r3, 1, 31, 31 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %a = icmp sgt i32 %P, -1 %b = icmp sgt i32 %Q, -1 @@ -113,13 +114,13 @@ define zeroext i1 @any_sign_bits_clear(i32 %P, i32 %Q) { define i32 @all_bits_clear_branch(ptr %P, ptr %Q) { ; CHECK-LABEL: all_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or. 3, 3, 4 -; CHECK-NEXT: bne 0, .LBB8_2 +; CHECK-NEXT: or. r3, r3, r4 +; CHECK-NEXT: bne cr0, .LBB8_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB8_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp eq ptr %P, null @@ -137,14 +138,14 @@ return: define i32 @all_sign_bits_clear_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cmpwi 3, 0 -; CHECK-NEXT: blt 0, .LBB9_2 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cmpwi r3, 0 +; CHECK-NEXT: blt cr0, .LBB9_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB9_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp sgt i32 %P, -1 @@ -162,14 +163,14 @@ return: define i32 @all_bits_set_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: all_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: bne 0, .LBB10_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: bne cr0, .LBB10_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB10_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp eq i32 %P, -1 @@ -187,14 +188,14 @@ return: define i32 @all_sign_bits_set_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: all_sign_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: bgt 0, .LBB11_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: bgt cr0, .LBB11_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB11_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp slt i32 %P, 0 @@ -213,13 +214,13 @@ return: define i32 @any_bits_set_branch(ptr %P, ptr %Q) { ; CHECK-LABEL: any_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or. 3, 3, 4 -; CHECK-NEXT: beq 0, .LBB12_2 +; CHECK-NEXT: or. r3, r3, r4 +; CHECK-NEXT: beq cr0, .LBB12_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB12_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp ne ptr %P, null @@ -237,14 +238,14 @@ return: define i32 @any_sign_bits_set_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_set_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: bgt 0, .LBB13_2 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: bgt cr0, .LBB13_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB13_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp slt i32 %P, 0 @@ -262,14 +263,14 @@ return: define i32 @any_bits_clear_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: any_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, -1 -; CHECK-NEXT: beq 0, .LBB14_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, -1 +; CHECK-NEXT: beq cr0, .LBB14_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB14_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp ne i32 %P, -1 @@ -287,14 +288,14 @@ return: define i32 @any_sign_bits_clear_branch(i32 %P, i32 %Q) { ; CHECK-LABEL: any_sign_bits_clear_branch: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: and 3, 3, 4 -; CHECK-NEXT: cmpwi 3, 0 -; CHECK-NEXT: blt 0, .LBB15_2 +; CHECK-NEXT: and r3, r3, r4 +; CHECK-NEXT: cmpwi r3, 0 +; CHECK-NEXT: blt cr0, .LBB15_2 ; CHECK-NEXT: # %bb.1: # %bb1 -; CHECK-NEXT: li 3, 4 +; CHECK-NEXT: li r3, 4 ; CHECK-NEXT: blr ; CHECK-NEXT: .LBB15_2: # %return -; CHECK-NEXT: li 3, 192 +; CHECK-NEXT: li r3, 192 ; CHECK-NEXT: blr entry: %a = icmp sgt i32 %P, -1 @@ -312,9 +313,9 @@ return: define <4 x i1> @all_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp eq <4 x i32> %P, zeroinitializer %b = icmp eq <4 x i32> %Q, zeroinitializer @@ -325,9 +326,9 @@ define <4 x i1> @all_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @all_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_sign_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 2, 3 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp sgt <4 x i32> %P, <i32 -1, i32 -1, i32 -1, i32 -1> %b = icmp sgt <4 x i32> %Q, <i32 -1, i32 -1, i32 -1, i32 -1> @@ -338,9 +339,9 @@ define <4 x i1> @all_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @all_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp eq <4 x i32> %P, <i32 -1, i32 -1, i32 -1, i32 -1> %b = icmp eq <4 x i32> %Q, <i32 -1, i32 -1, i32 -1, i32 -1> @@ -351,9 +352,9 @@ define <4 x i1> @all_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @all_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: all_sign_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 3, 2 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v3, v2 ; CHECK-NEXT: blr %a = icmp slt <4 x i32> %P, zeroinitializer %b = icmp slt <4 x i32> %Q, zeroinitializer @@ -364,10 +365,10 @@ define <4 x i1> @all_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 -; CHECK-NEXT: xxlnor 34, 34, 34 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 +; CHECK-NEXT: xxlnor v2, v2, v2 ; CHECK-NEXT: blr %a = icmp ne <4 x i32> %P, zeroinitializer %b = icmp ne <4 x i32> %Q, zeroinitializer @@ -378,9 +379,9 @@ define <4 x i1> @any_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_sign_bits_set_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlor 34, 34, 35 -; CHECK-NEXT: xxlxor 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 3, 2 +; CHECK-NEXT: xxlor v2, v2, v3 +; CHECK-NEXT: xxlxor v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v3, v2 ; CHECK-NEXT: blr %a = icmp slt <4 x i32> %P, zeroinitializer %b = icmp slt <4 x i32> %Q, zeroinitializer @@ -391,10 +392,10 @@ define <4 x i1> @any_sign_bits_set_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpequw 2, 2, 3 -; CHECK-NEXT: xxlnor 34, 34, 34 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpequw v2, v2, v3 +; CHECK-NEXT: xxlnor v2, v2, v2 ; CHECK-NEXT: blr %a = icmp ne <4 x i32> %P, <i32 -1, i32 -1, i32 -1, i32 -1> %b = icmp ne <4 x i32> %Q, <i32 -1, i32 -1, i32 -1, i32 -1> @@ -405,9 +406,9 @@ define <4 x i1> @any_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define <4 x i1> @any_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { ; CHECK-LABEL: any_sign_bits_clear_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: xxland 34, 34, 35 -; CHECK-NEXT: xxleqv 35, 35, 35 -; CHECK-NEXT: vcmpgtsw 2, 2, 3 +; CHECK-NEXT: xxland v2, v2, v3 +; CHECK-NEXT: xxleqv v3, v3, v3 +; CHECK-NEXT: vcmpgtsw v2, v2, v3 ; CHECK-NEXT: blr %a = icmp sgt <4 x i32> %P, <i32 -1, i32 -1, i32 -1, i32 -1> %b = icmp sgt <4 x i32> %Q, <i32 -1, i32 -1, i32 -1, i32 -1> @@ -418,11 +419,11 @@ define <4 x i1> @any_sign_bits_clear_vec(<4 x i32> %P, <4 x i32> %Q) { define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) { ; CHECK-LABEL: ne_neg1_and_ne_zero: ; CHECK: # %bb.0: -; CHECK-NEXT: addi 3, 3, 1 -; CHECK-NEXT: li 4, 1 -; CHECK-NEXT: subfic 3, 3, 1 -; CHECK-NEXT: subfe 3, 4, 4 -; CHECK-NEXT: neg 3, 3 +; CHECK-NEXT: addi r3, r3, 1 +; CHECK-NEXT: li r4, 1 +; CHECK-NEXT: subfic r3, r3, 1 +; CHECK-NEXT: subfe r3, r4, r4 +; CHECK-NEXT: neg r3, r3 ; CHECK-NEXT: blr %cmp1 = icmp ne i64 %x, -1 %cmp2 = icmp ne i64 %x, 0 @@ -435,11 +436,11 @@ define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) { define zeroext i1 @and_eq(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i16 zeroext %d) { ; CHECK-LABEL: and_eq: ; CHECK: # %bb.0: -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: xor 4, 5, 6 -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: xor r4, r5, r6 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: blr %cmp1 = icmp eq i16 %a, %b %cmp2 = icmp eq i16 %c, %d @@ -450,12 +451,12 @@ define zeroext i1 @and_eq(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i16 z define zeroext i1 @or_ne(i32 %a, i32 %b, i32 %c, i32 %d) { ; CHECK-LABEL: or_ne: ; CHECK: # %bb.0: -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: xor 4, 5, 6 -; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: xor r4, r5, r6 +; CHECK-NEXT: or r3, r3, r4 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: srwi r3, r3, 5 +; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: blr %cmp1 = icmp ne i32 %a, %b %cmp2 = icmp ne i32 %c, %d @@ -468,9 +469,9 @@ define zeroext i1 @or_ne(i32 %a, i32 %b, i32 %c, i32 %d) { define <4 x i1> @and_eq_vec(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) { ; CHECK-LABEL: and_eq_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: vcmpequw 2, 2, 3 -; CHECK-NEXT: vcmpequw 3, 4, 5 -; CHECK-NEXT: xxland 34, 34, 35 +; CHECK-NEXT: vcmpequw v2, v2, v3 +; CHECK-NEXT: vcmpequw v3, v4, v5 +; CHECK-NEXT: xxland v2, v2, v3 ; CHECK-NEXT: blr %cmp1 = icmp eq <4 x i32> %a, %b %cmp2 = icmp eq <4 x i32> %c, %d @@ -481,11 +482,11 @@ define <4 x i1> @and_eq_vec(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> define i1 @or_icmps_const_1bit_diff(i64 %x) { ; CHECK-LABEL: or_icmps_const_1bit_diff: ; CHECK: # %bb.0: -; CHECK-NEXT: addi 3, 3, -13 -; CHECK-NEXT: rldicl 3, 3, 61, 1 -; CHECK-NEXT: rotldi 3, 3, 3 -; CHECK-NEXT: cntlzd 3, 3 -; CHECK-NEXT: rldicl 3, 3, 58, 63 +; CHECK-NEXT: addi r3, r3, -13 +; CHECK-NEXT: rldicl r3, r3, 61, 1 +; CHECK-NEXT: rotldi r3, r3, 3 +; CHECK-NEXT: cntlzd r3, r3 +; CHECK-NEXT: rldicl r3, r3, 58, 63 ; CHECK-NEXT: blr %a = icmp eq i64 %x, 17 %b = icmp eq i64 %x, 13 @@ -496,11 +497,11 @@ define i1 @or_icmps_const_1bit_diff(i64 %x) { define i1 @and_icmps_const_1bit_diff(i32 %x) { ; CHECK-LABEL: and_icmps_const_1bit_diff: ; CHECK: # %bb.0: -; CHECK-NEXT: addi 3, 3, -4625 -; CHECK-NEXT: rlwinm 3, 3, 0, 28, 26 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: not 3, 3 -; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 +; CHECK-NEXT: addi r3, r3, -4625 +; CHECK-NEXT: rlwinm r3, r3, 0, 28, 26 +; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: not r3, r3 +; CHECK-NEXT: rlwinm r3, r3, 27, 31, 31 ; CHECK-NEXT: blr %a = icmp ne i32 %x, 4625 %b = icmp ne i32 %x, 4641 |