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-rw-r--r--llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll24
1 files changed, 17 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
index 3b9642e31b02..603bd21ab9af 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA64
define void @fdiv_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fdiv_v4f32:
@@ -49,12 +50,21 @@ entry:
}
define void @one_fdiv_v2f64(ptr %res, ptr %a0) nounwind {
-; CHECK-LABEL: one_fdiv_v2f64:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a1, 0
-; CHECK-NEXT: vfrecip.d $vr0, $vr0
-; CHECK-NEXT: vst $vr0, $a0, 0
-; CHECK-NEXT: ret
+; LA32-LABEL: one_fdiv_v2f64:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vld $vr0, $a1, 0
+; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI3_0)
+; LA32-NEXT: vld $vr1, $a1, %pc_lo12(.LCPI3_0)
+; LA32-NEXT: vfdiv.d $vr0, $vr1, $vr0
+; LA32-NEXT: vst $vr0, $a0, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: one_fdiv_v2f64:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vfrecip.d $vr0, $vr0
+; LA64-NEXT: vst $vr0, $a0, 0
+; LA64-NEXT: ret
entry:
%v0 = load <2 x double>, ptr %a0
%div = fdiv <2 x double> <double 1.0, double 1.0>, %v0