diff options
Diffstat (limited to 'llvm/test/CodeGen/LoongArch/lsx/inline-asm-reg-names.ll')
| -rw-r--r-- | llvm/test/CodeGen/LoongArch/lsx/inline-asm-reg-names.ll | 34 |
1 files changed, 23 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/LoongArch/lsx/inline-asm-reg-names.ll b/llvm/test/CodeGen/LoongArch/lsx/inline-asm-reg-names.ll index ceea3621be2f..eacfca88fc74 100644 --- a/llvm/test/CodeGen/LoongArch/lsx/inline-asm-reg-names.ll +++ b/llvm/test/CodeGen/LoongArch/lsx/inline-asm-reg-names.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s +; RUN: llc --mtriple=loongarch32 -mattr=+32s,+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA32 +; RUN: llc --mtriple=loongarch64 -mattr=+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA64 define void @register_vr1() nounwind { ; CHECK-LABEL: register_vr1: @@ -42,16 +43,27 @@ entry: ;; register which is preserved across calls. That's why the ;; fst.d and fld.d instructions are emitted. define void @register_vr31() nounwind { -; CHECK-LABEL: register_vr31: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addi.d $sp, $sp, -16 -; CHECK-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill -; CHECK-NEXT: #APP -; CHECK-NEXT: vldi $vr31, 1 -; CHECK-NEXT: #NO_APP -; CHECK-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload -; CHECK-NEXT: addi.d $sp, $sp, 16 -; CHECK-NEXT: ret +; LA32-LABEL: register_vr31: +; LA32: # %bb.0: # %entry +; LA32-NEXT: addi.w $sp, $sp, -16 +; LA32-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill +; LA32-NEXT: #APP +; LA32-NEXT: vldi $vr31, 1 +; LA32-NEXT: #NO_APP +; LA32-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload +; LA32-NEXT: addi.w $sp, $sp, 16 +; LA32-NEXT: ret +; +; LA64-LABEL: register_vr31: +; LA64: # %bb.0: # %entry +; LA64-NEXT: addi.d $sp, $sp, -16 +; LA64-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill +; LA64-NEXT: #APP +; LA64-NEXT: vldi $vr31, 1 +; LA64-NEXT: #NO_APP +; LA64-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload +; LA64-NEXT: addi.d $sp, $sp, 16 +; LA64-NEXT: ret entry: %0 = tail call <2 x i64> asm sideeffect "vldi ${0:w}, 1", "={$vr31}"() ret void |
