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Diffstat (limited to 'llvm/test/CodeGen/LoongArch/lsx/build-vector.ll')
-rw-r--r--llvm/test/CodeGen/LoongArch/lsx/build-vector.ll400
1 files changed, 344 insertions, 56 deletions
diff --git a/llvm/test/CodeGen/LoongArch/lsx/build-vector.ll b/llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
index 9517558a92ed..24df71c2ad71 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA64
define void @buildvector_v16i8_splat(ptr %dst, i8 %a0) nounwind {
; CHECK-LABEL: buildvector_v16i8_splat:
@@ -41,11 +42,20 @@ entry:
}
define void @buildvector_v2i64_splat(ptr %dst, i64 %a0) nounwind {
-; CHECK-LABEL: buildvector_v2i64_splat:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vreplgr2vr.d $vr0, $a1
-; CHECK-NEXT: vst $vr0, $a0, 0
-; CHECK-NEXT: ret
+; LA32-LABEL: buildvector_v2i64_splat:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
+; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 1
+; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 2
+; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 3
+; LA32-NEXT: vst $vr0, $a0, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: buildvector_v2i64_splat:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vreplgr2vr.d $vr0, $a1
+; LA64-NEXT: vst $vr0, $a0, 0
+; LA64-NEXT: ret
entry:
%insert = insertelement <2 x i64> undef, i64 %a0, i8 0
%splat = shufflevector <2 x i64> %insert, <2 x i64> undef, <2 x i32> zeroinitializer
@@ -138,12 +148,19 @@ entry:
}
define void @buildvector_v2f64_const_splat(ptr %dst) nounwind {
-; CHECK-LABEL: buildvector_v2f64_const_splat:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: lu52i.d $a1, $zero, 1023
-; CHECK-NEXT: vreplgr2vr.d $vr0, $a1
-; CHECK-NEXT: vst $vr0, $a0, 0
-; CHECK-NEXT: ret
+; LA32-LABEL: buildvector_v2f64_const_splat:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI11_0)
+; LA32-NEXT: vld $vr0, $a1, %pc_lo12(.LCPI11_0)
+; LA32-NEXT: vst $vr0, $a0, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: buildvector_v2f64_const_splat:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: lu52i.d $a1, $zero, 1023
+; LA64-NEXT: vreplgr2vr.d $vr0, $a1
+; LA64-NEXT: vst $vr0, $a0, 0
+; LA64-NEXT: ret
entry:
store <2 x double> <double 1.0, double 1.0>, ptr %dst
ret void
@@ -222,35 +239,65 @@ entry:
}
define void @buildvector_v16i8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15) nounwind {
-; CHECK-LABEL: buildvector_v16i8:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: ld.b $t0, $sp, 64
-; CHECK-NEXT: ld.b $t1, $sp, 56
-; CHECK-NEXT: ld.b $t2, $sp, 48
-; CHECK-NEXT: ld.b $t3, $sp, 40
-; CHECK-NEXT: ld.b $t4, $sp, 32
-; CHECK-NEXT: ld.b $t5, $sp, 24
-; CHECK-NEXT: ld.b $t6, $sp, 16
-; CHECK-NEXT: ld.b $t7, $sp, 8
-; CHECK-NEXT: ld.b $t8, $sp, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a5, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a6, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a7, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t8, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t7, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t6, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t5, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t4, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t3, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $t0, 15
-; CHECK-NEXT: vst $vr0, $a0, 0
-; CHECK-NEXT: ret
+; LA32-LABEL: buildvector_v16i8:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: ld.b $t0, $sp, 32
+; LA32-NEXT: ld.b $t1, $sp, 28
+; LA32-NEXT: ld.b $t2, $sp, 24
+; LA32-NEXT: ld.b $t3, $sp, 20
+; LA32-NEXT: ld.b $t4, $sp, 16
+; LA32-NEXT: ld.b $t5, $sp, 12
+; LA32-NEXT: ld.b $t6, $sp, 8
+; LA32-NEXT: ld.b $t7, $sp, 4
+; LA32-NEXT: ld.b $t8, $sp, 0
+; LA32-NEXT: vinsgr2vr.b $vr0, $a1, 0
+; LA32-NEXT: vinsgr2vr.b $vr0, $a2, 1
+; LA32-NEXT: vinsgr2vr.b $vr0, $a3, 2
+; LA32-NEXT: vinsgr2vr.b $vr0, $a4, 3
+; LA32-NEXT: vinsgr2vr.b $vr0, $a5, 4
+; LA32-NEXT: vinsgr2vr.b $vr0, $a6, 5
+; LA32-NEXT: vinsgr2vr.b $vr0, $a7, 6
+; LA32-NEXT: vinsgr2vr.b $vr0, $t8, 7
+; LA32-NEXT: vinsgr2vr.b $vr0, $t7, 8
+; LA32-NEXT: vinsgr2vr.b $vr0, $t6, 9
+; LA32-NEXT: vinsgr2vr.b $vr0, $t5, 10
+; LA32-NEXT: vinsgr2vr.b $vr0, $t4, 11
+; LA32-NEXT: vinsgr2vr.b $vr0, $t3, 12
+; LA32-NEXT: vinsgr2vr.b $vr0, $t2, 13
+; LA32-NEXT: vinsgr2vr.b $vr0, $t1, 14
+; LA32-NEXT: vinsgr2vr.b $vr0, $t0, 15
+; LA32-NEXT: vst $vr0, $a0, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: buildvector_v16i8:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: ld.b $t0, $sp, 64
+; LA64-NEXT: ld.b $t1, $sp, 56
+; LA64-NEXT: ld.b $t2, $sp, 48
+; LA64-NEXT: ld.b $t3, $sp, 40
+; LA64-NEXT: ld.b $t4, $sp, 32
+; LA64-NEXT: ld.b $t5, $sp, 24
+; LA64-NEXT: ld.b $t6, $sp, 16
+; LA64-NEXT: ld.b $t7, $sp, 8
+; LA64-NEXT: ld.b $t8, $sp, 0
+; LA64-NEXT: vinsgr2vr.b $vr0, $a1, 0
+; LA64-NEXT: vinsgr2vr.b $vr0, $a2, 1
+; LA64-NEXT: vinsgr2vr.b $vr0, $a3, 2
+; LA64-NEXT: vinsgr2vr.b $vr0, $a4, 3
+; LA64-NEXT: vinsgr2vr.b $vr0, $a5, 4
+; LA64-NEXT: vinsgr2vr.b $vr0, $a6, 5
+; LA64-NEXT: vinsgr2vr.b $vr0, $a7, 6
+; LA64-NEXT: vinsgr2vr.b $vr0, $t8, 7
+; LA64-NEXT: vinsgr2vr.b $vr0, $t7, 8
+; LA64-NEXT: vinsgr2vr.b $vr0, $t6, 9
+; LA64-NEXT: vinsgr2vr.b $vr0, $t5, 10
+; LA64-NEXT: vinsgr2vr.b $vr0, $t4, 11
+; LA64-NEXT: vinsgr2vr.b $vr0, $t3, 12
+; LA64-NEXT: vinsgr2vr.b $vr0, $t2, 13
+; LA64-NEXT: vinsgr2vr.b $vr0, $t1, 14
+; LA64-NEXT: vinsgr2vr.b $vr0, $t0, 15
+; LA64-NEXT: vst $vr0, $a0, 0
+; LA64-NEXT: ret
entry:
%ins0 = insertelement <16 x i8> undef, i8 %a0, i32 0
%ins1 = insertelement <16 x i8> %ins0, i8 %a1, i32 1
@@ -338,6 +385,133 @@ entry:
ret void
}
+define void @buildvector_v16i8_subseq_2(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7) nounwind {
+; CHECK-LABEL: buildvector_v16i8_subseq_2:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ld.b $t0, $sp, 0
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 2
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 3
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a5, 4
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a6, 5
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a7, 6
+; CHECK-NEXT: vinsgr2vr.b $vr0, $t0, 7
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 9
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 10
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 11
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a5, 12
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a6, 13
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a7, 14
+; CHECK-NEXT: vinsgr2vr.b $vr0, $t0, 15
+; CHECK-NEXT: vst $vr0, $a0, 0
+; CHECK-NEXT: ret
+entry:
+ %ins0 = insertelement <16 x i8> undef, i8 %a0, i32 0
+ %ins1 = insertelement <16 x i8> %ins0, i8 %a1, i32 1
+ %ins2 = insertelement <16 x i8> %ins1, i8 %a2, i32 2
+ %ins3 = insertelement <16 x i8> %ins2, i8 %a3, i32 3
+ %ins4 = insertelement <16 x i8> %ins3, i8 %a4, i32 4
+ %ins5 = insertelement <16 x i8> %ins4, i8 %a5, i32 5
+ %ins6 = insertelement <16 x i8> %ins5, i8 %a6, i32 6
+ %ins7 = insertelement <16 x i8> %ins6, i8 %a7, i32 7
+ %ins8 = insertelement <16 x i8> %ins7, i8 %a0, i32 8
+ %ins9 = insertelement <16 x i8> %ins8, i8 %a1, i32 9
+ %ins10 = insertelement <16 x i8> %ins9, i8 %a2, i32 10
+ %ins11 = insertelement <16 x i8> %ins10, i8 %a3, i32 11
+ %ins12 = insertelement <16 x i8> %ins11, i8 %a4, i32 12
+ %ins13 = insertelement <16 x i8> %ins12, i8 %a5, i32 13
+ %ins14 = insertelement <16 x i8> %ins13, i8 %a6, i32 14
+ %ins15 = insertelement <16 x i8> %ins14, i8 %a7, i32 15
+ store <16 x i8> %ins15, ptr %dst
+ ret void
+}
+
+define void @buildvector_v16i8_subseq_4(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3) nounwind {
+; CHECK-LABEL: buildvector_v16i8_subseq_4:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 2
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 3
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 5
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 6
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 7
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 9
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 10
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 11
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 13
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 14
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 15
+; CHECK-NEXT: vst $vr0, $a0, 0
+; CHECK-NEXT: ret
+entry:
+ %ins0 = insertelement <16 x i8> undef, i8 %a0, i32 0
+ %ins1 = insertelement <16 x i8> %ins0, i8 %a1, i32 1
+ %ins2 = insertelement <16 x i8> %ins1, i8 %a2, i32 2
+ %ins3 = insertelement <16 x i8> %ins2, i8 %a3, i32 3
+ %ins4 = insertelement <16 x i8> %ins3, i8 %a0, i32 4
+ %ins5 = insertelement <16 x i8> %ins4, i8 %a1, i32 5
+ %ins6 = insertelement <16 x i8> %ins5, i8 %a2, i32 6
+ %ins7 = insertelement <16 x i8> %ins6, i8 %a3, i32 7
+ %ins8 = insertelement <16 x i8> %ins7, i8 %a0, i32 8
+ %ins9 = insertelement <16 x i8> %ins8, i8 %a1, i32 9
+ %ins10 = insertelement <16 x i8> %ins9, i8 %a2, i32 10
+ %ins11 = insertelement <16 x i8> %ins10, i8 %a3, i32 11
+ %ins12 = insertelement <16 x i8> %ins11, i8 %a0, i32 12
+ %ins13 = insertelement <16 x i8> %ins12, i8 %a1, i32 13
+ %ins14 = insertelement <16 x i8> %ins13, i8 %a2, i32 14
+ %ins15 = insertelement <16 x i8> %ins14, i8 %a3, i32 15
+ store <16 x i8> %ins15, ptr %dst
+ ret void
+}
+
+define void @buildvector_v16i8_subseq_8(ptr %dst, i8 %a0, i8 %a1) nounwind {
+; CHECK-LABEL: buildvector_v16i8_subseq_8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 3
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 5
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 7
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 9
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 11
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 13
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
+; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 15
+; CHECK-NEXT: vst $vr0, $a0, 0
+; CHECK-NEXT: ret
+entry:
+ %ins0 = insertelement <16 x i8> undef, i8 %a0, i32 0
+ %ins1 = insertelement <16 x i8> %ins0, i8 %a1, i32 1
+ %ins2 = insertelement <16 x i8> %ins1, i8 %a0, i32 2
+ %ins3 = insertelement <16 x i8> %ins2, i8 %a1, i32 3
+ %ins4 = insertelement <16 x i8> %ins3, i8 %a0, i32 4
+ %ins5 = insertelement <16 x i8> %ins4, i8 %a1, i32 5
+ %ins6 = insertelement <16 x i8> %ins5, i8 %a0, i32 6
+ %ins7 = insertelement <16 x i8> %ins6, i8 %a1, i32 7
+ %ins8 = insertelement <16 x i8> %ins7, i8 %a0, i32 8
+ %ins9 = insertelement <16 x i8> %ins8, i8 %a1, i32 9
+ %ins10 = insertelement <16 x i8> %ins9, i8 %a0, i32 10
+ %ins11 = insertelement <16 x i8> %ins10, i8 %a1, i32 11
+ %ins12 = insertelement <16 x i8> %ins11, i8 %a0, i32 12
+ %ins13 = insertelement <16 x i8> %ins12, i8 %a1, i32 13
+ %ins14 = insertelement <16 x i8> %ins13, i8 %a0, i32 14
+ %ins15 = insertelement <16 x i8> %ins14, i8 %a1, i32 15
+ store <16 x i8> %ins15, ptr %dst
+ ret void
+}
+
define void @buildvector_v8i16(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
; CHECK-LABEL: buildvector_v8i16:
; CHECK: # %bb.0: # %entry
@@ -410,6 +584,58 @@ entry:
ret void
}
+define void @buildvector_v8i16_subseq_2(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3) nounwind {
+; CHECK-LABEL: buildvector_v8i16_subseq_2:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 1
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a3, 2
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a4, 3
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 5
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a3, 6
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a4, 7
+; CHECK-NEXT: vst $vr0, $a0, 0
+; CHECK-NEXT: ret
+entry:
+ %ins0 = insertelement <8 x i16> undef, i16 %a0, i32 0
+ %ins1 = insertelement <8 x i16> %ins0, i16 %a1, i32 1
+ %ins2 = insertelement <8 x i16> %ins1, i16 %a2, i32 2
+ %ins3 = insertelement <8 x i16> %ins2, i16 %a3, i32 3
+ %ins4 = insertelement <8 x i16> %ins3, i16 %a0, i32 4
+ %ins5 = insertelement <8 x i16> %ins4, i16 %a1, i32 5
+ %ins6 = insertelement <8 x i16> %ins5, i16 %a2, i32 6
+ %ins7 = insertelement <8 x i16> %ins6, i16 %a3, i32 7
+ store <8 x i16> %ins7, ptr %dst
+ ret void
+}
+
+define void @buildvector_v8i16_subseq_4(ptr %dst, i16 %a0, i16 %a1) nounwind {
+; CHECK-LABEL: buildvector_v8i16_subseq_4:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 1
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 3
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 5
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
+; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 7
+; CHECK-NEXT: vst $vr0, $a0, 0
+; CHECK-NEXT: ret
+entry:
+ %ins0 = insertelement <8 x i16> undef, i16 %a0, i32 0
+ %ins1 = insertelement <8 x i16> %ins0, i16 %a1, i32 1
+ %ins2 = insertelement <8 x i16> %ins1, i16 %a0, i32 2
+ %ins3 = insertelement <8 x i16> %ins2, i16 %a1, i32 3
+ %ins4 = insertelement <8 x i16> %ins3, i16 %a0, i32 4
+ %ins5 = insertelement <8 x i16> %ins4, i16 %a1, i32 5
+ %ins6 = insertelement <8 x i16> %ins5, i16 %a0, i32 6
+ %ins7 = insertelement <8 x i16> %ins6, i16 %a1, i32 7
+ store <8 x i16> %ins7, ptr %dst
+ ret void
+}
+
define void @buildvector_v4i32(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {
; CHECK-LABEL: buildvector_v4i32:
; CHECK: # %bb.0: # %entry
@@ -462,14 +688,41 @@ entry:
ret void
}
-define void @buildvector_v2i64(ptr %dst, i64 %a0, i64 %a1) nounwind {
-; CHECK-LABEL: buildvector_v2i64:
+define void @buildvector_v4i32_subseq_2(ptr %dst, i32 %a0, i32 %a1) nounwind {
+; CHECK-LABEL: buildvector_v4i32_subseq_2:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vinsgr2vr.d $vr0, $a1, 0
-; CHECK-NEXT: vinsgr2vr.d $vr0, $a2, 1
+; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
+; CHECK-NEXT: vinsgr2vr.w $vr0, $a2, 1
+; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
+; CHECK-NEXT: vinsgr2vr.w $vr0, $a2, 3
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
+ %ins0 = insertelement <4 x i32> undef, i32 %a0, i32 0
+ %ins1 = insertelement <4 x i32> %ins0, i32 %a1, i32 1
+ %ins2 = insertelement <4 x i32> %ins1, i32 %a0, i32 2
+ %ins3 = insertelement <4 x i32> %ins2, i32 %a1, i32 3
+ store <4 x i32> %ins3, ptr %dst
+ ret void
+}
+
+define void @buildvector_v2i64(ptr %dst, i64 %a0, i64 %a1) nounwind {
+; LA32-LABEL: buildvector_v2i64:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
+; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 1
+; LA32-NEXT: vinsgr2vr.w $vr0, $a3, 2
+; LA32-NEXT: vinsgr2vr.w $vr0, $a4, 3
+; LA32-NEXT: vst $vr0, $a0, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: buildvector_v2i64:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vinsgr2vr.d $vr0, $a1, 0
+; LA64-NEXT: vinsgr2vr.d $vr0, $a2, 1
+; LA64-NEXT: vst $vr0, $a0, 0
+; LA64-NEXT: ret
+entry:
%ins0 = insertelement <2 x i64> undef, i64 %a0, i32 0
%ins1 = insertelement <2 x i64> %ins0, i64 %a1, i32 1
store <2 x i64> %ins1, ptr %dst
@@ -477,11 +730,18 @@ entry:
}
define void @buildvector_v2i64_partial(ptr %dst, i64 %a0) nounwind {
-; CHECK-LABEL: buildvector_v2i64_partial:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vinsgr2vr.d $vr0, $a1, 0
-; CHECK-NEXT: vst $vr0, $a0, 0
-; CHECK-NEXT: ret
+; LA32-LABEL: buildvector_v2i64_partial:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
+; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 1
+; LA32-NEXT: vst $vr0, $a0, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: buildvector_v2i64_partial:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vinsgr2vr.d $vr0, $a1, 0
+; LA64-NEXT: vst $vr0, $a0, 0
+; LA64-NEXT: ret
entry:
%ins0 = insertelement <2 x i64> undef, i64 %a0, i32 0
%ins1 = insertelement <2 x i64> %ins0, i64 undef, i32 1
@@ -490,12 +750,20 @@ entry:
}
define void @buildvector_v2i64_with_constant(ptr %dst, i64 %a1) nounwind {
-; CHECK-LABEL: buildvector_v2i64_with_constant:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vrepli.b $vr0, 0
-; CHECK-NEXT: vinsgr2vr.d $vr0, $a1, 1
-; CHECK-NEXT: vst $vr0, $a0, 0
-; CHECK-NEXT: ret
+; LA32-LABEL: buildvector_v2i64_with_constant:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT: vrepli.b $vr0, 0
+; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 2
+; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 3
+; LA32-NEXT: vst $vr0, $a0, 0
+; LA32-NEXT: ret
+;
+; LA64-LABEL: buildvector_v2i64_with_constant:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: vrepli.b $vr0, 0
+; LA64-NEXT: vinsgr2vr.d $vr0, $a1, 1
+; LA64-NEXT: vst $vr0, $a0, 0
+; LA64-NEXT: ret
entry:
%ins0 = insertelement <2 x i64> undef, i64 0, i32 0
%ins1 = insertelement <2 x i64> %ins0, i64 %a1, i32 1
@@ -562,6 +830,26 @@ entry:
ret void
}
+define void @buildvector_v4f32_subseq_2(ptr %dst, float %a0, float %a1) nounwind {
+; CHECK-LABEL: buildvector_v4f32_subseq_2:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: # kill: def $f1 killed $f1 def $vr1
+; CHECK-NEXT: # kill: def $f0 killed $f0 def $vr0
+; CHECK-NEXT: vori.b $vr2, $vr0, 0
+; CHECK-NEXT: vextrins.w $vr2, $vr1, 16
+; CHECK-NEXT: vextrins.w $vr2, $vr0, 32
+; CHECK-NEXT: vextrins.w $vr2, $vr1, 48
+; CHECK-NEXT: vst $vr2, $a0, 0
+; CHECK-NEXT: ret
+entry:
+ %ins0 = insertelement <4 x float> undef, float %a0, i32 0
+ %ins1 = insertelement <4 x float> %ins0, float %a1, i32 1
+ %ins2 = insertelement <4 x float> %ins1, float %a0, i32 2
+ %ins3 = insertelement <4 x float> %ins2, float %a1, i32 3
+ store <4 x float> %ins3, ptr %dst
+ ret void
+}
+
define void @buildvector_v2f64(ptr %dst, double %a0, double %a1) nounwind {
; CHECK-LABEL: buildvector_v2f64:
; CHECK: # %bb.0: # %entry
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 14:53:35 +0000