diff options
Diffstat (limited to 'llvm/test/CodeGen/LoongArch/lasx/vselect.ll')
| -rw-r--r-- | llvm/test/CodeGen/LoongArch/lasx/vselect.ll | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/LoongArch/lasx/vselect.ll b/llvm/test/CodeGen/LoongArch/lasx/vselect.ll index 17ba28afc81f..44e4f71c8d08 100644 --- a/llvm/test/CodeGen/LoongArch/lasx/vselect.ll +++ b/llvm/test/CodeGen/LoongArch/lasx/vselect.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s +; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32 +; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64 define void @select_v32i8_imm(ptr %res, ptr %a0) nounwind { ; CHECK-LABEL: select_v32i8_imm: @@ -49,16 +50,26 @@ define void @select_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind { } define void @select_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind { -; CHECK-LABEL: select_v8i32: -; CHECK: # %bb.0: -; CHECK-NEXT: xvld $xr0, $a1, 0 -; CHECK-NEXT: xvld $xr1, $a2, 0 -; CHECK-NEXT: ori $a1, $zero, 0 -; CHECK-NEXT: lu32i.d $a1, -1 -; CHECK-NEXT: xvreplgr2vr.d $xr2, $a1 -; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2 -; CHECK-NEXT: xvst $xr0, $a0, 0 -; CHECK-NEXT: ret +; LA32-LABEL: select_v8i32: +; LA32: # %bb.0: +; LA32-NEXT: xvld $xr0, $a1, 0 +; LA32-NEXT: xvld $xr1, $a2, 0 +; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI3_0) +; LA32-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI3_0) +; LA32-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2 +; LA32-NEXT: xvst $xr0, $a0, 0 +; LA32-NEXT: ret +; +; LA64-LABEL: select_v8i32: +; LA64: # %bb.0: +; LA64-NEXT: xvld $xr0, $a1, 0 +; LA64-NEXT: xvld $xr1, $a2, 0 +; LA64-NEXT: ori $a1, $zero, 0 +; LA64-NEXT: lu32i.d $a1, -1 +; LA64-NEXT: xvreplgr2vr.d $xr2, $a1 +; LA64-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2 +; LA64-NEXT: xvst $xr0, $a0, 0 +; LA64-NEXT: ret %v0 = load <8 x i32>, ptr %a0 %v1 = load <8 x i32>, ptr %a1 %sel = select <8 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <8 x i32> %v0, <8 x i32> %v1 |