1 files changed, 23 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/LoongArch/lasx/inline-asm-reg-names.ll b/llvm/test/CodeGen/LoongArch/lasx/inline-asm-reg-names.ll
index dd400ecfcf91..1289892b2c03 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/inline-asm-reg-names.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/inline-asm-reg-names.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
 
 define void @register_xr1() nounwind {
 ; CHECK-LABEL: register_xr1:
@@ -42,16 +43,27 @@ entry:
 ;; is a callee-saved register which is preserved across calls.
 ;; That's why the fst.d and fld.d instructions are emitted.
 define void @register_xr31() nounwind {
-; CHECK-LABEL: register_xr31:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addi.d $sp, $sp, -16
-; CHECK-NEXT:    fst.d $fs7, $sp, 8 # 8-byte Folded Spill
-; CHECK-NEXT:    #APP
-; CHECK-NEXT:    xvldi $xr31, 1
-; CHECK-NEXT:    #NO_APP
-; CHECK-NEXT:    fld.d $fs7, $sp, 8 # 8-byte Folded Reload
-; CHECK-NEXT:    addi.d $sp, $sp, 16
-; CHECK-NEXT:    ret
+; LA32-LABEL: register_xr31:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    addi.w $sp, $sp, -16
+; LA32-NEXT:    fst.d $fs7, $sp, 8 # 8-byte Folded Spill
+; LA32-NEXT:    #APP
+; LA32-NEXT:    xvldi $xr31, 1
+; LA32-NEXT:    #NO_APP
+; LA32-NEXT:    fld.d $fs7, $sp, 8 # 8-byte Folded Reload
+; LA32-NEXT:    addi.w $sp, $sp, 16
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: register_xr31:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    addi.d $sp, $sp, -16
+; LA64-NEXT:    fst.d $fs7, $sp, 8 # 8-byte Folded Spill
+; LA64-NEXT:    #APP
+; LA64-NEXT:    xvldi $xr31, 1
+; LA64-NEXT:    #NO_APP
+; LA64-NEXT:    fld.d $fs7, $sp, 8 # 8-byte Folded Reload
+; LA64-NEXT:    addi.d $sp, $sp, 16
+; LA64-NEXT:    ret
 entry:
   %0 = tail call <4 x i64> asm sideeffect "xvldi ${0:u}, 1", "={$xr31}"()
   ret void