diff options
Diffstat (limited to 'llvm/test/CodeGen/DirectX')
107 files changed, 1503 insertions, 941 deletions
diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll index 9f87f5bc58f2..261bbe164e5f 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll @@ -13,7 +13,7 @@ define void @test_overlapping() { entry: - %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, i1 false, ptr @A.str) - %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 10, i32 4, i1 false, ptr @B.str) + %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, ptr @A.str) + %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 10, i32 4, ptr @B.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll index dd50428b4b7a..f4242f878fbe 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll @@ -13,7 +13,7 @@ define void @test_overlapping() { entry: - %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, i1 false, ptr @R.str) - %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, i1 false, ptr @S.str) + %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, ptr @R.str) + %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 10, i32 5, i32 1, i32 0, ptr @S.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll index 31b1dbfc595f..67365ee3b64f 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll @@ -30,16 +30,16 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() "hlsl.export" { entry: - %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @A.str) + %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @A.str) store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4 - %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, i1 false, ptr @B.str) + %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, ptr @B.str) store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4 - %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, i1 false, ptr @C.str) + %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 4, ptr @C.str) store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4 - %h4 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @S.str) + %h4 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @S.str) store target("dx.TypedBuffer", float, 1, 0, 0) %h4, ptr @Four, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll index 8ca87089e5e1..bd8dda7858f9 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll @@ -28,13 +28,13 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() "hlsl.export" { entry: - %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 5, i32 0, i1 false, ptr @A.str) + %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 5, i32 0, ptr @A.str) store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4 - %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 2, i32 0, i1 false, ptr @B.str) + %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 2, i32 0, ptr @B.str) store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4 - %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 3, i32 4, i1 false, ptr @C.str) + %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 3, i32 4, ptr @C.str) store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll index 7f1631703fb4..b047a22db5fb 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll @@ -26,13 +26,13 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() "hlsl.export" { entry: - %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 1, i32 5, i32 0, i1 false, ptr @A.str) + %h1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 1, i32 5, i32 0, ptr @A.str) store target("dx.RawBuffer", float, 0, 0) %h1, ptr @One, align 4 - %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 2, i32 6, i32 0, i1 false, ptr @B.str) + %h2 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 2, i32 6, i32 0, ptr @B.str) store target("dx.RawBuffer", float, 0, 0) %h2, ptr @Two, align 4 - %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 6, i32 3, i32 4, i1 false, ptr @C.str) + %h3 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 11, i32 6, i32 3, i32 4, ptr @C.str) store target("dx.RawBuffer", float, 0, 0) %h3, ptr @Three, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll index 3c37e639f0ed..a58e85b4159f 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll @@ -17,8 +17,8 @@ target triple = "dxil-pc-shadermodel6.3-library" define void @test_overlapping() { entry: - %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 3, i32 0, i1 false, ptr @A.str) - %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 4, i32 -1, i32 0, i1 false, ptr @B.str) - %h3 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 17, i32 1, i32 0, i1 false, ptr @C.str) + %h1 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 3, i32 0, ptr @A.str) + %h2 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 4, i32 -1, i32 0, ptr @B.str) + %h3 = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 17, i32 1, i32 0, ptr @C.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll index 25f81dd26b9d..9c52d6ed3486 100644 --- a/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll +++ b/llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll @@ -21,15 +21,15 @@ entry: ; Buffer<double> A[2] : register(t2, space4); %h0 = call target("dx.TypedBuffer", double, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 2, i32 10, i1 false, ptr @A.str) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 2, i32 10, ptr @A.str) ; Buffer<double> B : register(t20, space5); %h1 = call target("dx.TypedBuffer", i64, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, i1 false, ptr @B.str) + @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, ptr @B.str) ; Buffer<double> C[] : register(t2, space4); %h2 = call target("dx.TypedBuffer", double, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, i1 false, ptr @C.str) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @C.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll b/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll index 6f0ef2964976..b433bcee9029 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll @@ -7,7 +7,7 @@ target triple = "dxil-pc-shadermodel6.1-compute" define void @loadf32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle %{{.*}}, i32 %index, i32 0) %load = call {float, i1} @@ -23,7 +23,7 @@ define void @loadf32_struct(i32 %index) { define void @loadv4f32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle %{{.*}}, i32 %offset, i32 0) %load = call {<4 x float>, i1} @@ -39,7 +39,7 @@ define void @loadv4f32_byte(i32 %offset) { define void @loadnested(i32 %index) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATAI32:%.*]] = call %dx.types.ResRet.i32 @dx.op.bufferLoad.i32(i32 68, %dx.types.Handle %{{.*}}, i32 %index, i32 0) %loadi32 = call {i32, i1} @llvm.dx.resource.load.rawbuffer.i32( diff --git a/llvm/test/CodeGen/DirectX/BufferLoad.ll b/llvm/test/CodeGen/DirectX/BufferLoad.ll index 589d551d5ae9..77f56a0f07b0 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoad.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoad.ll @@ -11,7 +11,7 @@ define void @loadv4f32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -70,7 +70,7 @@ define void @index_dynamic(i32 %bufindex, i32 %elemindex) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[LOAD:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 %bufindex, i32 undef) #[[#ATTR]] %load = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer( @@ -106,7 +106,7 @@ define void @loadf32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %load0 = call {float, i1} @llvm.dx.resource.load.typedbuffer( @@ -125,7 +125,7 @@ define void @loadv2f32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <2 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<2 x float>, i1} @llvm.dx.resource.load.typedbuffer( @@ -139,7 +139,7 @@ define void @loadv4f32_checkbit() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f32 @dx.op.bufferLoad.f32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer.f32( @@ -160,7 +160,7 @@ define void @loadv4i32() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.i32 @dx.op.bufferLoad.i32(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x i32>, i1} @llvm.dx.resource.load.typedbuffer( @@ -174,7 +174,7 @@ define void @loadv4f16() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x half>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.f16 @dx.op.bufferLoad.f16(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x half>, i1} @llvm.dx.resource.load.typedbuffer( @@ -188,7 +188,7 @@ define void @loadv4i16() { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i16>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i16_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = call %dx.types.ResRet.i16 @dx.op.bufferLoad.i16(i32 68, %dx.types.Handle [[HANDLE]], i32 0, i32 undef) #[[#ATTR]] %data0 = call {<4 x i16>, i1} @llvm.dx.resource.load.typedbuffer( @@ -202,7 +202,7 @@ define void @loadf64() { ; CHECK: [[B1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 1, i32 1, i32 0, i8 1 }, i32 1, i1 false) #0 %buffer = call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; CHECK: [[BA:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[B1]], %dx.types.ResourceProperties { i32 4106, i32 266 }) #0 %load = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer( @@ -218,7 +218,7 @@ define void @loadv2f64() { ; CHECK: [[B1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 1, i32 1, i32 0, i8 1 }, i32 1, i1 false) #0 %buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; CHECK: [[BA:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[B1]], %dx.types.ResourceProperties { i32 4106, i32 522 }) #0 %load = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer( diff --git a/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll b/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll index 25abf2111060..fb81f5e31ad1 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoadDouble.ll @@ -6,10 +6,10 @@ define void @loadf64() { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", double, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we load an <2 x i32> instead of a double ; CHECK-NOT: call {double, i1} @llvm.dx.resource.load.typedbuffer @@ -33,10 +33,10 @@ define void @loadv2f64() { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we load an <4 x i32> instead of a double2 ; CHECK: [[L0:%.*]] = call { <4 x i32>, i1 } @@ -65,10 +65,10 @@ define void @loadf64WithCheckBit() { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.TypedBuffer", double, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we load an <2 x i32> instead of a double ; CHECK-NOT: call {double, i1} @llvm.dx.resource.load.typedbuffer diff --git a/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll b/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll index 42c0012ff347..3107d7e90494 100644 --- a/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll +++ b/llvm/test/CodeGen/DirectX/BufferLoadInt64.ll @@ -5,7 +5,7 @@ target triple = "dxil-pc-shadermodel6.2-compute" define void @loadi64() { ; CHECK-LABEL: define void @loadi64() { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP1:%.*]] = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v2i32.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0) ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <2 x i32>, i1 } [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[TMP2]], i32 0 @@ -16,14 +16,14 @@ define void @loadi64() { ; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]] ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %result = call { i64, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0) ret void } define void @loadv2i64() { ; CHECK-LABEL: define void @loadv2i64() { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP1:%.*]] = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v4i32.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0) ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x i32>, i1 } [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP2]], i32 0 @@ -42,7 +42,7 @@ define void @loadv2i64() { ; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x i64> [[TMP11]], i64 [[TMP15]], i32 1 ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %result = call { <2 x i64>, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0) ret void } diff --git a/llvm/test/CodeGen/DirectX/BufferStore-errors.ll b/llvm/test/CodeGen/DirectX/BufferStore-errors.ll index 663de830502c..e8aadbbf54bc 100644 --- a/llvm/test/CodeGen/DirectX/BufferStore-errors.ll +++ b/llvm/test/CodeGen/DirectX/BufferStore-errors.ll @@ -9,7 +9,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storetoomany(<5 x float> %data, i32 %index) "hlsl.export" { %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v4f32_1_0_0t.v5f32( target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %buffer, diff --git a/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll b/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll index dff28dbde82b..188ac75c5d1a 100644 --- a/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll +++ b/llvm/test/CodeGen/DirectX/BufferStore-sm61.ll @@ -7,7 +7,7 @@ target triple = "dxil-pc-shadermodel6.1-compute" define void @storef32_struct(i32 %index, float %data) { %buffer = call target("dx.RawBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %{{.*}}, i32 %index, i32 0, float %data, float undef, float undef, float undef, i8 1) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -21,7 +21,7 @@ define void @storef32_struct(i32 %index, float %data) { define void @storef32_byte(i32 %offset, float %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.bufferStore.f32(i32 69, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, float %data, float undef, float undef, float undef, i8 1) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -35,7 +35,7 @@ define void @storef32_byte(i32 %offset, float %data) { define void @storev4f32_struct(i32 %index, <4 x float> %data) { %buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -53,7 +53,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) { define void @storev4f32_byte(i32 %offset, <4 x float> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -71,7 +71,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) { define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0_0:%.*]] = extractelement <4 x float> %data0, i32 0 ; CHECK: [[DATA0_1:%.*]] = extractelement <4 x float> %data0, i32 1 @@ -98,7 +98,7 @@ define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> %data2) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.bufferStore.i32(i32 69, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i32 %data0, i32 undef, i32 undef, i32 undef, i8 1) call void @llvm.dx.resource.store.rawbuffer.i32( diff --git a/llvm/test/CodeGen/DirectX/BufferStore.ll b/llvm/test/CodeGen/DirectX/BufferStore.ll index 39d578edb42e..bd225686fedb 100644 --- a/llvm/test/CodeGen/DirectX/BufferStore.ll +++ b/llvm/test/CodeGen/DirectX/BufferStore.ll @@ -9,7 +9,7 @@ define void @storefloats(<4 x float> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -33,7 +33,7 @@ define void @storeonefloat(float %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -53,7 +53,7 @@ define void @storetwofloat(<2 x float> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <2 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -75,7 +75,7 @@ define void @storeint(<4 x i32> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i32>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0_0:%.*]] = extractelement <4 x i32> %data, i32 0 ; CHECK: [[DATA0_1:%.*]] = extractelement <4 x i32> %data, i32 1 @@ -96,7 +96,7 @@ define void @storehalf(<4 x half> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -120,7 +120,7 @@ define void @storei16(<4 x i16> %data, i32 %index) { ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x i16>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4i16_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -144,7 +144,7 @@ define void @store_scalarized_floats(float %data0, float %data1, float %data2, f ; CHECK: [[HANDLE:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; We shouldn't end up with any inserts/extracts. ; CHECK-NOT: insertelement @@ -168,7 +168,7 @@ define void @storef64(<2 x i32> %0) { %buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle @@ -187,7 +187,7 @@ define void @storev2f64(<4 x i32> %0) { %buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; The temporary casts should all have been cleaned up ; CHECK-NOT: %dx.resource.casthandle diff --git a/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll b/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll index 9c3dab0cc1e4..35c6f7ef537b 100644 --- a/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll +++ b/llvm/test/CodeGen/DirectX/BufferStoreDouble.ll @@ -5,10 +5,10 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storef64(double %0) { ; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", double, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we split the double and store the lo and hi bits ; CHECK: [[SD:%.*]] = call { i32, i32 } @llvm.dx.splitdouble.i32(double %0) @@ -28,10 +28,10 @@ define void @storef64(double %0) { define void @storev2f64(<2 x double> %0) { ; CHECK: [[B:%.*]] = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[SD:%.*]] = call { <2 x i32>, <2 x i32> } ; CHECK-SAME: @llvm.dx.splitdouble.v2i32(<2 x double> %0) diff --git a/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll b/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll index c97a02d1873a..1241701dbb78 100644 --- a/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll +++ b/llvm/test/CodeGen/DirectX/BufferStoreInt64.ll @@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storei64(i64 %0) { ; CHECK-LABEL: define void @storei64( ; CHECK-SAME: i64 [[TMP0:%.*]]) { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP0]], 32 ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32 @@ -15,7 +15,7 @@ define void @storei64(i64 %0) { ; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t.v2i32(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0, <2 x i32> [[TMP6]]) ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0,i64 %0) ret void } @@ -24,7 +24,7 @@ define void @storei64(i64 %0) { define void @storev2i64(<2 x i64> %0) { ; CHECK-LABEL: define void @storev2i64( ; CHECK-SAME: <2 x i64> [[TMP0:%.*]]) { -; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i64> [[TMP0]] to <2 x i32> ; CHECK-NEXT: [[TMP3:%.*]] = lshr <2 x i64> [[TMP0]], splat (i64 32) ; CHECK-NEXT: [[TMP4:%.*]] = trunc <2 x i64> [[TMP3]] to <2 x i32> @@ -32,7 +32,7 @@ define void @storev2i64(<2 x i64> %0) { ; CHECK-NEXT: call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t.v4i32(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0, <4 x i32> [[TMP13]]) ; CHECK-NEXT: ret void ; - %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0, <2 x i64> %0) ret void } diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll index bb0bcc5296c3..52ad0f3df1ab 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll @@ -13,7 +13,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_36_0tt(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_36_0tt(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 36, 0)) %CB.cb_h, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll index b4493bbd61f0..db4e14c1336a 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll @@ -27,7 +27,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 608, 624, 656)) %CB.cb_h.i.i, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll index 001f3320137a..a78fdd5037f9 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll @@ -25,7 +25,7 @@ ; CHECK: define void @f( define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 708, 0, 48, 112, 176, 224, 272, 288, 320)) %CB.cb_h.i.i, ptr @CB.cb, align 4 %a1.copy = alloca [3 x float], align 4 diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll index f062b3e85962..7857c25d6963 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll @@ -25,7 +25,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 32, 0, 4, 8, 12, 14, 16, 24)) %CB.cb_h.i.i, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll b/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll index f46c91f3ef5f..4160008a986a 100644 --- a/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll +++ b/llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll @@ -23,7 +23,7 @@ ; CHECK: define void @f define void @f(ptr %dst) { entry: - %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 102, 0, 16, 40, 48, 80, 96)) %CB.cb_h.i.i, ptr @CB.cb, align 4 ; CHECK: [[CB:%.*]] = load target("dx.CBuffer", {{.*}})), ptr @CB.cb diff --git a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll index 7fe6e038fa7e..71dcf11b9dc8 100644 --- a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll +++ b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll @@ -12,7 +12,7 @@ declare void @f16_user(half) ; CHECK-SAME: Type mismatch between intrinsic and DXIL op define void @four64() "hlsl.export" { %buffer = call target("dx.CBuffer", target("dx.Layout", {double}, 8, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {double, double, double, double} @llvm.dx.resource.load.cbufferrow.4( target("dx.CBuffer", target("dx.Layout", {double}, 8, 0)) %buffer, @@ -29,7 +29,7 @@ define void @four64() "hlsl.export" { ; CHECK-SAME: Type mismatch between intrinsic and DXIL op define void @two32() "hlsl.export" { %buffer = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, float} @llvm.dx.resource.load.cbufferrow.2( target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) %buffer, diff --git a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll index c2df5efb69ed..d6906516b716 100644 --- a/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll +++ b/llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll @@ -9,7 +9,7 @@ declare void @f16_user(half) ; CHECK-LABEL: define void @loadf32 define void @loadf32() { %buffer = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f32 @dx.op.cbufferLoadLegacy.f32(i32 59, %dx.types.Handle %{{.*}}, i32 0) %load = call {float, float, float, float} @llvm.dx.resource.load.cbufferrow.4( @@ -28,7 +28,7 @@ define void @loadf32() { define void @loadf64() { %buffer = call target("dx.CBuffer", target("dx.Layout", {double, double, double, double}, 64, 0, 8, 16, 24)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f64 @dx.op.cbufferLoadLegacy.f64(i32 59, %dx.types.Handle %{{.*}}, i32 1) %load = call {double, double} @llvm.dx.resource.load.cbufferrow.2( @@ -47,7 +47,7 @@ define void @loadf64() { define void @loadf16() { %buffer = call target("dx.CBuffer", target("dx.Layout", {half}, 2, 0)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.CBufRet.f16.8 @dx.op.cbufferLoadLegacy.f16(i32 59, %dx.types.Handle %{{.*}}, i32 0) %load = call {half, half, half, half, half, half, half, half} @llvm.dx.resource.load.cbufferrow.8( diff --git a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll index aad1f92e4a5a..bcf82a67a55d 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll @@ -14,12 +14,12 @@ target triple = "dxil-unknown-shadermodel6.0-compute" define void @main() #0 { %uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) %srv0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) %cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll index 8533ab2478db..bea03102e4cc 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll @@ -15,7 +15,7 @@ define void @main() #0 { ; CHECK: Flags: ; CHECK: UsedByAtomic64: false %cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 3, i32 2, i32 1, i32 0, ptr null) ; ByteAddressBuffer Buf : register(t8, space1) ; CHECK: - Type: SRVRaw @@ -27,7 +27,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %srv0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; struct S { float4 a; uint4 b; }; ; StructuredBuffer<S> Buf : register(t2, space4) @@ -40,7 +40,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t( - i32 4, i32 2, i32 1, i32 0, i1 false, ptr null) + i32 4, i32 2, i32 1, i32 0, ptr null) ; Buffer<uint4> Buf[24] : register(t3, space5) ; CHECK: - Type: SRVTyped @@ -52,7 +52,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0t( - i32 5, i32 3, i32 24, i32 0, i1 false, ptr null) + i32 5, i32 3, i32 24, i32 0, ptr null) ; RWBuffer<int> Buf : register(u7, space2) ; CHECK: - Type: UAVTyped @@ -64,7 +64,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) ; RWBuffer<float4> Buf : register(u5, space3) ; CHECK: - Type: UAVTyped @@ -76,7 +76,7 @@ define void @main() #0 { ; CHECK: UsedByAtomic64: false %uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( - i32 3, i32 5, i32 1, i32 0, i1 false, ptr null) + i32 3, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<float4> BufferArray[10] : register(u0, space4) ; CHECK: - Type: UAVTyped @@ -89,11 +89,11 @@ define void @main() #0 { ; RWBuffer<float4> Buf = BufferArray[0] %uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( - i32 4, i32 0, i32 10, i32 0, i1 false, ptr null) + i32 4, i32 0, i32 10, i32 0, ptr null) ; RWBuffer<float4> Buf = BufferArray[5] %uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( - i32 4, i32 0, i32 10, i32 5, i1 false, ptr null) + i32 4, i32 0, i32 10, i32 5, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll index 8eb7f90c6b75..1bc9b8593581 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll @@ -59,7 +59,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ;DXC-NEXT: NumRootParameters: 1 ;DXC-NEXT: RootParametersOffset: 24 ;DXC-NEXT: NumStaticSamplers: 0 -;DXC-NEXT: StaticSamplersOffset: 0 +;DXC-NEXT: StaticSamplersOffset: 380 ;DXC-NEXT: Parameters: ;DXC-NEXT: - ParameterType: 0 ;DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll index 053721de1eb1..fec6c4c95964 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinationsV1.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 84 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 0 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll index 8e9b4b43b11a..4f6f0d0bd6a1 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable.ll @@ -26,7 +26,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 92 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 0 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll index 10235b7d1796..165e4803f870 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Flags.ll @@ -25,6 +25,6 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 0 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 24 ; DXC-NEXT: Parameters: [] ; DXC-NEXT: AllowInputAssemblerInputLayout: true diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll index 6477ad397c32..6c6739d6ed39 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll @@ -25,26 +25,26 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ;CHECK-NEXT: Version: 2 ;CHECK-NEXT: RootParametersOffset: 24 ;CHECK-NEXT: NumParameters: 3 -;CHECK-NEXT: - Parameter Type: 1 -;CHECK-NEXT: Shader Visibility: 0 +;CHECK-NEXT: - Parameter Type: Constants32Bit +;CHECK-NEXT: Shader Visibility: All ;CHECK-NEXT: Register Space: 2 ;CHECK-NEXT: Shader Register: 1 ;CHECK-NEXT: Num 32 Bit Values: 3 -;CHECK-NEXT: - Parameter Type: 3 -;CHECK-NEXT: Shader Visibility: 1 +;CHECK-NEXT: - Parameter Type: SRV +;CHECK-NEXT: Shader Visibility: Vertex ;CHECK-NEXT: Register Space: 5 ;CHECK-NEXT: Shader Register: 4 ;CHECK-NEXT: Flags: 4 -;CHECK-NEXT: - Parameter Type: 0 -;CHECK-NEXT: Shader Visibility: 0 +;CHECK-NEXT: - Parameter Type: DescriptorTable +;CHECK-NEXT: Shader Visibility: All ;CHECK-NEXT: NumRanges: 2 -;CHECK-NEXT: - Range Type: 0 +;CHECK-NEXT: - Range Type: SRV ;CHECK-NEXT: Register Space: 0 ;CHECK-NEXT: Base Shader Register: 1 ;CHECK-NEXT: Num Descriptors: 1 ;CHECK-NEXT: Offset In Descriptors From Table Start: 4294967295 ;CHECK-NEXT: Flags: 4 -;CHECK-NEXT: - Range Type: 1 +;CHECK-NEXT: - Range Type: UAV ;CHECK-NEXT: Register Space: 10 ;CHECK-NEXT: Base Shader Register: 1 ;CHECK-NEXT: Num Descriptors: 5 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll index 964554fe143e..d217f396722b 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 48 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 1 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll index f77bb96840be..54292bb65153 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 48 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 2 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll index ddf556e7fe20..891a03b688a8 100644 --- a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootDescriptor_V1.ll @@ -24,7 +24,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } ; DXC-NEXT: NumRootParameters: 1 ; DXC-NEXT: RootParametersOffset: 24 ; DXC-NEXT: NumStaticSamplers: 0 -; DXC-NEXT: StaticSamplersOffset: 0 +; DXC-NEXT: StaticSamplersOffset: 44 ; DXC-NEXT: Parameters: ; DXC-NEXT: - ParameterType: 2 ; DXC-NEXT: ShaderVisibility: 0 diff --git a/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Target.ll b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Target.ll new file mode 100644 index 000000000000..76212a0f66f9 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Target.ll @@ -0,0 +1,23 @@ +; RUN: opt %s -dxil-embed -dxil-globals -S -o - | FileCheck %s +; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC + +target triple = "dxil-unknown-shadermodel1.1-rootsignature" + +; CHECK: @dx.rts0 = private constant [24 x i8] c"{{.*}}", section "RTS0", align 4 + +!dx.rootsignatures = !{!2} ; list of function/root signature pairs +!2 = !{ null, !3, i32 2 } ; function, root signature, version +!3 = !{ !4 } ; list of root signature elements +!4 = !{ !"RootFlags", i32 1 } ; 1 = allow_input_assembler_input_layout + +; DXC: - Name: RTS0 +; DXC-NEXT: Size: 24 +; DXC-NEXT: RootSignature: +; DXC-NEXT: Version: 2 +; DXC-NEXT: NumRootParameters: 0 +; DXC-NEXT: RootParametersOffset: 24 +; DXC-NEXT: NumStaticSamplers: 0 +; DXC-NEXT: StaticSamplersOffset: 24 +; DXC-NEXT: Parameters: [] +; DXC-NEXT: AllowInputAssemblerInputLayout: true + diff --git a/llvm/test/CodeGen/DirectX/CreateHandle.ll b/llvm/test/CodeGen/DirectX/CreateHandle.ll index c471fb07c26a..6cca501bb256 100644 --- a/llvm/test/CodeGen/DirectX/CreateHandle.ll +++ b/llvm/test/CodeGen/DirectX/CreateHandle.ll @@ -25,14 +25,14 @@ define void @test_buffers() { ; RWBuffer<float4> Buf : register(u5, space3) %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 3, i32 5, i32 1, i32 0, i1 false, ptr @BufA.str) + i32 3, i32 5, i32 1, i32 0, ptr @BufA.str) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 1, i32 5, i1 false) #[[#ATTR:]] ; CHECK-NOT: @llvm.dx.cast.handle ; RWBuffer<int> Buf : register(u7, space2) %typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_1t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32 7, i1 false) #[[#ATTR]] ; Buffer<uint4> Buf[24] : register(t3, space5) @@ -40,20 +40,20 @@ define void @test_buffers() { ; Note that the index below is 3 + 4 = 7 %typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0_0t( - i32 5, i32 3, i32 24, i32 4, i1 false, ptr @BufB.str) + i32 5, i32 3, i32 24, i32 4, ptr @BufB.str) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 3, i32 7, i1 false) #[[#ATTR]] ; struct S { float4 a; uint4 b; }; ; StructuredBuffer<S> Buf : register(t2, space4) %struct0 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t( - i32 4, i32 2, i32 1, i32 0, i1 true, ptr null) - ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 2, i32 2, i1 true) #[[#ATTR]] + i32 4, i32 2, i32 1, i32 0, ptr null) + ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 2, i32 2, i1 false) #[[#ATTR]] ; ByteAddressBuffer Buf : register(t8, space1) %byteaddr0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 1, i32 8, i1 false) #[[#ATTR]] ; Buffer<float4> Buf[] : register(t7) @@ -61,7 +61,7 @@ define void @test_buffers() { %typed3_ix = call i32 @some_val() %typed3 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0t( - i32 0, i32 7, i32 -1, i32 %typed3_ix, i1 false, ptr null) + i32 0, i32 7, i32 -1, i32 %typed3_ix, ptr null) ; CHECK: %[[IX:.*]] = add i32 %typed3_ix, 7 ; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 0, i32 %[[IX]], i1 false) #[[#ATTR]] diff --git a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll index 4af5d4189751..38f2de28dbe5 100644 --- a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll +++ b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll @@ -26,14 +26,14 @@ define void @test_bindings() { ; RWBuffer<float4> Buf : register(u5, space3) %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 3, i32 5, i32 1, i32 0, i1 false, ptr @BufA.str) + i32 3, i32 5, i32 1, i32 0, ptr @BufA.str) ; CHECK: [[BUF0:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 5, i32 5, i32 3, i8 1 }, i32 5, i1 false) #[[#ATTR:]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF0]], %dx.types.ResourceProperties { i32 4106, i32 1033 }) #[[#ATTR]] ; RWBuffer<int> Buf : register(u7, space2) %typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t( - i32 2, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 2, i32 7, i32 1, i32 0, ptr null) ; CHECK: [[BUF1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 7, i32 2, i8 1 }, i32 7, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF1]], %dx.types.ResourceProperties { i32 4106, i32 260 }) #[[#ATTR]] @@ -42,7 +42,7 @@ define void @test_bindings() { ; Note that the index below is 3 + 4 = 7 %typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0_0t( - i32 5, i32 3, i32 24, i32 4, i1 false, ptr @BufB.str) + i32 5, i32 3, i32 24, i32 4, ptr @BufB.str) ; CHECK: [[BUF2:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 3, i32 26, i32 5, i8 0 }, i32 7, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF2]], %dx.types.ResourceProperties { i32 10, i32 1029 }) #[[#ATTR]] @@ -50,14 +50,14 @@ define void @test_bindings() { ; StructuredBuffer<S> Buf : register(t2, space4) %struct0 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t( - i32 4, i32 2, i32 1, i32 0, i1 true, ptr null) - ; CHECK: [[BUF3:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 2, i32 2, i32 4, i8 0 }, i32 2, i1 true) #[[#ATTR]] + i32 4, i32 2, i32 1, i32 0, ptr null) + ; CHECK: [[BUF3:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 2, i32 2, i32 4, i8 0 }, i32 2, i1 false) #[[#ATTR]] ; CHECK: = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF3]], %dx.types.ResourceProperties { i32 1036, i32 32 }) #[[#ATTR]] ; ByteAddressBuffer Buf : register(t8, space1) %byteaddr0 = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK: [[BUF4:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 8, i32 8, i32 1, i8 0 }, i32 8, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF4]], %dx.types.ResourceProperties { i32 11, i32 0 }) #[[#ATTR]] @@ -66,14 +66,14 @@ define void @test_bindings() { %typed3_ix = call i32 @some_val() %typed3 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0t( - i32 0, i32 7, i32 -1, i32 %typed3_ix, i1 false, ptr null) + i32 0, i32 7, i32 -1, i32 %typed3_ix, ptr null) ; CHECK: %[[IX:.*]] = add i32 %typed3_ix, 7 ; CHECK: [[BUF5:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 -1, i32 0, i8 0 }, i32 %[[IX]], i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF5]], %dx.types.ResourceProperties { i32 10, i32 1033 }) #[[#ATTR]] ; cbuffer cb0 : register(b0) { int4 i; float4 f; } %cb0 = call target("dx.CBuffer", target("dx.Layout", {<4 x i32>, <4 x float>}, 32, 0, 16)) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[BUF6:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 0, i32 0, i32 0, i8 2 }, i32 0, i1 false) #[[#ATTR]] ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BUF6]], %dx.types.ResourceProperties { i32 13, i32 32 }) #[[#ATTR]] diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll index 9ff4b6fb9001..61d346ccb3ed 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll @@ -8,7 +8,7 @@ define float @f() { entry: %buf = alloca target("dx.RawBuffer", <4 x float>, 1, 0), align 4 - %h = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h, ptr %buf, align 4 %b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr %buf, align 4 diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll index e8cfa5ac5b43..326d3adc7561 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll @@ -7,9 +7,9 @@ define float @f() { entry: - %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h1, ptr @Buf, align 4 - %h2 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + %h2 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h2, ptr @Buf, align 4 %b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr @Buf, align 4 diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll index a7c5362123d1..2c6e5aefea7c 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll @@ -13,13 +13,13 @@ entry: %Index.addr.i2 = alloca i32, align 4 %this.addr.i = alloca ptr, align 4 %Index.addr.i = alloca i32, align 4 - ; CHECK: [[IN:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) - %_ZL2In_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK: [[IN:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr null) + %_ZL2In_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_1_0t(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %_ZL2In_h.i.i, ptr @_ZL2In, align 4 store ptr @_ZL2In, ptr %this.addr.i.i, align 4 %this1.i.i = load ptr, ptr %this.addr.i.i, align 4 - ; CHECK: [[OUT:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null) - %_ZL3Out_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK: [[OUT:%.*]] = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, ptr null) + %_ZL3Out_h.i.i = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_v4f32_1_0t(i32 100, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %_ZL3Out_h.i.i, ptr @_ZL3Out, align 4 store ptr @_ZL3Out, ptr %this.addr.i.i.i, align 4 %this1.i.i.i = load ptr, ptr %this.addr.i.i.i, align 4 diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll index c0db80c4d9a1..26b157f35a3e 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll @@ -10,9 +10,9 @@ define void @main() local_unnamed_addr #1 { entry: ; CHECK: [[CB:%.*]] = tail call target({{.*}}) @llvm.dx.resource.handlefrombinding - %h = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)) %h, ptr @CB.cb, align 4 - %_ZL3Out_h.i.i = tail call target("dx.RawBuffer", %struct.Scalars, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %_ZL3Out_h.i.i = tail call target("dx.RawBuffer", %struct.Scalars, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: load target({{.*}}), ptr @CB.cb %cb = load target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 12, 0, 4, 8)), ptr @CB.cb, align 4 ; CHECK: call { float, float, float, float } @llvm.dx.resource.load.cbufferrow.4.{{.*}}(target({{.*}}) [[CB]], i32 0) @@ -21,7 +21,7 @@ entry: call void @llvm.dx.resource.store.rawbuffer(target("dx.RawBuffer", %struct.Scalars, 1, 0) %_ZL3Out_h.i.i, i32 0, i32 0, float %1) ; CHECK: [[CB2:%.*]] = tail call target({{.*}}) @llvm.dx.resource.handlefromimplicitbinding - %h2 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 1, i32 0, i1 false, ptr null) + %h2 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 1, i32 0, ptr null) store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)) %h2, ptr @CB2.cb, align 4 ; CHECK-NOT: load target({{.*}}), ptr @CB2.cb %cb2 = load target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 4, 0)), ptr @CB2.cb, align 4 @@ -29,4 +29,4 @@ entry: ret void } -attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, argmem: write, inaccessiblemem: none) "approx-func-fp-math"="false" "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, argmem: write, inaccessiblemem: none) "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll index 6bfe28c3f16b..32c59e726004 100644 --- a/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll +++ b/llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll @@ -9,7 +9,7 @@ define void @f() { entry: %b = load target("dx.RawBuffer", <4 x float>, 1, 0), ptr @Buf, align 4 - %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %h1 = call target("dx.RawBuffer", <4 x float>, 1, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.RawBuffer", <4 x float>, 1, 0) %h1, ptr @Buf, align 4 ret void diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll index 13ab0352b2a4..3775491f028d 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll @@ -12,34 +12,34 @@ define void @test_arrays() { ; RWBuffer<float> A : register(u2); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 1, i32 0, ptr null) ; RWBuffer<float> E[2]; %bufE = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 30, i32 0, i32 5, i32 4, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 30, i32 0, i32 5, i32 4, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 7, i32 5, i32 4, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 7, i32 5, i32 4, ptr null) ; RWBuffer<float> B[4]; %bufB = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 2, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 2, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 2, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 2, ptr null) ; RWBuffer<int> C[2]; %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 20, i32 0, i32 2, i32 1, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 20, i32 0, i32 2, i32 1, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 0, i32 2, i32 1, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 0, i32 2, i32 1, ptr null) ; another access to resource array B to make sure it gets the same binding %bufB2 = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 10, i32 0, i32 4, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 3, i32 4, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding ret void diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll index 2403561f3e1c..33a967e8222a 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll @@ -14,40 +14,40 @@ define void @test_many_spaces() { ; RWBuffer<float> A : register(u5); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<int> B[]; %bufB = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, ptr null) ; RWBuffer<float> C[4] : register(space5); %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 5, i32 4, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 5, i32 4, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 0, i32 4, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 0, i32 4, i32 0, ptr null) ; RWBuffer<int> D[] : register(space5); %bufD = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 102, i32 5, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 102, i32 5, i32 -1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 4, i32 -1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 5, i32 4, i32 -1, i32 0, ptr null) ; RWBuffer<float> E[3] : register(space10); // gets u0, space10 %bufE = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 103, i32 10, i32 4, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 103, i32 10, i32 4, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 10, i32 0, i32 4, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 10, i32 0, i32 4, i32 0, ptr null) ; StructuredBuffer<int> F : register(space3); // gets t0 in space3 %bufF = call target("dx.RawBuffer", i32, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 104, i32 3, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 104, i32 3, i32 1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.RawBuffer", i32, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 3, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 3, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding ret void diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll index a05680fc6153..1137a11aa04c 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll @@ -6,22 +6,22 @@ define void @test_simple_binding() { ; StructuredBuffer<float> A : register(t1); %bufA = call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.RawBuffer", float, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 1, i32 1, i32 0, ptr null) ; StructuredBuffer<float> B; // gets register(t0, space0) %bufB = call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 5, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 5, i32 0, i32 1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.RawBuffer", float, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) ; StructuredBuffer<float> C; // gets register(t2, space0) %bufC = call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 6, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 6, i32 0, i32 1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.RawBuffer", float, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 2, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll index 0db47b22f8e6..f02302529e1e 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll @@ -15,19 +15,19 @@ define void @test_many_spaces() { ; RWBuffer<float> A : register(u1); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; RWBuffer<float> B[]; %bufB = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null) ; RWBuffer<int> C : register(u5); %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<float> D[4]; %bufD = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 4, i32 1, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 4, i32 1, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll index b6ab3fd5ecb0..8838f304ffa3 100644 --- a/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll +++ b/llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll @@ -12,29 +12,29 @@ define void @test_unbounded_arrays() { ; RWBuffer<float> A : register(u1); %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufA = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 1, i32 1, i32 0, ptr null) ; RWBuffer<float> B[]; %bufB = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 100, i32 0, i32 -1, i32 0, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 6, i32 -1, i32 0, ptr null) ; RWBuffer<int> C : register(u5); %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr null) ; no change to llvm.dx.resource.handlefrombinding ; CHECK: %bufC = call target("dx.TypedBuffer", i32, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_0t(i32 0, i32 5, i32 1, i32 0, ptr null) ; ; RWBuffer<float> D[3]; %bufD = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 3, i32 1, i1 false, ptr null) + @llvm.dx.resource.handlefromimplicitbinding(i32 101, i32 0, i32 3, i32 1, ptr null) ; CHECK: %{{.*}} = call target("dx.TypedBuffer", float, 1, 0, 0) -; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 3, i32 1, i1 false, ptr null) +; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 2, i32 3, i32 1, ptr null) ; CHECK-NOT: @llvm.dx.resource.handlefromimplicitbinding ret void diff --git a/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll b/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll index b88ac118b356..e2a1c09c1303 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll @@ -8,7 +8,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @cbuffer_is_only_binding() { %cbuf = call target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) - @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK: %CBuffer = type { float } ret void diff --git a/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll index 2699d9ae6e8c..7ba2ed298831 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll @@ -1,79 +1,79 @@ -; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s
-; RUN: opt -S --passes="dxil-pretty-printer" < %s 2>&1 | FileCheck %s --check-prefix=PRINT
-; RUN: llc %s --filetype=asm -o - < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,PRINT
-
-target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64"
-target triple = "dxil-pc-shadermodel6.6-compute"
-
-%__cblayout_CB1 = type <{ float, i32, double, <2 x i32> }>
-@CB1.cb = global target("dx.CBuffer", target("dx.Layout", %__cblayout_CB1, 24, 0, 4, 8, 16)) poison
-@CB1.str = private unnamed_addr constant [4 x i8] c"CB1\00", align 1
-
-%__cblayout_CB2 = type <{ float, double, float, half, i16, i64, i32 }>
-@CB2.cb = global target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 36, 0, 8, 16, 20, 22, 24, 32)) poison
-@CB2.str = private unnamed_addr constant [4 x i8] c"CB2\00", align 1
-
-%__cblayout_MyConstants = type <{ double, <3 x float>, float, <3 x double>, half, <2 x double>, float, <3 x half>, <3 x half> }>
-@MyConstants.cb = global target("dx.CBuffer", target("dx.Layout", %__cblayout_MyConstants, 96, 0, 16, 28, 32, 56, 64, 80, 84, 90)) poison
-@MyConstants.str = private unnamed_addr constant [12 x i8] c"MyConstants\00", align 1
-
-; PRINT:; Resource Bindings:
-; PRINT-NEXT:;
-; PRINT-NEXT:; Name Type Format Dim ID HLSL Bind Count
-; PRINT-NEXT:; ------------------------------ ---------- ------- ----------- ------- -------------- ------
-; PRINT-NEXT:; CB1 cbuffer NA NA CB0 cb0 1
-; PRINT-NEXT:; CB2 cbuffer NA NA CB1 cb1 1
-; PRINT-NEXT:; MyConstants cbuffer NA NA CB2 cb5,space15 1
-
-define void @test() #0 {
-
- ; cbuffer CB1 : register(b0) {
- ; float a;
- ; int b;
- ; double c;
- ; int2 d;
- ; }
- %CB1.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB1, 24, 0, 4, 8, 16))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @CB1.str)
- ; cbuffer CB2 : register(b0) {
- ; float a;
- ; double b;
- ; float c;
- ; half d;
- ; uint16_t e;
- ; int64_t f;
- ; int g;
- ;}
-
- %CB2.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 36, 0, 8, 16, 20, 22, 24, 32))
- @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @CB2.str)
- ; cbuffer CB3 : register(b5) {
- ; double B0;
- ; float3 B1;
- ; float B2;
- ; double3 B3;
- ; half B4;
- ; double2 B5;
- ; float B6;
- ; half3 B7;
- ; half3 B8;
- ; }
- %CB3.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_MyConstants, 96, 0, 16, 28, 32, 56, 64, 80, 84, 90))
- @llvm.dx.resource.handlefrombinding(i32 15, i32 5, i32 1, i32 0, i1 false, ptr @MyConstants.str)
-
- ret void
-}
-
-attributes #0 = { noinline nounwind "hlsl.shader"="compute" }
-
-; CHECK: @CB1 = external constant %CBuffer.CB1
-; CHECK: @CB2 = external constant %CBuffer.CB2
-; CHECK: @MyConstants = external constant %CBuffer.MyConstants
-
-; CHECK: !dx.resources = !{[[ResList:[!][0-9]+]]}
-
-; CHECK: [[ResList]] = !{null, null, [[CBList:[!][0-9]+]], null}
-; CHECK: [[CBList]] = !{![[CB1:[0-9]+]], ![[CB2:[0-9]+]], ![[MYCONSTANTS:[0-9]+]]}
-; CHECK: ![[CB1]] = !{i32 0, ptr @CB1, !"CB1", i32 0, i32 0, i32 1, i32 24, null}
-; CHECK: ![[CB2]] = !{i32 1, ptr @CB2, !"CB2", i32 0, i32 1, i32 1, i32 36, null}
-; CHECK: ![[MYCONSTANTS]] = !{i32 2, ptr @MyConstants, !"MyConstants", i32 15, i32 5, i32 1, i32 96, null}
+; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s +; RUN: opt -S --passes="dxil-pretty-printer" < %s 2>&1 | FileCheck %s --check-prefix=PRINT +; RUN: llc %s --filetype=asm -o - < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,PRINT + +target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64" +target triple = "dxil-pc-shadermodel6.6-compute" + +%__cblayout_CB1 = type <{ float, i32, double, <2 x i32> }> +@CB1.cb = global target("dx.CBuffer", target("dx.Layout", %__cblayout_CB1, 24, 0, 4, 8, 16)) poison +@CB1.str = private unnamed_addr constant [4 x i8] c"CB1\00", align 1 + +%__cblayout_CB2 = type <{ float, double, float, half, i16, i64, i32 }> +@CB2.cb = global target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 36, 0, 8, 16, 20, 22, 24, 32)) poison +@CB2.str = private unnamed_addr constant [4 x i8] c"CB2\00", align 1 + +%__cblayout_MyConstants = type <{ double, <3 x float>, float, <3 x double>, half, <2 x double>, float, <3 x half>, <3 x half> }> +@MyConstants.cb = global target("dx.CBuffer", target("dx.Layout", %__cblayout_MyConstants, 96, 0, 16, 28, 32, 56, 64, 80, 84, 90)) poison +@MyConstants.str = private unnamed_addr constant [12 x i8] c"MyConstants\00", align 1 + +; PRINT:; Resource Bindings: +; PRINT-NEXT:; +; PRINT-NEXT:; Name Type Format Dim ID HLSL Bind Count +; PRINT-NEXT:; ------------------------------ ---------- ------- ----------- ------- -------------- ------ +; PRINT-NEXT:; CB1 cbuffer NA NA CB0 cb0 1 +; PRINT-NEXT:; CB2 cbuffer NA NA CB1 cb1 1 +; PRINT-NEXT:; MyConstants cbuffer NA NA CB2 cb5,space15 1 + +define void @test() #0 { + + ; cbuffer CB1 : register(b0) { + ; float a; + ; int b; + ; double c; + ; int2 d; + ; } + %CB1.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB1, 24, 0, 4, 8, 16)) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @CB1.str) + ; cbuffer CB2 : register(b0) { + ; float a; + ; double b; + ; float c; + ; half d; + ; uint16_t e; + ; int64_t f; + ; int g; + ;} + + %CB2.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB2, 36, 0, 8, 16, 20, 22, 24, 32)) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @CB2.str) + ; cbuffer CB3 : register(b5) { + ; double B0; + ; float3 B1; + ; float B2; + ; double3 B3; + ; half B4; + ; double2 B5; + ; float B6; + ; half3 B7; + ; half3 B8; + ; } + %CB3.cb_h = call target("dx.CBuffer", target("dx.Layout", %__cblayout_MyConstants, 96, 0, 16, 28, 32, 56, 64, 80, 84, 90)) + @llvm.dx.resource.handlefrombinding(i32 15, i32 5, i32 1, i32 0, ptr @MyConstants.str) + + ret void +} + +attributes #0 = { noinline nounwind "hlsl.shader"="compute" } + +; CHECK: @CB1 = external constant %CBuffer.CB1 +; CHECK: @CB2 = external constant %CBuffer.CB2 +; CHECK: @MyConstants = external constant %CBuffer.MyConstants + +; CHECK: !dx.resources = !{[[ResList:[!][0-9]+]]} + +; CHECK: [[ResList]] = !{null, null, [[CBList:[!][0-9]+]], null} +; CHECK: [[CBList]] = !{![[CB1:[0-9]+]], ![[CB2:[0-9]+]], ![[MYCONSTANTS:[0-9]+]]} +; CHECK: ![[CB1]] = !{i32 0, ptr @CB1, !"CB1", i32 0, i32 0, i32 1, i32 24, null} +; CHECK: ![[CB2]] = !{i32 1, ptr @CB2, !"CB2", i32 0, i32 1, i32 1, i32 36, null} +; CHECK: ![[MYCONSTANTS]] = !{i32 2, ptr @MyConstants, !"MyConstants", i32 15, i32 5, i32 1, i32 96, null} diff --git a/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll b/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll index 440457b3d415..4f13f4789cd6 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll @@ -10,27 +10,27 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @test() { ; Buffer<float4> %float4 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @A.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @A.str) ; CHECK: %"Buffer<float4>" = type { <4 x float> } ; Buffer<int> %int = call target("dx.TypedBuffer", i32, 0, 0, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) ; CHECK: %"Buffer<int32_t>" = type { i32 } ; Buffer<uint3> %uint3 = call target("dx.TypedBuffer", <3 x i32>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null) ; CHECK: %"Buffer<uint32_t3>" = type { <3 x i32> } ; StructuredBuffer<S> %struct0 = call target("dx.RawBuffer", %struct.S, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 10, i32 1, i32 0, i1 true, ptr @SB.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 10, i32 1, i32 0, ptr @SB.str) ; CHECK: %"StructuredBuffer<struct.S>" = type { %struct.S } ; ByteAddressBuffer %byteaddr = call target("dx.RawBuffer", i8, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 20, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 20, i32 1, i32 0, ptr null) ; CHECK: %ByteAddressBuffer = type { i32 } ret void diff --git a/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll index 86d69abc7576..a2059beeb0ac 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll @@ -35,54 +35,54 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @test() #0 { ; Buffer<half4> Zero : register(t0) %Zero_h = call target("dx.TypedBuffer", <4 x half>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @Zero.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @Zero.str) ; Buffer<float4> One : register(t1) %One_h = call target("dx.TypedBuffer", <2 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @One.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @One.str) ; Buffer<double> Two : register(t2); %Two_h = call target("dx.TypedBuffer", double, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr @Two.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr @Two.str) ; Buffer<int4> Three : register(t3); %Three_h = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, i1 false, ptr @Three.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, ptr @Three.str) ; ByteAddressBuffer Four : register(t4) %Four_h = call target("dx.RawBuffer", i8, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @Four.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @Four.str) ; StructuredBuffer<int16_t> Five : register(t6); %Five_h = call target("dx.RawBuffer", i16, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, i1 false, ptr @Five.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, ptr @Five.str) ; Buffer<double> Six : register(t10, space2); %Six_h = call target("dx.TypedBuffer", i64, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, i1 false, ptr @Six.str) + @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, ptr @Six.str) ; Same buffer type as Six - should have the same type in metadata ; Buffer<double> Seven : register(t20, space5); %Seven_h = call target("dx.TypedBuffer", i64, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, i1 false, ptr @Seven.str) + @llvm.dx.resource.handlefrombinding(i32 5, i32 20, i32 1, i32 0, ptr @Seven.str) ; Buffer<float4> Array[100] : register(t4, space3); ; Buffer<float4> B1 = Array[30]; ; Buffer<float4> B2 = Array[42]; ; resource array accesses should produce one metadata entry %Array_30_h = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, ptr @Array.str) %Array_42_h = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, ptr @Array.str) ; test unbounded resource array ; Buffer<double> Array2[] : register(t2, space4); ; Buffer<double> C1 = Array[10]; ; Buffer<double> C2 = Array[20]; %Array2_10_h = call target("dx.TypedBuffer", double, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, i1 false, ptr @Array2.str) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @Array2.str) %Array2_20_h = call target("dx.TypedBuffer", double, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, i1 false, ptr @Array2.str) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, ptr @Array2.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll b/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll index 4928b1d0bab9..5b2b3ef28062 100644 --- a/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll +++ b/llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll @@ -40,66 +40,66 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @test() #0 { ; RWBuffer<half4> Zero : register(u0) %Zero_h = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr @Zero.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr @Zero.str) ; RWBuffer<float4> One : register(u1) %One_h = call target("dx.TypedBuffer", <2 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @One.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr @One.str) ; RWBuffer<double> Two : register(u2); %Two_h = call target("dx.TypedBuffer", double, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr @Two.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr @Two.str) ; RWBuffer<int4> Three : register(u3); %Three_h = call target("dx.TypedBuffer", <4 x i32>, 1, 0, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, i1 false, ptr @Three.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 1, i32 0, ptr @Three.str) ; ByteAddressBuffer Four : register(u5) %Four_h = call target("dx.RawBuffer", i8, 1, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, i1 false, ptr @Four.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 5, i32 1, i32 0, ptr @Four.str) ; RWStructuredBuffer<int16_t> Five : register(u6); %Five_h = call target("dx.RawBuffer", i16, 1, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, i1 false, ptr @Five.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 6, i32 1, i32 0, ptr @Five.str) ; RasterizerOrderedBuffer<int4> Six : register(u7); %Six_h = call target("dx.TypedBuffer", <4 x i32>, 1, 1, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 7, i32 1, i32 0, i1 false, ptr @Six.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 7, i32 1, i32 0, ptr @Six.str) ; RasterizerOrderedStructuredBuffer<uint4> Seven : register(u3, space10); %Seven_h = call target("dx.RawBuffer", <4 x i32>, 1, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 8, i32 1, i32 0, i1 false, ptr @Seven.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 8, i32 1, i32 0, ptr @Seven.str) ; RasterizerOrderedByteAddressBuffer Eight : register(u9); %Eight_h = call target("dx.RawBuffer", i8, 1, 1) - @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, i1 false, ptr @Eight.str) + @llvm.dx.resource.handlefrombinding(i32 0, i32 9, i32 1, i32 0, ptr @Eight.str) ; RWBuffer<double> Nine : register(u2); %Nine_h = call target("dx.TypedBuffer", i64, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, i1 false, ptr @Nine.str) + @llvm.dx.resource.handlefrombinding(i32 2, i32 10, i32 1, i32 0, ptr @Nine.str) ; RWBuffer<float4> Array[100] : register(u4, space3); ; RWBuffer<float4> B1 = Array[30]; ; RWBuffer<float4> B2 = Array[42]; ; resource array accesses should produce one metadata entry %Array_30_h = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 30, ptr @Array.str) %Array_42_h = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, i1 false, ptr @Array.str) + @llvm.dx.resource.handlefrombinding(i32 3, i32 4, i32 100, i32 42, ptr @Array.str) ; test unbounded resource array ; RWBuffer<double> Array2[] : register(u2, space4); ; RWBuffer<double> C1 = Array[10]; ; RWBuffer<double> C2 = Array[20]; %Array2_10_h = call target("dx.TypedBuffer", double, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, i1 false, ptr @Array2.str) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 10, ptr @Array2.str) %Array2_20_h = call target("dx.TypedBuffer", double, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, i1 false, ptr @Array2.str) + @llvm.dx.resource.handlefrombinding(i32 4, i32 2, i32 -1, i32 20, ptr @Array2.str) ; Same buffer type as Nine - should have the same type in metadata ; RWBuffer<double> Ten : register(u2); %Ten_h = call target("dx.TypedBuffer", i64, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 5, i32 22, i32 1, i32 0, i1 false, ptr @Ten.str) + @llvm.dx.resource.handlefrombinding(i32 5, i32 22, i32 1, i32 0, ptr @Ten.str) ret void } diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoad.ll b/llvm/test/CodeGen/DirectX/RawBufferLoad.ll index 869a5b1e3b96..37260326071b 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferLoad.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferLoad.ll @@ -13,7 +13,7 @@ declare void @v4f64_user(<4 x double>) define void @loadf32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 1, i32 4) %load = call {float, i1} @@ -34,7 +34,7 @@ define void @loadf32_struct(i32 %index) { define void @loadf32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 1, i32 4) %load = call {float, i1} @@ -55,7 +55,7 @@ define void @loadf32_byte(i32 %offset) { define void @loadv4f32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 15, i32 4) %load = call {<4 x float>, i1} @@ -83,7 +83,7 @@ define void @loadv4f32_struct(i32 %index) { define void @loadv4f32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 15, i32 4) %load = call {<4 x float>, i1} @@ -111,7 +111,7 @@ define void @loadv4f32_byte(i32 %offset) { define void @loadelements(i32 %index) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATAF32:%.*]] = call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 15, i32 4) %loadf32 = call {<4 x float>, i1} @@ -158,7 +158,7 @@ define void @loadelements(i32 %index) { define void @loadnested(i32 %index) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATAI32:%.*]] = call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32 139, %dx.types.Handle %{{.*}}, i32 %index, i32 0, i8 1, i32 4) %loadi32 = call {i32, i1} @llvm.dx.resource.load.rawbuffer.i32( @@ -210,7 +210,7 @@ define void @loadnested(i32 %index) { define void @loadv4f64_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA:%.*]] = call %dx.types.ResRet.f64 @dx.op.rawBufferLoad.f64(i32 139, %dx.types.Handle %{{.*}}, i32 %offset, i32 0, i8 15, i32 8) %load = call {<4 x double>, i1} @llvm.dx.resource.load.rawbuffer.v4i64( diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll b/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll index 9213d60c9b49..6c7d8c259833 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll @@ -5,10 +5,10 @@ define void @loadf64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", double, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", double, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { double, i1 } @llvm.dx.resource.load.rawbuffer @@ -38,10 +38,10 @@ define void @loadv2f64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <2 x double>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2f64_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <2 x double>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <2 x double>, i1 } @llvm.dx.resource.load.rawbuffer @@ -76,10 +76,10 @@ define void @loadf64WithCheckBit(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", double, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", double, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_f64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { double, i1 } @llvm.dx.resource.load.rawbuffer @@ -116,10 +116,10 @@ define void @loadv3f64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <3 x double>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3f64_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <3 x double>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3f64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <3 x double>, i1 } @llvm.dx.resource.load.rawbuffer @@ -172,10 +172,10 @@ define void @loadv4f64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <4 x double>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4f64_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <4 x double>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4f64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <4 x double>, i1 } @llvm.dx.resource.load.rawbuffer diff --git a/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll b/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll index a1c153f2c0c8..310283f0ef38 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll @@ -5,10 +5,10 @@ define void @loadi64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", i64, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { i64, i1 } @llvm.dx.resource.load.rawbuffer @@ -41,10 +41,10 @@ define void @loadv2i64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", <2 x i64>, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2i64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v2i64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <2 x i64>, i1 } @llvm.dx.resource.load.rawbuffer @@ -85,10 +85,10 @@ define void @loadi64WithCheckBit(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[B:%.*]] = call target("dx.Rawbuffer", i64, 1, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 1, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_i64_1_0_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { i64, i1 } @llvm.dx.resource.load.rawbuffer @@ -128,10 +128,10 @@ define void @loadv3i64(i32 %index) { ; check the handle from binding is unchanged ; CHECK: [[Buf:%.*]] = call target("dx.Rawbuffer", <3 x i64>, 0, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3i64_0_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <3 x i64>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v3i64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <3 x i64>, i1 } @llvm.dx.resource.load.rawbuffer @@ -193,10 +193,10 @@ define void @loadv4i64(i32 %index) { ; check the handle from binding is unchanged ; CHECK62: [[Buf:%.*]] = call target("dx.Rawbuffer", <4 x i64>, 0, 0) ; CHECK62-SAME: @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4i64_0_0t( - ; CHECK62-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK62-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = call target("dx.Rawbuffer", <4 x i64>, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.Rawbuffer_v4i64_0_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: [[L0:%.*]] = call { <4 x i64>, i1 } @llvm.dx.resource.load.rawbuffer diff --git a/llvm/test/CodeGen/DirectX/RawBufferStore.ll b/llvm/test/CodeGen/DirectX/RawBufferStore.ll index 3d03418cf213..856f9d103422 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferStore.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferStore.ll @@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @storef32_struct(i32 %index, float %data) { %buffer = call target("dx.RawBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %buffer_annot, i32 %index, i32 0, float %data, float undef, float undef, float undef, i8 1, i32 4) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -20,7 +20,7 @@ define void @storef32_struct(i32 %index, float %data) { define void @storef32_byte(i32 %offset, float %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.rawBufferStore.f32(i32 140, %dx.types.Handle %buffer_annot, i32 %offset, i32 0, float %data, float undef, float undef, float undef, i8 1, i32 4) call void @llvm.dx.resource.store.rawbuffer.f32( @@ -34,7 +34,7 @@ define void @storef32_byte(i32 %offset, float %data) { define void @storev4f32_struct(i32 %index, <4 x float> %data) { %buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -52,7 +52,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) { define void @storev4f32_byte(i32 %offset, <4 x float> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x float> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x float> %data, i32 1 @@ -70,7 +70,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) { define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0_0:%.*]] = extractelement <4 x float> %data0, i32 0 ; CHECK: [[DATA0_1:%.*]] = extractelement <4 x float> %data0, i32 1 @@ -97,7 +97,7 @@ define void @storeelements(i32 %index, <4 x float> %data0, <4 x i32> %data1) { define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> %data2) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: call void @dx.op.rawBufferStore.i32(i32 140, %dx.types.Handle %buffer_annot, i32 %index, i32 0, i32 %data0, i32 undef, i32 undef, i32 undef, i8 1, i32 4) call void @llvm.dx.resource.store.rawbuffer.i32( @@ -129,7 +129,7 @@ define void @storenested(i32 %index, i32 %data0, <4 x float> %data1, <3 x half> define void @storev4f64_byte(i32 %offset, <4 x double> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK: [[DATA0:%.*]] = extractelement <4 x double> %data, i32 0 ; CHECK: [[DATA1:%.*]] = extractelement <4 x double> %data, i32 1 diff --git a/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll b/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll index ddcd761d812f..30a8039820e2 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll @@ -4,10 +4,10 @@ define void @storef64(double %0, i32 %index) { ; CHECK: [[B:%.*]] = tail call target("dx.RawBuffer", double, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", double, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -30,10 +30,10 @@ define void @storef64(double %0, i32 %index) { define void @storev2f64(<2 x double> %0, i32 %index) { ; CHECK: [[B:%.*]] = tail call target("dx.RawBuffer", <2 x double>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <2 x double>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -55,10 +55,10 @@ define void @storev2f64(<2 x double> %0, i32 %index) { define void @storev3f64(<3 x double> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <3 x double>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <3 x double>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -81,10 +81,10 @@ define void @storev3f64(<3 x double> %0, i32 %index) { define void @storev4f64(<4 x double> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <4 x double>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <4 x double>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer diff --git a/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll b/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll index 54ec4d2cd2fb..559b9acc105b 100644 --- a/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll +++ b/llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll @@ -4,10 +4,10 @@ define void @storei64(i64 %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", i64, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", i64, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -30,10 +30,10 @@ define void @storei64(i64 %0, i32 %index) { define void @storev2i64(<2 x i64> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <2 x i64>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <2 x i64>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v2i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -54,10 +54,10 @@ define void @storev2i64(<2 x i64> %0, i32 %index) { define void @storev3i64(<3 x i64> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <3 x i64>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <3 x i64>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v3i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer @@ -80,10 +80,10 @@ define void @storev3i64(<3 x i64> %0, i32 %index) { define void @storev4i64(<4 x i64> %0, i32 %index) { ; CHECK: [[Buf:%.*]] = tail call target("dx.RawBuffer", <4 x i64>, 1, 0) ; CHECK-SAME: @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i64_1_0t( - ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + ; CHECK-SAME: i32 0, i32 0, i32 1, i32 0, ptr null) %buffer = tail call target("dx.RawBuffer", <4 x i64>, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i64_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; check we don't modify the code in sm6.3 or later ; CHECK63: call void @llvm.dx.resource.store.rawbuffer ; CHECK63-SAME: target("dx.RawBuffer", <4 x i64>, 1, 0) [[Buf]], i32 %index, i32 0, <4 x i64> %0) diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll index 7ea9795f00b3..ae5e992184f4 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll @@ -13,7 +13,7 @@ declare void @v4f64_user(<4 x double>) define void @loadf32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -32,7 +32,7 @@ define void @loadf32_struct(i32 %index) { define void @loadf32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -51,7 +51,7 @@ define void @loadf32_byte(i32 %offset) { define void @loadv4f32_struct(i32 %index) { %buffer = call target("dx.RawBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -70,7 +70,7 @@ define void @loadv4f32_struct(i32 %index) { define void @loadv4f32_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -89,7 +89,7 @@ define void @loadv4f32_byte(i32 %offset) { define void @loadelements(i32 %index) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -116,7 +116,7 @@ define void @loadelements(i32 %index) { define void @loadnested(i32 %index) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -151,7 +151,7 @@ define void @loadnested(i32 %index) { define void @loadv4f64_byte(i32 %offset) { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll index 2a557c73205c..d2e5584e4265 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll @@ -10,7 +10,7 @@ declare void @use_float1(<1 x float>) define void @load_float4(i32 %index, i32 %elemindex) { %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -40,7 +40,7 @@ define void @load_float4(i32 %index, i32 %elemindex) { ; CHECK-LABEL: define void @load_float( define void @load_float(i32 %index) { %buffer = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -65,7 +65,7 @@ define void @load_float(i32 %index) { ; CHECK-LABEL: define void @load_float1( define void @load_float1(i32 %index) { %buffer = call target("dx.TypedBuffer", <1 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll index ed41d8ba2424..2ddf615be4a6 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll @@ -5,7 +5,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" ; CHECK-LABEL: define void @storef32_struct define void @storef32_struct(i32 %index, float %data) { %buffer = call target("dx.RawBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -20,7 +20,7 @@ define void @storef32_struct(i32 %index, float %data) { ; CHECK-LABEL: define void @storef32_byte define void @storef32_byte(i32 %offset, float %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -35,7 +35,7 @@ define void @storef32_byte(i32 %offset, float %data) { ; CHECK-LABEL: define void @storev4f32_struct define void @storev4f32_struct(i32 %index, <4 x float> %data) { %buffer = call target("dx.RawBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -50,7 +50,7 @@ define void @storev4f32_struct(i32 %index, <4 x float> %data) { ; CHECK-LABEL: define void @storev4f32_byte define void @storev4f32_byte(i32 %offset, <4 x float> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -65,7 +65,7 @@ define void @storev4f32_byte(i32 %offset, <4 x float> %data) { ; CHECK-LABEL: define void @storeelements define void @storeelements(i32 %index, <4 x float> %dataf32, <4 x i32> %datai32) { %buffer = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -86,7 +86,7 @@ define void @storeelements(i32 %index, <4 x float> %dataf32, <4 x i32> %datai32) define void @storenested(i32 %index, i32 %datai32, <4 x float> %dataf32, <3 x half> %dataf16) { %buffer = call target("dx.RawBuffer", {i32, {<4 x float>, <3 x half>}}, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -111,7 +111,7 @@ define void @storenested(i32 %index, i32 %datai32, <4 x float> %dataf32, <3 x ha ; CHECK-LABEL: define void @storev4f64_byte define void @storev4f64_byte(i32 %offset, <4 x double> %data) { %buffer = call target("dx.RawBuffer", i8, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll b/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll index 54aa25477ea8..f27fa65957e6 100644 --- a/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll +++ b/llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll @@ -6,7 +6,7 @@ target triple = "dxil-pc-shadermodel6.6-compute" define void @store_float4(<4 x float> %data, i32 %index, i32 %elemindex) { %buffer = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -47,7 +47,7 @@ define void @store_float4(<4 x float> %data, i32 %index, i32 %elemindex) { define void @store_half4(<4 x half> %data, i32 %index) { %buffer = call target("dx.TypedBuffer", <4 x half>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f16_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( @@ -80,7 +80,7 @@ define void @store_half4(<4 x half> %data, i32 %index) { define void @store_double2(<2 x double> %data, i32 %index) { %buffer = call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NOT: @llvm.dx.resource.getpointer %ptr = call ptr @llvm.dx.resource.getpointer( diff --git a/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll b/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll index 8bec56e2a2fa..34eb5554e90e 100644 --- a/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll +++ b/llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll @@ -21,9 +21,9 @@ define void @main() local_unnamed_addr #0 { entry: ; DXOP: [[In_h_i:%.*]] = call %dx.types.Handle @dx.op.createHandle ; DXOP: [[Out_h_i:%.*]] = call %dx.types.Handle @dx.op.createHandle - %In_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + %In_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %In_h.i, ptr @In, align 4 - %Out_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 4, i32 1, i32 1, i32 0, i1 false, ptr null) + %Out_h.i = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 4, i32 1, i32 1, i32 0, ptr null) store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %Out_h.i, ptr @Out, align 4 ; CSE: call i32 @llvm.dx.flattened.thread.id.in.group() %0 = call i32 @llvm.dx.flattened.thread.id.in.group() diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll index 3f2ec9a85b2a..4bdb7ec50f6f 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll @@ -30,5 +30,5 @@ entry: ret i32 0 } -attributes #0 = { convergent noinline norecurse optnone "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } -attributes #1 = { alwaysinline convergent mustprogress norecurse nounwind "approx-func-fp-math"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { convergent noinline norecurse optnone "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #1 = { alwaysinline convergent mustprogress norecurse nounwind "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll index c6e3cc9e9647..03756710adc3 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll @@ -40,5 +40,5 @@ entry: ret i32 0 } -attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "approx-func-fp-math"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } -attributes #1 = { convergent noinline norecurse optnone "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #1 = { convergent noinline norecurse optnone "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll index 74d5fd093ded..ce35c03d6bcf 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/lib-entry-attr-error.ll @@ -19,8 +19,8 @@ entry: ret void } -attributes #0 = { convergent noinline norecurse optnone "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } -attributes #1 = { convergent noinline norecurse "approx-func-fp-math"="true" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #0 = { convergent noinline norecurse optnone "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #1 = { convergent noinline norecurse "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } !llvm.module.flags = !{!0, !1} !dx.valver = !{!2} diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll index dd5f098acf2d..e83ea60a7442 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll @@ -18,12 +18,12 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf[8] : register(u1, space0) %buf1 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 1, i32 8, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 8, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll index 6e965d9d92ac..a397074650e4 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll @@ -19,12 +19,12 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf[8] : register(u1, space0) %buf1 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 1, i32 8, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 8, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll index 0f8674d8f17e..6ed267d05dae 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll @@ -18,39 +18,39 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u1, space0) %buf1 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 1, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u2, space0) %buf2 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 2, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u3, space0) %buf3 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 3, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 3, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u4, space0) %buf4 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 4, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 4, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u5, space0) %buf5 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 5, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 5, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u6, space0) %buf6 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 6, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 6, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u7, space0) %buf7 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 7, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 7, i32 1, i32 0, ptr null) ; RWBuffer<float> Buf : register(u8, space0) %buf8 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 8, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll index 9680193e90cd..e3bd584c4428 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll @@ -14,7 +14,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00000010 define float @rawbuf() "hlsl.export" { %buffer = call target("dx.RawBuffer", i8, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer.f32( target("dx.RawBuffer", i8, 0, 0, 0) %buffer, i32 0, i32 0) %data = extractvalue {float, i1} %load, 0 @@ -24,7 +24,7 @@ define float @rawbuf() "hlsl.export" { ; CHECK: Function structbuf : 0x00000010 define float @structbuf() "hlsl.export" { %buffer = call target("dx.RawBuffer", float, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer.f32( target("dx.RawBuffer", float, 0, 0, 0) %buffer, i32 0, i32 0) %data = extractvalue {float, i1} %load, 0 @@ -34,7 +34,7 @@ define float @structbuf() "hlsl.export" { ; CHECK: Function typedbuf : 0x00000000 define float @typedbuf(<4 x float> %val) "hlsl.export" { %buffer = call target("dx.TypedBuffer", float, 0, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 0, 0, 0) %buffer, i32 0) %data = extractvalue {float, i1} %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll index 5e44b93de846..9d570fea164d 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll @@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00000014 define void @rawbuf() "hlsl.export" { %rb = tail call target("dx.RawBuffer", <4 x double>, 0, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call { <4 x double>, i1 } @llvm.dx.resource.load.rawbuffer.v4double.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x double>, 0, 0) %rb, i32 0, i32 0) %extract = extractvalue { <4 x double>, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll index 517147aa14d5..48ce42cc4b8b 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll @@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00100010 define void @rawbuf() "hlsl.export" { %rb = tail call target("dx.RawBuffer", <4 x i64>, 0, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call { <4 x i64>, i1 } @llvm.dx.resource.load.rawbuffer.v4i64.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x i64>, 0, 0) %rb, i32 0, i32 0) %extract = extractvalue { <4 x i64>, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll index cb4a3e9a9a59..5e5cf0cfddc6 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll @@ -18,9 +18,9 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function rawbuf : 0x00800030 define void @rawbuf() "hlsl.export" { %halfrb = tail call target("dx.RawBuffer", <4 x half>, 0, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4f16_0_0t(i32 0, i32 0, i32 1, i32 0, ptr null) %i16rb = tail call target("dx.RawBuffer", <4 x i16>, 1, 0) - @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i16_1_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_v4i16_1_0t(i32 0, i32 1, i32 1, i32 0, ptr null) %loadhalfrb = call { <4 x i16>, i1 } @llvm.dx.resource.load.rawbuffer.v4i16.tdx.RawBuffer_v4f16_0_0t(target("dx.RawBuffer", <4 x half>, 0, 0) %halfrb, i32 0, i32 0) %extracti16vec = extractvalue { <4 x i16>, i1 } %loadhalfrb, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll index 1bac7ead04b4..4d30fa7c56bc 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll @@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.8-library" ; CHECK: Function loadUAV : 0x20000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -27,7 +27,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll index 115585de5ee0..935140144904 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll @@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.8-library" ; CHECK: Function loadUAV : 0x00000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -27,7 +27,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll index 97494aefffbc..ba03d39be212 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll @@ -17,7 +17,7 @@ target triple = "dxil-pc-shadermodel6.6-library" ; CHECK: Function loadUAV : 0x00000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -27,7 +27,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll index 1a5cba4084fb..d91d6fe33a22 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll @@ -22,7 +22,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function loadUAV : 0x200010000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -32,7 +32,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x200010010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll index 242faa26c82f..08a9d94ae495 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll @@ -18,7 +18,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function loadUAV : 0x20000000 define float @loadUAV() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -28,7 +28,7 @@ define float @loadUAV() #0 { ; CHECK: Function loadSRV : 0x00000010 define float @loadSRV() #0 { %res = tail call target("dx.RawBuffer", float, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.rawbuffer( target("dx.RawBuffer", float, 0, 0) %res, i32 0, i32 0) %val = extractvalue { float, i1 } %load, 0 diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll index b0a5d5de77c2..87172338db65 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll @@ -16,7 +16,7 @@ target triple = "dxil-pc-shadermodel6.7-library" ; CHECK: Function multicomponent : 0x00002000 define <4 x float> @multicomponent() #0 { %res = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) %load = call {<4 x float>, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %res, i32 0) %val = extractvalue {<4 x float>, i1} %load, 0 @@ -26,7 +26,7 @@ define <4 x float> @multicomponent() #0 { ; CHECK: Function onecomponent : 0x00000000 define float @onecomponent() #0 { %res = call target("dx.TypedBuffer", float, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, ptr null) %load = call {float, i1} @llvm.dx.resource.load.typedbuffer( target("dx.TypedBuffer", float, 1, 0, 0) %res, i32 0) %val = extractvalue {float, i1} %load, 0 @@ -36,7 +36,7 @@ define float @onecomponent() #0 { ; CHECK: Function noload : 0x00000000 define void @noload(<4 x float> %val) #0 { %res = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) - @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, i1 false, ptr null) + @llvm.dx.resource.handlefrombinding(i32 0, i32 2, i32 1, i32 0, ptr null) call void @llvm.dx.resource.store.typedbuffer( target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %res, i32 0, <4 x float> %val) diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll index dc9d2cf77629..ae2b35f80bde 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll @@ -17,7 +17,7 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll index 2248b9f6d4e9..a7e8e7fa3556 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll @@ -16,7 +16,7 @@ define void @test() "hlsl.export" { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll index 60ecc8fe3d1f..da47bb1d0ed5 100644 --- a/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll +++ b/llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll @@ -18,7 +18,7 @@ define void @VSMain() { ; RWBuffer<float> Buf : register(u0, space0) %buf0 = call target("dx.TypedBuffer", float, 1, 0, 1) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0t( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ret void } diff --git a/llvm/test/CodeGen/DirectX/atan2.ll b/llvm/test/CodeGen/DirectX/atan2.ll index ee17d2ba7777..8f51ab1b7a90 100644 --- a/llvm/test/CodeGen/DirectX/atan2.ll +++ b/llvm/test/CodeGen/DirectX/atan2.ll @@ -1,87 +1,87 @@ -; RUN: opt -S -dxil-intrinsic-expansion -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s --check-prefixes=CHECK,EXPCHECK
-; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s --check-prefixes=CHECK,DOPCHECK
-
-; Make sure correct dxil expansions for atan2 are generated for float and half.
-
-define noundef float @atan2_float(float noundef %y, float noundef %x) {
-entry:
-; CHECK: [[DIV:%.+]] = fdiv float %y, %x
-; EXPCHECK: [[ATAN:%.+]] = call float @llvm.atan.f32(float [[DIV]])
-; DOPCHECK: [[ATAN:%.+]] = call float @dx.op.unary.f32(i32 17, float [[DIV]])
-; CHECK-DAG: [[ADD_PI:%.+]] = fadd float [[ATAN]], 0x400921FB60000000
-; CHECK-DAG: [[SUB_PI:%.+]] = fsub float [[ATAN]], 0x400921FB60000000
-; CHECK-DAG: [[X_LT_0:%.+]] = fcmp olt float %x, 0.000000e+00
-; CHECK-DAG: [[X_EQ_0:%.+]] = fcmp oeq float %x, 0.000000e+00
-; CHECK-DAG: [[Y_GE_0:%.+]] = fcmp oge float %y, 0.000000e+00
-; CHECK-DAG: [[Y_LT_0:%.+]] = fcmp olt float %y, 0.000000e+00
-; CHECK: [[XLT0_AND_YGE0:%.+]] = and i1 [[X_LT_0]], [[Y_GE_0]]
-; CHECK: [[SELECT_ADD_PI:%.+]] = select i1 [[XLT0_AND_YGE0]], float [[ADD_PI]], float [[ATAN]]
-; CHECK: [[XLT0_AND_YLT0:%.+]] = and i1 [[X_LT_0]], [[Y_LT_0]]
-; CHECK: [[SELECT_SUB_PI:%.+]] = select i1 [[XLT0_AND_YLT0]], float [[SUB_PI]], float [[SELECT_ADD_PI]]
-; CHECK: [[XEQ0_AND_YLT0:%.+]] = and i1 [[X_EQ_0]], [[Y_LT_0]]
-; CHECK: [[SELECT_NEGHPI:%.+]] = select i1 [[XEQ0_AND_YLT0]], float 0xBFF921FB60000000, float [[SELECT_SUB_PI]]
-; CHECK: [[XEQ0_AND_YGE0:%.+]] = and i1 [[X_EQ_0]], [[Y_GE_0]]
-; CHECK: [[SELECT_HPI:%.+]] = select i1 [[XEQ0_AND_YGE0]], float 0x3FF921FB60000000, float [[SELECT_NEGHPI]]
-; CHECK: ret float [[SELECT_HPI]]
- %elt.atan2 = call float @llvm.atan2.f32(float %y, float %x)
- ret float %elt.atan2
-}
-
-define noundef half @atan2_half(half noundef %y, half noundef %x) {
-entry:
-; CHECK: [[DIV:%.+]] = fdiv half %y, %x
-; EXPCHECK: [[ATAN:%.+]] = call half @llvm.atan.f16(half [[DIV]])
-; DOPCHECK: [[ATAN:%.+]] = call half @dx.op.unary.f16(i32 17, half [[DIV]])
-; CHECK-DAG: [[ADD_PI:%.+]] = fadd half [[ATAN]], 0xH4248
-; CHECK-DAG: [[SUB_PI:%.+]] = fsub half [[ATAN]], 0xH4248
-; CHECK-DAG: [[X_LT_0:%.+]] = fcmp olt half %x, 0xH0000
-; CHECK-DAG: [[X_EQ_0:%.+]] = fcmp oeq half %x, 0xH0000
-; CHECK-DAG: [[Y_GE_0:%.+]] = fcmp oge half %y, 0xH0000
-; CHECK-DAG: [[Y_LT_0:%.+]] = fcmp olt half %y, 0xH0000
-; CHECK: [[XLT0_AND_YGE0:%.+]] = and i1 [[X_LT_0]], [[Y_GE_0]]
-; CHECK: [[SELECT_ADD_PI:%.+]] = select i1 [[XLT0_AND_YGE0]], half [[ADD_PI]], half [[ATAN]]
-; CHECK: [[XLT0_AND_YLT0:%.+]] = and i1 [[X_LT_0]], [[Y_LT_0]]
-; CHECK: [[SELECT_SUB_PI:%.+]] = select i1 [[XLT0_AND_YLT0]], half [[SUB_PI]], half [[SELECT_ADD_PI]]
-; CHECK: [[XEQ0_AND_YLT0:%.+]] = and i1 [[X_EQ_0]], [[Y_LT_0]]
-; CHECK: [[SELECT_NEGHPI:%.+]] = select i1 [[XEQ0_AND_YLT0]], half 0xHBE48, half [[SELECT_SUB_PI]]
-; CHECK: [[XEQ0_AND_YGE0:%.+]] = and i1 [[X_EQ_0]], [[Y_GE_0]]
-; CHECK: [[SELECT_HPI:%.+]] = select i1 [[XEQ0_AND_YGE0]], half 0xH3E48, half [[SELECT_NEGHPI]]
-; CHECK: ret half [[SELECT_HPI]]
- %elt.atan2 = call half @llvm.atan2.f16(half %y, half %x)
- ret half %elt.atan2
-}
-
-define noundef <4 x float> @atan2_float4(<4 x float> noundef %y, <4 x float> noundef %x) {
-entry:
-; Just Expansion, no scalarization or lowering:
-; EXPCHECK: [[DIV:%.+]] = fdiv <4 x float> %y, %x
-; EXPCHECK: [[ATAN:%.+]] = call <4 x float> @llvm.atan.v4f32(<4 x float> [[DIV]])
-; EXPCHECK-DAG: [[ADD_PI:%.+]] = fadd <4 x float> [[ATAN]], splat (float 0x400921FB60000000)
-; EXPCHECK-DAG: [[SUB_PI:%.+]] = fsub <4 x float> [[ATAN]], splat (float 0x400921FB60000000)
-; EXPCHECK-DAG: [[X_LT_0:%.+]] = fcmp olt <4 x float> %x, zeroinitializer
-; EXPCHECK-DAG: [[X_EQ_0:%.+]] = fcmp oeq <4 x float> %x, zeroinitializer
-; EXPCHECK-DAG: [[Y_GE_0:%.+]] = fcmp oge <4 x float> %y, zeroinitializer
-; EXPCHECK-DAG: [[Y_LT_0:%.+]] = fcmp olt <4 x float> %y, zeroinitializer
-; EXPCHECK: [[XLT0_AND_YGE0:%.+]] = and <4 x i1> [[X_LT_0]], [[Y_GE_0]]
-; EXPCHECK: [[SELECT_ADD_PI:%.+]] = select <4 x i1> [[XLT0_AND_YGE0]], <4 x float> [[ADD_PI]], <4 x float> [[ATAN]]
-; EXPCHECK: [[XLT0_AND_YLT0:%.+]] = and <4 x i1> [[X_LT_0]], [[Y_LT_0]]
-; EXPCHECK: [[SELECT_SUB_PI:%.+]] = select <4 x i1> [[XLT0_AND_YLT0]], <4 x float> [[SUB_PI]], <4 x float> [[SELECT_ADD_PI]]
-; EXPCHECK: [[XEQ0_AND_YLT0:%.+]] = and <4 x i1> [[X_EQ_0]], [[Y_LT_0]]
-; EXPCHECK: [[SELECT_NEGHPI:%.+]] = select <4 x i1> [[XEQ0_AND_YLT0]], <4 x float> splat (float 0xBFF921FB60000000), <4 x float> [[SELECT_SUB_PI]]
-; EXPCHECK: [[XEQ0_AND_YGE0:%.+]] = and <4 x i1> [[X_EQ_0]], [[Y_GE_0]]
-; EXPCHECK: [[SELECT_HPI:%.+]] = select <4 x i1> [[XEQ0_AND_YGE0]], <4 x float> splat (float 0x3FF921FB60000000), <4 x float> [[SELECT_NEGHPI]]
-; EXPCHECK: ret <4 x float> [[SELECT_HPI]]
-
-; Scalarization occurs after expansion, so atan scalarization is tested separately.
-; Expansion, scalarization and lowering:
-; Just make sure this expands to exactly 4 scalar DXIL atan (OpCode=17) calls.
-; DOPCHECK-COUNT-4: call float @dx.op.unary.f32(i32 17, float %{{.*}})
-; DOPCHECK-NOT: call float @dx.op.unary.f32(i32 17,
-
- %elt.atan2 = call <4 x float> @llvm.atan2.v4f32(<4 x float> %y, <4 x float> %x)
- ret <4 x float> %elt.atan2
-}
-
-declare half @llvm.atan2.f16(half, half)
-declare float @llvm.atan2.f32(float, float)
-declare <4 x float> @llvm.atan2.v4f32(<4 x float>, <4 x float>)
+; RUN: opt -S -dxil-intrinsic-expansion -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s --check-prefixes=CHECK,EXPCHECK +; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s --check-prefixes=CHECK,DOPCHECK + +; Make sure correct dxil expansions for atan2 are generated for float and half. + +define noundef float @atan2_float(float noundef %y, float noundef %x) { +entry: +; CHECK: [[DIV:%.+]] = fdiv float %y, %x +; EXPCHECK: [[ATAN:%.+]] = call float @llvm.atan.f32(float [[DIV]]) +; DOPCHECK: [[ATAN:%.+]] = call float @dx.op.unary.f32(i32 17, float [[DIV]]) +; CHECK-DAG: [[ADD_PI:%.+]] = fadd float [[ATAN]], 0x400921FB60000000 +; CHECK-DAG: [[SUB_PI:%.+]] = fsub float [[ATAN]], 0x400921FB60000000 +; CHECK-DAG: [[X_LT_0:%.+]] = fcmp olt float %x, 0.000000e+00 +; CHECK-DAG: [[X_EQ_0:%.+]] = fcmp oeq float %x, 0.000000e+00 +; CHECK-DAG: [[Y_GE_0:%.+]] = fcmp oge float %y, 0.000000e+00 +; CHECK-DAG: [[Y_LT_0:%.+]] = fcmp olt float %y, 0.000000e+00 +; CHECK: [[XLT0_AND_YGE0:%.+]] = and i1 [[X_LT_0]], [[Y_GE_0]] +; CHECK: [[SELECT_ADD_PI:%.+]] = select i1 [[XLT0_AND_YGE0]], float [[ADD_PI]], float [[ATAN]] +; CHECK: [[XLT0_AND_YLT0:%.+]] = and i1 [[X_LT_0]], [[Y_LT_0]] +; CHECK: [[SELECT_SUB_PI:%.+]] = select i1 [[XLT0_AND_YLT0]], float [[SUB_PI]], float [[SELECT_ADD_PI]] +; CHECK: [[XEQ0_AND_YLT0:%.+]] = and i1 [[X_EQ_0]], [[Y_LT_0]] +; CHECK: [[SELECT_NEGHPI:%.+]] = select i1 [[XEQ0_AND_YLT0]], float 0xBFF921FB60000000, float [[SELECT_SUB_PI]] +; CHECK: [[XEQ0_AND_YGE0:%.+]] = and i1 [[X_EQ_0]], [[Y_GE_0]] +; CHECK: [[SELECT_HPI:%.+]] = select i1 [[XEQ0_AND_YGE0]], float 0x3FF921FB60000000, float [[SELECT_NEGHPI]] +; CHECK: ret float [[SELECT_HPI]] + %elt.atan2 = call float @llvm.atan2.f32(float %y, float %x) + ret float %elt.atan2 +} + +define noundef half @atan2_half(half noundef %y, half noundef %x) { +entry: +; CHECK: [[DIV:%.+]] = fdiv half %y, %x +; EXPCHECK: [[ATAN:%.+]] = call half @llvm.atan.f16(half [[DIV]]) +; DOPCHECK: [[ATAN:%.+]] = call half @dx.op.unary.f16(i32 17, half [[DIV]]) +; CHECK-DAG: [[ADD_PI:%.+]] = fadd half [[ATAN]], 0xH4248 +; CHECK-DAG: [[SUB_PI:%.+]] = fsub half [[ATAN]], 0xH4248 +; CHECK-DAG: [[X_LT_0:%.+]] = fcmp olt half %x, 0xH0000 +; CHECK-DAG: [[X_EQ_0:%.+]] = fcmp oeq half %x, 0xH0000 +; CHECK-DAG: [[Y_GE_0:%.+]] = fcmp oge half %y, 0xH0000 +; CHECK-DAG: [[Y_LT_0:%.+]] = fcmp olt half %y, 0xH0000 +; CHECK: [[XLT0_AND_YGE0:%.+]] = and i1 [[X_LT_0]], [[Y_GE_0]] +; CHECK: [[SELECT_ADD_PI:%.+]] = select i1 [[XLT0_AND_YGE0]], half [[ADD_PI]], half [[ATAN]] +; CHECK: [[XLT0_AND_YLT0:%.+]] = and i1 [[X_LT_0]], [[Y_LT_0]] +; CHECK: [[SELECT_SUB_PI:%.+]] = select i1 [[XLT0_AND_YLT0]], half [[SUB_PI]], half [[SELECT_ADD_PI]] +; CHECK: [[XEQ0_AND_YLT0:%.+]] = and i1 [[X_EQ_0]], [[Y_LT_0]] +; CHECK: [[SELECT_NEGHPI:%.+]] = select i1 [[XEQ0_AND_YLT0]], half 0xHBE48, half [[SELECT_SUB_PI]] +; CHECK: [[XEQ0_AND_YGE0:%.+]] = and i1 [[X_EQ_0]], [[Y_GE_0]] +; CHECK: [[SELECT_HPI:%.+]] = select i1 [[XEQ0_AND_YGE0]], half 0xH3E48, half [[SELECT_NEGHPI]] +; CHECK: ret half [[SELECT_HPI]] + %elt.atan2 = call half @llvm.atan2.f16(half %y, half %x) + ret half %elt.atan2 +} + +define noundef <4 x float> @atan2_float4(<4 x float> noundef %y, <4 x float> noundef %x) { +entry: +; Just Expansion, no scalarization or lowering: +; EXPCHECK: [[DIV:%.+]] = fdiv <4 x float> %y, %x +; EXPCHECK: [[ATAN:%.+]] = call <4 x float> @llvm.atan.v4f32(<4 x float> [[DIV]]) +; EXPCHECK-DAG: [[ADD_PI:%.+]] = fadd <4 x float> [[ATAN]], splat (float 0x400921FB60000000) +; EXPCHECK-DAG: [[SUB_PI:%.+]] = fsub <4 x float> [[ATAN]], splat (float 0x400921FB60000000) +; EXPCHECK-DAG: [[X_LT_0:%.+]] = fcmp olt <4 x float> %x, zeroinitializer +; EXPCHECK-DAG: [[X_EQ_0:%.+]] = fcmp oeq <4 x float> %x, zeroinitializer +; EXPCHECK-DAG: [[Y_GE_0:%.+]] = fcmp oge <4 x float> %y, zeroinitializer +; EXPCHECK-DAG: [[Y_LT_0:%.+]] = fcmp olt <4 x float> %y, zeroinitializer +; EXPCHECK: [[XLT0_AND_YGE0:%.+]] = and <4 x i1> [[X_LT_0]], [[Y_GE_0]] +; EXPCHECK: [[SELECT_ADD_PI:%.+]] = select <4 x i1> [[XLT0_AND_YGE0]], <4 x float> [[ADD_PI]], <4 x float> [[ATAN]] +; EXPCHECK: [[XLT0_AND_YLT0:%.+]] = and <4 x i1> [[X_LT_0]], [[Y_LT_0]] +; EXPCHECK: [[SELECT_SUB_PI:%.+]] = select <4 x i1> [[XLT0_AND_YLT0]], <4 x float> [[SUB_PI]], <4 x float> [[SELECT_ADD_PI]] +; EXPCHECK: [[XEQ0_AND_YLT0:%.+]] = and <4 x i1> [[X_EQ_0]], [[Y_LT_0]] +; EXPCHECK: [[SELECT_NEGHPI:%.+]] = select <4 x i1> [[XEQ0_AND_YLT0]], <4 x float> splat (float 0xBFF921FB60000000), <4 x float> [[SELECT_SUB_PI]] +; EXPCHECK: [[XEQ0_AND_YGE0:%.+]] = and <4 x i1> [[X_EQ_0]], [[Y_GE_0]] +; EXPCHECK: [[SELECT_HPI:%.+]] = select <4 x i1> [[XEQ0_AND_YGE0]], <4 x float> splat (float 0x3FF921FB60000000), <4 x float> [[SELECT_NEGHPI]] +; EXPCHECK: ret <4 x float> [[SELECT_HPI]] + +; Scalarization occurs after expansion, so atan scalarization is tested separately. +; Expansion, scalarization and lowering: +; Just make sure this expands to exactly 4 scalar DXIL atan (OpCode=17) calls. +; DOPCHECK-COUNT-4: call float @dx.op.unary.f32(i32 17, float %{{.*}}) +; DOPCHECK-NOT: call float @dx.op.unary.f32(i32 17, + + %elt.atan2 = call <4 x float> @llvm.atan2.v4f32(<4 x float> %y, <4 x float> %x) + ret <4 x float> %elt.atan2 +} + +declare half @llvm.atan2.f16(half, half) +declare float @llvm.atan2.f32(float, float) +declare <4 x float> @llvm.atan2.v4f32(<4 x float>, <4 x float>) diff --git a/llvm/test/CodeGen/DirectX/atan2_error.ll b/llvm/test/CodeGen/DirectX/atan2_error.ll index 372934098b7c..9b66f9f1dd45 100644 --- a/llvm/test/CodeGen/DirectX/atan2_error.ll +++ b/llvm/test/CodeGen/DirectX/atan2_error.ll @@ -1,11 +1,11 @@ -; RUN: not opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s 2>&1 | FileCheck %s
-
-; DXIL operation atan does not support double overload type
-; CHECK: in function atan2_double
-; CHECK-SAME: Cannot create ATan operation: Invalid overload type
-
-define noundef double @atan2_double(double noundef %a, double noundef %b) #0 {
-entry:
- %1 = call double @llvm.atan2.f64(double %a, double %b)
- ret double %1
-}
+; RUN: not opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s 2>&1 | FileCheck %s + +; DXIL operation atan does not support double overload type +; CHECK: in function atan2_double +; CHECK-SAME: Cannot create ATan operation: Invalid overload type + +define noundef double @atan2_double(double noundef %a, double noundef %b) #0 { +entry: + %1 = call double @llvm.atan2.f64(double %a, double %b) + ret double %1 +} diff --git a/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll b/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll index c73a31dcc113..bd0582c4b90b 100644 --- a/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll +++ b/llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll @@ -8,7 +8,7 @@ define void @update_counter_decrement_vector() { ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] ; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 -1){{$}} @@ -21,7 +21,7 @@ define void @update_counter_increment_vector() { ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %buffer = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0( - i32 0, i32 0, i32 1, i32 0, i1 false, ptr null) + i32 0, i32 0, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] ; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 1){{$}} %1 = call i32 @llvm.dx.resource.updatecounter(target("dx.TypedBuffer", <4 x float>, 0, 0, 0) %buffer, i8 1) @@ -33,7 +33,7 @@ define void @update_counter_decrement_scalar() { ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, %buffer = call target("dx.RawBuffer", i8, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( - i32 1, i32 8, i32 1, i32 0, i1 false, ptr null) + i32 1, i32 8, i32 1, i32 0, ptr null) ; CHECK-NEXT: [[BUFFANOT:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[BIND]] ; CHECK-NEXT: [[REG:%.*]] = call i32 @dx.op.bufferUpdateCounter(i32 70, %dx.types.Handle [[BUFFANOT]], i8 -1){{$}} %1 = call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", i8, 0, 0) %buffer, i8 -1) diff --git a/llvm/test/CodeGen/DirectX/cross.ll b/llvm/test/CodeGen/DirectX/cross.ll index e787c5035925..262f1983c449 100644 --- a/llvm/test/CodeGen/DirectX/cross.ll +++ b/llvm/test/CodeGen/DirectX/cross.ll @@ -1,56 +1,56 @@ -; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s
-
-; Make sure dxil operation function calls for cross are generated for half/float.
-
-declare <3 x half> @llvm.dx.cross.v3f16(<3 x half>, <3 x half>)
-declare <3 x float> @llvm.dx.cross.v3f32(<3 x float>, <3 x float>)
-
-define noundef <3 x half> @test_cross_half3(<3 x half> noundef %p0, <3 x half> noundef %p1) {
-entry:
- ; CHECK: %x0 = extractelement <3 x half> %p0, i64 0
- ; CHECK: %x1 = extractelement <3 x half> %p0, i64 1
- ; CHECK: %x2 = extractelement <3 x half> %p0, i64 2
- ; CHECK: %y0 = extractelement <3 x half> %p1, i64 0
- ; CHECK: %y1 = extractelement <3 x half> %p1, i64 1
- ; CHECK: %y2 = extractelement <3 x half> %p1, i64 2
- ; CHECK: %0 = fmul half %x1, %y2
- ; CHECK: %1 = fmul half %x2, %y1
- ; CHECK: %hlsl.cross1 = fsub half %0, %1
- ; CHECK: %2 = fmul half %x2, %y0
- ; CHECK: %3 = fmul half %x0, %y2
- ; CHECK: %hlsl.cross2 = fsub half %2, %3
- ; CHECK: %4 = fmul half %x0, %y1
- ; CHECK: %5 = fmul half %x1, %y0
- ; CHECK: %hlsl.cross3 = fsub half %4, %5
- ; CHECK: %6 = insertelement <3 x half> poison, half %hlsl.cross1, i64 0
- ; CHECK: %7 = insertelement <3 x half> %6, half %hlsl.cross2, i64 1
- ; CHECK: %8 = insertelement <3 x half> %7, half %hlsl.cross3, i64 2
- ; CHECK: ret <3 x half> %8
- %hlsl.cross = call <3 x half> @llvm.dx.cross.v3f16(<3 x half> %p0, <3 x half> %p1)
- ret <3 x half> %hlsl.cross
-}
-
-define noundef <3 x float> @test_cross_float3(<3 x float> noundef %p0, <3 x float> noundef %p1) {
-entry:
- ; CHECK: %x0 = extractelement <3 x float> %p0, i64 0
- ; CHECK: %x1 = extractelement <3 x float> %p0, i64 1
- ; CHECK: %x2 = extractelement <3 x float> %p0, i64 2
- ; CHECK: %y0 = extractelement <3 x float> %p1, i64 0
- ; CHECK: %y1 = extractelement <3 x float> %p1, i64 1
- ; CHECK: %y2 = extractelement <3 x float> %p1, i64 2
- ; CHECK: %0 = fmul float %x1, %y2
- ; CHECK: %1 = fmul float %x2, %y1
- ; CHECK: %hlsl.cross1 = fsub float %0, %1
- ; CHECK: %2 = fmul float %x2, %y0
- ; CHECK: %3 = fmul float %x0, %y2
- ; CHECK: %hlsl.cross2 = fsub float %2, %3
- ; CHECK: %4 = fmul float %x0, %y1
- ; CHECK: %5 = fmul float %x1, %y0
- ; CHECK: %hlsl.cross3 = fsub float %4, %5
- ; CHECK: %6 = insertelement <3 x float> poison, float %hlsl.cross1, i64 0
- ; CHECK: %7 = insertelement <3 x float> %6, float %hlsl.cross2, i64 1
- ; CHECK: %8 = insertelement <3 x float> %7, float %hlsl.cross3, i64 2
- ; CHECK: ret <3 x float> %8
- %hlsl.cross = call <3 x float> @llvm.dx.cross.v3f32(<3 x float> %p0, <3 x float> %p1)
- ret <3 x float> %hlsl.cross
-}
+; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s + +; Make sure dxil operation function calls for cross are generated for half/float. + +declare <3 x half> @llvm.dx.cross.v3f16(<3 x half>, <3 x half>) +declare <3 x float> @llvm.dx.cross.v3f32(<3 x float>, <3 x float>) + +define noundef <3 x half> @test_cross_half3(<3 x half> noundef %p0, <3 x half> noundef %p1) { +entry: + ; CHECK: %x0 = extractelement <3 x half> %p0, i64 0 + ; CHECK: %x1 = extractelement <3 x half> %p0, i64 1 + ; CHECK: %x2 = extractelement <3 x half> %p0, i64 2 + ; CHECK: %y0 = extractelement <3 x half> %p1, i64 0 + ; CHECK: %y1 = extractelement <3 x half> %p1, i64 1 + ; CHECK: %y2 = extractelement <3 x half> %p1, i64 2 + ; CHECK: %0 = fmul half %x1, %y2 + ; CHECK: %1 = fmul half %x2, %y1 + ; CHECK: %hlsl.cross1 = fsub half %0, %1 + ; CHECK: %2 = fmul half %x2, %y0 + ; CHECK: %3 = fmul half %x0, %y2 + ; CHECK: %hlsl.cross2 = fsub half %2, %3 + ; CHECK: %4 = fmul half %x0, %y1 + ; CHECK: %5 = fmul half %x1, %y0 + ; CHECK: %hlsl.cross3 = fsub half %4, %5 + ; CHECK: %6 = insertelement <3 x half> poison, half %hlsl.cross1, i64 0 + ; CHECK: %7 = insertelement <3 x half> %6, half %hlsl.cross2, i64 1 + ; CHECK: %8 = insertelement <3 x half> %7, half %hlsl.cross3, i64 2 + ; CHECK: ret <3 x half> %8 + %hlsl.cross = call <3 x half> @llvm.dx.cross.v3f16(<3 x half> %p0, <3 x half> %p1) + ret <3 x half> %hlsl.cross +} + +define noundef <3 x float> @test_cross_float3(<3 x float> noundef %p0, <3 x float> noundef %p1) { +entry: + ; CHECK: %x0 = extractelement <3 x float> %p0, i64 0 + ; CHECK: %x1 = extractelement <3 x float> %p0, i64 1 + ; CHECK: %x2 = extractelement <3 x float> %p0, i64 2 + ; CHECK: %y0 = extractelement <3 x float> %p1, i64 0 + ; CHECK: %y1 = extractelement <3 x float> %p1, i64 1 + ; CHECK: %y2 = extractelement <3 x float> %p1, i64 2 + ; CHECK: %0 = fmul float %x1, %y2 + ; CHECK: %1 = fmul float %x2, %y1 + ; CHECK: %hlsl.cross1 = fsub float %0, %1 + ; CHECK: %2 = fmul float %x2, %y0 + ; CHECK: %3 = fmul float %x0, %y2 + ; CHECK: %hlsl.cross2 = fsub float %2, %3 + ; CHECK: %4 = fmul float %x0, %y1 + ; CHECK: %5 = fmul float %x1, %y0 + ; CHECK: %hlsl.cross3 = fsub float %4, %5 + ; CHECK: %6 = insertelement <3 x float> poison, float %hlsl.cross1, i64 0 + ; CHECK: %7 = insertelement <3 x float> %6, float %hlsl.cross2, i64 1 + ; CHECK: %8 = insertelement <3 x float> %7, float %hlsl.cross3, i64 2 + ; CHECK: ret <3 x float> %8 + %hlsl.cross = call <3 x float> @llvm.dx.cross.v3f32(<3 x float> %p0, <3 x float> %p1) + ret <3 x float> %hlsl.cross +} diff --git a/llvm/test/CodeGen/DirectX/dot2add.ll b/llvm/test/CodeGen/DirectX/dot2add.ll index 5e1cf405752b..18b4fc57719c 100644 --- a/llvm/test/CodeGen/DirectX/dot2add.ll +++ b/llvm/test/CodeGen/DirectX/dot2add.ll @@ -1,13 +1,13 @@ -; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.4-compute %s | FileCheck %s
-
-define noundef float @dot2add_simple(<2 x half> noundef %a, <2 x half> noundef %b, float %acc) {
-entry:
- %ax = extractelement <2 x half> %a, i32 0
- %ay = extractelement <2 x half> %a, i32 1
- %bx = extractelement <2 x half> %b, i32 0
- %by = extractelement <2 x half> %b, i32 1
-
-; CHECK: call float @dx.op.dot2AddHalf.f32(i32 162, float %acc, half %ax, half %ay, half %bx, half %by)
- %ret = call float @llvm.dx.dot2add(float %acc, half %ax, half %ay, half %bx, half %by)
- ret float %ret
-}
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.4-compute %s | FileCheck %s + +define noundef float @dot2add_simple(<2 x half> noundef %a, <2 x half> noundef %b, float %acc) { +entry: + %ax = extractelement <2 x half> %a, i32 0 + %ay = extractelement <2 x half> %a, i32 1 + %bx = extractelement <2 x half> %b, i32 0 + %by = extractelement <2 x half> %b, i32 1 + +; CHECK: call float @dx.op.dot2AddHalf.f32(i32 162, float %acc, half %ax, half %ay, half %bx, half %by) + %ret = call float @llvm.dx.dot2add(float %acc, half %ax, half %ay, half %bx, half %by) + ret float %ret +} diff --git a/llvm/test/CodeGen/DirectX/dot2add_error.ll b/llvm/test/CodeGen/DirectX/dot2add_error.ll index c45133c8e812..9e7d3492d412 100644 --- a/llvm/test/CodeGen/DirectX/dot2add_error.ll +++ b/llvm/test/CodeGen/DirectX/dot2add_error.ll @@ -1,15 +1,15 @@ -; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s 2>&1 | FileCheck %s
-
-; CHECK: in function f
-; CHECK-SAME: Cannot create Dot2AddHalf operation: No valid overloads for DXIL version 1.3
-
-define noundef float @f(<2 x half> noundef %a, <2 x half> noundef %b, float %acc) {
-entry:
- %ax = extractelement <2 x half> %a, i32 0
- %ay = extractelement <2 x half> %a, i32 1
- %bx = extractelement <2 x half> %b, i32 0
- %by = extractelement <2 x half> %b, i32 1
-
- %ret = call float @llvm.dx.dot2add(float %acc, half %ax, half %ay, half %bx, half %by)
- ret float %ret
-}
+; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s 2>&1 | FileCheck %s + +; CHECK: in function f +; CHECK-SAME: Cannot create Dot2AddHalf operation: No valid overloads for DXIL version 1.3 + +define noundef float @f(<2 x half> noundef %a, <2 x half> noundef %b, float %acc) { +entry: + %ax = extractelement <2 x half> %a, i32 0 + %ay = extractelement <2 x half> %a, i32 1 + %bx = extractelement <2 x half> %b, i32 0 + %by = extractelement <2 x half> %b, i32 1 + + %ret = call float @llvm.dx.dot2add(float %acc, half %ax, half %ay, half %bx, half %by) + ret float %ret +} diff --git a/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll b/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll index ce5c2d7ca32b..4f2871341ff8 100644 --- a/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll +++ b/llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll @@ -14,7 +14,7 @@ define void @CSMain() local_unnamed_addr { ; CHECK-LABEL: define void @CSMain() local_unnamed_addr { ; CHECK-NEXT: [[ENTRY:.*:]] ; FHCHECK-NEXT: [[AGG_TMP_I1_SROA_0:%.*]] = alloca target("dx.RawBuffer", i32, 1, 0), align 8 -; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, i1 false, ptr nonnull @name) +; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, ptr nonnull @name) ; CHECK-NEXT: store target("dx.RawBuffer", i32, 1, 0) [[TMP0]], ptr @global, align 4 ; FHCHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @global, align 4 ; FHCHECK-NEXT: store i32 [[TMP2]], ptr [[AGG_TMP_I1_SROA_0]], align 8 @@ -24,7 +24,7 @@ define void @CSMain() local_unnamed_addr { ; entry: %alloca = alloca target("dx.RawBuffer", i32, 1, 0), align 8 - %handle = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, i1 false, ptr nonnull @name) + %handle = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 3, i32 1, i32 0, ptr nonnull @name) store target("dx.RawBuffer", i32, 1, 0) %handle , ptr @global, align 4 %val = load i32, ptr @global, align 4 call void @llvm.lifetime.start.p0(ptr nonnull %alloca) diff --git a/llvm/test/CodeGen/DirectX/is_fpclass.ll b/llvm/test/CodeGen/DirectX/is_fpclass.ll index a628096aacd7..f5804f341885 100644 --- a/llvm/test/CodeGen/DirectX/is_fpclass.ll +++ b/llvm/test/CodeGen/DirectX/is_fpclass.ll @@ -1,5 +1,5 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 -; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s +; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.9-library %s | FileCheck %s --check-prefixes=CHECK,SM69CHECK +; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.8-library %s | FileCheck %s --check-prefixes=CHECK,SMOLDCHECK define noundef i1 @isnegzero(float noundef %a) { @@ -46,6 +46,25 @@ entry: ret i1 %0 } +define noundef i1 @isnanh(half noundef %a) { +; CHECK-LABEL: define noundef i1 @isnanh( +; CHECK-SAME: half noundef [[A:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; SM69CHECK-NEXT: [[TMP0:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 8, half [[A]]) #[[ATTR0:[0-9]+]] +; SMOLDCHECK-NEXT: [[BITCAST:%.*]] = bitcast half [[A]] to i16 +; SMOLDCHECK-NEXT: [[AND:%.*]] = and i16 [[BITCAST]], 31744 +; SMOLDCHECK-NEXT: [[CMPHIGH:%.*]] = icmp eq i16 [[AND]], 31744 +; SMOLDCHECK-NEXT: [[ANDLOW:%.*]] = and i16 [[BITCAST]], 1023 +; SMOLDCHECK-NEXT: [[CMPZERO:%.*]] = icmp ne i16 [[ANDLOW]], 0 +; SMOLDCHECK-NEXT: [[ANDLOW:%.*]] = and i1 [[CMPHIGH]], [[CMPZERO]] +; SMOLDCHECK-NEXT: ret i1 [[ANDLOW]] +; SM69CHECK-NEXT: ret i1 [[TMP0]] +; +entry: + %0 = call i1 @llvm.is.fpclass.f16(half %a, i32 3) + ret i1 %0 +} + define noundef <2 x i1> @isnanv2(<2 x float> noundef %a) { ; CHECK-LABEL: define noundef <2 x i1> @isnanv2( ; CHECK-SAME: <2 x float> noundef [[A:%.*]]) { @@ -63,6 +82,40 @@ entry: ret <2 x i1> %0 } +define noundef <2 x i1> @isnanhv2(<2 x half> noundef %a) { +; CHECK-LABEL: define noundef <2 x i1> @isnanhv2( +; CHECK-SAME: <2 x half> noundef [[A:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[A_I0:%.*]] = extractelement <2 x half> [[A]], i64 0 +; SM69CHECK-NEXT: [[DOTI02:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 8, half [[A_I0]]) #[[ATTR0:[0-9]+]] +; SM69CHECK-NEXT: [[A_I1:%.*]] = extractelement <2 x half> [[A]], i64 1 +; SM69CHECK-NEXT: [[DOTI11:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 8, half [[A_I1]]) #[[ATTR0]] +; SM69CHECK-NEXT: [[DOTUPTO0:%.*]] = insertelement <2 x i1> poison, i1 [[DOTI02]], i64 0 +; SM69CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i1> [[DOTUPTO0]], i1 [[DOTI11]], i64 1 +; SM69CHECK-NEXT: ret <2 x i1> [[TMP0]] +; +; SMOLDCHECK-NEXT: [[DOTI0:%.*]] = bitcast half [[A_I0]] to i16 +; SMOLDCHECK-NEXT: [[A_I1:%.*]] = extractelement <2 x half> [[A]], i64 1 +; SMOLDCHECK-NEXT: [[DOTI1:%.*]] = bitcast half [[A_I1]] to i16 +; SMOLDCHECK-NEXT: [[DOTI01:%.*]] = and i16 [[DOTI0]], 31744 +; SMOLDCHECK-NEXT: [[DOTI12:%.*]] = and i16 [[DOTI1]], 31744 +; SMOLDCHECK-NEXT: [[DOTI03:%.*]] = icmp eq i16 [[DOTI01]], 31744 +; SMOLDCHECK-NEXT: [[DOTI14:%.*]] = icmp eq i16 [[DOTI12]], 31744 +; SMOLDCHECK-NEXT: [[DOTI05:%.*]] = and i16 [[DOTI0]], 1023 +; SMOLDCHECK-NEXT: [[DOTI16:%.*]] = and i16 [[DOTI1]], 1023 +; SMOLDCHECK-NEXT: [[DOTI07:%.*]] = icmp ne i16 [[DOTI05]], 0 +; SMOLDCHECK-NEXT: [[DOTI18:%.*]] = icmp ne i16 [[DOTI16]], 0 +; SMOLDCHECK-NEXT: [[DOTI09:%.*]] = and i1 [[DOTI03]], [[DOTI07]] +; SMOLDCHECK-NEXT: [[DOTI110:%.*]] = and i1 [[DOTI14]], [[DOTI18]] +; SMOLDCHECK-NEXT: [[DOTUPTO015:%.*]] = insertelement <2 x i1> poison, i1 [[DOTI09]], i64 0 +; SMOLDCHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i1> [[DOTUPTO015]], i1 [[DOTI110]], i64 1 +; SMOLDCHECK-NEXT: ret <2 x i1> [[TMP0]] +; +entry: + %0 = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> %a, i32 3) + ret <2 x i1> %0 +} + define noundef i1 @isinf(float noundef %a) { ; CHECK-LABEL: define noundef i1 @isinf( ; CHECK-SAME: float noundef [[A:%.*]]) { @@ -75,6 +128,23 @@ entry: ret i1 %0 } +define noundef i1 @isinfh(half noundef %a) { +; CHECK-LABEL: define noundef i1 @isinfh( +; CHECK-SAME: half noundef [[A:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; SM69CHECK-NEXT: [[ISINF:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 9, half [[A]]) #[[ATTR0]] +; SMOLDCHECK-NEXT: [[BITCAST:%.*]] = bitcast half [[A]] to i16 +; SMOLDCHECK-NEXT: [[CMPHIGH:%.*]] = icmp eq i16 [[BITCAST]], 31744 +; SMOLDCHECK-NEXT: [[CMPLOW:%.*]] = icmp eq i16 [[BITCAST]], -1024 +; SMOLDCHECK-NEXT: [[OR:%.*]] = or i1 [[CMPHIGH]], [[CMPLOW]] +; SMOLDCHECK-NEXT: ret i1 [[OR]] +; SM69CHECK-NEXT: ret i1 [[ISINF]] +; +entry: + %0 = call i1 @llvm.is.fpclass.f16(half %a, i32 516) + ret i1 %0 +} + define noundef <2 x i1> @isinfv2(<2 x float> noundef %a) { ; CHECK-LABEL: define noundef <2 x i1> @isinfv2( ; CHECK-SAME: <2 x float> noundef [[A:%.*]]) { @@ -104,6 +174,22 @@ entry: ret i1 %0 } +define noundef i1 @isfiniteh(half noundef %a) { +; CHECK-LABEL: define noundef i1 @isfiniteh( +; CHECK-SAME: half noundef [[A:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; SM69CHECK-NEXT: [[TMP0:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 10, half [[A]]) #[[ATTR0]] +; SMOLDCHECK-NEXT: [[BITCAST:%.*]] = bitcast half [[A]] to i16 +; SMOLDCHECK-NEXT: [[AND:%.*]] = and i16 [[BITCAST]], 31744 +; SMOLDCHECK-NEXT: [[CMPHIGH:%.*]] = icmp ne i16 [[AND]], 31744 +; SMOLDCHECK-NEXT: ret i1 [[CMPHIGH]] +; SM69CHECK-NEXT: ret i1 [[TMP0]] +; +entry: + %0 = call i1 @llvm.is.fpclass.f16(half %a, i32 504) + ret i1 %0 +} + define noundef <2 x i1> @isfinitev2(<2 x float> noundef %a) { ; CHECK-LABEL: define noundef <2 x i1> @isfinitev2( ; CHECK-SAME: <2 x float> noundef [[A:%.*]]) { @@ -121,6 +207,35 @@ entry: ret <2 x i1> %0 } +define noundef <2 x i1> @isfinitehv2(<2 x half> noundef %a) { +; CHECK-LABEL: define noundef <2 x i1> @isfinitehv2( +; CHECK-SAME: <2 x half> noundef [[A:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; SM69CHECK-NEXT: [[A_I0:%.*]] = extractelement <2 x half> [[A]], i64 0 +; SM69CHECK-NEXT: [[DOTI02:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 10, half [[A_I0]]) #[[ATTR0:[0-9]+]] +; SM69CHECK-NEXT: [[A_I1:%.*]] = extractelement <2 x half> [[A]], i64 1 +; SM69CHECK-NEXT: [[DOTI11:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 10, half [[A_I1]]) #[[ATTR0]] +; SM69CHECK-NEXT: [[DOTUPTO0:%.*]] = insertelement <2 x i1> poison, i1 [[DOTI02]], i64 0 +; SM69CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i1> [[DOTUPTO0]], i1 [[DOTI11]], i64 1 +; SM69CHECK-NEXT: ret <2 x i1> [[TMP0]] +; +; SMOLDCHECK-NEXT: [[A_I0:%.*]] = extractelement <2 x half> [[A]], i64 0 +; SMOLDCHECK-NEXT: [[DOTI0:%.*]] = bitcast half [[A_I0]] to i16 +; SMOLDCHECK-NEXT: [[A_I1:%.*]] = extractelement <2 x half> [[A]], i64 1 +; SMOLDCHECK-NEXT: [[DOTI1:%.*]] = bitcast half [[A_I1]] to i16 +; SMOLDCHECK-NEXT: [[DOTI01:%.*]] = and i16 [[DOTI0]], 31744 +; SMOLDCHECK-NEXT: [[DOTI12:%.*]] = and i16 [[DOTI1]], 31744 +; SMOLDCHECK-NEXT: [[DOTI03:%.*]] = icmp ne i16 [[DOTI01]], 31744 +; SMOLDCHECK-NEXT: [[DOTI14:%.*]] = icmp ne i16 [[DOTI12]], 31744 +; SMOLDCHECK-NEXT: [[DOTUPTO06:%.*]] = insertelement <2 x i1> poison, i1 [[DOTI03]], i64 0 +; SMOLDCHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i1> [[DOTUPTO06]], i1 [[DOTI14]], i64 1 +; SMOLDCHECK-NEXT: ret <2 x i1> [[TMP0]] +; +entry: + %0 = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> %a, i32 504) + ret <2 x i1> %0 +} + define noundef i1 @isnormal(float noundef %a) { ; CHECK-LABEL: define noundef i1 @isnormal( ; CHECK-SAME: float noundef [[A:%.*]]) { @@ -133,6 +248,24 @@ entry: ret i1 %0 } +define noundef i1 @isnormalh(half noundef %a) { +; CHECK-LABEL: define noundef i1 @isnormalh( +; CHECK-SAME: half noundef [[A:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; SM69CHECK-NEXT: [[TMP0:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 11, half [[A]]) #[[ATTR0]] +; SMOLDCHECK-NEXT: [[BITCAST:%.*]] = bitcast half [[A]] to i16 +; SMOLDCHECK-NEXT: [[AND:%.*]] = and i16 [[BITCAST]], 31744 +; SMOLDCHECK-NEXT: [[CMPZERO:%.*]] = icmp ne i16 [[AND]], 0 +; SMOLDCHECK-NEXT: [[CMPHIGH:%.*]] = icmp ne i16 [[AND]], 31744 +; SMOLDCHECK-NEXT: [[ANDCMP:%.*]] = and i1 [[CMPZERO]], [[CMPHIGH]] +; SMOLDCHECK-NEXT: ret i1 [[ANDCMP]] +; SM69CHECK-NEXT: ret i1 [[TMP0]] +; +entry: + %0 = call i1 @llvm.is.fpclass.f16(half %a, i32 264) + ret i1 %0 +} + define noundef <2 x i1> @isnormalv2(<2 x float> noundef %a) { ; CHECK-LABEL: define noundef <2 x i1> @isnormalv2( ; CHECK-SAME: <2 x float> noundef [[A:%.*]]) { @@ -150,5 +283,37 @@ entry: ret <2 x i1> %0 } +define noundef <2 x i1> @isnormalhv2(<2 x half> noundef %a) { +; CHECK-LABEL: define noundef <2 x i1> @isnormalhv2( +; CHECK-SAME: <2 x half> noundef [[A:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[A_I0:%.*]] = extractelement <2 x half> [[A]], i64 0 +; SM69CHECK-NEXT: [[DOTI02:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 11, half [[A_I0]]) #[[ATTR0:[0-9]+]] +; SM69CHECK-NEXT: [[A_I1:%.*]] = extractelement <2 x half> [[A]], i64 1 +; SM69CHECK-NEXT: [[DOTI11:%.*]] = call i1 @dx.op.isSpecialFloat.f16(i32 11, half [[A_I1]]) #[[ATTR0]] +; SM69CHECK-NEXT: [[DOTUPTO0:%.*]] = insertelement <2 x i1> poison, i1 [[DOTI02]], i64 0 +; SM69CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i1> [[DOTUPTO0]], i1 [[DOTI11]], i64 1 +; SM69CHECK-NEXT: ret <2 x i1> [[TMP0]] +; +; SMOLDCHECK-NEXT: [[DOTI0:%.*]] = bitcast half [[A_I0]] to i16 +; SMOLDCHECK-NEXT: [[A_I1:%.*]] = extractelement <2 x half> [[A]], i64 1 +; SMOLDCHECK-NEXT: [[DOTI1:%.*]] = bitcast half [[A_I1]] to i16 +; SMOLDCHECK-NEXT: [[DOTI01:%.*]] = and i16 [[DOTI0]], 31744 +; SMOLDCHECK-NEXT: [[DOTI12:%.*]] = and i16 [[DOTI1]], 31744 +; SMOLDCHECK-NEXT: [[DOTI03:%.*]] = icmp ne i16 [[DOTI01]], 0 +; SMOLDCHECK-NEXT: [[DOTI14:%.*]] = icmp ne i16 [[DOTI12]], 0 +; SMOLDCHECK-NEXT: [[DOTI05:%.*]] = icmp ne i16 [[DOTI01]], 31744 +; SMOLDCHECK-NEXT: [[DOTI16:%.*]] = icmp ne i16 [[DOTI12]], 31744 +; SMOLDCHECK-NEXT: [[DOTI07:%.*]] = and i1 [[DOTI03]], [[DOTI05]] +; SMOLDCHECK-NEXT: [[DOTI18:%.*]] = and i1 [[DOTI14]], [[DOTI16]] +; SMOLDCHECK-NEXT: [[DOTUPTO012:%.*]] = insertelement <2 x i1> poison, i1 [[DOTI07]], i64 0 +; SMOLDCHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i1> [[DOTUPTO012]], i1 [[DOTI18]], i64 1 +; SMOLDCHECK-NEXT: ret <2 x i1> [[TMP0]] +; +entry: + %0 = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> %a, i32 264) + ret <2 x i1> %0 +} + declare i1 @llvm.is.fpclass.f32(float, i32 immarg) declare <2 x i1> @llvm.is.fpclass.v2f32(<2 x float>, i32 immarg) diff --git a/llvm/test/CodeGen/DirectX/isinf.ll b/llvm/test/CodeGen/DirectX/isinf.ll index 461553b533ae..bf31363ee114 100644 --- a/llvm/test/CodeGen/DirectX/isinf.ll +++ b/llvm/test/CodeGen/DirectX/isinf.ll @@ -1,4 +1,5 @@ -; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s +; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.9-library %s | FileCheck %s --check-prefixes=CHECK,SM69CHECK +; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.8-library %s | FileCheck %s --check-prefixes=CHECK,SMOLDCHECK ; Make sure dxil operation function calls for isinf are generated for float and half. @@ -11,17 +12,47 @@ entry: define noundef i1 @isinf_half(half noundef %a) { entry: - ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half %{{.*}}) #[[#ATTR]] + ; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half %{{.*}}) #[[#ATTR]] + ; SMOLDCHECK: [[BITCAST:%.*]] = bitcast half %a to i16 + ; SMOLDCHECK: [[CMPHIGH:%.*]] = icmp eq i16 [[BITCAST]], 31744 + ; SMOLDCHECK: [[CMPLOW:%.*]] = icmp eq i16 [[BITCAST]], -1024 + ; SMOLDCHECK: [[OR:%.*]] = or i1 [[CMPHIGH]], [[CMPLOW]] %dx.isinf = call i1 @llvm.dx.isinf.f16(half %a) ret i1 %dx.isinf } define noundef <4 x i1> @isinf_half4(<4 x half> noundef %p0) { entry: - ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half - ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half - ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half - ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half + ; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half + ; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half + ; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half + ; SM69CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half + + ; SMOLDCHECK: [[ee0:%.*]] = extractelement <4 x half> %p0, i64 0 + ; SMOLDCHECK: [[BITCAST0:%.*]] = bitcast half [[ee0]] to i16 + ; SMOLDCHECK: [[ee1:%.*]] = extractelement <4 x half> %p0, i64 1 + ; SMOLDCHECK: [[BITCAST1:%.*]] = bitcast half [[ee1]] to i16 + ; SMOLDCHECK:[[ee2:%.*]] = extractelement <4 x half> %p0, i64 2 + ; SMOLDCHECK: [[BITCAST2:%.*]] = bitcast half [[ee2]] to i16 + ; SMOLDCHECK: [[ee3:%.*]] = extractelement <4 x half> %p0, i64 3 + ; SMOLDCHECK: [[BITCAST3:%.*]] = bitcast half [[ee3]] to i16 + ; SMOLDCHECK: [[ICMPHIGH0:%.*]] = icmp eq i16 [[BITCAST0]], 31744 + ; SMOLDCHECK: [[ICMPHIGH1:%.*]] = icmp eq i16 [[BITCAST1]], 31744 + ; SMOLDCHECK: [[ICMPHIGH2:%.*]] = icmp eq i16 [[BITCAST2]], 31744 + ; SMOLDCHECK: [[ICMPHIGH3:%.*]] = icmp eq i16 [[BITCAST3]], 31744 + ; SMOLDCHECK: [[ICMPLOW0:%.*]] = icmp eq i16 [[BITCAST0]], -1024 + ; SMOLDCHECK: [[ICMPLOW1:%.*]] = icmp eq i16 [[BITCAST1]], -1024 + ; SMOLDCHECK: [[ICMPLOW2:%.*]] = icmp eq i16 [[BITCAST2]], -1024 + ; SMOLDCHECK: [[ICMPLOW3:%.*]] = icmp eq i16 [[BITCAST3]], -1024 + ; SMOLDCHECK: [[OR0:%.*]] = or i1 [[ICMPHIGH0]], [[ICMPLOW0]] + ; SMOLDCHECK: [[OR1:%.*]] = or i1 [[ICMPHIGH1]], [[ICMPLOW1]] + ; SMOLDCHECK: [[OR2:%.*]] = or i1 [[ICMPHIGH2]], [[ICMPLOW2]] + ; SMOLDCHECK: [[OR3:%.*]] = or i1 [[ICMPHIGH3]], [[ICMPLOW3]] + ; SMOLDCHECK: %.upto019 = insertelement <4 x i1> poison, i1 [[OR0]], i64 0 + ; SMOLDCHECK: %.upto120 = insertelement <4 x i1> %.upto019, i1 [[OR1]], i64 1 + ; SMOLDCHECK: %.upto221 = insertelement <4 x i1> %.upto120, i1 [[OR2]], i64 2 + ; SMOLDCHECK: %0 = insertelement <4 x i1> %.upto221, i1 [[OR3]], i64 3 + %hlsl.isinf = call <4 x i1> @llvm.dx.isinf.v4f16(<4 x half> %p0) ret <4 x i1> %hlsl.isinf } diff --git a/llvm/test/CodeGen/DirectX/issue-152348.ll b/llvm/test/CodeGen/DirectX/issue-152348.ll new file mode 100644 index 000000000000..aa0179d82b09 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/issue-152348.ll @@ -0,0 +1,158 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -S -dxil-resource-type -dxil-resource-access -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s + +; NOTE: The two LLVM IR functions below are simplified versions of this HLSL +; RWStructuredBuffer<float16_t> a; +; RWStructuredBuffer<float16_t> b; +; RWStructuredBuffer<float16_t> c; +; cbuffer d { +; uint e; +; uint f; +; uint g; +; uint h; +; } +; [numthreads(6, 8, 1)] void CSMain() { +; if (h) { +; float16_t i = b[f]; +; c[g] = i; +; } else if(h == g) { +; float16_t i = b[g]; +; c[h] = i; +; } else { +; float16_t i = a[e]; +; c[g] = i; +; } +; } + +%__cblayout_d = type <{ i32, i32, i32, i32 }> + +@.str = internal unnamed_addr constant [2 x i8] c"a\00", align 1 +@d.cb = local_unnamed_addr global target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) poison +@e = external hidden local_unnamed_addr addrspace(2) global i32, align 4 +@d.str = internal unnamed_addr constant [2 x i8] c"d\00", align 1 + +define void @CSMain() local_unnamed_addr { +; CHECK-LABEL: define void @CSMain() local_unnamed_addr { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[CALLRAWBUFFERBINDING:%.*]] = tail call target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D:%.*]], 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) +; CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D]], 16, 0, 4, 8, 12)) [[CALLRAWBUFFERBINDING]], ptr @d.cb, align 4 +; CHECK-NEXT: [[LOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq i32 [[LOADE]], 0 +; CHECK-NEXT: br i1 [[TOBOOL_NOT_I]], label %[[IF_ELSE_I:.*]], label %[[IF_THEN_I:.*]] +; CHECK: [[IF_THEN_I]]: +; CHECK-NEXT: [[IFSTMTCALLRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP1:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[IFSTMTCALLRAWBUFFERBINDING]], i32 [[LOADE]], i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { half, i1 } [[TMP1]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP0]], i32 [[LOADE]], i32 0, half [[TMP2]]) +; CHECK-NEXT: br label %[[_Z6CSMAINV_EXIT:.*]] +; CHECK: [[IF_ELSE_I]]: +; CHECK-NEXT: [[CALL2NDRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP3:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP4:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALL2NDRAWBUFFERBINDING]], i32 [[LOADE]], i32 0) +; CHECK-NEXT: [[TMP5:%.*]] = extractvalue { half, i1 } [[TMP4]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP3]], i32 [[LOADE]], i32 0, half [[TMP5]]) +; CHECK-NEXT: br label %[[_Z6CSMAINV_EXIT]] +; CHECK: [[_Z6CSMAINV_EXIT]]: +; CHECK-NEXT: ret void +; +entry: + %callCBufferBinding = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) + store target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) %callCBufferBinding, ptr @d.cb, align 4 + %loadE = load i32, ptr addrspace(2) @e, align 4 + %tobool.not.i = icmp eq i32 %loadE, 0 + br i1 %tobool.not.i, label %if.else.i, label %if.then.i + +if.then.i: ; preds = %entry + %ifStmtcallRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) + %ifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %ifStmtcallRawBufferBinding, i32 %loadE) + br label %_Z6CSMainv.exit + +if.else.i: ; preds = %entry + %call2ndRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) + %elseStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %call2ndRawBufferBinding, i32 %loadE) + br label %_Z6CSMainv.exit + +_Z6CSMainv.exit: ; preds = %if.else.i, %if.then.i + %.sink1 = phi ptr [ %ifStmtCallResourceGEP, %if.then.i ], [ %elseStmtCallResourceGEP, %if.else.i ] + %call3rdRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) + %sinkCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %call3rdRawBufferBinding, i32 %loadE) + %loadSink = load half, ptr %.sink1, align 2 + store half %loadSink, ptr %sinkCallResourceGEP, align 2 + ret void +} + +define void @Main() local_unnamed_addr { +; CHECK-LABEL: define void @Main() local_unnamed_addr { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[CALLRAWBUFFERBINDING1:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[CALLRAWBUFFERBINDING0:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[CALLRAWBUFFERBINDING:%.*]] = tail call target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D:%.*]], 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) +; CHECK-NEXT: store target("dx.CBuffer", target("dx.Layout", [[__CBLAYOUT_D]], 16, 0, 4, 8, 12)) [[CALLRAWBUFFERBINDING]], ptr @d.cb, align 4 +; CHECK-NEXT: [[LOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq i32 [[LOADE]], 0 +; CHECK-NEXT: br i1 [[TOBOOL_NOT_I]], label %[[IF_ELSE_I:.*]], label %[[IF_THEN_I:.*]] +; CHECK: [[IF_THEN_I]]: +; CHECK-NEXT: [[IFSTMTLOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP1:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALLRAWBUFFERBINDING0]], i32 [[LOADE]], i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { half, i1 } [[TMP1]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP0]], i32 [[IFSTMTLOADE]], i32 0, half [[TMP2]]) +; CHECK-NEXT: br label %[[_Z6MAINV_EXIT:.*]] +; CHECK: [[IF_ELSE_I]]: +; CHECK-NEXT: [[ELSESTMTLOADE:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[ELSESTMTLOADE]], 0 +; CHECK-NEXT: br i1 [[CMP_I]], label %[[IF_THEN2_I:.*]], label %[[IF_ELSE6_I:.*]] +; CHECK: [[IF_THEN2_I]]: +; CHECK-NEXT: [[TMP3:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP4:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALLRAWBUFFERBINDING0]], i32 0, i32 0) +; CHECK-NEXT: [[TMP5:%.*]] = extractvalue { half, i1 } [[TMP4]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP3]], i32 0, i32 0, half [[TMP5]]) +; CHECK-NEXT: br label %[[_Z6MAINV_EXIT]] +; CHECK: [[IF_ELSE6_I]]: +; CHECK-NEXT: [[ELSESTMTLOADE2:%.*]] = load i32, ptr addrspace(2) @e, align 4 +; CHECK-NEXT: [[TMP6:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP7:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALLRAWBUFFERBINDING1]], i32 [[ELSESTMTLOADE2]], i32 0) +; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { half, i1 } [[TMP7]], 0 +; CHECK-NEXT: call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_f16_1_0t.f16(target("dx.RawBuffer", half, 1, 0) [[TMP6]], i32 [[ELSESTMTLOADE]], i32 0, half [[TMP8]]) +; CHECK-NEXT: br label %[[_Z6MAINV_EXIT]] +; CHECK: [[_Z6MAINV_EXIT]]: +; CHECK-NEXT: ret void +; +entry: + %callRawBufferBinding1 = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) + %callRawBufferBinding0 = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) + %callCBufferBinding = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) @llvm.dx.resource.handlefromimplicitbinding.tdx.CBuffer_tdx.Layout_s___cblayout_ds_16_0_4_8_12tt(i32 3, i32 0, i32 1, i32 0, ptr nonnull @d.str) + store target("dx.CBuffer", target("dx.Layout", %__cblayout_d, 16, 0, 4, 8, 12)) %callCBufferBinding, ptr @d.cb, align 4 + %loadE = load i32, ptr addrspace(2) @e, align 4 + %tobool.not.i = icmp eq i32 %loadE, 0 + br i1 %tobool.not.i, label %if.else.i, label %if.then.i + +if.then.i: ; preds = %entry + %ifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBinding0, i32 %loadE) + %ifStmtLoadE = load i32, ptr addrspace(2) @e, align 4 + br label %_Z6Mainv.exit + +if.else.i: ; preds = %entry + %elseStmtLoadE = load i32, ptr addrspace(2) @e, align 4 + %cmp.i = icmp eq i32 %elseStmtLoadE, 0 + br i1 %cmp.i, label %if.then2.i, label %if.else6.i + +if.then2.i: ; preds = %if.else.i + %elseifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBinding0, i32 0) + br label %_Z6Mainv.exit + +if.else6.i: ; preds = %if.else.i + %elseStmtLoadE2 = load i32, ptr addrspace(2) @e, align 4 + %elseStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBinding1, i32 %elseStmtLoadE2) + br label %_Z6Mainv.exit + +_Z6Mainv.exit: ; preds = %if.else6.i, %if.then2.i, %if.then.i + %.sink2 = phi i32 [ %ifStmtLoadE, %if.then.i ], [ 0, %if.then2.i ], [ %elseStmtLoadE, %if.else6.i ] + %.sink.in = phi ptr [ %ifStmtCallResourceGEP, %if.then.i ], [ %elseifStmtCallResourceGEP, %if.then2.i ], [ %elseStmtCallResourceGEP, %if.else6.i ] + %callRawBufferBindingSink = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 2, i32 0, i32 1, i32 0, ptr nonnull @.str) + %.sink = load half, ptr %.sink.in, align 2 + %i11 = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %callRawBufferBindingSink, i32 %.sink2) + store half %.sink, ptr %i11, align 2 + ret void +} diff --git a/llvm/test/CodeGen/DirectX/legalize-fneg.ll b/llvm/test/CodeGen/DirectX/legalize-fneg.ll index 8e85a455ae1a..20670c6c7f48 100644 --- a/llvm/test/CodeGen/DirectX/legalize-fneg.ll +++ b/llvm/test/CodeGen/DirectX/legalize-fneg.ll @@ -1,23 +1,23 @@ -; RUN: opt -S -passes='dxil-legalize' -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
-
-define float @negateF(float %x) {
-; CHECK-LABEL: define float @negateF(
-; CHECK-SAME: float [[X:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: [[Y:%.*]] = fsub float -0.000000e+00, [[X]]
-; CHECK-NEXT: ret float [[Y]]
-entry:
- %y = fneg float %x
- ret float %y
-}
-
-define double @negateD(double %x) {
-; CHECK-LABEL: define double @negateD(
-; CHECK-SAME: double [[X:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: [[Y:%.*]] = fsub double -0.000000e+00, [[X]]
-; CHECK-NEXT: ret double [[Y]]
-entry:
- %y = fneg double %x
- ret double %y
-}
+; RUN: opt -S -passes='dxil-legalize' -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s + +define float @negateF(float %x) { +; CHECK-LABEL: define float @negateF( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[Y:%.*]] = fsub float -0.000000e+00, [[X]] +; CHECK-NEXT: ret float [[Y]] +entry: + %y = fneg float %x + ret float %y +} + +define double @negateD(double %x) { +; CHECK-LABEL: define double @negateD( +; CHECK-SAME: double [[X:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[Y:%.*]] = fsub double -0.000000e+00, [[X]] +; CHECK-NEXT: ret double [[Y]] +entry: + %y = fneg double %x + ret double %y +} diff --git a/llvm/test/CodeGen/DirectX/legalize-load-store-array-alloca.ll b/llvm/test/CodeGen/DirectX/legalize-load-store-array-alloca.ll index c6789ac7886d..1fa39ffc50ad 100644 --- a/llvm/test/CodeGen/DirectX/legalize-load-store-array-alloca.ll +++ b/llvm/test/CodeGen/DirectX/legalize-load-store-array-alloca.ll @@ -1,41 +1,41 @@ -; RUN: opt -S -passes='dxil-legalize' -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
-
-define float @load() {
-; CHECK-LABEL: define float @load
-; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [2 x float], align 4
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [2 x float], ptr [[ALLOCA]], i32 0, i32 0
-; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[GEP]], align 4
-; CHECK-NEXT: ret float [[LOAD]]
- %a = alloca [2 x float], align 4
- %b = load float, ptr %a, align 4
- ret float %b
-}
-
-define void @store() {
-; CHECK-LABEL: define void @store
-; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [3 x i32], align 4
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [3 x i32], ptr [[ALLOCA]], i32 0, i32 0
-; CHECK-NEXT: store i32 0, ptr [[GEP]], align 4
-; CHECK-NEXT: ret void
- %a = alloca [3 x i32], align 4
- store i32 0, ptr %a, align 4
- ret void
-}
-
-@g = local_unnamed_addr addrspace(3) global [4 x i32] zeroinitializer, align 4
-define void @load_whole_global () {
-; CHECK-LABEL: define void @load_whole_global
-; CHECK-NEXT: load [4 x i32], ptr addrspace(3) @g, align 4
-; CHECK-NEXT: ret void
- %l = load [4 x i32], ptr addrspace(3) @g, align 4
- ret void
-}
-
-define void @load_global_index0 () {
-; CHECK-LABEL: define void @load_global_index0
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [4 x i32], ptr addrspace(3) @g, i32 0, i32 0
-; CHECK-NEXT: load i32, ptr addrspace(3) [[GEP]], align 4
-; CHECK-NEXT: ret void
- %l = load i32, ptr addrspace(3) @g, align 4
- ret void
-}
+; RUN: opt -S -passes='dxil-legalize' -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s + +define float @load() { +; CHECK-LABEL: define float @load +; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [2 x float], align 4 +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [2 x float], ptr [[ALLOCA]], i32 0, i32 0 +; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[GEP]], align 4 +; CHECK-NEXT: ret float [[LOAD]] + %a = alloca [2 x float], align 4 + %b = load float, ptr %a, align 4 + ret float %b +} + +define void @store() { +; CHECK-LABEL: define void @store +; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [3 x i32], align 4 +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [3 x i32], ptr [[ALLOCA]], i32 0, i32 0 +; CHECK-NEXT: store i32 0, ptr [[GEP]], align 4 +; CHECK-NEXT: ret void + %a = alloca [3 x i32], align 4 + store i32 0, ptr %a, align 4 + ret void +} + +@g = local_unnamed_addr addrspace(3) global [4 x i32] zeroinitializer, align 4 +define void @load_whole_global () { +; CHECK-LABEL: define void @load_whole_global +; CHECK-NEXT: load [4 x i32], ptr addrspace(3) @g, align 4 +; CHECK-NEXT: ret void + %l = load [4 x i32], ptr addrspace(3) @g, align 4 + ret void +} + +define void @load_global_index0 () { +; CHECK-LABEL: define void @load_global_index0 +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [4 x i32], ptr addrspace(3) @g, i32 0, i32 0 +; CHECK-NEXT: load i32, ptr addrspace(3) [[GEP]], align 4 +; CHECK-NEXT: ret void + %l = load i32, ptr addrspace(3) @g, align 4 + ret void +} diff --git a/llvm/test/CodeGen/DirectX/metadata-stripping.ll b/llvm/test/CodeGen/DirectX/metadata-stripping.ll index 22e78eaeea2a..eb939babd7d6 100644 --- a/llvm/test/CodeGen/DirectX/metadata-stripping.ll +++ b/llvm/test/CodeGen/DirectX/metadata-stripping.ll @@ -1,32 +1,32 @@ -; RUN: opt -S --dxil-prepare %s | FileCheck %s
-
-; Test that only metadata nodes that are valid in DXIL are allowed through
-
-target triple = "dxilv1.0-unknown-shadermodel6.0-compute"
-
-; Function Attrs: noinline nounwind memory(readwrite, inaccessiblemem: none)
-define void @main(i32* %ptr) {
-entry:
- ; metadata ID changes to 0 once the current !0 and !1 are removed
- ; since they aren't in the allowlist. range needs a payload.
- ; CHECK: %val = load i32, ptr %ptr, align 4, !range [[RANGEMD:![0-9]+]]
- %val = load i32, ptr %ptr, align 4, !range !2
-
- %cmp.i = icmp ult i32 1, 2
- ; Ensure that the !llvm.loop metadata node gets dropped.
- ; CHECK: br i1 %cmp.i, label %_Z4mainDv3_j.exit, label %_Z4mainDv3_j.exit{{$}}
- br i1 %cmp.i, label %_Z4mainDv3_j.exit, label %_Z4mainDv3_j.exit, !llvm.loop !0
-
-_Z4mainDv3_j.exit: ; preds = %for.body.i, %entry
- ret void
-}
-
-; These next check lines check that only the range metadata remains
-; No more metadata should be necessary, the rest (the current 0 and 1)
-; should be removed.
-; CHECK-NOT: !{!"llvm.loop.mustprogress"}
-; CHECK: [[RANGEMD]] = !{i32 1, i32 5}
-; CHECK-NOT: !{!"llvm.loop.mustprogress"}
-!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.mustprogress"}
-!2 = !{i32 1, i32 5}
+; RUN: opt -S --dxil-prepare %s | FileCheck %s + +; Test that only metadata nodes that are valid in DXIL are allowed through + +target triple = "dxilv1.0-unknown-shadermodel6.0-compute" + +; Function Attrs: noinline nounwind memory(readwrite, inaccessiblemem: none) +define void @main(i32* %ptr) { +entry: + ; metadata ID changes to 0 once the current !0 and !1 are removed + ; since they aren't in the allowlist. range needs a payload. + ; CHECK: %val = load i32, ptr %ptr, align 4, !range [[RANGEMD:![0-9]+]] + %val = load i32, ptr %ptr, align 4, !range !2 + + %cmp.i = icmp ult i32 1, 2 + ; Ensure that the !llvm.loop metadata node gets dropped. + ; CHECK: br i1 %cmp.i, label %_Z4mainDv3_j.exit, label %_Z4mainDv3_j.exit{{$}} + br i1 %cmp.i, label %_Z4mainDv3_j.exit, label %_Z4mainDv3_j.exit, !llvm.loop !0 + +_Z4mainDv3_j.exit: ; preds = %for.body.i, %entry + ret void +} + +; These next check lines check that only the range metadata remains +; No more metadata should be necessary, the rest (the current 0 and 1) +; should be removed. +; CHECK-NOT: !{!"llvm.loop.mustprogress"} +; CHECK: [[RANGEMD]] = !{i32 1, i32 5} +; CHECK-NOT: !{!"llvm.loop.mustprogress"} +!0 = distinct !{!0, !1} +!1 = !{!"llvm.loop.mustprogress"} +!2 = !{i32 1, i32 5} diff --git a/llvm/test/CodeGen/DirectX/noop_bitcast_global_array_type.ll b/llvm/test/CodeGen/DirectX/noop_bitcast_global_array_type.ll index 1f33700e014c..c5a1cc48c55b 100644 --- a/llvm/test/CodeGen/DirectX/noop_bitcast_global_array_type.ll +++ b/llvm/test/CodeGen/DirectX/noop_bitcast_global_array_type.ll @@ -1,53 +1,53 @@ -; RUN: opt -S --dxil-prepare %s | FileCheck %s
-
-; Test that global arrays do not get a bitcast instruction
-; after the dxil-prepare pass.
-
-target triple = "dxilv1.2-unknown-shadermodel6.2-compute"
-
-@inputTile.1dim = local_unnamed_addr addrspace(3) global [3 x float] zeroinitializer, align 2
-
-; CHECK-LABEL: testload
-define float @testload() local_unnamed_addr {
- ; NOTE: this would be "bitcast ptr addrspace(3)..." before the change that introduced this test,
- ; after the dxil-prepare pass is run
- ; CHECK-NEXT: load float, ptr addrspace(3) @inputTile.1dim, align 2
- %v = load float, ptr addrspace(3) @inputTile.1dim, align 2
-
- ret float %v
-}
-
-; CHECK-LABEL: teststore
-define void @teststore() local_unnamed_addr {
- ; CHECK-next: store float 2.000000e+00, ptr addrspace(3) @inputTile.1dim, align 2
- store float 2.000000e+00, ptr addrspace(3) @inputTile.1dim, align 2
-
- ret void
-}
-
-; CHECK-LABEL: testGEPConst
-define float @testGEPConst() local_unnamed_addr {
- ; CHECK-NEXT: load float, ptr addrspace(3) getelementptr (float, ptr addrspace(3) @inputTile.1dim, i32 1), align 4
- %v = load float, ptr addrspace(3) getelementptr (float, ptr addrspace(3) @inputTile.1dim, i32 1), align 4
-
- ret float %v
-}
-
-; CHECK-LABEL: testGEPNonConst
-define float @testGEPNonConst(i32 %i) local_unnamed_addr {
- ; CHECK-NEXT: getelementptr float, ptr addrspace(3) @inputTile.1dim, i32 %i
- %gep = getelementptr float, ptr addrspace(3) @inputTile.1dim, i32 %i
- %v = load float, ptr addrspace(3) %gep
-
- ret float %v
-}
-
-; CHECK-LABEL: testAlloca
-define float @testAlloca(i32 %i) local_unnamed_addr {
- ; CHECK-NEXT: alloca [3 x float], align 4
- %arr = alloca [3 x float], align 4
- ; CHECK-NEXT: getelementptr [3 x float], ptr %arr, i32 1
- %gep = getelementptr [3 x float], ptr %arr, i32 1
- %v = load float, ptr %gep
- ret float %v
-}
+; RUN: opt -S --dxil-prepare %s | FileCheck %s + +; Test that global arrays do not get a bitcast instruction +; after the dxil-prepare pass. + +target triple = "dxilv1.2-unknown-shadermodel6.2-compute" + +@inputTile.1dim = local_unnamed_addr addrspace(3) global [3 x float] zeroinitializer, align 2 + +; CHECK-LABEL: testload +define float @testload() local_unnamed_addr { + ; NOTE: this would be "bitcast ptr addrspace(3)..." before the change that introduced this test, + ; after the dxil-prepare pass is run + ; CHECK-NEXT: load float, ptr addrspace(3) @inputTile.1dim, align 2 + %v = load float, ptr addrspace(3) @inputTile.1dim, align 2 + + ret float %v +} + +; CHECK-LABEL: teststore +define void @teststore() local_unnamed_addr { + ; CHECK-next: store float 2.000000e+00, ptr addrspace(3) @inputTile.1dim, align 2 + store float 2.000000e+00, ptr addrspace(3) @inputTile.1dim, align 2 + + ret void +} + +; CHECK-LABEL: testGEPConst +define float @testGEPConst() local_unnamed_addr { + ; CHECK-NEXT: load float, ptr addrspace(3) getelementptr (float, ptr addrspace(3) @inputTile.1dim, i32 1), align 4 + %v = load float, ptr addrspace(3) getelementptr (float, ptr addrspace(3) @inputTile.1dim, i32 1), align 4 + + ret float %v +} + +; CHECK-LABEL: testGEPNonConst +define float @testGEPNonConst(i32 %i) local_unnamed_addr { + ; CHECK-NEXT: getelementptr float, ptr addrspace(3) @inputTile.1dim, i32 %i + %gep = getelementptr float, ptr addrspace(3) @inputTile.1dim, i32 %i + %v = load float, ptr addrspace(3) %gep + + ret float %v +} + +; CHECK-LABEL: testAlloca +define float @testAlloca(i32 %i) local_unnamed_addr { + ; CHECK-NEXT: alloca [3 x float], align 4 + %arr = alloca [3 x float], align 4 + ; CHECK-NEXT: getelementptr [3 x float], ptr %arr, i32 1 + %gep = getelementptr [3 x float], ptr %arr, i32 1 + %v = load float, ptr %gep + ret float %v +} diff --git a/llvm/test/CodeGen/DirectX/normalize.ll b/llvm/test/CodeGen/DirectX/normalize.ll index cde09dacf474..db4a4900c053 100644 --- a/llvm/test/CodeGen/DirectX/normalize.ll +++ b/llvm/test/CodeGen/DirectX/normalize.ll @@ -1,112 +1,112 @@ -; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s --check-prefixes=CHECK,EXPCHECK
-; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefixes=CHECK,DOPCHECK
-
-; Make sure dxil operation function calls for normalize are generated for half/float.
-
-declare half @llvm.dx.normalize.f16(half)
-declare <2 x half> @llvm.dx.normalize.v2f16(<2 x half>)
-declare <3 x half> @llvm.dx.normalize.v3f16(<3 x half>)
-declare <4 x half> @llvm.dx.normalize.v4f16(<4 x half>)
-
-declare float @llvm.dx.normalize.f32(float)
-declare <2 x float> @llvm.dx.normalize.v2f32(<2 x float>)
-declare <3 x float> @llvm.dx.normalize.v3f32(<3 x float>)
-declare <4 x float> @llvm.dx.normalize.v4f32(<4 x float>)
-
-define noundef half @test_normalize_half(half noundef %p0) {
-entry:
- ; CHECK: fdiv half %p0, %p0
- %hlsl.normalize = call half @llvm.dx.normalize.f16(half %p0)
- ret half %hlsl.normalize
-}
-
-define noundef <2 x half> @test_normalize_half2(<2 x half> noundef %p0) {
-entry:
- ; EXPCHECK: [[doth2:%.*]] = call half @llvm.dx.dot2.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}})
- ; DOPCHECK: [[doth2:%.*]] = call half @dx.op.dot2.f16(i32 54, half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}})
- ; EXPCHECK: [[rsqrt:%.*]] = call half @llvm.dx.rsqrt.f16(half [[doth2]])
- ; DOPCHECK: [[rsqrt:%.*]] = call half @dx.op.unary.f16(i32 25, half [[doth2]])
- ; CHECK: [[splatinserth2:%.*]] = insertelement <2 x half> poison, half [[rsqrt]], i64 0
- ; CHECK: [[splat:%.*]] = shufflevector <2 x half> [[splatinserth2]], <2 x half> poison, <2 x i32> zeroinitializer
- ; CHECK: fmul <2 x half> %p0, [[splat]]
-
- %hlsl.normalize = call <2 x half> @llvm.dx.normalize.v2f16(<2 x half> %p0)
- ret <2 x half> %hlsl.normalize
-}
-
-define noundef <3 x half> @test_normalize_half3(<3 x half> noundef %p0) {
-entry:
- ; EXPCHECK: [[doth3:%.*]] = call half @llvm.dx.dot3.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}})
- ; DOPCHECK: [[doth3:%.*]] = call half @dx.op.dot3.f16(i32 55, half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}})
- ; EXPCHECK: [[rsqrt:%.*]] = call half @llvm.dx.rsqrt.f16(half [[doth3]])
- ; DOPCHECK: [[rsqrt:%.*]] = call half @dx.op.unary.f16(i32 25, half [[doth3]])
- ; CHECK: [[splatinserth3:%.*]] = insertelement <3 x half> poison, half [[rsqrt]], i64 0
- ; CHECK: [[splat:%.*]] shufflevector <3 x half> [[splatinserth3]], <3 x half> poison, <3 x i32> zeroinitializer
- ; CHECK: fmul <3 x half> %p0, %.splat
-
- %hlsl.normalize = call <3 x half> @llvm.dx.normalize.v3f16(<3 x half> %p0)
- ret <3 x half> %hlsl.normalize
-}
-
-define noundef <4 x half> @test_normalize_half4(<4 x half> noundef %p0) {
-entry:
- ; EXPCHECK: [[doth4:%.*]] = call half @llvm.dx.dot4.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}})
- ; DOPCHECK: [[doth4:%.*]] = call half @dx.op.dot4.f16(i32 56, half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}})
- ; EXPCHECK: [[rsqrt:%.*]] = call half @llvm.dx.rsqrt.f16(half [[doth4]])
- ; DOPCHECK: [[rsqrt:%.*]] = call half @dx.op.unary.f16(i32 25, half [[doth4]])
- ; CHECK: [[splatinserth4:%.*]] = insertelement <4 x half> poison, half [[rsqrt]], i64 0
- ; CHECK: [[splat:%.*]] shufflevector <4 x half> [[splatinserth4]], <4 x half> poison, <4 x i32> zeroinitializer
- ; CHECK: fmul <4 x half> %p0, %.splat
-
- %hlsl.normalize = call <4 x half> @llvm.dx.normalize.v4f16(<4 x half> %p0)
- ret <4 x half> %hlsl.normalize
-}
-
-define noundef float @test_normalize_float(float noundef %p0) {
-entry:
- ; CHECK: fdiv float %p0, %p0
- %hlsl.normalize = call float @llvm.dx.normalize.f32(float %p0)
- ret float %hlsl.normalize
-}
-
-define noundef <2 x float> @test_normalize_float2(<2 x float> noundef %p0) {
-entry:
- ; EXPCHECK: [[dotf2:%.*]] = call float @llvm.dx.dot2.f32(float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}})
- ; DOPCHECK: [[dotf2:%.*]] = call float @dx.op.dot2.f32(i32 54, float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}})
- ; EXPCHECK: [[rsqrt:%.*]] = call float @llvm.dx.rsqrt.f32(float [[dotf2]])
- ; DOPCHECK: [[rsqrt:%.*]] = call float @dx.op.unary.f32(i32 25, float [[dotf2]])
- ; CHECK: [[splatinsertf2:%.*]] = insertelement <2 x float> poison, float [[rsqrt]], i64 0
- ; CHECK: [[splat:%.*]] shufflevector <2 x float> [[splatinsertf2]], <2 x float> poison, <2 x i32> zeroinitializer
- ; CHECK: fmul <2 x float> %p0, %.splat
-
- %hlsl.normalize = call <2 x float> @llvm.dx.normalize.v2f32(<2 x float> %p0)
- ret <2 x float> %hlsl.normalize
-}
-
-define noundef <3 x float> @test_normalize_float3(<3 x float> noundef %p0) {
-entry:
- ; EXPCHECK: [[dotf3:%.*]] = call float @llvm.dx.dot3.f32(float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}})
- ; DOPCHECK: [[dotf3:%.*]] = call float @dx.op.dot3.f32(i32 55, float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}})
- ; EXPCHECK: [[rsqrt:%.*]] = call float @llvm.dx.rsqrt.f32(float [[dotf3]])
- ; DOPCHECK: [[rsqrt:%.*]] = call float @dx.op.unary.f32(i32 25, float [[dotf3]])
- ; CHECK: [[splatinsertf3:%.*]] = insertelement <3 x float> poison, float [[rsqrt]], i64 0
- ; CHECK: [[splat:%.*]] shufflevector <3 x float> [[splatinsertf3]], <3 x float> poison, <3 x i32> zeroinitializer
- ; CHECK: fmul <3 x float> %p0, %.splat
-
- %hlsl.normalize = call <3 x float> @llvm.dx.normalize.v3f32(<3 x float> %p0)
- ret <3 x float> %hlsl.normalize
-}
-
-define noundef <4 x float> @test_normalize_float4(<4 x float> noundef %p0) {
-entry:
- ; EXPCHECK: [[dotf4:%.*]] = call float @llvm.dx.dot4.f32(float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}})
- ; DOPCHECK: [[dotf4:%.*]] = call float @dx.op.dot4.f32(i32 56, float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}})
- ; EXPCHECK: [[rsqrt:%.*]] = call float @llvm.dx.rsqrt.f32(float [[dotf4]])
- ; DOPCHECK: [[rsqrt:%.*]] = call float @dx.op.unary.f32(i32 25, float [[dotf4]])
- ; CHECK: [[splatinsertf4:%.*]] = insertelement <4 x float> poison, float [[rsqrt]], i64 0
- ; CHECK: [[splat:%.*]] shufflevector <4 x float> [[splatinsertf4]], <4 x float> poison, <4 x i32> zeroinitializer
- ; CHECK: fmul <4 x float> %p0, %.splat
-
- %hlsl.normalize = call <4 x float> @llvm.dx.normalize.v4f32(<4 x float> %p0)
- ret <4 x float> %hlsl.normalize
-}
+; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s --check-prefixes=CHECK,EXPCHECK +; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefixes=CHECK,DOPCHECK + +; Make sure dxil operation function calls for normalize are generated for half/float. + +declare half @llvm.dx.normalize.f16(half) +declare <2 x half> @llvm.dx.normalize.v2f16(<2 x half>) +declare <3 x half> @llvm.dx.normalize.v3f16(<3 x half>) +declare <4 x half> @llvm.dx.normalize.v4f16(<4 x half>) + +declare float @llvm.dx.normalize.f32(float) +declare <2 x float> @llvm.dx.normalize.v2f32(<2 x float>) +declare <3 x float> @llvm.dx.normalize.v3f32(<3 x float>) +declare <4 x float> @llvm.dx.normalize.v4f32(<4 x float>) + +define noundef half @test_normalize_half(half noundef %p0) { +entry: + ; CHECK: fdiv half %p0, %p0 + %hlsl.normalize = call half @llvm.dx.normalize.f16(half %p0) + ret half %hlsl.normalize +} + +define noundef <2 x half> @test_normalize_half2(<2 x half> noundef %p0) { +entry: + ; EXPCHECK: [[doth2:%.*]] = call half @llvm.dx.dot2.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}}) + ; DOPCHECK: [[doth2:%.*]] = call half @dx.op.dot2.f16(i32 54, half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}}) + ; EXPCHECK: [[rsqrt:%.*]] = call half @llvm.dx.rsqrt.f16(half [[doth2]]) + ; DOPCHECK: [[rsqrt:%.*]] = call half @dx.op.unary.f16(i32 25, half [[doth2]]) + ; CHECK: [[splatinserth2:%.*]] = insertelement <2 x half> poison, half [[rsqrt]], i64 0 + ; CHECK: [[splat:%.*]] = shufflevector <2 x half> [[splatinserth2]], <2 x half> poison, <2 x i32> zeroinitializer + ; CHECK: fmul <2 x half> %p0, [[splat]] + + %hlsl.normalize = call <2 x half> @llvm.dx.normalize.v2f16(<2 x half> %p0) + ret <2 x half> %hlsl.normalize +} + +define noundef <3 x half> @test_normalize_half3(<3 x half> noundef %p0) { +entry: + ; EXPCHECK: [[doth3:%.*]] = call half @llvm.dx.dot3.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}}) + ; DOPCHECK: [[doth3:%.*]] = call half @dx.op.dot3.f16(i32 55, half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}}) + ; EXPCHECK: [[rsqrt:%.*]] = call half @llvm.dx.rsqrt.f16(half [[doth3]]) + ; DOPCHECK: [[rsqrt:%.*]] = call half @dx.op.unary.f16(i32 25, half [[doth3]]) + ; CHECK: [[splatinserth3:%.*]] = insertelement <3 x half> poison, half [[rsqrt]], i64 0 + ; CHECK: [[splat:%.*]] shufflevector <3 x half> [[splatinserth3]], <3 x half> poison, <3 x i32> zeroinitializer + ; CHECK: fmul <3 x half> %p0, %.splat + + %hlsl.normalize = call <3 x half> @llvm.dx.normalize.v3f16(<3 x half> %p0) + ret <3 x half> %hlsl.normalize +} + +define noundef <4 x half> @test_normalize_half4(<4 x half> noundef %p0) { +entry: + ; EXPCHECK: [[doth4:%.*]] = call half @llvm.dx.dot4.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}}) + ; DOPCHECK: [[doth4:%.*]] = call half @dx.op.dot4.f16(i32 56, half %{{.*}}, half %{{.*}}, half %{{.*}}, half %{{.*}}) + ; EXPCHECK: [[rsqrt:%.*]] = call half @llvm.dx.rsqrt.f16(half [[doth4]]) + ; DOPCHECK: [[rsqrt:%.*]] = call half @dx.op.unary.f16(i32 25, half [[doth4]]) + ; CHECK: [[splatinserth4:%.*]] = insertelement <4 x half> poison, half [[rsqrt]], i64 0 + ; CHECK: [[splat:%.*]] shufflevector <4 x half> [[splatinserth4]], <4 x half> poison, <4 x i32> zeroinitializer + ; CHECK: fmul <4 x half> %p0, %.splat + + %hlsl.normalize = call <4 x half> @llvm.dx.normalize.v4f16(<4 x half> %p0) + ret <4 x half> %hlsl.normalize +} + +define noundef float @test_normalize_float(float noundef %p0) { +entry: + ; CHECK: fdiv float %p0, %p0 + %hlsl.normalize = call float @llvm.dx.normalize.f32(float %p0) + ret float %hlsl.normalize +} + +define noundef <2 x float> @test_normalize_float2(<2 x float> noundef %p0) { +entry: + ; EXPCHECK: [[dotf2:%.*]] = call float @llvm.dx.dot2.f32(float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}}) + ; DOPCHECK: [[dotf2:%.*]] = call float @dx.op.dot2.f32(i32 54, float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}}) + ; EXPCHECK: [[rsqrt:%.*]] = call float @llvm.dx.rsqrt.f32(float [[dotf2]]) + ; DOPCHECK: [[rsqrt:%.*]] = call float @dx.op.unary.f32(i32 25, float [[dotf2]]) + ; CHECK: [[splatinsertf2:%.*]] = insertelement <2 x float> poison, float [[rsqrt]], i64 0 + ; CHECK: [[splat:%.*]] shufflevector <2 x float> [[splatinsertf2]], <2 x float> poison, <2 x i32> zeroinitializer + ; CHECK: fmul <2 x float> %p0, %.splat + + %hlsl.normalize = call <2 x float> @llvm.dx.normalize.v2f32(<2 x float> %p0) + ret <2 x float> %hlsl.normalize +} + +define noundef <3 x float> @test_normalize_float3(<3 x float> noundef %p0) { +entry: + ; EXPCHECK: [[dotf3:%.*]] = call float @llvm.dx.dot3.f32(float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}}) + ; DOPCHECK: [[dotf3:%.*]] = call float @dx.op.dot3.f32(i32 55, float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}}) + ; EXPCHECK: [[rsqrt:%.*]] = call float @llvm.dx.rsqrt.f32(float [[dotf3]]) + ; DOPCHECK: [[rsqrt:%.*]] = call float @dx.op.unary.f32(i32 25, float [[dotf3]]) + ; CHECK: [[splatinsertf3:%.*]] = insertelement <3 x float> poison, float [[rsqrt]], i64 0 + ; CHECK: [[splat:%.*]] shufflevector <3 x float> [[splatinsertf3]], <3 x float> poison, <3 x i32> zeroinitializer + ; CHECK: fmul <3 x float> %p0, %.splat + + %hlsl.normalize = call <3 x float> @llvm.dx.normalize.v3f32(<3 x float> %p0) + ret <3 x float> %hlsl.normalize +} + +define noundef <4 x float> @test_normalize_float4(<4 x float> noundef %p0) { +entry: + ; EXPCHECK: [[dotf4:%.*]] = call float @llvm.dx.dot4.f32(float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}}) + ; DOPCHECK: [[dotf4:%.*]] = call float @dx.op.dot4.f32(i32 56, float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}}) + ; EXPCHECK: [[rsqrt:%.*]] = call float @llvm.dx.rsqrt.f32(float [[dotf4]]) + ; DOPCHECK: [[rsqrt:%.*]] = call float @dx.op.unary.f32(i32 25, float [[dotf4]]) + ; CHECK: [[splatinsertf4:%.*]] = insertelement <4 x float> poison, float [[rsqrt]], i64 0 + ; CHECK: [[splat:%.*]] shufflevector <4 x float> [[splatinsertf4]], <4 x float> poison, <4 x i32> zeroinitializer + ; CHECK: fmul <4 x float> %p0, %.splat + + %hlsl.normalize = call <4 x float> @llvm.dx.normalize.v4f32(<4 x float> %p0) + ret <4 x float> %hlsl.normalize +} diff --git a/llvm/test/CodeGen/DirectX/normalize_error.ll b/llvm/test/CodeGen/DirectX/normalize_error.ll index 35a91c0cdc24..3041d2ecdd92 100644 --- a/llvm/test/CodeGen/DirectX/normalize_error.ll +++ b/llvm/test/CodeGen/DirectX/normalize_error.ll @@ -1,10 +1,10 @@ -; RUN: not opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s 2>&1 | FileCheck %s
-
-; DXIL operation normalize does not support double overload type
-; CHECK: Cannot create Dot2 operation: Invalid overload type
-
-define noundef <2 x double> @test_normalize_double2(<2 x double> noundef %p0) {
-entry:
- %hlsl.normalize = call <2 x double> @llvm.dx.normalize.v2f32(<2 x double> %p0)
- ret <2 x double> %hlsl.normalize
-}
+; RUN: not opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s 2>&1 | FileCheck %s + +; DXIL operation normalize does not support double overload type +; CHECK: Cannot create Dot2 operation: Invalid overload type + +define noundef <2 x double> @test_normalize_double2(<2 x double> noundef %p0) { +entry: + %hlsl.normalize = call <2 x double> @llvm.dx.normalize.v2f32(<2 x double> %p0) + ret <2 x double> %hlsl.normalize +} diff --git a/llvm/test/CodeGen/DirectX/phi-node-replacement.ll b/llvm/test/CodeGen/DirectX/phi-node-replacement.ll new file mode 100644 index 000000000000..6aef126cb5ec --- /dev/null +++ b/llvm/test/CodeGen/DirectX/phi-node-replacement.ll @@ -0,0 +1,42 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -S -dxil-resource-type -dxil-resource-access -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s + +%"$Globals" = type { i32 } +@CBV = external constant %"$Globals" +@.str = internal unnamed_addr constant [2 x i8] c"a\00", align 1 + +define half @CSMain() local_unnamed_addr { +; CHECK-LABEL: define half @CSMain() local_unnamed_addr { +; CHECK-NEXT: [[LOADGLOBAL:%.*]] = load i32, ptr @CBV, align 4 +; CHECK-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq i32 [[LOADGLOBAL]], 0 +; CHECK-NEXT: br i1 [[TOBOOL_NOT_I]], label %[[IF_ELSE_I:.*]], label %[[IF_THEN_I:.*]] +; CHECK: [[IF_THEN_I]]: +; CHECK-NEXT: [[IFSTMTCALLRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP1:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[IFSTMTCALLRAWBUFFERBINDING]], i32 [[LOADGLOBAL]], i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { half, i1 } [[TMP1]], 0 +; CHECK-NEXT: ret half [[TMP2]] +; CHECK: [[IF_ELSE_I]]: +; CHECK-NEXT: [[CALL2NDRAWBUFFERBINDING:%.*]] = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) +; CHECK-NEXT: [[TMP3:%.*]] = call { half, i1 } @llvm.dx.resource.load.rawbuffer.f16.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) [[CALL2NDRAWBUFFERBINDING]], i32 [[LOADGLOBAL]], i32 0) +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { half, i1 } [[TMP3]], 0 +; CHECK-NEXT: ret half [[TMP4]] +; + %loadGlobal = load i32, ptr @CBV, align 4 + %tobool.not.i = icmp eq i32 %loadGlobal, 0 + br i1 %tobool.not.i, label %if.else.i, label %if.then.i + + if.then.i: ; preds = %entry + %ifStmtcallRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 1, i32 0, i32 1, i32 0, ptr nonnull @.str) + %ifStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %ifStmtcallRawBufferBinding, i32 %loadGlobal) + br label %_Z6CSMainv.exit + + if.else.i: ; preds = %entry + %call2ndRawBufferBinding = tail call target("dx.RawBuffer", half, 1, 0) @llvm.dx.resource.handlefromimplicitbinding.tdx.RawBuffer_f16_1_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str) + %elseStmtCallResourceGEP = tail call noundef nonnull align 2 dereferenceable(2) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f16_1_0t(target("dx.RawBuffer", half, 1, 0) %call2ndRawBufferBinding, i32 %loadGlobal) + br label %_Z6CSMainv.exit + + _Z6CSMainv.exit: ; preds = %if.else.i, %if.then.i + %.sink1 = phi ptr [ %ifStmtCallResourceGEP, %if.then.i ], [ %elseStmtCallResourceGEP, %if.else.i ] + %loadSink = load half, ptr %.sink1, align 2 + ret half %loadSink +} diff --git a/llvm/test/CodeGen/DirectX/resource_counter_error.ll b/llvm/test/CodeGen/DirectX/resource_counter_error.ll index f3dae481af24..cb5fdef1cf6f 100644 --- a/llvm/test/CodeGen/DirectX/resource_counter_error.ll +++ b/llvm/test/CodeGen/DirectX/resource_counter_error.ll @@ -3,7 +3,7 @@ define void @inc_and_dec() { entry: - %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, i1 false, ptr null) + %handle = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding(i32 1, i32 2, i32 3, i32 4, ptr null) call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 -1) call i32 @llvm.dx.resource.updatecounter(target("dx.RawBuffer", float, 1, 0) %handle, i8 1) ret void diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits-upperbound.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits-upperbound.ll new file mode 100644 index 000000000000..37c60b5ea675 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits-upperbound.ll @@ -0,0 +1,20 @@ +; RUN: opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; This is a valid code, it checks the limits of a binding space +; CHECK-NOT: error: + +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 5, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"DescriptorTable", i32 0, !3} +!3 = !{!"CBV", i32 5, i32 0, i32 0, i32 0, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits.ll new file mode 100644 index 000000000000..edef06b6472d --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-binding-limits.ll @@ -0,0 +1,22 @@ +; RUN: opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; This is a valid code, it checks the limits of a binding space + +; CHECK-NOT: error: + +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 4294967294, i32 1, i32 0, ptr nonnull @CB.str) + %CB1 = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3} +!2 = !{!"RootCBV", i32 0, i32 4294967294, i32 0, i32 4} +!3 = !{!"RootCBV", i32 0, i32 0, i32 0, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbv-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbv-binding.ll new file mode 100644 index 000000000000..de8552531ae3 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbv-binding.ll @@ -0,0 +1,18 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: CBV register 2 in space 666 does not have a binding in the Root Signature + +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 666, i32 2, i32 1, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"RootConstants", i32 0, i32 2, i32 0, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-consecutive-ranges.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-consecutive-ranges.ll new file mode 100644 index 000000000000..71d70386dcad --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-consecutive-ranges.ll @@ -0,0 +1,19 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: CBV register 3 in space 0 does not have a binding in the Root Signature +%__cblayout_CB = type <{ float }> + +@CB.str = private unnamed_addr constant [3 x i8] c"CB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 0, i32 3, i32 6, i32 0, ptr nonnull @CB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"DescriptorTable", i32 0, !3, !4} +!3 = !{!"CBV", i32 5, i32 2, i32 0, i32 0, i32 4} +!4 = !{!"CBV", i32 4, i32 7, i32 0, i32 10, i32 4} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-binding.ll new file mode 100644 index 000000000000..9b5c5d61dbbb --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler-binding.ll @@ -0,0 +1,18 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: Sampler register 3 in space 2 does not have a binding in the Root Signature + +@Smp.str = private unnamed_addr constant [4 x i8] c"Smp\00", align 1 + + +define void @CSMain() "hlsl.shader"="compute" { +entry: + %Sampler = call target("dx.Sampler", 0) @llvm.dx.resource.handlefrombinding(i32 2, i32 3, i32 1, i32 0, ptr nonnull @Smp.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2} +!2 = !{!"DescriptorTable", i32 0, !3} +!3 = !{!"Sampler", i32 1, i32 42, i32 0, i32 -1, i32 0} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-srv-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-srv-binding.ll new file mode 100644 index 000000000000..87a48a30be32 --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-srv-binding.ll @@ -0,0 +1,23 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: SRV register 0 in space 0 does not have a binding in the Root Signature + +@SB.str = private unnamed_addr constant [3 x i8] c"SB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: +; StructuredBuffer<int> In : register(t0, space0); + %SB = tail call target("dx.RawBuffer", i32, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @SB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3, !5, !7} +!2 = !{!"RootCBV", i32 0, i32 3, i32 666, i32 4} +!3 = !{!"DescriptorTable", i32 1, !4} +!4 = !{!"SRV", i32 1, i32 0, i32 0, i32 -1, i32 4} +!5 = !{!"DescriptorTable", i32 0, !6} +!6 = !{!"Sampler", i32 2, i32 0, i32 0, i32 -1, i32 0} +!7 = !{!"DescriptorTable", i32 0, !8} +!8 = !{!"UAV", i32 -1, i32 0, i32 0, i32 -1, i32 2} diff --git a/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-uav-binding.ll b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-uav-binding.ll new file mode 100644 index 000000000000..a74766d37d2e --- /dev/null +++ b/llvm/test/CodeGen/DirectX/rootsignature-validation-fail-uav-binding.ll @@ -0,0 +1,23 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s +; CHECK: error: UAV register 4294967294 in space 0 does not have a binding in the Root Signature + +@RWB.str = private unnamed_addr constant [4 x i8] c"RWB\00", align 1 + +define void @CSMain() "hlsl.shader"="compute" { +entry: +; RWBuffer<float> UAV : register(4294967294); + %RWB = tail call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 4294967294, i32 1, i32 0, ptr nonnull @RWB.str) + ret void +} + +!dx.rootsignatures = !{!0} + +!0 = !{ptr @CSMain, !1, i32 2} +!1 = !{!2, !3, !5, !7} +!2 = !{!"RootCBV", i32 0, i32 3, i32 666, i32 4} +!3 = !{!"DescriptorTable", i32 1, !4} +!4 = !{!"SRV", i32 1, i32 0, i32 0, i32 -1, i32 4} +!5 = !{!"DescriptorTable", i32 0, !6} +!6 = !{!"Sampler", i32 2, i32 0, i32 0, i32 -1, i32 0} +!7 = !{!"DescriptorTable", i32 0, !8} +!8 = !{!"UAV", i32 10, i32 0, i32 0, i32 -1, i32 2} diff --git a/llvm/test/CodeGen/DirectX/step.ll b/llvm/test/CodeGen/DirectX/step.ll index e89c4e375b2d..1d2329e97073 100644 --- a/llvm/test/CodeGen/DirectX/step.ll +++ b/llvm/test/CodeGen/DirectX/step.ll @@ -1,78 +1,78 @@ -; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s --check-prefix=CHECK
-; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
-
-; Make sure dxil operation function calls for step are generated for half/float.
-
-declare half @llvm.dx.step.f16(half, half)
-declare <2 x half> @llvm.dx.step.v2f16(<2 x half>, <2 x half>)
-declare <3 x half> @llvm.dx.step.v3f16(<3 x half>, <3 x half>)
-declare <4 x half> @llvm.dx.step.v4f16(<4 x half>, <4 x half>)
-
-declare float @llvm.dx.step.f32(float, float)
-declare <2 x float> @llvm.dx.step.v2f32(<2 x float>, <2 x float>)
-declare <3 x float> @llvm.dx.step.v3f32(<3 x float>, <3 x float>)
-declare <4 x float> @llvm.dx.step.v4f32(<4 x float>, <4 x float>)
-
-define noundef half @test_step_half(half noundef %p0, half noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt half %p1, %p0
- ; CHECK: %1 = select i1 %0, half 0xH0000, half 0xH3C00
- %hlsl.step = call half @llvm.dx.step.f16(half %p0, half %p1)
- ret half %hlsl.step
-}
-
-define noundef <2 x half> @test_step_half2(<2 x half> noundef %p0, <2 x half> noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt <2 x half> %p1, %p0
- ; CHECK: %1 = select <2 x i1> %0, <2 x half> zeroinitializer, <2 x half> splat (half 0xH3C00)
- %hlsl.step = call <2 x half> @llvm.dx.step.v2f16(<2 x half> %p0, <2 x half> %p1)
- ret <2 x half> %hlsl.step
-}
-
-define noundef <3 x half> @test_step_half3(<3 x half> noundef %p0, <3 x half> noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt <3 x half> %p1, %p0
- ; CHECK: %1 = select <3 x i1> %0, <3 x half> zeroinitializer, <3 x half> splat (half 0xH3C00)
- %hlsl.step = call <3 x half> @llvm.dx.step.v3f16(<3 x half> %p0, <3 x half> %p1)
- ret <3 x half> %hlsl.step
-}
-
-define noundef <4 x half> @test_step_half4(<4 x half> noundef %p0, <4 x half> noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt <4 x half> %p1, %p0
- ; CHECK: %1 = select <4 x i1> %0, <4 x half> zeroinitializer, <4 x half> splat (half 0xH3C00)
- %hlsl.step = call <4 x half> @llvm.dx.step.v4f16(<4 x half> %p0, <4 x half> %p1)
- ret <4 x half> %hlsl.step
-}
-
-define noundef float @test_step_float(float noundef %p0, float noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt float %p1, %p0
- ; CHECK: %1 = select i1 %0, float 0.000000e+00, float 1.000000e+00
- %hlsl.step = call float @llvm.dx.step.f32(float %p0, float %p1)
- ret float %hlsl.step
-}
-
-define noundef <2 x float> @test_step_float2(<2 x float> noundef %p0, <2 x float> noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt <2 x float> %p1, %p0
- ; CHECK: %1 = select <2 x i1> %0, <2 x float> zeroinitializer, <2 x float> splat (float 1.000000e+00)
- %hlsl.step = call <2 x float> @llvm.dx.step.v2f32(<2 x float> %p0, <2 x float> %p1)
- ret <2 x float> %hlsl.step
-}
-
-define noundef <3 x float> @test_step_float3(<3 x float> noundef %p0, <3 x float> noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt <3 x float> %p1, %p0
- ; CHECK: %1 = select <3 x i1> %0, <3 x float> zeroinitializer, <3 x float> splat (float 1.000000e+00)
- %hlsl.step = call <3 x float> @llvm.dx.step.v3f32(<3 x float> %p0, <3 x float> %p1)
- ret <3 x float> %hlsl.step
-}
-
-define noundef <4 x float> @test_step_float4(<4 x float> noundef %p0, <4 x float> noundef %p1) {
-entry:
- ; CHECK: %0 = fcmp olt <4 x float> %p1, %p0
- ; CHECK: %1 = select <4 x i1> %0, <4 x float> zeroinitializer, <4 x float> splat (float 1.000000e+00)
- %hlsl.step = call <4 x float> @llvm.dx.step.v4f32(<4 x float> %p0, <4 x float> %p1)
- ret <4 x float> %hlsl.step
-}
+; RUN: opt -S -dxil-intrinsic-expansion < %s | FileCheck %s --check-prefix=CHECK +; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK + +; Make sure dxil operation function calls for step are generated for half/float. + +declare half @llvm.dx.step.f16(half, half) +declare <2 x half> @llvm.dx.step.v2f16(<2 x half>, <2 x half>) +declare <3 x half> @llvm.dx.step.v3f16(<3 x half>, <3 x half>) +declare <4 x half> @llvm.dx.step.v4f16(<4 x half>, <4 x half>) + +declare float @llvm.dx.step.f32(float, float) +declare <2 x float> @llvm.dx.step.v2f32(<2 x float>, <2 x float>) +declare <3 x float> @llvm.dx.step.v3f32(<3 x float>, <3 x float>) +declare <4 x float> @llvm.dx.step.v4f32(<4 x float>, <4 x float>) + +define noundef half @test_step_half(half noundef %p0, half noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt half %p1, %p0 + ; CHECK: %1 = select i1 %0, half 0xH0000, half 0xH3C00 + %hlsl.step = call half @llvm.dx.step.f16(half %p0, half %p1) + ret half %hlsl.step +} + +define noundef <2 x half> @test_step_half2(<2 x half> noundef %p0, <2 x half> noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt <2 x half> %p1, %p0 + ; CHECK: %1 = select <2 x i1> %0, <2 x half> zeroinitializer, <2 x half> splat (half 0xH3C00) + %hlsl.step = call <2 x half> @llvm.dx.step.v2f16(<2 x half> %p0, <2 x half> %p1) + ret <2 x half> %hlsl.step +} + +define noundef <3 x half> @test_step_half3(<3 x half> noundef %p0, <3 x half> noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt <3 x half> %p1, %p0 + ; CHECK: %1 = select <3 x i1> %0, <3 x half> zeroinitializer, <3 x half> splat (half 0xH3C00) + %hlsl.step = call <3 x half> @llvm.dx.step.v3f16(<3 x half> %p0, <3 x half> %p1) + ret <3 x half> %hlsl.step +} + +define noundef <4 x half> @test_step_half4(<4 x half> noundef %p0, <4 x half> noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt <4 x half> %p1, %p0 + ; CHECK: %1 = select <4 x i1> %0, <4 x half> zeroinitializer, <4 x half> splat (half 0xH3C00) + %hlsl.step = call <4 x half> @llvm.dx.step.v4f16(<4 x half> %p0, <4 x half> %p1) + ret <4 x half> %hlsl.step +} + +define noundef float @test_step_float(float noundef %p0, float noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt float %p1, %p0 + ; CHECK: %1 = select i1 %0, float 0.000000e+00, float 1.000000e+00 + %hlsl.step = call float @llvm.dx.step.f32(float %p0, float %p1) + ret float %hlsl.step +} + +define noundef <2 x float> @test_step_float2(<2 x float> noundef %p0, <2 x float> noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt <2 x float> %p1, %p0 + ; CHECK: %1 = select <2 x i1> %0, <2 x float> zeroinitializer, <2 x float> splat (float 1.000000e+00) + %hlsl.step = call <2 x float> @llvm.dx.step.v2f32(<2 x float> %p0, <2 x float> %p1) + ret <2 x float> %hlsl.step +} + +define noundef <3 x float> @test_step_float3(<3 x float> noundef %p0, <3 x float> noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt <3 x float> %p1, %p0 + ; CHECK: %1 = select <3 x i1> %0, <3 x float> zeroinitializer, <3 x float> splat (float 1.000000e+00) + %hlsl.step = call <3 x float> @llvm.dx.step.v3f32(<3 x float> %p0, <3 x float> %p1) + ret <3 x float> %hlsl.step +} + +define noundef <4 x float> @test_step_float4(<4 x float> noundef %p0, <4 x float> noundef %p1) { +entry: + ; CHECK: %0 = fcmp olt <4 x float> %p1, %p0 + ; CHECK: %1 = select <4 x i1> %0, <4 x float> zeroinitializer, <4 x float> splat (float 1.000000e+00) + %hlsl.step = call <4 x float> @llvm.dx.step.v4f32(<4 x float> %p0, <4 x float> %p1) + ret <4 x float> %hlsl.step +} |