diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/wave32.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/wave32.ll | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/wave32.ll b/llvm/test/CodeGen/AMDGPU/wave32.ll index fe3a6c59f172..1805add14e47 100644 --- a/llvm/test/CodeGen/AMDGPU/wave32.ll +++ b/llvm/test/CodeGen/AMDGPU/wave32.ll @@ -5,7 +5,7 @@ ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -amdgpu-early-ifcvt=1 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1032,GFX10DEFWAVE %s -define amdgpu_kernel void @test_vopc_i32(ptr addrspace(1) %arg) { +define amdgpu_kernel void @test_vopc_i32(ptr addrspace(1) %arg) #1 { ; GFX1032-LABEL: test_vopc_i32: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 @@ -38,7 +38,7 @@ define amdgpu_kernel void @test_vopc_i32(ptr addrspace(1) %arg) { ret void } -define amdgpu_kernel void @test_vopc_f32(ptr addrspace(1) %arg) { +define amdgpu_kernel void @test_vopc_f32(ptr addrspace(1) %arg) #1 { ; GFX1032-LABEL: test_vopc_f32: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 @@ -71,7 +71,7 @@ define amdgpu_kernel void @test_vopc_f32(ptr addrspace(1) %arg) { ret void } -define amdgpu_ps void @test_vopc_vcmp(float %x) { +define amdgpu_ps void @test_vopc_vcmp(float %x) #1 { ; GFX1032-LABEL: test_vopc_vcmp: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: v_cmp_nle_f32_e32 vcc_lo, 0, v0 @@ -98,7 +98,7 @@ define amdgpu_ps void @test_vopc_vcmp(float %x) { ret void } -define amdgpu_kernel void @test_vopc_2xf16(ptr addrspace(1) %arg) { +define amdgpu_kernel void @test_vopc_2xf16(ptr addrspace(1) %arg) #1 { ; GFX1032-LABEL: test_vopc_2xf16: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 @@ -197,7 +197,7 @@ define amdgpu_kernel void @test_vcmp_vcnd_f16(ptr addrspace(1) %out, half %x) #0 ret void } -define amdgpu_kernel void @test_vop3_cmp_f32_sop_and(ptr addrspace(1) %arg) { +define amdgpu_kernel void @test_vop3_cmp_f32_sop_and(ptr addrspace(1) %arg) #1 { ; GFX1032-LABEL: test_vop3_cmp_f32_sop_and: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24 @@ -236,7 +236,7 @@ define amdgpu_kernel void @test_vop3_cmp_f32_sop_and(ptr addrspace(1) %arg) { ret void } -define amdgpu_kernel void @test_vop3_cmp_i32_sop_xor(ptr addrspace(1) %arg) { +define amdgpu_kernel void @test_vop3_cmp_i32_sop_xor(ptr addrspace(1) %arg) #1 { ; GFX1032-LABEL: test_vop3_cmp_i32_sop_xor: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24 @@ -275,7 +275,7 @@ define amdgpu_kernel void @test_vop3_cmp_i32_sop_xor(ptr addrspace(1) %arg) { ret void } -define amdgpu_kernel void @test_vop3_cmp_u32_sop_or(ptr addrspace(1) %arg) { +define amdgpu_kernel void @test_vop3_cmp_u32_sop_or(ptr addrspace(1) %arg) #1 { ; GFX1032-LABEL: test_vop3_cmp_u32_sop_or: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24 @@ -1409,7 +1409,7 @@ define amdgpu_kernel void @test_br_cc_f16( ; GFX1064-NEXT: s_endpgm ptr addrspace(1) %r, ptr addrspace(1) %a, - ptr addrspace(1) %b) { + ptr addrspace(1) %b) #1 { entry: %a.val = load half, ptr addrspace(1) %a %b.val = load half, ptr addrspace(1) %b @@ -1865,7 +1865,7 @@ break: ret <4 x float> %c.iv } -define amdgpu_ps float @test_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) { +define amdgpu_ps float @test_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) #1 { ; GFX1032-LABEL: test_wwm1: ; GFX1032: ; %bb.0: ; %main_body ; GFX1032-NEXT: s_or_saveexec_b32 s0, -1 @@ -1891,7 +1891,7 @@ main_body: ret float %out.0 } -define amdgpu_ps float @test_wwm2(i32 inreg %idx) { +define amdgpu_ps float @test_wwm2(i32 inreg %idx) #1 { ; GFX1032-LABEL: test_wwm2: ; GFX1032: ; %bb.0: ; %main_body ; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0 @@ -1952,7 +1952,7 @@ endif: ret float %out.2 } -define amdgpu_ps float @test_strict_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) { +define amdgpu_ps float @test_strict_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) #1 { ; GFX1032-LABEL: test_strict_wwm1: ; GFX1032: ; %bb.0: ; %main_body ; GFX1032-NEXT: s_or_saveexec_b32 s0, -1 @@ -1978,7 +1978,7 @@ main_body: ret float %out.0 } -define amdgpu_ps float @test_strict_wwm2(i32 inreg %idx) { +define amdgpu_ps float @test_strict_wwm2(i32 inreg %idx) #1 { ; GFX1032-LABEL: test_strict_wwm2: ; GFX1032: ; %bb.0: ; %main_body ; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0 @@ -2119,7 +2119,7 @@ main_body: ret float %out.2 } -define amdgpu_kernel void @test_intr_fcmp_i64(ptr addrspace(1) %out, float %src, float %a) { +define amdgpu_kernel void @test_intr_fcmp_i64(ptr addrspace(1) %out, float %src, float %a) #1 { ; GFX1032-LABEL: test_intr_fcmp_i64: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 @@ -2146,7 +2146,7 @@ define amdgpu_kernel void @test_intr_fcmp_i64(ptr addrspace(1) %out, float %src, ret void } -define amdgpu_kernel void @test_intr_icmp_i64(ptr addrspace(1) %out, i32 %src) { +define amdgpu_kernel void @test_intr_icmp_i64(ptr addrspace(1) %out, i32 %src) #1 { ; GFX1032-LABEL: test_intr_icmp_i64: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_clause 0x1 @@ -2176,7 +2176,7 @@ define amdgpu_kernel void @test_intr_icmp_i64(ptr addrspace(1) %out, i32 %src) { ret void } -define amdgpu_kernel void @test_intr_fcmp_i32(ptr addrspace(1) %out, float %src, float %a) { +define amdgpu_kernel void @test_intr_fcmp_i32(ptr addrspace(1) %out, float %src, float %a) #1 { ; GFX1032-LABEL: test_intr_fcmp_i32: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 @@ -2202,7 +2202,7 @@ define amdgpu_kernel void @test_intr_fcmp_i32(ptr addrspace(1) %out, float %src, ret void } -define amdgpu_kernel void @test_intr_icmp_i32(ptr addrspace(1) %out, i32 %src) { +define amdgpu_kernel void @test_intr_icmp_i32(ptr addrspace(1) %out, i32 %src) #1 { ; GFX1032-LABEL: test_intr_icmp_i32: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: s_clause 0x1 @@ -2231,7 +2231,7 @@ define amdgpu_kernel void @test_intr_icmp_i32(ptr addrspace(1) %out, i32 %src) { ret void } -define amdgpu_ps void @test_wqm_vote(float %a) { +define amdgpu_ps void @test_wqm_vote(float %a) #1 { ; GFX1032-LABEL: test_wqm_vote: ; GFX1032: ; %bb.0: ; GFX1032-NEXT: v_cmp_neq_f32_e32 vcc_lo, 0, v0 @@ -2452,7 +2452,7 @@ main_body: ret float %s.10 } -define amdgpu_kernel void @icmp64(i32 %n, i32 %s) { +define amdgpu_kernel void @icmp64(i32 %n, i32 %s) #1 { ; GFX1032-LABEL: icmp64: ; GFX1032: ; %bb.0: ; %entry ; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28 @@ -2547,7 +2547,7 @@ if.end2: ; preds = %if.end ret void } -define amdgpu_kernel void @fcmp64(float %n, float %s) { +define amdgpu_kernel void @fcmp64(float %n, float %s) #1 { ; GFX1032-LABEL: fcmp64: ; GFX1032: ; %bb.0: ; %entry ; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28 @@ -2759,7 +2759,7 @@ if.end2: ; preds = %if.end ret void } -define amdgpu_kernel void @icmp32(i32 %n, i32 %s) { +define amdgpu_kernel void @icmp32(i32 %n, i32 %s) #1 { ; GFX1032-LABEL: icmp32: ; GFX1032: ; %bb.0: ; %entry ; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28 @@ -2853,7 +2853,7 @@ if.end2: ; preds = %if.end ret void } -define amdgpu_kernel void @fcmp32(float %n, float %s) { +define amdgpu_kernel void @fcmp32(float %n, float %s) #1 { ; GFX1032-LABEL: fcmp32: ; GFX1032: ; %bb.0: ; %entry ; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28 @@ -3076,13 +3076,13 @@ define void @callee_no_stack_with_call() #1 { ; GFX1032-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill ; GFX1032-NEXT: s_waitcnt_depctr 0xffe3 ; GFX1032-NEXT: s_mov_b32 exec_lo, s17 -; GFX1032-NEXT: v_writelane_b32 v40, s16, 2 ; GFX1032-NEXT: s_addk_i32 s32, 0x200 +; GFX1032-NEXT: v_writelane_b32 v40, s16, 2 ; GFX1032-NEXT: s_getpc_b64 s[16:17] ; GFX1032-NEXT: s_add_u32 s16, s16, external_void_func_void@gotpcrel32@lo+4 ; GFX1032-NEXT: s_addc_u32 s17, s17, external_void_func_void@gotpcrel32@hi+12 -; GFX1032-NEXT: v_writelane_b32 v40, s30, 0 ; GFX1032-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0 +; GFX1032-NEXT: v_writelane_b32 v40, s30, 0 ; GFX1032-NEXT: v_writelane_b32 v40, s31, 1 ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: s_swappc_b64 s[30:31], s[16:17] @@ -3107,13 +3107,13 @@ define void @callee_no_stack_with_call() #1 { ; GFX1064-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill ; GFX1064-NEXT: s_waitcnt_depctr 0xffe3 ; GFX1064-NEXT: s_mov_b64 exec, s[18:19] -; GFX1064-NEXT: v_writelane_b32 v40, s16, 2 ; GFX1064-NEXT: s_addk_i32 s32, 0x400 +; GFX1064-NEXT: v_writelane_b32 v40, s16, 2 ; GFX1064-NEXT: s_getpc_b64 s[16:17] ; GFX1064-NEXT: s_add_u32 s16, s16, external_void_func_void@gotpcrel32@lo+4 ; GFX1064-NEXT: s_addc_u32 s17, s17, external_void_func_void@gotpcrel32@hi+12 -; GFX1064-NEXT: v_writelane_b32 v40, s30, 0 ; GFX1064-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0 +; GFX1064-NEXT: v_writelane_b32 v40, s30, 0 ; GFX1064-NEXT: v_writelane_b32 v40, s31, 1 ; GFX1064-NEXT: s_waitcnt lgkmcnt(0) ; GFX1064-NEXT: s_swappc_b64 s[30:31], s[16:17] |
