diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/store-to-constant.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/store-to-constant.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/store-to-constant.ll b/llvm/test/CodeGen/AMDGPU/store-to-constant.ll index 64d5d01454a3..9b3b52012f32 100644 --- a/llvm/test/CodeGen/AMDGPU/store-to-constant.ll +++ b/llvm/test/CodeGen/AMDGPU/store-to-constant.ll @@ -134,10 +134,10 @@ define amdgpu_kernel void @store_as4_2xi32(ptr addrspace(4) %p, <2 x i32> %v) { ; CHECK-LABEL: store_as4_2xi32: ; CHECK: ; %bb.0: ; CHECK-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; CHECK-NEXT: v_mov_b32_e32 v2, 0 +; CHECK-NEXT: v_mov_b32_e32 v0, 0 ; CHECK-NEXT: s_waitcnt lgkmcnt(0) -; CHECK-NEXT: v_pk_mov_b32 v[0:1], s[2:3], s[2:3] op_sel:[0,1] -; CHECK-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] +; CHECK-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1] +; CHECK-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1] ; CHECK-NEXT: s_endpgm store <2 x i32> %v, ptr addrspace(4) %p ret void @@ -161,10 +161,10 @@ define amdgpu_kernel void @store_as4_2xfloat(ptr addrspace(4) %p, <2 x float> %v ; CHECK-LABEL: store_as4_2xfloat: ; CHECK: ; %bb.0: ; CHECK-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0 -; CHECK-NEXT: v_mov_b32_e32 v2, 0 +; CHECK-NEXT: v_mov_b32_e32 v0, 0 ; CHECK-NEXT: s_waitcnt lgkmcnt(0) -; CHECK-NEXT: v_pk_mov_b32 v[0:1], s[2:3], s[2:3] op_sel:[0,1] -; CHECK-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] +; CHECK-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1] +; CHECK-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1] ; CHECK-NEXT: s_endpgm store <2 x float> %v, ptr addrspace(4) %p ret void @@ -175,11 +175,11 @@ define amdgpu_kernel void @store_as4_2xdouble(ptr addrspace(4) %p, <2 x double> ; CHECK: ; %bb.0: ; CHECK-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x10 ; CHECK-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x0 -; CHECK-NEXT: v_mov_b32_e32 v4, 0 +; CHECK-NEXT: v_mov_b32_e32 v0, 0 ; CHECK-NEXT: s_waitcnt lgkmcnt(0) -; CHECK-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] -; CHECK-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1] -; CHECK-NEXT: global_store_dwordx4 v4, v[0:3], s[4:5] +; CHECK-NEXT: v_pk_mov_b32 v[4:5], s[2:3], s[2:3] op_sel:[0,1] +; CHECK-NEXT: v_pk_mov_b32 v[2:3], s[0:1], s[0:1] op_sel:[0,1] +; CHECK-NEXT: global_store_dwordx4 v0, v[2:5], s[4:5] ; CHECK-NEXT: s_endpgm store <2 x double> %v, ptr addrspace(4) %p ret void |