diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll b/llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll index 101787abf8ea..76bf9176143f 100644 --- a/llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll +++ b/llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll @@ -401,11 +401,11 @@ define void @v_select_sint_to_fp_i1_vals_f64(ptr addrspace(1) %out, i32 %in) { ; GCN-LABEL: v_select_sint_to_fp_i1_vals_f64: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GCN-NEXT: v_mov_b32_e32 v4, 0xbff00000 +; GCN-NEXT: v_mov_b32_e32 v3, 0xbff00000 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GCN-NEXT: v_mov_b32_e32 v3, 0 -; GCN-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc -; GCN-NEXT: flat_store_dwordx2 v[0:1], v[3:4] +; GCN-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc +; GCN-NEXT: v_mov_b32_e32 v2, 0 +; GCN-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_setpc_b64 s[30:31] ; @@ -414,10 +414,10 @@ define void @v_select_sint_to_fp_i1_vals_f64(ptr addrspace(1) %out, i32 %in) { ; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX942-NEXT: v_mov_b32_e32 v3, 0xbff00000 ; GFX942-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GFX942-NEXT: v_mov_b32_e32 v4, 0 +; GFX942-NEXT: v_mov_b32_e32 v2, 0 ; GFX942-NEXT: s_nop 0 -; GFX942-NEXT: v_cndmask_b32_e32 v5, 0, v3, vcc -; GFX942-NEXT: global_store_dwordx2 v[0:1], v[4:5], off +; GFX942-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc +; GFX942-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX942-NEXT: s_waitcnt vmcnt(0) ; GFX942-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %in, 0 @@ -482,11 +482,11 @@ define void @v_select_sint_to_fp_i1_vals_i64(ptr addrspace(1) %out, i32 %in) { ; GCN-LABEL: v_select_sint_to_fp_i1_vals_i64: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GCN-NEXT: v_mov_b32_e32 v4, 0xbff00000 +; GCN-NEXT: v_mov_b32_e32 v3, 0xbff00000 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GCN-NEXT: v_mov_b32_e32 v3, 0 -; GCN-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc -; GCN-NEXT: flat_store_dwordx2 v[0:1], v[3:4] +; GCN-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc +; GCN-NEXT: v_mov_b32_e32 v2, 0 +; GCN-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_setpc_b64 s[30:31] ; @@ -495,10 +495,10 @@ define void @v_select_sint_to_fp_i1_vals_i64(ptr addrspace(1) %out, i32 %in) { ; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX942-NEXT: v_mov_b32_e32 v3, 0xbff00000 ; GFX942-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GFX942-NEXT: v_mov_b32_e32 v4, 0 +; GFX942-NEXT: v_mov_b32_e32 v2, 0 ; GFX942-NEXT: s_nop 0 -; GFX942-NEXT: v_cndmask_b32_e32 v5, 0, v3, vcc -; GFX942-NEXT: global_store_dwordx2 v[0:1], v[4:5], off +; GFX942-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc +; GFX942-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX942-NEXT: s_waitcnt vmcnt(0) ; GFX942-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %in, 0 @@ -512,11 +512,11 @@ define void @v_swap_select_sint_to_fp_i1_vals_f64(ptr addrspace(1) %out, i32 %in ; GCN-LABEL: v_swap_select_sint_to_fp_i1_vals_f64: ; GCN: ; %bb.0: ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GCN-NEXT: v_mov_b32_e32 v4, 0xbff00000 +; GCN-NEXT: v_mov_b32_e32 v3, 0xbff00000 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GCN-NEXT: v_mov_b32_e32 v3, 0 -; GCN-NEXT: v_cndmask_b32_e64 v4, v4, 0, vcc -; GCN-NEXT: flat_store_dwordx2 v[0:1], v[3:4] +; GCN-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc +; GCN-NEXT: v_mov_b32_e32 v2, 0 +; GCN-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_setpc_b64 s[30:31] ; @@ -525,10 +525,10 @@ define void @v_swap_select_sint_to_fp_i1_vals_f64(ptr addrspace(1) %out, i32 %in ; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX942-NEXT: v_mov_b32_e32 v3, 0xbff00000 ; GFX942-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GFX942-NEXT: v_mov_b32_e32 v4, 0 +; GFX942-NEXT: v_mov_b32_e32 v2, 0 ; GFX942-NEXT: s_nop 0 -; GFX942-NEXT: v_cndmask_b32_e64 v5, v3, 0, vcc -; GFX942-NEXT: global_store_dwordx2 v[0:1], v[4:5], off +; GFX942-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc +; GFX942-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX942-NEXT: s_waitcnt vmcnt(0) ; GFX942-NEXT: s_setpc_b64 s[30:31] %cmp = icmp eq i32 %in, 0 |