1 files changed, 84 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/lower-intrinsics-barriers.ll b/llvm/test/CodeGen/AMDGPU/lower-intrinsics-barriers.ll
new file mode 100644
index 000000000000..bc70c3b36d45
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/lower-intrinsics-barriers.ll
@@ -0,0 +1,84 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=amdgpu-lower-intrinsics -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -codegen-opt-level=0 | FileCheck --check-prefixes=GFX11,GFX11-NOOPT %s
+; RUN: opt < %s -passes=amdgpu-lower-intrinsics -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -codegen-opt-level=1 -mattr=+wavefrontsize32 | FileCheck --check-prefixes=GFX11,OPT-WAVE32,GFX11-OPT-WAVE32 %s
+; RUN: opt < %s -passes=amdgpu-lower-intrinsics -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -codegen-opt-level=1 -mattr=+wavefrontsize64 | FileCheck --check-prefixes=GFX11,OPT-WAVE64,GFX11-OPT-WAVE64 %s
+; RUN: opt < %s -passes=amdgpu-lower-intrinsics -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -codegen-opt-level=0 | FileCheck --check-prefixes=GFX12,GFX12-NOOPT %s
+; RUN: opt < %s -passes=amdgpu-lower-intrinsics -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -codegen-opt-level=1 -mattr=+wavefrontsize32 | FileCheck --check-prefixes=GFX12,OPT-WAVE32,GFX12-OPT-WAVE32 %s
+; RUN: opt < %s -passes=amdgpu-lower-intrinsics -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -codegen-opt-level=1 -mattr=+wavefrontsize64 | FileCheck --check-prefixes=GFX12,OPT-WAVE64,GFX12-OPT-WAVE64 %s
+
+define amdgpu_kernel void @barrier() {
+; GFX11-LABEL: define amdgpu_kernel void @barrier(
+; GFX11-SAME: ) #[[ATTR0:[0-9]+]] {
+; GFX11-NEXT:    call void @llvm.amdgcn.s.barrier()
+; GFX11-NEXT:    ret void
+;
+; GFX12-LABEL: define amdgpu_kernel void @barrier(
+; GFX12-SAME: ) #[[ATTR0:[0-9]+]] {
+; GFX12-NEXT:    call void @llvm.amdgcn.s.barrier.signal(i32 -1)
+; GFX12-NEXT:    call void @llvm.amdgcn.s.barrier.wait(i16 -1)
+; GFX12-NEXT:    ret void
+;
+  call void @llvm.amdgcn.s.barrier()
+  ret void
+}
+
+define amdgpu_kernel void @barrier_32threads() "amdgpu-flat-work-group-size"="32,32" {
+; GFX11-NOOPT-LABEL: define amdgpu_kernel void @barrier_32threads(
+; GFX11-NOOPT-SAME: ) #[[ATTR1:[0-9]+]] {
+; GFX11-NOOPT-NEXT:    call void @llvm.amdgcn.s.barrier()
+; GFX11-NOOPT-NEXT:    ret void
+;
+; OPT-WAVE32-LABEL: define amdgpu_kernel void @barrier_32threads(
+; OPT-WAVE32-SAME: ) #[[ATTR1:[0-9]+]] {
+; OPT-WAVE32-NEXT:    call void @llvm.amdgcn.wave.barrier()
+; OPT-WAVE32-NEXT:    ret void
+;
+; OPT-WAVE64-LABEL: define amdgpu_kernel void @barrier_32threads(
+; OPT-WAVE64-SAME: ) #[[ATTR1:[0-9]+]] {
+; OPT-WAVE64-NEXT:    call void @llvm.amdgcn.wave.barrier()
+; OPT-WAVE64-NEXT:    ret void
+;
+; GFX12-NOOPT-LABEL: define amdgpu_kernel void @barrier_32threads(
+; GFX12-NOOPT-SAME: ) #[[ATTR1:[0-9]+]] {
+; GFX12-NOOPT-NEXT:    call void @llvm.amdgcn.s.barrier.signal(i32 -1)
+; GFX12-NOOPT-NEXT:    call void @llvm.amdgcn.s.barrier.wait(i16 -1)
+; GFX12-NOOPT-NEXT:    ret void
+;
+  call void @llvm.amdgcn.s.barrier()
+  ret void
+}
+
+define amdgpu_kernel void @barrier_64threads() "amdgpu-flat-work-group-size"="64,64" {
+; GFX11-NOOPT-LABEL: define amdgpu_kernel void @barrier_64threads(
+; GFX11-NOOPT-SAME: ) #[[ATTR2:[0-9]+]] {
+; GFX11-NOOPT-NEXT:    call void @llvm.amdgcn.s.barrier()
+; GFX11-NOOPT-NEXT:    ret void
+;
+; GFX11-OPT-WAVE32-LABEL: define amdgpu_kernel void @barrier_64threads(
+; GFX11-OPT-WAVE32-SAME: ) #[[ATTR2:[0-9]+]] {
+; GFX11-OPT-WAVE32-NEXT:    call void @llvm.amdgcn.s.barrier()
+; GFX11-OPT-WAVE32-NEXT:    ret void
+;
+; OPT-WAVE64-LABEL: define amdgpu_kernel void @barrier_64threads(
+; OPT-WAVE64-SAME: ) #[[ATTR2:[0-9]+]] {
+; OPT-WAVE64-NEXT:    call void @llvm.amdgcn.wave.barrier()
+; OPT-WAVE64-NEXT:    ret void
+;
+; GFX12-NOOPT-LABEL: define amdgpu_kernel void @barrier_64threads(
+; GFX12-NOOPT-SAME: ) #[[ATTR2:[0-9]+]] {
+; GFX12-NOOPT-NEXT:    call void @llvm.amdgcn.s.barrier.signal(i32 -1)
+; GFX12-NOOPT-NEXT:    call void @llvm.amdgcn.s.barrier.wait(i16 -1)
+; GFX12-NOOPT-NEXT:    ret void
+;
+; GFX12-OPT-WAVE32-LABEL: define amdgpu_kernel void @barrier_64threads(
+; GFX12-OPT-WAVE32-SAME: ) #[[ATTR2:[0-9]+]] {
+; GFX12-OPT-WAVE32-NEXT:    call void @llvm.amdgcn.s.barrier.signal(i32 -1)
+; GFX12-OPT-WAVE32-NEXT:    call void @llvm.amdgcn.s.barrier.wait(i16 -1)
+; GFX12-OPT-WAVE32-NEXT:    ret void
+;
+  call void @llvm.amdgcn.s.barrier()
+  ret void
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX11-OPT-WAVE64: {{.*}}
+; GFX12-OPT-WAVE64: {{.*}}