diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll | 1641 |
1 files changed, 822 insertions, 819 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll index 38302a75fe26..52e125d0d658 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll @@ -3736,18 +3736,29 @@ define <8 x i32> @bitcast_v16bf16_to_v8i32(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v8i32: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v8 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v8 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, v5 :: v_dual_mov_b32 v12, v4 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_lshlrev_b32 v8, 16, v7 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v8, 0x40c00000, v8 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v9, 16, 1 ; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v8 @@ -3755,138 +3766,129 @@ define <8 x i32> @bitcast_v16bf16_to_v8i32(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v8, 0x7fff ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v11, v14 :: v_dual_and_b32 v7, 0xffff0000, v7 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v6, 16, v6 ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v15, v9, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v7, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v7, v12, v13 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v15, v12, v13 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v9 -; GFX11-TRUE16-NEXT: v_bfi_b32 v7, 0xffff, v8, v7 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v8.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v9 ; GFX11-TRUE16-NEXT: v_add3_u32 v14, v16, v6, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v14, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v11, v12 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v6, 0xffff, v6, v9 -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v10, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v10, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v14, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v12, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v4 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v11, v14 :: v_dual_add_f32 v11, 0x40c00000, v15 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v11, v8, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v6.h +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v4, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v10, v7, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v9 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v6, v11, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfi_b32 v5, 0xffff, v5, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc_lo -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfi_b32 v4, 0xffff, v4, v8 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v12, v13 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v3.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v15, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v14 :: v_dual_and_b32 v14, 0xffff0000, v1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v3, v9 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v12 :: v_dual_add_f32 v1, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v2, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v5.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v9, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_cndmask_b32 v12, v6, v10 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v11 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.h +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v4, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v10, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v6, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v2, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_add_f32 v13, 0x40c00000, v14 :: v_dual_lshlrev_b32 v14, 16, v0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v11, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_add_f32 v1, 0x40c00000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v13 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v14, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v12 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v13, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v15, v15, v12, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v18, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v15, v19, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v2, v10 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v12.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v9, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v6, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v4, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v1, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v12, v0 -; GFX11-TRUE16-NEXT: .LBB22_2: ; %end +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.h +; GFX11-TRUE16-NEXT: .LBB22_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v12 :: v_dual_mov_b32 v5, v13 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, v14 :: v_dual_mov_b32 v7, v15 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v16bf16_to_v8i32: @@ -10729,18 +10731,29 @@ define <8 x float> @bitcast_v16bf16_to_v8f32(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v8f32: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v8 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v8 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, v5 :: v_dual_mov_b32 v12, v4 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB46_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB46_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_lshlrev_b32 v8, 16, v7 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v8, 0x40c00000, v8 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v9, 16, 1 ; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v8 @@ -10748,138 +10761,129 @@ define <8 x float> @bitcast_v16bf16_to_v8f32(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v8, 0x7fff ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v11, v14 :: v_dual_and_b32 v7, 0xffff0000, v7 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v6, 16, v6 ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v15, v9, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v7, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v7, v12, v13 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v15, v12, v13 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v9 -; GFX11-TRUE16-NEXT: v_bfi_b32 v7, 0xffff, v8, v7 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v8.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v9 ; GFX11-TRUE16-NEXT: v_add3_u32 v14, v16, v6, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v14, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v11, v12 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v6, 0xffff, v6, v9 -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v10, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v10, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v14, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v12, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v4 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v11, v14 :: v_dual_add_f32 v11, 0x40c00000, v15 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v11, v8, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v6.h +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v4, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v10, v7, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v9 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v6, v11, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfi_b32 v5, 0xffff, v5, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc_lo -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfi_b32 v4, 0xffff, v4, v8 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v12, v13 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v3.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v15, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v14 :: v_dual_and_b32 v14, 0xffff0000, v1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v3, v9 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v12 :: v_dual_add_f32 v1, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v2, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v5.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v9, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_cndmask_b32 v12, v6, v10 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v11 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.h +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v4, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v10, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v6, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v2, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_add_f32 v13, 0x40c00000, v14 :: v_dual_lshlrev_b32 v14, 16, v0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v11, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_add_f32 v1, 0x40c00000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v13 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v14, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v12 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v13, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v15, v15, v12, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v18, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v15, v19, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v2, v10 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v12.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v9, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v6, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v4, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v1, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v12, v0 -; GFX11-TRUE16-NEXT: .LBB46_2: ; %end +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.h +; GFX11-TRUE16-NEXT: .LBB46_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v12 :: v_dual_mov_b32 v5, v13 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, v14 :: v_dual_mov_b32 v7, v15 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v16bf16_to_v8f32: @@ -17286,18 +17290,29 @@ define <4 x i64> @bitcast_v16bf16_to_v4i64(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v4i64: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v8 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v8 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, v5 :: v_dual_mov_b32 v12, v4 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB66_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB66_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_lshlrev_b32 v8, 16, v7 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v8, 0x40c00000, v8 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v9, 16, 1 ; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v8 @@ -17305,138 +17320,129 @@ define <4 x i64> @bitcast_v16bf16_to_v4i64(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v8, 0x7fff ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v11, v14 :: v_dual_and_b32 v7, 0xffff0000, v7 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v6, 16, v6 ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v15, v9, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v7, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v7, v12, v13 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v15, v12, v13 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v9 -; GFX11-TRUE16-NEXT: v_bfi_b32 v7, 0xffff, v8, v7 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v8.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v9 ; GFX11-TRUE16-NEXT: v_add3_u32 v14, v16, v6, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v14, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v11, v12 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v6, 0xffff, v6, v9 -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v10, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v10, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v14, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v12, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v4 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v11, v14 :: v_dual_add_f32 v11, 0x40c00000, v15 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v11, v8, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v6.h +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v4, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v10, v7, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v9 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v6, v11, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfi_b32 v5, 0xffff, v5, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc_lo -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfi_b32 v4, 0xffff, v4, v8 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v12, v13 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v3.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v15, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v14 :: v_dual_and_b32 v14, 0xffff0000, v1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v3, v9 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v12 :: v_dual_add_f32 v1, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v2, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v5.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v9, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_cndmask_b32 v12, v6, v10 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v11 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.h +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v4, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v10, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v6, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v2, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_add_f32 v13, 0x40c00000, v14 :: v_dual_lshlrev_b32 v14, 16, v0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v11, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_add_f32 v1, 0x40c00000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v13 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v14, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v12 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v13, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v15, v15, v12, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v18, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v15, v19, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v2, v10 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v12.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v9, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v6, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v4, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v1, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v12, v0 -; GFX11-TRUE16-NEXT: .LBB66_2: ; %end +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.h +; GFX11-TRUE16-NEXT: .LBB66_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v12 :: v_dual_mov_b32 v5, v13 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, v14 :: v_dual_mov_b32 v7, v15 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v16bf16_to_v4i64: @@ -23304,18 +23310,29 @@ define <4 x double> @bitcast_v16bf16_to_v4f64(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v4f64: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v8 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v8 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, v5 :: v_dual_mov_b32 v12, v4 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB82_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB82_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_lshlrev_b32 v8, 16, v7 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v8, 0x40c00000, v8 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v9, 16, 1 ; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v8 @@ -23323,138 +23340,129 @@ define <4 x double> @bitcast_v16bf16_to_v4f64(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v8, 0x7fff ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v11, v14 :: v_dual_and_b32 v7, 0xffff0000, v7 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v6, 16, v6 ; GFX11-TRUE16-NEXT: v_add3_u32 v11, v15, v9, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) ; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v7, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v7, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v7, v12, v13 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v15, v12, v13 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v9 -; GFX11-TRUE16-NEXT: v_bfi_b32 v7, 0xffff, v8, v7 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v8.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v9 ; GFX11-TRUE16-NEXT: v_add3_u32 v14, v16, v6, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v14, v17, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v11, v12 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v6, 0xffff, v6, v9 -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v10, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v10, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v14, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v12, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v4 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v11, v14 :: v_dual_add_f32 v11, 0x40c00000, v15 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v11, v8, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v6.h +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v4, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v10, v7, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v9 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v13, v6, v11, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfi_b32 v5, 0xffff, v5, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v4, 0x7fff ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc_lo -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_bfi_b32 v4, 0xffff, v4, v8 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v3, v12, v13 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v3.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v10, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v15, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v9, v14 :: v_dual_and_b32 v14, 0xffff0000, v1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v3, v9 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v10, v10, v12 :: v_dual_add_f32 v1, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v2, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v5.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v5, 0xffff0000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v2 :: v_dual_lshlrev_b32 v3, 16, v3 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v9, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_cndmask_b32 v12, v6, v10 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v11 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v5, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v4.h +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v4, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v10, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v3.h +; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v3, 0x40c00000, v3 :: v_dual_lshlrev_b32 v6, 16, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v7, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v13, v2, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_add_f32 v13, 0x40c00000, v14 :: v_dual_lshlrev_b32 v14, 16, v0 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v11, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_add_f32 v1, 0x40c00000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v14 -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v13, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v13 -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v14, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v12 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v13, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v15, v15, v12, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v18, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v15, v19, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v2, v10 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v12.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v11, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v9, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v6, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v9, v4, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v1, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v14, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v12, v0 -; GFX11-TRUE16-NEXT: .LBB82_2: ; %end +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v2, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v5.h +; GFX11-TRUE16-NEXT: .LBB82_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v12 :: v_dual_mov_b32 v5, v13 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, v14 :: v_dual_mov_b32 v7, v15 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v16bf16_to_v4f64: @@ -33716,156 +33724,158 @@ define <16 x half> @bitcast_v16bf16_to_v16f16(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v16f16: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, v7 :: v_dual_mov_b32 v15, v6 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v14, v5 :: v_dual_mov_b32 v13, v4 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v11, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 ; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v8 ; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB102_3 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %Flow +; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX11-TRUE16-NEXT: s_cbranch_execnz .LBB102_4 +; GFX11-TRUE16-NEXT: .LBB102_2: ; %end +; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] +; GFX11-TRUE16-NEXT: .LBB102_3: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v9 :: v_dual_mov_b32 v1, v10 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v11 :: v_dual_mov_b32 v3, v12 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, v13 :: v_dual_mov_b32 v5, v14 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, v15 :: v_dual_mov_b32 v7, v16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9 ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB102_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true -; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xffff0000, v6 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v8 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v6 +; GFX11-TRUE16-NEXT: .LBB102_4: ; %cmp.true +; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v10 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff0000, v15 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v8, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v11, v12 :: v_dual_and_b32 v9, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v2 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v9 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_lshlrev_b32 v1, 16, v9 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_lshlrev_b32 v0, 16, v0 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_lshlrev_b32 v3, 16, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v9, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v9 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v14, v9, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v13, v13, v0, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v13, v15, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v9, v14, v16 :: v_dual_add_f32 v10, 0x40c00000, v10 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v0, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_cndmask_b32 v0, v5, v6 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v10, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v11, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v14, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v2, 16, 1 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v11, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v14, v2, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v12 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v1, 0x7fff +; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_cndmask_b32 v9, v7, v9 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v1, v9 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v11, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff0000, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h -; GFX11-TRUE16-NEXT: v_add3_u32 v13, v13, v3, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v12, 0x40c00000, v12 :: v_dual_add_f32 v11, 0x40c00000, v11 -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v8 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v12, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 -; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v11, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_add3_u32 v14, v15, v12, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v12 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v14, v15, vcc_lo -; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_add_f32 v4, 0x40c00000, v4 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v13, v15, vcc_lo -; GFX11-TRUE16-NEXT: v_add3_u32 v15, v16, v11, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v2, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v3 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v11 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 16, v12 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v10, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v4, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff0000, v13 +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v9.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v5, v7, vcc_lo +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v7, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v8, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v11 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v3.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v14, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v13, v13, v4, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v14 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v3, v12 -; GFX11-TRUE16-NEXT: v_add3_u32 v16, v16, v14, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v8, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v3, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v12 :: v_dual_lshlrev_b32 v6, 16, v13 +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v8, 0x7fff ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v13, v18, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v7 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v7 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_add3_u32 v13, v13, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v16, v19, vcc_lo -; GFX11-TRUE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v20 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v17.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v7, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v8 +; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v7 :: v_dual_lshlrev_b32 v14, 16, v14 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v10.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v4, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v4, v12, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_dual_add_f32 v18, 0x40c00000, v18 :: v_dual_add_f32 v7, 0x40c00000, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v8.h ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v16, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v16 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v13, v19, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v12, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_add3_u32 v19, v20, v16, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v20, v18, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v18 -; GFX11-TRUE16-NEXT: v_add3_u32 v13, v13, v6, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v23, v7, 16, 1 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_add3_u32 v20, v20, v18, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v13, v22, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-TRUE16-NEXT: v_add3_u32 v13, v23, v7, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_bfi_b32 v5, 0xffff, v5, v14 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v18, v20, v24, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16 -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v2, v10 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v19, v21, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v12, v13, v7, 0x7fff +; GFX11-TRUE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v7 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v5, v11, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_bfi_b32 v6, 0xffff, v6, v16 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v13, v22, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v18.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v15, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v7, 0xffff, v13, v7 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_bfi_b32 v4, 0xffff, v4, v11 -; GFX11-TRUE16-NEXT: .LBB102_2: ; %end +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v13, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v18 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v11.h +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v12, v14 :: v_dual_lshlrev_b32 v12, 16, v15 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v13, 0x7fff +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v16 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v13 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v12, 0x40c00000, v12 +; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v14, 0x40c00000, v14 +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v13, v6, v15 :: v_dual_and_b32 v16, 0xffff0000, v16 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v12, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v15, v18, v7, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v18, v14, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v20, 0x400000, v12 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12 +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v12, 0x7fff +; GFX11-TRUE16-NEXT: v_add_f32_e32 v16, 0x40c00000, v16 +; GFX11-TRUE16-NEXT: v_add3_u32 v18, v18, v14, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v22, 0x400000, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v19, 0x400000, v7 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v6, v20, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v14, v14 +; GFX11-TRUE16-NEXT: v_bfe_u32 v21, v16, 16, 1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v13.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v18, v22, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v20, v21, v16, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v16 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v15, v19, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v16, v16 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v12.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v20, v21, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v14.h ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; @@ -38284,253 +38294,246 @@ define <32 x i8> @bitcast_v16bf16_to_v32i8(<16 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v16bf16_to_v32i8: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v27, v7 :: v_dual_mov_b32 v26, v6 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v18, v4 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 ; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v8 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr35_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr11_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr26_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr48_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr38_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr33_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr34_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr37_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr20_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr22_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr23_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr24_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr25_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr32_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr50_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr36_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr28_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr29_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr30_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr31_lo16 ; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_2 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[26:27] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[18:19] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[10:11] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v27 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v27 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v26 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v19 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v19 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v18 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v10 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[2:3] -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v3.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v3.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v11.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v11.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v18.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v19.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v19.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v26.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v27.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.h, v27.h +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[6:7] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[4:5] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v7 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v7 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v6 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v5 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v4 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 24, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 8, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v0 +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[2:3] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[0:1] +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v0.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.h, v0.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.h, v1.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.h, v1.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.h, v2.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v3.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.h, v3.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v4.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.h, v4.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v5.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.h, v5.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.h, v6.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.h, v6.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.h, v7.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.h, v7.h +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7 ; GFX11-TRUE16-NEXT: .LBB108_2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_4 ; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true -; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v11 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v10 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_add_f32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_dual_add_f32 v8, 0x40c00000, v4 :: v_dual_add_f32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v3 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v0 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v13, 0x40c00000, v10 :: v_dual_add_f32 v8, 0x40c00000, v8 +; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v8, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v8 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v8, 0x7fff +; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v1, 0x40c00000, v1 :: v_dual_lshlrev_b32 v0, 16, v0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v9, 0x40c00000, v9 :: v_dual_add_f32 v0, 0x40c00000, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v9, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v9 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v17, v10, v1, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v11, v14, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_add3_u32 v11, v15, v9, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v27, v17, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v3 +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v13, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v26, v11, v16, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v4, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v7, 0x40c00000, v3 :: v_dual_lshlrev_b32 v2, 16, v2 -; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v7, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v2, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v7, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v3, v6, vcc_lo +; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff0000, v2 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v10.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v0, v9, v1, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v11, v3, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_add3_u32 v0, v0, v2, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v4.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v12, v9, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v12, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v1, v6 -; GFX11-TRUE16-NEXT: v_add3_u32 v12, v12, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v2 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v12, v14, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v0, v1 :: v_dual_add_f32 v5, 0x40c00000, v15 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v8 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v12.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v8, 0x7fff -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v10 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v19 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v9, v16, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v0.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v11, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v19 -; GFX11-TRUE16-NEXT: v_bfi_b32 v11, 0xffff, v1, v14 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v8 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v10 +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v12, v13, 0x7fff +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 8, v27 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v11.h +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v12, v0, v3 :: v_dual_and_b32 v3, 0xffff0000, v5 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v2 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v9, 0x40c00000, v14 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v13 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v15, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc_lo -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_lshlrev_b32 v5, 16, v5 +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v9, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v9 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v33, v8, v14, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v9, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v33.l, v12.h +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[48:49], 24, v[26:27] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v26 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v32, v1, v2 :: v_dual_add_f32 v1, 0x40c00000, v3 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff0000, v4 +; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v33 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v3, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v13, v1, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v15, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v18 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v18 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v13 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v13 :: v_dual_add_f32 v1, 0x40c00000, v15 -; GFX11-TRUE16-NEXT: v_add3_u32 v13, v16, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v18 -; GFX11-TRUE16-NEXT: v_bfe_u32 v17, v10, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v22, v13, v15, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v32.l, v8.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v35, v3, v5, vcc_lo +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v9 :: v_dual_add_f32 v1, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_add3_u32 v9, v14, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v9, v13, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v14, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v6 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v6 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add3_u32 v16, v17, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v19, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xffff0000, v27 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v20, v16, v17, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v16, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v34, v2, v3, vcc_lo +; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v7 +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v5, v1, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v4 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v20.h -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v1, v10, v13 :: v_dual_add_f32 v10, 0x40c00000, v15 -; GFX11-TRUE16-NEXT: v_add3_u32 v15, v16, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v26 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v2, 0x40c00000, v2 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v3, v5, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v7, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v1, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v35.l, v20.h +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v13, v5, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v34.l, v16.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v24, v6, v14, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v35 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v35 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v34 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v33 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v51, v3, v7, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v27 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v23, 0x40c00000, v16 :: v_dual_cndmask_b32 v16, v15, v18 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v13 -; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v10, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v13, 16, 1 -; GFX11-TRUE16-NEXT: v_add3_u32 v15, v19, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v19, v23, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, 0x400000, v13 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 -; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v13, 0x7fff -; GFX11-TRUE16-NEXT: v_and_b32_e32 v21, 0xffff0000, v26 -; GFX11-TRUE16-NEXT: v_add3_u32 v19, v19, v23, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v26, 0x400000, v23 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v28, v5, v24, vcc_lo -; GFX11-TRUE16-NEXT: v_add_f32_e32 v18, 0x40c00000, v21 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v23, v23 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v21, 0x400000, v10 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v51.l, v28.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v32 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 24, v27 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v50, v1, v2, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v50.l, v24.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v51 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v51 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v25, v18, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v24, v19, v26, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v28.h -; GFX11-TRUE16-NEXT: v_add3_u32 v5, v25, v18, 0x7fff -; GFX11-TRUE16-NEXT: v_bfi_b32 v19, 0xffff, v17, v22 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v30, v15, v21, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v18, v18 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v15.l, v16.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v8.h -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 24, v19 -; GFX11-TRUE16-NEXT: v_bfi_b32 v27, 0xffff, v10, v30 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v24.h -; GFX11-TRUE16-NEXT: v_bfi_b32 v18, 0xffff, v15, v1 -; GFX11-TRUE16-NEXT: v_bfi_b32 v10, 0xffff, v21, v2 -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v9, v7 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 24, v27 -; GFX11-TRUE16-NEXT: v_bfi_b32 v26, 0xffff, v13, v5 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 8, v27 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v19 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v18 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[32:33], 24, v[26:27] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[33:34], 24, v[18:19] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[34:35], 24, v[10:11] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[35:36], 24, v[2:3] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v26 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v10 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[36:37], 24, v[50:51] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[37:38], 24, v[34:35] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[38:39], 24, v[32:33] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 8, v50 ; GFX11-TRUE16-NEXT: .LBB108_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v35.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v11.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v19.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v26.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v48.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v10.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v18.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v27.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v14.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v10.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v34.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v32.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v38.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v12.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v14.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v33.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v16.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v18.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v33.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v34.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v37.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v20.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v22.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v35.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v24.l, v24.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v26.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v32.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v26.l, v50.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v27.l, v36.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v28.l, v28.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v30.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v30.l, v51.h ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v16bf16_to_v32i8: |