diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll | 745 |
1 files changed, 388 insertions, 357 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll index 21ec3ee1996a..9b28fd9e7b6f 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll @@ -2668,85 +2668,92 @@ define <4 x i32> @bitcast_v8bf16_to_v4i32(<8 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v8bf16_to_v4i32: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v4 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v4 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB22_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 0 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v5 :: v_dual_add_f32 v7, 0x40c00000, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v2.l -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v1.l -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v11, 16, 1 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v4, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v3, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v3 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v4, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v4, v13, v11, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v9, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v8 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v2, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v13, v11, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.h +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v8, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v8, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v1, v9 :: v_dual_and_b32 v0, 0xffff0000, v0 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v8, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v7, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v13, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v10, v14, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v3, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v6, v2 -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v4, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v8, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v5, v0 -; GFX11-TRUE16-NEXT: .LBB22_2: ; %end +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v0, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.h +; GFX11-TRUE16-NEXT: .LBB22_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v8bf16_to_v4i32: @@ -7118,85 +7125,92 @@ define <4 x float> @bitcast_v8bf16_to_v4f32(<8 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v8bf16_to_v4f32: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v4 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v4 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB46_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB46_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 0 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v5 :: v_dual_add_f32 v7, 0x40c00000, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v2.l -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v1.l -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v11, 16, 1 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v4, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v3, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v3 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v4, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v4, v13, v11, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v9, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v8 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v2, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v13, v11, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.h +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v8, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v8, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v1, v9 :: v_dual_and_b32 v0, 0xffff0000, v0 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v8, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v7, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v13, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v10, v14, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v3, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v6, v2 -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v4, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v8, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v5, v0 -; GFX11-TRUE16-NEXT: .LBB46_2: ; %end +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v0, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.h +; GFX11-TRUE16-NEXT: .LBB46_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v8bf16_to_v4f32: @@ -11216,85 +11230,92 @@ define <2 x i64> @bitcast_v8bf16_to_v2i64(<8 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v8bf16_to_v2i64: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v4 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v4 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB66_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB66_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 0 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v5 :: v_dual_add_f32 v7, 0x40c00000, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v2.l -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v1.l -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v11, 16, 1 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v4, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v3, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v3 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v4, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v4, v13, v11, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v9, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v8 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v2, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v13, v11, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.h +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v8, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v8, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v1, v9 :: v_dual_and_b32 v0, 0xffff0000, v0 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v8, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v7, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v13, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v10, v14, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v3, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v6, v2 -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v4, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v8, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v5, v0 -; GFX11-TRUE16-NEXT: .LBB66_2: ; %end +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v0, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.h +; GFX11-TRUE16-NEXT: .LBB66_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v8bf16_to_v2i64: @@ -14900,85 +14921,92 @@ define <2 x double> @bitcast_v8bf16_to_v2f64(<8 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v8bf16_to_v2f64: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v4 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v4 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB82_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB82_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 0 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v1 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v5 :: v_dual_add_f32 v7, 0x40c00000, v7 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v2.l -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v6, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v6 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v5 ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v1.l -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v6, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v2 ; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v11, 16, 1 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v8, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_dual_add_f32 v4, 0x40c00000, v4 :: v_dual_add_f32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v11 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v4, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 ; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v3, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x400000, v3 ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v4, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v4, v13, v11, 0x7fff -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v9, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v8 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v8, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v3, 0x7fff ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v2, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v13, v11, 0x7fff +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v6.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v12, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 -; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v8, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v8 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v10, v1, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v2.h +; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v8, 16, 1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v8 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8 +; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v8, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v4, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v5, v1, v9 :: v_dual_and_b32 v0, 0xffff0000, v0 ; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v8, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v7, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v13, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v0 -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v10, v14, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v3, v11, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v6, v2 -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v4, v1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v8, v7 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v5, v0 -; GFX11-TRUE16-NEXT: .LBB82_2: ; %end +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v11, v0, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v4, v8, v10, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v3.h +; GFX11-TRUE16-NEXT: .LBB82_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v8bf16_to_v2f64: @@ -21093,24 +21121,30 @@ define <8 x half> @bitcast_v8bf16_to_v8f16(<8 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v8bf16_to_v8f16: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: s_mov_b32 s0, exec_lo -; GFX11-TRUE16-NEXT: v_cmpx_ne_u32_e32 0, v4 -; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v4 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7 +; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0 +; GFX11-TRUE16-NEXT: ; %bb.2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 -; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB102_2 -; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.true -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 0 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l +; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB102_4 +; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, 0 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v0.l ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v1.l -; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v6, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v1.l +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v5 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v2.l -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_add_f32_e32 v11, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v2.l +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v5, 0x7fff ; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v0 ; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v1 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) @@ -21126,55 +21160,53 @@ define <8 x half> @bitcast_v8bf16_to_v8f16(<8 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v1, v7 :: v_dual_and_b32 v7, 0xffff0000, v2 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0 ; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v11, 16, 1 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v8, v10, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v7 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v11, 0x7fff ; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v11 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v9, v6, vcc_lo -; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v7 :: v_dual_add_f32 v7, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v9, v5, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11 -; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v7 -; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_cndmask_b32 v2, v2, v8 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v7, 0x40c00000, v6 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v3.l +; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v0, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc_lo ; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v7 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v6, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v5, 16, 1 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v3 +; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v2.h ; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v7, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v6, 0x7fff -; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, 0x400000, v6 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v8, v8, v12 :: v_dual_and_b32 v3, 0xffff0000, v3 +; GFX11-TRUE16-NEXT: v_dual_add_f32 v6, 0x40c00000, v6 :: v_dual_add_f32 v3, 0x40c00000, v3 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: v_bfe_u32 v13, v3, 16, 1 ; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v7.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v10, v14, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v13, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_add3_u32 v10, v10, v6, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v13, v3, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v9, v11, vcc_lo ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v5.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v1.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v8, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v2.h -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v7, v6 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v5, v3 -; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v8, v0 -; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v9, v4 -; GFX11-TRUE16-NEXT: .LBB102_2: ; %end +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v8.h +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v7, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v7.l, v10.h +; GFX11-TRUE16-NEXT: .LBB102_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7 ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v8bf16_to_v8f16: @@ -23752,140 +23784,139 @@ define <16 x i8> @bitcast_v8bf16_to_v16i8(<8 x bfloat> %a, i32 %b) { ; GFX11-TRUE16-LABEL: bitcast_v8bf16_to_v16i8: ; GFX11-TRUE16: ; %bb.0: ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v11, v3 :: v_dual_mov_b32 v10, v2 -; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 ; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v4 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr0_hi16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr17_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr10_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr19_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr4_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr5_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr6_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr7_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr8_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr9_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr16_lo16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr21_hi16 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr18_lo16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr12_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr13_lo16 -; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr14_hi16 ; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr15_lo16 ; GFX11-TRUE16-NEXT: s_and_saveexec_b32 s0, vcc_lo ; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX11-TRUE16-NEXT: s_xor_b32 s0, exec_lo, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_2 ; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[10:11] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v10 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2 -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[2:3] -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v3.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v3.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v10.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v11.l -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.h, v11.h +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[2:3] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v3 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v2 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v1 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v0 +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[0:1] +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.h, v0.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v0.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v1.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v1.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, v2.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v2.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v3.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v3.h +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr1 +; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr3 ; GFX11-TRUE16-NEXT: .LBB108_2: ; %Flow ; GFX11-TRUE16-NEXT: s_and_not1_saveexec_b32 s0, s0 ; GFX11-TRUE16-NEXT: s_cbranch_execz .LBB108_4 ; GFX11-TRUE16-NEXT: ; %bb.3: ; %cmp.true -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, 0 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v3.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l -; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v4, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v4 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v1 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, 0 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v1.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_add_f32_e32 v6, 0x40c00000, v4 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v4, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v4, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v4 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v4, 0x7fff -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v6, v8 :: v_dual_and_b32 v3, 0xffff0000, v2 +; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v4, 0x7fff ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX11-TRUE16-NEXT: v_dual_add_f32 v0, 0x40c00000, v0 :: v_dual_add_f32 v3, 0x40c00000, v3 -; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v0 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff -; GFX11-TRUE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: v_add3_u32 v8, v9, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v11.l +; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v4, v8, v10 :: v_dual_and_b32 v1, 0xffff0000, v0 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 +; GFX11-TRUE16-NEXT: v_bfe_u32 v0, v6, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v6 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v2, v7, vcc_lo -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v13, 16, 1 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v4.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) -; GFX11-TRUE16-NEXT: v_add3_u32 v0, v9, v13, 0x7fff -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v7, v8, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v13 +; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v1, 16, 1 +; GFX11-TRUE16-NEXT: v_add3_u32 v0, v0, v6, 0x7fff +; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v17, v0, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v3 +; GFX11-TRUE16-NEXT: v_add_f32_e32 v13, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v11, v1, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v4.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v16, v3, v12, vcc_lo +; GFX11-TRUE16-NEXT: v_add_f32_e32 v0, 0x40c00000, v7 +; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v13, 16, 1 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v13 ; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v13, v13 -; GFX11-TRUE16-NEXT: v_dual_cndmask_b32 v0, v0, v8 :: v_dual_and_b32 v5, 0xffff0000, v11 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v3, 0x40c00000, v5 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v5, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, v10.l -; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff0000, v10 +; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v8, v13, 0x7fff +; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v5 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v2.l +; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0xffff0000, v2 +; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v3, v6, vcc_lo +; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1 +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) +; GFX11-TRUE16-NEXT: v_dual_add_f32 v5, 0x40c00000, v5 :: v_dual_add_f32 v2, 0x40c00000, v2 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v1 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 +; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) ; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v5, 16, 1 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_add_f32_e32 v1, 0x40c00000, v1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, 0x400000, v5 -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 -; GFX11-TRUE16-NEXT: v_add_f32_e32 v10, 0x40c00000, v10 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0 +; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v2, 16, 1 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v3, v10, vcc_lo ; GFX11-TRUE16-NEXT: v_add3_u32 v8, v8, v5, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v11, v1, 16, 1 -; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v3, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, 0x400000, v1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, 0x400000, v3 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v12, v8, v12, vcc_lo -; GFX11-TRUE16-NEXT: v_add3_u32 v11, v11, v1, 0x7fff -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 -; GFX11-TRUE16-NEXT: v_add3_u32 v9, v9, v3, 0x7fff -; GFX11-TRUE16-NEXT: v_bfe_u32 v14, v10, 16, 1 -; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, 0x400000, v10 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v12.h -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v11, v15, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3 -; GFX11-TRUE16-NEXT: v_add3_u32 v5, v14, v10, 0x7fff -; GFX11-TRUE16-NEXT: v_bfi_b32 v3, 0xffff, v2, v6 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v14, v9, v13, vcc_lo -; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v9.l, v8.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v13.l, v0.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) -; GFX11-TRUE16-NEXT: v_bfi_b32 v11, 0xffff, v1, v14 -; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v5, v5, v16, vcc_lo -; GFX11-TRUE16-NEXT: v_bfi_b32 v2, 0xffff, v13, v7 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v3 -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v11 -; GFX11-TRUE16-NEXT: v_bfi_b32 v10, 0xffff, v9, v5 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v11 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v3 -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v2 +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5 +; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v2 +; GFX11-TRUE16-NEXT: v_add3_u32 v1, v11, v2, 0x7fff +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v6.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v17 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v8, v8, v13, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[16:17], 24, v[10:11] -; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[17:18], 24, v[2:3] -; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v10 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v16 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v22, v7, v9, vcc_lo +; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2 +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v12.h +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 24, v17 +; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v21, v1, v3, vcc_lo +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v8.h +; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 24, v22 +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 8, v22 +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[18:19], 24, v[21:22] +; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[19:20], 24, v[16:17] +; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 8, v21 ; GFX11-TRUE16-NEXT: .LBB108_4: ; %end ; GFX11-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0 -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h -; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v17.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v6.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v10.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v16.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v19.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v4.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v6.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v6.l, v17.h ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, v8.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v10.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v16.l +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v10.l, v21.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v18.l ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v12.h -; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v14.h +; GFX11-TRUE16-NEXT: v_mov_b16_e32 v14.l, v22.h ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] ; ; GFX11-FAKE16-LABEL: bitcast_v8bf16_to_v16i8: |