diff options
Diffstat (limited to 'llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll index d29e43509dfe..71396da00400 100644 --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll @@ -14,20 +14,21 @@ target triple = "aarch64" define <8 x i32> @fixed_bitselect_v8i32(ptr %pre_cond_ptr, ptr %left_ptr, ptr %right_ptr) { ; CHECK-LABEL: fixed_bitselect_v8i32: ; CHECK: // %bb.0: -; CHECK-NEXT: mov z0.s, #-1 // =0xffffffffffffffff -; CHECK-NEXT: ldp q2, q1, [x0] +; CHECK-NEXT: ldp q1, q0, [x0] ; CHECK-NEXT: ldp q5, q4, [x1] ; CHECK-NEXT: ldp q6, q7, [x2] -; CHECK-NEXT: add z3.s, z1.s, z0.s -; CHECK-NEXT: subr z1.s, z1.s, #0 // =0x0 -; CHECK-NEXT: add z0.s, z2.s, z0.s +; CHECK-NEXT: mov z2.d, z0.d +; CHECK-NEXT: mov z3.d, z1.d +; CHECK-NEXT: sub z1.s, z1.s, #1 // =0x1 +; CHECK-NEXT: sub z0.s, z0.s, #1 // =0x1 ; CHECK-NEXT: subr z2.s, z2.s, #0 // =0x0 -; CHECK-NEXT: and z1.d, z1.d, z4.d -; CHECK-NEXT: and z3.d, z3.d, z7.d -; CHECK-NEXT: and z0.d, z0.d, z6.d -; CHECK-NEXT: and z2.d, z2.d, z5.d -; CHECK-NEXT: orr z1.d, z3.d, z1.d -; CHECK-NEXT: orr z0.d, z0.d, z2.d +; CHECK-NEXT: subr z3.s, z3.s, #0 // =0x0 +; CHECK-NEXT: and z2.d, z2.d, z4.d +; CHECK-NEXT: and z3.d, z3.d, z5.d +; CHECK-NEXT: and z4.d, z0.d, z7.d +; CHECK-NEXT: and z0.d, z1.d, z6.d +; CHECK-NEXT: orr z1.d, z4.d, z2.d +; CHECK-NEXT: orr z0.d, z0.d, z3.d ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $z1 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0 ; CHECK-NEXT: ret |