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path: root/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
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Diffstat (limited to 'llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp')
-rw-r--r--llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp48
1 files changed, 44 insertions, 4 deletions
diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
index 4ee71c703f90..6371c67d9245 100644
--- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
@@ -1626,9 +1626,10 @@ static void collectReqs(const Module &M, SPIRV::ModuleAnalysisInfo &MAI,
// Collect requirements for OpExecutionMode instructions.
auto Node = M.getNamedMetadata("spirv.ExecutionMode");
if (Node) {
- // SPV_KHR_float_controls is not available until v1.4
- bool RequireFloatControls = false,
+ bool RequireFloatControls = false, RequireFloatControls2 = false,
VerLower14 = !ST.isAtLeastSPIRVVer(VersionTuple(1, 4));
+ bool HasFloatControls2 =
+ ST.canUseExtension(SPIRV::Extension::SPV_INTEL_float_controls2);
for (unsigned i = 0; i < Node->getNumOperands(); i++) {
MDNode *MDN = cast<MDNode>(Node->getOperand(i));
const MDOperand &MDOp = MDN->getOperand(1);
@@ -1636,8 +1637,7 @@ static void collectReqs(const Module &M, SPIRV::ModuleAnalysisInfo &MAI,
Constant *C = CMeta->getValue();
if (ConstantInt *Const = dyn_cast<ConstantInt>(C)) {
auto EM = Const->getZExtValue();
- MAI.Reqs.getAndAddRequirements(
- SPIRV::OperandCategory::ExecutionModeOperand, EM, ST);
+ // SPV_KHR_float_controls is not available until v1.4:
// add SPV_KHR_float_controls if the version is too low
switch (EM) {
case SPIRV::ExecutionMode::DenormPreserve:
@@ -1646,7 +1646,22 @@ static void collectReqs(const Module &M, SPIRV::ModuleAnalysisInfo &MAI,
case SPIRV::ExecutionMode::RoundingModeRTE:
case SPIRV::ExecutionMode::RoundingModeRTZ:
RequireFloatControls = VerLower14;
+ MAI.Reqs.getAndAddRequirements(
+ SPIRV::OperandCategory::ExecutionModeOperand, EM, ST);
break;
+ case SPIRV::ExecutionMode::RoundingModeRTPINTEL:
+ case SPIRV::ExecutionMode::RoundingModeRTNINTEL:
+ case SPIRV::ExecutionMode::FloatingPointModeALTINTEL:
+ case SPIRV::ExecutionMode::FloatingPointModeIEEEINTEL:
+ if (HasFloatControls2) {
+ RequireFloatControls2 = true;
+ MAI.Reqs.getAndAddRequirements(
+ SPIRV::OperandCategory::ExecutionModeOperand, EM, ST);
+ }
+ break;
+ default:
+ MAI.Reqs.getAndAddRequirements(
+ SPIRV::OperandCategory::ExecutionModeOperand, EM, ST);
}
}
}
@@ -1654,6 +1669,8 @@ static void collectReqs(const Module &M, SPIRV::ModuleAnalysisInfo &MAI,
if (RequireFloatControls &&
ST.canUseExtension(SPIRV::Extension::SPV_KHR_float_controls))
MAI.Reqs.addExtension(SPIRV::Extension::SPV_KHR_float_controls);
+ if (RequireFloatControls2)
+ MAI.Reqs.addExtension(SPIRV::Extension::SPV_INTEL_float_controls2);
}
for (auto FI = M.begin(), E = M.end(); FI != E; ++FI) {
const Function &F = *FI;
@@ -1770,6 +1787,27 @@ static void addMBBNames(const Module &M, const SPIRVInstrInfo &TII,
}
}
+// patching Instruction::PHI to SPIRV::OpPhi
+static void patchPhis(const Module &M, SPIRVGlobalRegistry *GR,
+ const SPIRVInstrInfo &TII, MachineModuleInfo *MMI) {
+ for (auto F = M.begin(), E = M.end(); F != E; ++F) {
+ MachineFunction *MF = MMI->getMachineFunction(*F);
+ if (!MF)
+ continue;
+ for (auto &MBB : *MF) {
+ for (MachineInstr &MI : MBB) {
+ if (MI.getOpcode() != TargetOpcode::PHI)
+ continue;
+ MI.setDesc(TII.get(SPIRV::OpPhi));
+ Register ResTypeReg = GR->getSPIRVTypeID(
+ GR->getSPIRVTypeForVReg(MI.getOperand(0).getReg(), MF));
+ MI.insert(MI.operands_begin() + 1,
+ {MachineOperand::CreateReg(ResTypeReg, false)});
+ }
+ }
+ }
+}
+
struct SPIRV::ModuleAnalysisInfo SPIRVModuleAnalysis::MAI;
void SPIRVModuleAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
@@ -1788,6 +1826,8 @@ bool SPIRVModuleAnalysis::runOnModule(Module &M) {
setBaseInfo(M);
+ patchPhis(M, GR, *TII, MMI);
+
addMBBNames(M, *TII, MMI, *ST, MAI);
addDecorations(M, *TII, MMI, *ST, MAI);