diff options
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVCallingConv.td')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVCallingConv.td | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVCallingConv.td b/llvm/lib/Target/RISCV/RISCVCallingConv.td index 98e05b7f8eca..cbf039edec27 100644 --- a/llvm/lib/Target/RISCV/RISCVCallingConv.td +++ b/llvm/lib/Target/RISCV/RISCVCallingConv.td @@ -56,14 +56,40 @@ def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add CSR_Interrupt, def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add CSR_Interrupt, (sequence "F%u_D", 0, 31))>; +// Same as CSR_Interrupt, but including all vector registers. +def CSR_XLEN_V_Interrupt: CalleeSavedRegs<(add CSR_Interrupt, + (sequence "V%u", 0, 31))>; + +// Same as CSR_Interrupt, but including all 32-bit FP registers and all vector +// registers. +def CSR_XLEN_F32_V_Interrupt: CalleeSavedRegs<(add CSR_XLEN_F32_Interrupt, + (sequence "V%u", 0, 31))>; + +// Same as CSR_Interrupt, but including all 64-bit FP registers and all vector +// registers. +def CSR_XLEN_F64_V_Interrupt: CalleeSavedRegs<(add CSR_XLEN_F64_Interrupt, + (sequence "V%u", 0, 31))>; + // Same as CSR_Interrupt, but excluding X16-X31. def CSR_Interrupt_RVE : CalleeSavedRegs<(sub CSR_Interrupt, (sequence "X%u", 16, 31))>; // Same as CSR_XLEN_F32_Interrupt, but excluding X16-X31. def CSR_XLEN_F32_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F32_Interrupt, - (sequence "X%u", 16, 31))>; + (sequence "X%u", 16, 31))>; // Same as CSR_XLEN_F64_Interrupt, but excluding X16-X31. def CSR_XLEN_F64_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F64_Interrupt, - (sequence "X%u", 16, 31))>; + (sequence "X%u", 16, 31))>; + +// Same as CSR_XLEN_V_Interrupt, but excluding X16-X31. +def CSR_XLEN_V_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_V_Interrupt, + (sequence "X%u", 16, 31))>; + +// Same as CSR_XLEN_F32_V_Interrupt, but excluding X16-X31. +def CSR_XLEN_F32_V_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F32_V_Interrupt, + (sequence "X%u", 16, 31))>; + +// Same as CSR_XLEN_F64_V_Interrupt, but excluding X16-X31. +def CSR_XLEN_F64_V_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F64_V_Interrupt, + (sequence "X%u", 16, 31))>; |
