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Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsTargetMachine.cpp46
1 files changed, 5 insertions, 41 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 8c519fa379dd..03bedc5b15c4 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -77,42 +77,6 @@ static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
return std::make_unique<MipsTargetObjectFile>();
}
-static std::string computeDataLayout(const Triple &TT, StringRef CPU,
- const TargetOptions &Options,
- bool isLittle) {
- std::string Ret;
- MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions);
-
- // There are both little and big endian mips.
- if (isLittle)
- Ret += "e";
- else
- Ret += "E";
-
- if (ABI.IsO32())
- Ret += "-m:m";
- else
- Ret += "-m:e";
-
- // Pointers are 32 bit on some ABIs.
- if (!ABI.IsN64())
- Ret += "-p:32:32";
-
- // 8 and 16 bit integers only need to have natural alignment, but try to
- // align them to 32 bits. 64 bit integers have natural alignment.
- Ret += "-i8:8:32-i16:16:32-i64:64";
-
- // 32 bit registers are always available and the stack is at least 64 bit
- // aligned. On N64 64 bit registers are also available and the stack is
- // 128 bit aligned.
- if (ABI.IsN64() || ABI.IsN32())
- Ret += "-i128:128-n32:64-S128";
- else
- Ret += "-n32-S64";
-
- return Ret;
-}
-
static Reloc::Model getEffectiveRelocModel(bool JIT,
std::optional<Reloc::Model> RM) {
if (!RM || JIT)
@@ -132,12 +96,12 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT,
bool isLittle)
- : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, isLittle),
- TT, CPU, FS, Options,
- getEffectiveRelocModel(JIT, RM),
- getEffectiveCodeModel(CM, CodeModel::Small), OL),
+ : CodeGenTargetMachineImpl(
+ T, TT.computeDataLayout(Options.MCOptions.getABIName()), TT, CPU, FS,
+ Options, getEffectiveRelocModel(JIT, RM),
+ getEffectiveCodeModel(CM, CodeModel::Small), OL),
isLittle(isLittle), TLOF(createTLOF(getTargetTriple())),
- ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
+ ABI(MipsABIInfo::computeTargetABI(TT, Options.MCOptions.getABIName())),
Subtarget(nullptr),
DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt),
NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",