diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFastISel.cpp | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 06499a3945ee..7ba2487d2390 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -2562,8 +2562,7 @@ bool ARMFastISel::SelectIntrinsicCall(const IntrinsicInst &I) { const TargetRegisterClass *RC = isThumb2 ? &ARM::tGPRRegClass : &ARM::GPRRegClass; - const ARMBaseRegisterInfo *RegInfo = - static_cast<const ARMBaseRegisterInfo *>(Subtarget->getRegisterInfo()); + const ARMBaseRegisterInfo *RegInfo = Subtarget->getRegisterInfo(); Register FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); Register SrcReg = FramePtr; @@ -2636,12 +2635,8 @@ bool ARMFastISel::SelectIntrinsicCall(const IntrinsicInst &I) { return SelectCall(&I, "memset"); } case Intrinsic::trap: { - unsigned Opcode; - if (Subtarget->isThumb()) - Opcode = ARM::tTRAP; - else - Opcode = Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP; - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opcode)); + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, + TII.get(Subtarget->isThumb() ? ARM::tTRAP : ARM::TRAP)); return true; } } |
