diff options
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp index eb60b966c8e0..0ee813688411 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -61,6 +61,11 @@ static cl::opt<bool> EnableOrLikeSelectOpt("enable-aarch64-or-like-select", static cl::opt<bool> EnableLSRCostOpt("enable-aarch64-lsr-cost-opt", cl::init(true), cl::Hidden); +// A complete guess as to a reasonable cost. +static cl::opt<unsigned> + BaseHistCntCost("aarch64-base-histcnt-cost", cl::init(8), cl::Hidden, + cl::desc("The cost of a histcnt instruction")); + namespace { class TailFoldingOption { // These bitfields will only ever be set to something non-zero in operator=, @@ -508,11 +513,39 @@ static bool isUnpackedVectorVT(EVT VecVT) { VecVT.getSizeInBits().getKnownMinValue() < AArch64::SVEBitsPerBlock; } +static InstructionCost getHistogramCost(const IntrinsicCostAttributes &ICA) { + Type *BucketPtrsTy = ICA.getArgTypes()[0]; // Type of vector of pointers + Type *EltTy = ICA.getArgTypes()[1]; // Type of bucket elements + + // Only allow (32b and 64b) integers or pointers for now... + if ((!EltTy->isIntegerTy() && !EltTy->isPointerTy()) || + (EltTy->getScalarSizeInBits() != 32 && + EltTy->getScalarSizeInBits() != 64)) + return InstructionCost::getInvalid(); + + // FIXME: Hacky check for legal vector types. We can promote smaller types + // but we cannot legalize vectors via splitting for histcnt. + // FIXME: We should be able to generate histcnt for fixed-length vectors + // using ptrue with a specific VL. + if (VectorType *VTy = dyn_cast<VectorType>(BucketPtrsTy)) + if ((VTy->getElementCount().getKnownMinValue() != 2 && + VTy->getElementCount().getKnownMinValue() != 4) || + VTy->getPrimitiveSizeInBits().getKnownMinValue() > 128 || + !VTy->isScalableTy()) + return InstructionCost::getInvalid(); + + return InstructionCost(BaseHistCntCost); +} + InstructionCost AArch64TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) { auto *RetTy = ICA.getReturnType(); switch (ICA.getID()) { + case Intrinsic::experimental_vector_histogram_add: + if (!ST->hasSVE2()) + return InstructionCost::getInvalid(); + return getHistogramCost(ICA); case Intrinsic::umin: case Intrinsic::umax: case Intrinsic::smin: |
