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Diffstat (limited to 'llvm/docs/AMDGPUUsage.rst')
| -rw-r--r-- | llvm/docs/AMDGPUUsage.rst | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index 6ff3272422fe..aba39762861d 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -1369,6 +1369,12 @@ The AMDGPU backend implements the following LLVM IR intrinsics. sign-extended from the width of the underlying PC hardware register even on processors where the s_getpc_b64 instruction returns a zero-extended value. + llvm.amdgcn.ballot Returns a bitfield(i32 or i64) containing the result of its i1 argument + in all active lanes, and zero in all inactive lanes. + Provides a way to convert i1 in LLVM IR to i32 or i64 lane mask - bitfield + used by hardware to control active lanes when used in EXEC register. + For example, ballot(i1 true) return EXEC mask. + ============================================== ========================================================== .. TODO:: |