diff options
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll | 25 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-frame-pointer.ll | 25 |
2 files changed, 30 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll index 06150e4277e9..f079630c4bff 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll @@ -517,3 +517,28 @@ define amdgpu_cs_chain void @test_call_and_alloca_var(i32 %count) { store i32 0, ptr addrspace(5) %v, align 4 ret void } + +define amdgpu_cs_chain void @test_fp_all() #0 { +; GFX12-LABEL: test_fp_all: +; GFX12: ; %bb.0: +; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX12-NEXT: s_wait_expcnt 0x0 +; GFX12-NEXT: s_wait_samplecnt 0x0 +; GFX12-NEXT: s_wait_bvhcnt 0x0 +; GFX12-NEXT: s_wait_kmcnt 0x0 +; GFX12-NEXT: v_mov_b32_e32 v0, 0 +; GFX12-NEXT: scratch_store_b32 off, v0, off +; GFX12-NEXT: s_endpgm +; +; GFX942-LABEL: test_fp_all: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_mov_b32_e32 v0, 0 +; GFX942-NEXT: scratch_store_dword off, v0, off +; GFX942-NEXT: s_endpgm + %v = alloca i32, align 4, addrspace(5) + store i32 0, ptr addrspace(5) %v, align 4 + ret void +} + +attributes #0 = { "frame-pointer"="all" } diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-frame-pointer.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-frame-pointer.ll index 85675042aed9..833c81683ab6 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-frame-pointer.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-frame-pointer.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx942 -O0 -verify-machineinstrs < %s | FileCheck %s -define amdgpu_cs_chain void @indirect(ptr %callee) { -; CHECK-LABEL: indirect: +define amdgpu_cs_chain void @recurse(ptr %callee) { +; CHECK-LABEL: recurse: ; CHECK: ; %bb.0: ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; CHECK-NEXT: s_mov_b32 s32, 16 @@ -26,8 +26,8 @@ define amdgpu_cs_chain void @indirect(ptr %callee) { ; CHECK-NEXT: s_mov_b32 s15, s0 ; CHECK-NEXT: v_mov_b32_e32 v31, s0 ; CHECK-NEXT: s_getpc_b64 s[0:1] -; CHECK-NEXT: s_add_u32 s0, s0, indirect@gotpcrel32@lo+4 -; CHECK-NEXT: s_addc_u32 s1, s1, indirect@gotpcrel32@hi+12 +; CHECK-NEXT: s_add_u32 s0, s0, recurse@gotpcrel32@lo+4 +; CHECK-NEXT: s_addc_u32 s1, s1, recurse@gotpcrel32@hi+12 ; CHECK-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 ; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: s_swappc_b64 s[30:31], s[0:1] @@ -61,24 +61,9 @@ define amdgpu_cs_chain void @indirect(ptr %callee) { ; CHECK-NEXT: s_mov_b64 exec, s[8:9] ; CHECK-NEXT: s_mov_b64 exec, 0 ; CHECK-NEXT: s_setpc_b64 s[4:5] - call void @indirect(ptr null) + call void @recurse(ptr null) call void (ptr, i64, <3 x i32>, { i32, ptr addrspace(5), i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i64.v3i32.sl_i32p5i32i32s(ptr null, i64 0, <3 x i32> inreg zeroinitializer, { i32, ptr addrspace(5), i32, i32 } zeroinitializer, i32 0) unreachable } -define amdgpu_cs_chain void @fp_all() #0 { -; CHECK-LABEL: fp_all: -; CHECK: ; %bb.0: -; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; CHECK-NEXT: s_mov_b32 s0, 0 -; CHECK-NEXT: v_mov_b32_e32 v0, s0 -; CHECK-NEXT: scratch_store_dword off, v0, off -; CHECK-NEXT: s_endpgm - %v = alloca i32, align 4, addrspace(5) - store i32 0, ptr addrspace(5) %v, align 4 - ret void -} - -attributes #0 = { "frame-pointer"="all" } - declare void @llvm.amdgcn.cs.chain.p0.i64.v3i32.sl_i32p5i32i32s(ptr, i64, <3 x i32>, { i32, ptr addrspace(5), i32, i32 }, i32 immarg, ...) |