diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp index 3f92c1dbfbf4..8d7f777bb03a 100644 --- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp +++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp @@ -1841,21 +1841,24 @@ void AArch64AsmPrinter::emitFMov0(const MachineInstr &MI) { switch (MI.getOpcode()) { default: llvm_unreachable("Unexpected opcode"); case AArch64::FMOVH0: - FMov.setOpcode(STI->hasFullFP16() ? AArch64::FMOVWHr : AArch64::FMOVWSr); + FMov.setOpcode(AArch64::EOR_ZZZ); if (!STI->hasFullFP16()) DestReg = (AArch64::S0 + (DestReg - AArch64::H0)); FMov.addOperand(MCOperand::createReg(DestReg)); - FMov.addOperand(MCOperand::createReg(AArch64::WZR)); + FMov.addOperand(MCOperand::createReg(DestReg)); + FMov.addOperand(MCOperand::createReg(DestReg)); break; case AArch64::FMOVS0: - FMov.setOpcode(AArch64::FMOVWSr); + FMov.setOpcode(AArch64::EOR_ZZZ); + FMov.addOperand(MCOperand::createReg(DestReg)); + FMov.addOperand(MCOperand::createReg(DestReg)); FMov.addOperand(MCOperand::createReg(DestReg)); - FMov.addOperand(MCOperand::createReg(AArch64::WZR)); break; case AArch64::FMOVD0: - FMov.setOpcode(AArch64::FMOVXDr); + FMov.setOpcode(AArch64::EOR_ZZZ); + FMov.addOperand(MCOperand::createReg(DestReg)); + FMov.addOperand(MCOperand::createReg(DestReg)); FMov.addOperand(MCOperand::createReg(DestReg)); - FMov.addOperand(MCOperand::createReg(AArch64::XZR)); break; } EmitToStreamer(*OutStreamer, FMov); |