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| author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2016-11-03 03:23:55 +0000 |
|---|---|---|
| committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2016-11-03 03:23:55 +0000 |
| commit | caaceef4b381f0ebeda53889004662c802ce2cab (patch) | |
| tree | 87b26f0d305b68ba13b26290f2e3817d4486b004 /llvm/utils/TableGen/CodeGenTarget.cpp | |
| parent | 7c7abafd81df5a67c2cd30009b39abc692389504 (diff) | |
Expandload and Compressstore intrinsics
2 new intrinsics covering AVX-512 compress/expand functionality.
This implementation includes syntax, DAG builder, operation lowering and tests.
Does not include: handling of illegal data types, codegen prepare pass and the cost model.
llvm-svn: 285876
Diffstat (limited to 'llvm/utils/TableGen/CodeGenTarget.cpp')
| -rw-r--r-- | llvm/utils/TableGen/CodeGenTarget.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index 13c8c12a6c08..e87ffb730ecb 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -550,8 +550,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // overloaded, all the types can be specified directly. assert(((!TyEl->isSubClassOf("LLVMExtendedType") && !TyEl->isSubClassOf("LLVMTruncatedType") && - !TyEl->isSubClassOf("LLVMVectorSameWidth") && - !TyEl->isSubClassOf("LLVMPointerToElt")) || + !TyEl->isSubClassOf("LLVMVectorSameWidth")) || VT == MVT::iAny || VT == MVT::vAny) && "Expected iAny or vAny type"); } else |