diff options
| author | Mingming Liu <mingmingl@google.com> | 2025-09-10 15:25:31 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-10 15:25:31 -0700 |
| commit | 1417dafa1db9cb1b2b09438aa9f53ea5ab6e36e2 (patch) | |
| tree | 57f4b1f313c8cf74eed8819870f39c36ea263c68 /llvm/test/Transforms/InstCombine | |
| parent | 898b813bc8a6d0276bf0f4769f5f2f64b34e632d (diff) | |
| parent | b8cefcb601ddaa18482555c4ff363c01a270c2fe (diff) | |
Merge branch 'main' into users/mingmingl-llvm/samplefdo-profile-formatusers/mingmingl-llvm/samplefdo-profile-format
Diffstat (limited to 'llvm/test/Transforms/InstCombine')
59 files changed, 5809 insertions, 3510 deletions
diff --git a/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll b/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll index 0c8e2770ec7a..42b30eba1740 100644 --- a/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll +++ b/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll @@ -16,7 +16,7 @@ define i1 @print_pgm_cond_true(i32 %tmp12.reload, ptr %tmp16.out) { ; CHECK-NEXT: store i32 [[TMP16]], ptr [[TMP16_OUT]], align 4 ; CHECK-NEXT: ret i1 false ; CHECK: cond_true: -; CHECK-NEXT: [[TMP15:%.*]] = getelementptr [17 x i32], ptr @r, i32 0, i32 [[TMP12_RELOAD:%.*]] +; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr @r, i32 [[TMP12_RELOAD:%.*]] ; CHECK-NEXT: [[TMP16]] = load i32, ptr [[TMP15]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[TMP16]], -32 ; CHECK-NEXT: [[BOTHCOND:%.*]] = icmp ult i32 [[TMP0]], -63 @@ -53,7 +53,7 @@ define i1 @print_pgm_cond_true_logical(i32 %tmp12.reload, ptr %tmp16.out) { ; CHECK-NEXT: store i32 [[TMP16]], ptr [[TMP16_OUT]], align 4 ; CHECK-NEXT: ret i1 false ; CHECK: cond_true: -; CHECK-NEXT: [[TMP15:%.*]] = getelementptr [17 x i32], ptr @r, i32 0, i32 [[TMP12_RELOAD:%.*]] +; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i32, ptr @r, i32 [[TMP12_RELOAD:%.*]] ; CHECK-NEXT: [[TMP16]] = load i32, ptr [[TMP15]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[TMP16]], -32 ; CHECK-NEXT: [[BOTHCOND:%.*]] = icmp ult i32 [[TMP0]], -63 diff --git a/llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll b/llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll index ba3600524458..7e46f1f3c8d4 100644 --- a/llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll +++ b/llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll @@ -15,7 +15,7 @@ define ptr @foo(ptr %x, i32 %n) { define ptr @bar(i64 %n, ptr %p) { ; CHECK-LABEL: define ptr @bar( ; CHECK-SAME: i64 [[N:%.*]], ptr [[P:%.*]]) { -; CHECK-NEXT: [[G:%.*]] = getelementptr { {}, [0 x { [0 x i8] }] }, ptr [[P]], i64 0, i32 1, i64 0, i32 0, i64 [[N]] +; CHECK-NEXT: [[G:%.*]] = getelementptr i8, ptr [[P]], i64 [[N]] ; CHECK-NEXT: ret ptr [[G]] ; %g = getelementptr {{}, [0 x {[0 x i8]}]}, ptr %p, i64 %n, i32 1, i64 %n, i32 0, i64 %n diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll index a46887e7788f..968138e45b33 100644 --- a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll +++ b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll @@ -8,7 +8,7 @@ define i8 @memcpy_constant_arg_ptr_to_alloca(ptr addrspace(4) noalias readonly align 4 dereferenceable(32) %arg, i32 %idx) { ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[IDX:%.*]] to i64 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(4) [[ARG:%.*]], i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[ARG:%.*]], i64 [[TMP1]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(4) [[GEP]], align 1 ; CHECK-NEXT: ret i8 [[LOAD]] ; @@ -22,7 +22,7 @@ define i8 @memcpy_constant_arg_ptr_to_alloca(ptr addrspace(4) noalias readonly a define i8 @memcpy_constant_arg_ptr_to_alloca_load_metadata(ptr addrspace(4) noalias readonly align 4 dereferenceable(32) %arg, i32 %idx) { ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_load_metadata( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[IDX:%.*]] to i64 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(4) [[ARG:%.*]], i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[ARG:%.*]], i64 [[TMP1]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(4) [[GEP]], align 1, !noalias [[META0:![0-9]+]] ; CHECK-NEXT: ret i8 [[LOAD]] ; @@ -36,7 +36,7 @@ define i8 @memcpy_constant_arg_ptr_to_alloca_load_metadata(ptr addrspace(4) noal define i64 @memcpy_constant_arg_ptr_to_alloca_load_alignment(ptr addrspace(4) noalias readonly align 4 dereferenceable(256) %arg, i32 %idx) { ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_load_alignment( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[IDX:%.*]] to i64 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i64], ptr addrspace(4) [[ARG:%.*]], i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr addrspace(4) [[ARG:%.*]], i64 [[TMP1]] ; CHECK-NEXT: [[LOAD:%.*]] = load i64, ptr addrspace(4) [[GEP]], align 16 ; CHECK-NEXT: ret i64 [[LOAD]] ; @@ -51,7 +51,7 @@ define i64 @memcpy_constant_arg_ptr_to_alloca_load_atomic(ptr addrspace(4) noali ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_load_atomic( ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i64], align 8, addrspace(5) ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 8 dereferenceable(256) [[ALLOCA]], ptr addrspace(4) noundef align 8 dereferenceable(256) [[ARG:%.*]], i64 256, i1 false) -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i64], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr addrspace(5) [[ALLOCA]], i32 [[IDX:%.*]] ; CHECK-NEXT: [[LOAD:%.*]] = load atomic i64, ptr addrspace(5) [[GEP]] syncscope("somescope") acquire, align 8 ; CHECK-NEXT: ret i64 [[LOAD]] ; @@ -66,7 +66,7 @@ define i64 @memcpy_constant_arg_ptr_to_alloca_load_atomic(ptr addrspace(4) noali define i8 @memmove_constant_arg_ptr_to_alloca(ptr addrspace(4) noalias readonly align 4 dereferenceable(32) %arg, i32 %idx) { ; CHECK-LABEL: @memmove_constant_arg_ptr_to_alloca( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[IDX:%.*]] to i64 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(4) [[ARG:%.*]], i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[ARG:%.*]], i64 [[TMP1]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(4) [[GEP]], align 1 ; CHECK-NEXT: ret i8 [[LOAD]] ; @@ -81,7 +81,7 @@ define i8 @memmove_constant_arg_ptr_to_alloca(ptr addrspace(4) noalias readonly define amdgpu_kernel void @memcpy_constant_byref_arg_ptr_to_alloca(ptr addrspace(4) noalias readonly align 4 byref([32 x i8]) %arg, ptr addrspace(1) %out, i32 %idx) { ; CHECK-LABEL: @memcpy_constant_byref_arg_ptr_to_alloca( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[IDX:%.*]] to i64 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(4) [[ARG:%.*]], i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[ARG:%.*]], i64 [[TMP1]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(4) [[GEP]], align 1 ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 ; CHECK-NEXT: ret void @@ -99,7 +99,7 @@ define amdgpu_kernel void @memcpy_constant_byref_arg_ptr_to_alloca_too_many_byte ; CHECK-LABEL: @memcpy_constant_byref_arg_ptr_to_alloca_too_many_bytes( ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(31) [[ALLOCA]], ptr addrspace(4) noundef align 4 dereferenceable(31) [[ARG:%.*]], i64 31, i1 false) -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr addrspace(5) [[ALLOCA]], i32 [[IDX:%.*]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 ; CHECK-NEXT: ret void @@ -118,7 +118,7 @@ define amdgpu_kernel void @memcpy_constant_intrinsic_ptr_to_alloca(ptr addrspace ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) ; CHECK-NEXT: [[KERNARG_SEGMENT_PTR:%.*]] = call align 16 dereferenceable(32) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr() ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(32) [[ALLOCA]], ptr addrspace(4) noundef align 16 dereferenceable(32) [[KERNARG_SEGMENT_PTR]], i64 32, i1 false) -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr addrspace(5) [[ALLOCA]], i32 [[IDX:%.*]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 ; CHECK-NEXT: ret void @@ -136,7 +136,7 @@ define amdgpu_kernel void @memcpy_constant_intrinsic_ptr_to_alloca(ptr addrspace define i8 @memcpy_constant_arg_ptr_to_alloca_addrspacecast_to_flat(ptr addrspace(4) noalias readonly align 4 dereferenceable(32) %arg, i32 %idx) { ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_addrspacecast_to_flat( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[IDX:%.*]] to i64 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(4) [[ARG:%.*]], i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[ARG:%.*]], i64 [[TMP1]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(4) [[GEP]], align 1 ; CHECK-NEXT: ret i8 [[LOAD]] ; @@ -153,7 +153,7 @@ define i8 @memcpy_constant_arg_ptr_to_alloca_addrspacecast_to_flat2(ptr addrspac ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_addrspacecast_to_flat2( ; CHECK-NEXT: [[ALLOCA_CAST_ASC:%.*]] = addrspacecast ptr addrspace(4) [[ARG:%.*]] to ptr ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[IDX:%.*]] to i64 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr [[ALLOCA_CAST_ASC]], i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr [[ALLOCA_CAST_ASC]], i64 [[TMP1]] ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr [[GEP]], align 1 ; CHECK-NEXT: ret i8 [[LOAD]] ; diff --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll index d32f0e469050..346111d89297 100644 --- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll +++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll @@ -847,3 +847,16 @@ cond.end: %r = phi i32 [ %0, %cond.true ], [ 0, %entry ] ret i32 %r } + +; The AND should be removable based on range metadata. Make sure +; computeKnownBits doesn't lose this. +define i32 @abs_range_metadata(i32 %x) { +; CHECK-LABEL: @abs_range_metadata( +; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]] +; CHECK-NEXT: ret i32 [[B]] +; + %a = call i32 @llvm.abs.i32(i32 %x, i1 false), !range !1 + %b = and i32 %a, 15 + ret i32 %b +} +!1 = !{i32 0, i32 16} diff --git a/llvm/test/Transforms/InstCombine/canonicalize-gep-constglob.ll b/llvm/test/Transforms/InstCombine/canonicalize-gep-constglob.ll index 07c8a8c6b90e..129da3f9110a 100644 --- a/llvm/test/Transforms/InstCombine/canonicalize-gep-constglob.ll +++ b/llvm/test/Transforms/InstCombine/canonicalize-gep-constglob.ll @@ -35,9 +35,9 @@ define ptr @xzy(i64 %x, i64 %y, i64 %z) { ; CHECK-LABEL: define ptr @xzy( ; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]], i64 [[Z:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr inbounds [10 x [10 x [10 x i32]]], ptr getelementptr inbounds nuw (i8, ptr @glob, i64 40), i64 0, i64 [[X]] -; CHECK-NEXT: [[GEP_SPLIT1:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[GEP_SPLIT]], i64 0, i64 [[Z]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [10 x i32], ptr [[GEP_SPLIT1]], i64 0, i64 [[Y]] +; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr getelementptr inbounds nuw (i8, ptr @glob, i64 40), i64 [[X]] +; CHECK-NEXT: [[GEP_SPLIT1:%.*]] = getelementptr inbounds [10 x i32], ptr [[GEP_SPLIT]], i64 [[Z]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[GEP_SPLIT1]], i64 [[Y]] ; CHECK-NEXT: ret ptr [[GEP]] ; entry: @@ -49,7 +49,7 @@ define ptr @zerox(i64 %x) { ; CHECK-LABEL: define ptr @zerox( ; CHECK-SAME: i64 [[X:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [10 x i32], ptr getelementptr inbounds nuw (i8, ptr @glob, i64 32), i64 0, i64 [[X]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds nuw (i8, ptr @glob, i64 32), i64 [[X]] ; CHECK-NEXT: ret ptr [[GEP]] ; entry: diff --git a/llvm/test/Transforms/InstCombine/cast.ll b/llvm/test/Transforms/InstCombine/cast.ll index 42a764f2904e..cc0f2e79d204 100644 --- a/llvm/test/Transforms/InstCombine/cast.ll +++ b/llvm/test/Transforms/InstCombine/cast.ll @@ -150,7 +150,7 @@ lpad: define ptr @test13(i64 %A) { ; ALL-LABEL: @test13( -; ALL-NEXT: [[C:%.*]] = getelementptr [0 x i8], ptr @inbuf, i64 0, i64 [[A:%.*]] +; ALL-NEXT: [[C:%.*]] = getelementptr i8, ptr @inbuf, i64 [[A:%.*]] ; ALL-NEXT: ret ptr [[C]] ; %c = getelementptr [0 x i8], ptr @inbuf, i64 0, i64 %A diff --git a/llvm/test/Transforms/InstCombine/cast_phi.ll b/llvm/test/Transforms/InstCombine/cast_phi.ll index aafe5f57c4c7..a3f818e01320 100644 --- a/llvm/test/Transforms/InstCombine/cast_phi.ll +++ b/llvm/test/Transforms/InstCombine/cast_phi.ll @@ -9,9 +9,9 @@ define void @MainKernel(i32 %iNumSteps, i32 %tid, i32 %base) { ; CHECK-NEXT: [[CALLB:%.*]] = alloca [258 x float], align 4 ; CHECK-NEXT: [[CONV_I:%.*]] = uitofp i32 [[INUMSTEPS:%.*]] to float ; CHECK-NEXT: [[CONV_I12:%.*]] = zext i32 [[TID:%.*]] to i64 -; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I12]] +; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[CALLA]], i64 [[CONV_I12]] ; CHECK-NEXT: store float [[CONV_I]], ptr [[ARRAYIDX3]], align 4 -; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I12]] +; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds nuw float, ptr [[CALLB]], i64 [[CONV_I12]] ; CHECK-NEXT: store float [[CONV_I]], ptr [[ARRAYIDX6]], align 4 ; CHECK-NEXT: [[CMP7:%.*]] = icmp eq i32 [[TID]], 0 ; CHECK-NEXT: br i1 [[CMP7]], label [[DOTBB1:%.*]], label [[DOTBB2:%.*]] @@ -31,8 +31,8 @@ define void @MainKernel(i32 %iNumSteps, i32 %tid, i32 %base) { ; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[I12_06]], [[BASE:%.*]] ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[I12_06]], 1 ; CHECK-NEXT: [[CONV_I9:%.*]] = sext i32 [[ADD]] to i64 -; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]] -; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]] +; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds float, ptr [[CALLA]], i64 [[CONV_I9]] +; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds float, ptr [[CALLB]], i64 [[CONV_I9]] ; CHECK-NEXT: [[CMP40:%.*]] = icmp ult i32 [[I12_06]], [[BASE]] ; CHECK-NEXT: br i1 [[TMP3]], label [[DOTBB4:%.*]], label [[DOTBB5:%.*]] ; CHECK: .bb4: diff --git a/llvm/test/Transforms/InstCombine/freeze-fp-ops.ll b/llvm/test/Transforms/InstCombine/freeze-fp-ops.ll index d1a36dcef4d6..b1c6fc05e864 100644 --- a/llvm/test/Transforms/InstCombine/freeze-fp-ops.ll +++ b/llvm/test/Transforms/InstCombine/freeze-fp-ops.ll @@ -1,12 +1,13 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt -S -passes=instcombine < %s | FileCheck %s ; Test that floating point operations are not treated as sources of ; poison. define float @freeze_fneg(float %arg) { -; CHECK-LABEL: @freeze_fneg( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_fneg( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = fneg float [[ARG_FR]] ; CHECK-NEXT: ret float [[OP]] ; @@ -16,9 +17,10 @@ define float @freeze_fneg(float %arg) { } define float @freeze_fadd(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_fadd( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = fadd float [[ARG0_FR]], [[ARG1:%.*]] +; CHECK-LABEL: define float @freeze_fadd( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = fadd float [[ARG0_FR]], [[ARG1]] ; CHECK-NEXT: ret float [[OP]] ; %op = fadd float %arg0, %arg1 @@ -27,9 +29,10 @@ define float @freeze_fadd(float %arg0, float noundef %arg1) { } define float @freeze_fsub(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_fsub( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = fsub float [[ARG0_FR]], [[ARG1:%.*]] +; CHECK-LABEL: define float @freeze_fsub( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = fsub float [[ARG0_FR]], [[ARG1]] ; CHECK-NEXT: ret float [[OP]] ; %op = fsub float %arg0, %arg1 @@ -38,9 +41,10 @@ define float @freeze_fsub(float %arg0, float noundef %arg1) { } define float @freeze_fmul(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_fmul( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = fmul float [[ARG0_FR]], [[ARG1:%.*]] +; CHECK-LABEL: define float @freeze_fmul( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = fmul float [[ARG0_FR]], [[ARG1]] ; CHECK-NEXT: ret float [[OP]] ; %op = fmul float %arg0, %arg1 @@ -49,9 +53,10 @@ define float @freeze_fmul(float %arg0, float noundef %arg1) { } define float @freeze_fdiv(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_fdiv( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = fdiv float [[ARG0_FR]], [[ARG1:%.*]] +; CHECK-LABEL: define float @freeze_fdiv( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = fdiv float [[ARG0_FR]], [[ARG1]] ; CHECK-NEXT: ret float [[OP]] ; %op = fdiv float %arg0, %arg1 @@ -60,9 +65,10 @@ define float @freeze_fdiv(float %arg0, float noundef %arg1) { } define float @freeze_frem(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_frem( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = fdiv float [[ARG0_FR]], [[ARG1:%.*]] +; CHECK-LABEL: define float @freeze_frem( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = fdiv float [[ARG0_FR]], [[ARG1]] ; CHECK-NEXT: ret float [[OP]] ; %op = fdiv float %arg0, %arg1 @@ -71,8 +77,9 @@ define float @freeze_frem(float %arg0, float noundef %arg1) { } define double @fpext(float %arg) { -; CHECK-LABEL: @fpext( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define double @fpext( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = fpext float [[ARG_FR]] to double ; CHECK-NEXT: ret double [[OP]] ; @@ -82,8 +89,9 @@ define double @fpext(float %arg) { } define float @fptrunc(double %arg) { -; CHECK-LABEL: @fptrunc( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze double [[ARG:%.*]] +; CHECK-LABEL: define float @fptrunc( +; CHECK-SAME: double [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze double [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = fptrunc double [[ARG_FR]] to float ; CHECK-NEXT: ret float [[OP]] ; @@ -93,8 +101,9 @@ define float @fptrunc(double %arg) { } define float @sitofp(i32 %arg) { -; CHECK-LABEL: @sitofp( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define float @sitofp( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = sitofp i32 [[ARG_FR]] to float ; CHECK-NEXT: ret float [[OP]] ; @@ -104,8 +113,9 @@ define float @sitofp(i32 %arg) { } define float @uitofp(i32 %arg) { -; CHECK-LABEL: @uitofp( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define float @uitofp( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = uitofp i32 [[ARG_FR]] to float ; CHECK-NEXT: ret float [[OP]] ; @@ -115,9 +125,10 @@ define float @uitofp(i32 %arg) { } define float @freeze_fma(float %arg0, float noundef %arg1, float noundef %arg2) { -; CHECK-LABEL: @freeze_fma( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.fma.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]], float noundef [[ARG2:%.*]]) +; CHECK-LABEL: define float @freeze_fma( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]], float noundef [[ARG2:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.fma.f32(float [[ARG0_FR]], float noundef [[ARG1]], float noundef [[ARG2]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.fma.f32(float %arg0, float noundef %arg1, float noundef %arg2) @@ -126,9 +137,10 @@ define float @freeze_fma(float %arg0, float noundef %arg1, float noundef %arg2) } define float @freeze_fmuladd(float %arg0, float noundef %arg1, float noundef %arg2) { -; CHECK-LABEL: @freeze_fmuladd( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.fmuladd.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]], float noundef [[ARG2:%.*]]) +; CHECK-LABEL: define float @freeze_fmuladd( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]], float noundef [[ARG2:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.fmuladd.f32(float [[ARG0_FR]], float noundef [[ARG1]], float noundef [[ARG2]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.fmuladd.f32(float %arg0, float noundef %arg1, float noundef %arg2) @@ -137,8 +149,9 @@ define float @freeze_fmuladd(float %arg0, float noundef %arg1, float noundef %ar } define float @freeze_sqrt(float %arg) { -; CHECK-LABEL: @freeze_sqrt( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_sqrt( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.sqrt.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -148,10 +161,12 @@ define float @freeze_sqrt(float %arg) { } define float @freeze_powi(float %arg0, i32 %arg1) { -; CHECK-LABEL: @freeze_powi( -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.powi.f32.i32(float [[ARG0:%.*]], i32 [[ARG1:%.*]]) -; CHECK-NEXT: [[FREEZE:%.*]] = freeze float [[OP]] -; CHECK-NEXT: ret float [[FREEZE]] +; CHECK-LABEL: define float @freeze_powi( +; CHECK-SAME: float [[ARG0:%.*]], i32 [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[ARG1_FR:%.*]] = freeze i32 [[ARG1]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.powi.f32.i32(float [[ARG0_FR]], i32 [[ARG1_FR]]) +; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.powi.f32.i32(float %arg0, i32 %arg1) %freeze = freeze float %op @@ -159,8 +174,9 @@ define float @freeze_powi(float %arg0, i32 %arg1) { } define float @freeze_sin(float %arg) { -; CHECK-LABEL: @freeze_sin( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_sin( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.sin.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -170,8 +186,9 @@ define float @freeze_sin(float %arg) { } define float @freeze_cos(float %arg) { -; CHECK-LABEL: @freeze_cos( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_cos( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.cos.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -181,9 +198,10 @@ define float @freeze_cos(float %arg) { } define float @freeze_pow(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_pow( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.pow.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]]) +; CHECK-LABEL: define float @freeze_pow( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.pow.f32(float [[ARG0_FR]], float noundef [[ARG1]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.pow.f32(float %arg0, float noundef %arg1) @@ -192,8 +210,9 @@ define float @freeze_pow(float %arg0, float noundef %arg1) { } define float @freeze_log(float %arg) { -; CHECK-LABEL: @freeze_log( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_log( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.log.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -203,8 +222,9 @@ define float @freeze_log(float %arg) { } define float @freeze_log10(float %arg) { -; CHECK-LABEL: @freeze_log10( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_log10( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.log10.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -214,8 +234,9 @@ define float @freeze_log10(float %arg) { } define float @freeze_log2(float %arg) { -; CHECK-LABEL: @freeze_log2( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_log2( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.log2.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -225,8 +246,9 @@ define float @freeze_log2(float %arg) { } define float @freeze_exp(float %arg) { -; CHECK-LABEL: @freeze_exp( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_exp( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.exp.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -236,8 +258,9 @@ define float @freeze_exp(float %arg) { } define float @freeze_exp2(float %arg) { -; CHECK-LABEL: @freeze_exp2( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_exp2( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.exp2.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -247,8 +270,9 @@ define float @freeze_exp2(float %arg) { } define float @freeze_exp10(float %arg) { -; CHECK-LABEL: @freeze_exp10( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_exp10( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.exp10.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -258,8 +282,9 @@ define float @freeze_exp10(float %arg) { } define float @freeze_fabs(float %arg) { -; CHECK-LABEL: @freeze_fabs( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_fabs( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.fabs.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -269,9 +294,10 @@ define float @freeze_fabs(float %arg) { } define float @freeze_copysign(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_copysign( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.copysign.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]]) +; CHECK-LABEL: define float @freeze_copysign( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.copysign.f32(float [[ARG0_FR]], float noundef [[ARG1]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.copysign.f32(float %arg0, float noundef %arg1) @@ -280,8 +306,9 @@ define float @freeze_copysign(float %arg0, float noundef %arg1) { } define float @freeze_floor(float %arg) { -; CHECK-LABEL: @freeze_floor( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_floor( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.floor.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -291,8 +318,9 @@ define float @freeze_floor(float %arg) { } define float @freeze_ceil(float %arg) { -; CHECK-LABEL: @freeze_ceil( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_ceil( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.ceil.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -302,8 +330,9 @@ define float @freeze_ceil(float %arg) { } define float @freeze_trunc(float %arg) { -; CHECK-LABEL: @freeze_trunc( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_trunc( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.trunc.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -313,8 +342,9 @@ define float @freeze_trunc(float %arg) { } define float @freeze_rint(float %arg) { -; CHECK-LABEL: @freeze_rint( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_rint( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.rint.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -324,8 +354,9 @@ define float @freeze_rint(float %arg) { } define float @freeze_nearbyint(float %arg) { -; CHECK-LABEL: @freeze_nearbyint( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_nearbyint( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.nearbyint.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -335,8 +366,9 @@ define float @freeze_nearbyint(float %arg) { } define float @freeze_round(float %arg) { -; CHECK-LABEL: @freeze_round( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_round( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.round.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -346,8 +378,9 @@ define float @freeze_round(float %arg) { } define float @freeze_roundeven(float %arg) { -; CHECK-LABEL: @freeze_roundeven( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_roundeven( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.roundeven.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -357,8 +390,9 @@ define float @freeze_roundeven(float %arg) { } define float @freeze_canonicalize(float %arg) { -; CHECK-LABEL: @freeze_canonicalize( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_canonicalize( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.canonicalize.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -368,8 +402,9 @@ define float @freeze_canonicalize(float %arg) { } define float @freeze_arithmetic_fence(float %arg) { -; CHECK-LABEL: @freeze_arithmetic_fence( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @freeze_arithmetic_fence( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.arithmetic.fence.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret float [[OP]] ; @@ -379,8 +414,9 @@ define float @freeze_arithmetic_fence(float %arg) { } define i32 @freeze_lround(float %arg) { -; CHECK-LABEL: @freeze_lround( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define i32 @freeze_lround( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call i32 @llvm.lround.i32.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret i32 [[OP]] ; @@ -390,8 +426,9 @@ define i32 @freeze_lround(float %arg) { } define i32 @freeze_llround(float %arg) { -; CHECK-LABEL: @freeze_llround( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define i32 @freeze_llround( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call i32 @llvm.llround.i32.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret i32 [[OP]] ; @@ -401,8 +438,9 @@ define i32 @freeze_llround(float %arg) { } define i32 @freeze_lrint(float %arg) { -; CHECK-LABEL: @freeze_lrint( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define i32 @freeze_lrint( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call i32 @llvm.lrint.i32.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret i32 [[OP]] ; @@ -412,8 +450,9 @@ define i32 @freeze_lrint(float %arg) { } define i32 @freeze_llrint(float %arg) { -; CHECK-LABEL: @freeze_llrint( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define i32 @freeze_llrint( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[OP:%.*]] = call i32 @llvm.llrint.i32.f32(float [[ARG_FR]]) ; CHECK-NEXT: ret i32 [[OP]] ; @@ -423,8 +462,9 @@ define i32 @freeze_llrint(float %arg) { } define i32 @freeze_noundef_lround(float %arg) { -; CHECK-LABEL: @freeze_noundef_lround( -; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.lround.i32.f32(float [[ARG:%.*]]) +; CHECK-LABEL: define i32 @freeze_noundef_lround( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.lround.i32.f32(float [[ARG]]) ; CHECK-NEXT: ret i32 [[OP]] ; %op = call noundef i32 @llvm.lround.i32.f32(float %arg) @@ -433,8 +473,9 @@ define i32 @freeze_noundef_lround(float %arg) { } define i32 @freeze_noundef_llround(float %arg) { -; CHECK-LABEL: @freeze_noundef_llround( -; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.llround.i32.f32(float [[ARG:%.*]]) +; CHECK-LABEL: define i32 @freeze_noundef_llround( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.llround.i32.f32(float [[ARG]]) ; CHECK-NEXT: ret i32 [[OP]] ; %op = call noundef i32 @llvm.llround.i32.f32(float %arg) @@ -443,8 +484,9 @@ define i32 @freeze_noundef_llround(float %arg) { } define i32 @freeze_noundef_lrint(float %arg) { -; CHECK-LABEL: @freeze_noundef_lrint( -; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.lrint.i32.f32(float [[ARG:%.*]]) +; CHECK-LABEL: define i32 @freeze_noundef_lrint( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.lrint.i32.f32(float [[ARG]]) ; CHECK-NEXT: ret i32 [[OP]] ; %op = call noundef i32 @llvm.lrint.i32.f32(float %arg) @@ -453,8 +495,9 @@ define i32 @freeze_noundef_lrint(float %arg) { } define i32 @freeze_noundef_llrint(float %arg) { -; CHECK-LABEL: @freeze_noundef_llrint( -; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.llrint.i32.f32(float [[ARG:%.*]]) +; CHECK-LABEL: define i32 @freeze_noundef_llrint( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[OP:%.*]] = call noundef i32 @llvm.llrint.i32.f32(float [[ARG]]) ; CHECK-NEXT: ret i32 [[OP]] ; %op = call noundef i32 @llvm.llrint.i32.f32(float %arg) @@ -463,9 +506,10 @@ define i32 @freeze_noundef_llrint(float %arg) { } define float @freeze_minnum(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_minnum( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.minnum.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]]) +; CHECK-LABEL: define float @freeze_minnum( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.minnum.f32(float [[ARG0_FR]], float noundef [[ARG1]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.minnum.f32(float %arg0, float noundef %arg1) @@ -474,9 +518,10 @@ define float @freeze_minnum(float %arg0, float noundef %arg1) { } define float @freeze_maxnum(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_maxnum( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.maxnum.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]]) +; CHECK-LABEL: define float @freeze_maxnum( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.maxnum.f32(float [[ARG0_FR]], float noundef [[ARG1]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.maxnum.f32(float %arg0, float noundef %arg1) @@ -485,9 +530,10 @@ define float @freeze_maxnum(float %arg0, float noundef %arg1) { } define float @freeze_minimum(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_minimum( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.minimum.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]]) +; CHECK-LABEL: define float @freeze_minimum( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.minimum.f32(float [[ARG0_FR]], float noundef [[ARG1]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.minimum.f32(float %arg0, float noundef %arg1) @@ -496,9 +542,10 @@ define float @freeze_minimum(float %arg0, float noundef %arg1) { } define float @freeze_maximum(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_maximum( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.maximum.f32(float [[ARG0_FR]], float noundef [[ARG1:%.*]]) +; CHECK-LABEL: define float @freeze_maximum( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.maximum.f32(float [[ARG0_FR]], float noundef [[ARG1]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.maximum.f32(float %arg0, float noundef %arg1) @@ -507,10 +554,11 @@ define float @freeze_maximum(float %arg0, float noundef %arg1) { } define float @freeze_minimumnum(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_minimumnum( -; CHECK-NEXT: [[FREEZE:%.*]] = freeze float [[OP:%.*]] -; CHECK-NEXT: [[OP1:%.*]] = call float @llvm.minimumnum.f32(float [[FREEZE]], float noundef [[ARG1:%.*]]) -; CHECK-NEXT: ret float [[OP1]] +; CHECK-LABEL: define float @freeze_minimumnum( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.minimumnum.f32(float [[ARG0_FR]], float noundef [[ARG1]]) +; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.minimumnum.f32(float %arg0, float noundef %arg1) %freeze = freeze float %op @@ -518,10 +566,11 @@ define float @freeze_minimumnum(float %arg0, float noundef %arg1) { } define float @freeze_maximumnum(float %arg0, float noundef %arg1) { -; CHECK-LABEL: @freeze_maximumnum( -; CHECK-NEXT: [[FREEZE:%.*]] = freeze float [[OP:%.*]] -; CHECK-NEXT: [[OP1:%.*]] = call float @llvm.maximumnum.f32(float [[FREEZE]], float noundef [[ARG1:%.*]]) -; CHECK-NEXT: ret float [[OP1]] +; CHECK-LABEL: define float @freeze_maximumnum( +; CHECK-SAME: float [[ARG0:%.*]], float noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.maximumnum.f32(float [[ARG0_FR]], float noundef [[ARG1]]) +; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.maximumnum.f32(float %arg0, float noundef %arg1) %freeze = freeze float %op @@ -529,8 +578,9 @@ define float @freeze_maximumnum(float %arg0, float noundef %arg1) { } define i1 @freeze_isfpclass(float %arg0) { -; CHECK-LABEL: @freeze_isfpclass( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] +; CHECK-LABEL: define i1 @freeze_isfpclass( +; CHECK-SAME: float [[ARG0:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] ; CHECK-NEXT: [[OP:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG0_FR]], i32 27) ; CHECK-NEXT: ret i1 [[OP]] ; @@ -540,8 +590,9 @@ define i1 @freeze_isfpclass(float %arg0) { } define float @freeze_fptrunc_round(double %arg0) { -; CHECK-LABEL: @freeze_fptrunc_round( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze double [[ARG0:%.*]] +; CHECK-LABEL: define float @freeze_fptrunc_round( +; CHECK-SAME: double [[ARG0:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze double [[ARG0]] ; CHECK-NEXT: [[OP:%.*]] = call float @llvm.fptrunc.round.f32.f64(double [[ARG0_FR]], metadata !"round.downward") ; CHECK-NEXT: ret float [[OP]] ; @@ -551,9 +602,10 @@ define float @freeze_fptrunc_round(double %arg0) { } define float @freeze_ldexp(float %arg0, i32 noundef %arg1) { -; CHECK-LABEL: @freeze_ldexp( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] -; CHECK-NEXT: [[OP:%.*]] = call float @llvm.ldexp.f32.i32(float [[ARG0_FR]], i32 [[ARG1:%.*]]) +; CHECK-LABEL: define float @freeze_ldexp( +; CHECK-SAME: float [[ARG0:%.*]], i32 noundef [[ARG1:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] +; CHECK-NEXT: [[OP:%.*]] = call float @llvm.ldexp.f32.i32(float [[ARG0_FR]], i32 [[ARG1]]) ; CHECK-NEXT: ret float [[OP]] ; %op = call float @llvm.ldexp.f32.i32(float %arg0, i32 %arg1) @@ -562,8 +614,9 @@ define float @freeze_ldexp(float %arg0, i32 noundef %arg1) { } define { float, i32 } @freeze_frexp(float %arg0) { -; CHECK-LABEL: @freeze_frexp( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] +; CHECK-LABEL: define { float, i32 } @freeze_frexp( +; CHECK-SAME: float [[ARG0:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] ; CHECK-NEXT: [[OP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[ARG0_FR]]) ; CHECK-NEXT: ret { float, i32 } [[OP]] ; @@ -573,8 +626,9 @@ define { float, i32 } @freeze_frexp(float %arg0) { } define float @freeze_frexp_0(float %arg0) { -; CHECK-LABEL: @freeze_frexp_0( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] +; CHECK-LABEL: define float @freeze_frexp_0( +; CHECK-SAME: float [[ARG0:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] ; CHECK-NEXT: [[OP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[ARG0_FR]]) ; CHECK-NEXT: [[EXTRACT_0:%.*]] = extractvalue { float, i32 } [[OP]], 0 ; CHECK-NEXT: ret float [[EXTRACT_0]] @@ -586,8 +640,9 @@ define float @freeze_frexp_0(float %arg0) { } define i32 @freeze_frexp_1(float %arg0) { -; CHECK-LABEL: @freeze_frexp_1( -; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0:%.*]] +; CHECK-LABEL: define i32 @freeze_frexp_1( +; CHECK-SAME: float [[ARG0:%.*]]) { +; CHECK-NEXT: [[ARG0_FR:%.*]] = freeze float [[ARG0]] ; CHECK-NEXT: [[OP:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[ARG0_FR]]) ; CHECK-NEXT: [[EXTRACT_1:%.*]] = extractvalue { float, i32 } [[OP]], 1 ; CHECK-NEXT: ret i32 [[EXTRACT_1]] diff --git a/llvm/test/Transforms/InstCombine/freeze-landingpad.ll b/llvm/test/Transforms/InstCombine/freeze-landingpad.ll index 7221dc14dfaf..29167958c857 100644 --- a/llvm/test/Transforms/InstCombine/freeze-landingpad.ll +++ b/llvm/test/Transforms/InstCombine/freeze-landingpad.ll @@ -9,17 +9,17 @@ define i32 @propagate_freeze_in_landingpad() personality ptr null { ; CHECK: invoke.bb1: ; CHECK-NEXT: [[X:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[NORMAL_RETURN:%.*]] ] ; CHECK-NEXT: [[RES0:%.*]] = invoke i32 @foo() -; CHECK-NEXT: to label [[INVOKE_BB2:%.*]] unwind label [[EXCEPTIONAL_RETURN:%.*]] +; CHECK-NEXT: to label [[INVOKE_BB2:%.*]] unwind label [[EXCEPTIONAL_RETURN:%.*]] ; CHECK: invoke.bb2: ; CHECK-NEXT: [[RES1:%.*]] = invoke i32 @foo() -; CHECK-NEXT: to label [[NORMAL_RETURN]] unwind label [[EXCEPTIONAL_RETURN]] +; CHECK-NEXT: to label [[NORMAL_RETURN]] unwind label [[EXCEPTIONAL_RETURN]] ; CHECK: normal_return: ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[X]], 1 ; CHECK-NEXT: br label [[INVOKE_BB1]] ; CHECK: exceptional_return: ; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], [[INVOKE_BB1]] ], [ 0, [[INVOKE_BB2]] ] ; CHECK-NEXT: [[LANDING_PAD:%.*]] = landingpad { ptr, i32 } -; CHECK-NEXT: cleanup +; CHECK-NEXT: cleanup ; CHECK-NEXT: [[FR:%.*]] = freeze i32 [[PHI]] ; CHECK-NEXT: [[RES:%.*]] = shl i32 [[FR]], 1 ; CHECK-NEXT: ret i32 [[RES]] diff --git a/llvm/test/Transforms/InstCombine/freeze.ll b/llvm/test/Transforms/InstCombine/freeze.ll index 3fedead2feab..af5cb0c75537 100644 --- a/llvm/test/Transforms/InstCombine/freeze.ll +++ b/llvm/test/Transforms/InstCombine/freeze.ll @@ -1,9 +1,10 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s define i32 @fold(i32 %x) { -; CHECK-LABEL: @fold( -; CHECK-NEXT: [[Y:%.*]] = freeze i32 [[X:%.*]] +; CHECK-LABEL: define i32 @fold( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: ret i32 [[Y]] ; %y = freeze i32 %x @@ -12,7 +13,7 @@ define i32 @fold(i32 %x) { } define i32 @make_const() { -; CHECK-LABEL: @make_const( +; CHECK-LABEL: define i32 @make_const() { ; CHECK-NEXT: ret i32 10 ; %x = freeze i32 10 @@ -20,7 +21,8 @@ define i32 @make_const() { } define i32 @and_freeze_undef(i32 %x) { -; CHECK-LABEL: @and_freeze_undef( +; CHECK-LABEL: define i32 @and_freeze_undef( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i32 0 ; %f = freeze i32 undef @@ -32,7 +34,8 @@ declare void @use_i32(i32) declare void @use_p32(ptr) define i32 @and_freeze_undef_multipleuses(i32 %x) { -; CHECK-LABEL: @and_freeze_undef_multipleuses( +; CHECK-LABEL: define i32 @and_freeze_undef_multipleuses( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: call void @use_i32(i32 0) ; CHECK-NEXT: ret i32 0 ; @@ -43,7 +46,8 @@ define i32 @and_freeze_undef_multipleuses(i32 %x) { } define i32 @or_freeze_undef(i32 %x) { -; CHECK-LABEL: @or_freeze_undef( +; CHECK-LABEL: define i32 @or_freeze_undef( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i32 -1 ; %f = freeze i32 undef @@ -52,9 +56,10 @@ define i32 @or_freeze_undef(i32 %x) { } define i32 @or_freeze_undef_multipleuses(i32 %x) { -; CHECK-LABEL: @or_freeze_undef_multipleuses( +; CHECK-LABEL: define i32 @or_freeze_undef_multipleuses( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: call void @use_i32(i32 0) -; CHECK-NEXT: ret i32 [[X:%.*]] +; CHECK-NEXT: ret i32 [[X]] ; %f = freeze i32 undef %res = or i32 %x, %f @@ -65,8 +70,9 @@ define i32 @or_freeze_undef_multipleuses(i32 %x) { declare void @use_i32_i1(i32, i1) define void @or_select_multipleuses(i32 %x, i1 %y) { -; CHECK-LABEL: @or_select_multipleuses( -; CHECK-NEXT: call void @use_i32_i1(i32 32, i1 [[Y:%.*]]) +; CHECK-LABEL: define void @or_select_multipleuses( +; CHECK-SAME: i32 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: call void @use_i32_i1(i32 32, i1 [[Y]]) ; CHECK-NEXT: ret void ; %f = freeze i1 undef @@ -77,8 +83,9 @@ define void @or_select_multipleuses(i32 %x, i1 %y) { } define void @or_select_multipleuses_logical(i32 %x, i1 %y) { -; CHECK-LABEL: @or_select_multipleuses_logical( -; CHECK-NEXT: call void @use_i32_i1(i32 32, i1 [[Y:%.*]]) +; CHECK-LABEL: define void @or_select_multipleuses_logical( +; CHECK-SAME: i32 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: call void @use_i32_i1(i32 32, i1 [[Y]]) ; CHECK-NEXT: ret void ; %f = freeze i1 undef @@ -89,7 +96,7 @@ define void @or_select_multipleuses_logical(i32 %x, i1 %y) { } define <3 x i4> @partial_undef_vec() { -; CHECK-LABEL: @partial_undef_vec( +; CHECK-LABEL: define <3 x i4> @partial_undef_vec() { ; CHECK-NEXT: ret <3 x i4> splat (i4 1) ; %f = freeze <3 x i4> <i4 poison, i4 1, i4 undef> @@ -99,10 +106,12 @@ define <3 x i4> @partial_undef_vec() { ; Move the freeze forward to prevent poison from spreading. define i32 @early_freeze_test1(i32 %x, i32 %y) { -; CHECK-LABEL: @early_freeze_test1( -; CHECK-NEXT: [[V1:%.*]] = add i32 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]] -; CHECK-NEXT: [[V2:%.*]] = shl i32 [[V1_FR]], 1 +; CHECK-LABEL: define i32 @early_freeze_test1( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X]] +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[V1:%.*]] = add i32 [[X_FR]], [[Y_FR]] +; CHECK-NEXT: [[V2:%.*]] = shl i32 [[V1]], 1 ; CHECK-NEXT: [[V3:%.*]] = and i32 [[V2]], 2 ; CHECK-NEXT: ret i32 [[V3]] ; @@ -114,8 +123,9 @@ define i32 @early_freeze_test1(i32 %x, i32 %y) { } define i1 @early_freeze_test2(ptr %ptr) { -; CHECK-LABEL: @early_freeze_test2( -; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR:%.*]], align 4 +; CHECK-LABEL: define i1 @early_freeze_test2( +; CHECK-SAME: ptr [[PTR:%.*]]) { +; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[PTR]], align 4 ; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]] ; CHECK-NEXT: [[V2:%.*]] = and i32 [[V1_FR]], 1 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[V2]], 0 @@ -129,8 +139,9 @@ define i1 @early_freeze_test2(ptr %ptr) { } define i32 @early_freeze_test3(i32 %v1) { -; CHECK-LABEL: @early_freeze_test3( -; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1:%.*]] +; CHECK-LABEL: define i32 @early_freeze_test3( +; CHECK-SAME: i32 [[V1:%.*]]) { +; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]] ; CHECK-NEXT: [[V2:%.*]] = shl i32 [[V1_FR]], 1 ; CHECK-NEXT: [[V4:%.*]] = add i32 [[V2]], 3 ; CHECK-NEXT: ret i32 [[V4]] @@ -143,10 +154,11 @@ define i32 @early_freeze_test3(i32 %v1) { } define i32 @early_freeze_test4(i32 %v1) { -; CHECK-LABEL: @early_freeze_test4( -; CHECK-NEXT: [[V2_FR:%.*]] = freeze i32 [[V2:%.*]] -; CHECK-NEXT: [[V3:%.*]] = mul i32 [[V2_FR]], [[V2_FR]] -; CHECK-NEXT: ret i32 [[V3]] +; CHECK-LABEL: define i32 @early_freeze_test4( +; CHECK-SAME: i32 [[V1:%.*]]) { +; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]] +; CHECK-NEXT: [[V2:%.*]] = mul i32 [[V1_FR]], [[V1_FR]] +; CHECK-NEXT: ret i32 [[V2]] ; %v2 = mul i32 %v1, %v1 %v2.fr = freeze i32 %v2 @@ -156,8 +168,9 @@ define i32 @early_freeze_test4(i32 %v1) { ; If replace all dominated uses of v to freeze(v). define void @freeze_dominated_uses_test1(i32 %v) { -; CHECK-LABEL: @freeze_dominated_uses_test1( -; CHECK-NEXT: [[V_FR:%.*]] = freeze i32 [[V:%.*]] +; CHECK-LABEL: define void @freeze_dominated_uses_test1( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[V_FR:%.*]] = freeze i32 [[V]] ; CHECK-NEXT: call void @use_i32(i32 [[V_FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[V_FR]]) ; CHECK-NEXT: ret void @@ -169,22 +182,23 @@ define void @freeze_dominated_uses_test1(i32 %v) { } define void @freeze_dominated_uses_test2(i32 %v) { -; CHECK-LABEL: @freeze_dominated_uses_test2( -; CHECK-NEXT: entry: +; CHECK-LABEL: define void @freeze_dominated_uses_test2( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 -; CHECK-NEXT: [[V_FR:%.*]] = freeze i32 [[V:%.*]] +; CHECK-NEXT: [[V_FR:%.*]] = freeze i32 [[V]] ; CHECK-NEXT: call void @use_p32(ptr nonnull [[A]]) ; CHECK-NEXT: call void @use_i32(i32 [[V_FR]]) ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[V_FR]], 0 -; CHECK-NEXT: br i1 [[COND]], label [[BB0:%.*]], label [[BB1:%.*]] -; CHECK: bb0: +; CHECK-NEXT: br i1 [[COND]], label %[[BB_0:.*]], label %[[BB_1:.*]] +; CHECK: [[BB_0]]: ; CHECK-NEXT: call void @use_i32(i32 [[V_FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[V_FR]]) -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: bb1: +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[BB_1]]: ; CHECK-NEXT: call void @use_i32(i32 [[V_FR]]) -; CHECK-NEXT: br label [[END]] -; CHECK: end: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: ; CHECK-NEXT: ret void ; entry: @@ -192,15 +206,15 @@ entry: call void @use_p32(ptr %a) call void @use_i32(i32 %v) %cond = icmp eq i32 %v, 0 - br i1 %cond, label %bb0, label %bb1 + br i1 %cond, label %bb.0, label %bb.1 -bb0: +bb.0: %v.fr = freeze i32 %v call void @use_i32(i32 %v.fr) call void @use_i32(i32 %v) br label %end -bb1: +bb.1: call void @use_i32(i32 %v) br label %end @@ -211,31 +225,32 @@ end: ; If there is a duplicate freeze, it will be removed. define void @freeze_dominated_uses_test3(i32 %v, i1 %cond) { -; CHECK-LABEL: @freeze_dominated_uses_test3( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[V_FR1:%.*]] = freeze i32 [[V:%.*]] +; CHECK-LABEL: define void @freeze_dominated_uses_test3( +; CHECK-SAME: i32 [[V:%.*]], i1 [[COND:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[V_FR1:%.*]] = freeze i32 [[V]] ; CHECK-NEXT: call void @use_i32(i32 [[V_FR1]]) -; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB0:%.*]], label [[BB1:%.*]] -; CHECK: bb0: +; CHECK-NEXT: br i1 [[COND]], label %[[BB_0:.*]], label %[[BB_1:.*]] +; CHECK: [[BB_0]]: ; CHECK-NEXT: call void @use_i32(i32 [[V_FR1]]) -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: bb1: +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[BB_1]]: ; CHECK-NEXT: call void @use_i32(i32 [[V_FR1]]) -; CHECK-NEXT: br label [[END]] -; CHECK: end: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: ; CHECK-NEXT: ret void ; entry: %v.fr1 = freeze i32 %v call void @use_i32(i32 %v.fr1) - br i1 %cond, label %bb0, label %bb1 + br i1 %cond, label %bb.0, label %bb.1 -bb0: +bb.0: %v.fr2 = freeze i32 %v call void @use_i32(i32 %v.fr2) br label %end -bb1: +bb.1: call void @use_i32(i32 %v) br label %end @@ -246,28 +261,29 @@ end: declare i32 @__CxxFrameHandler3(...) define void @freeze_dominated_uses_catchswitch(i1 %c, i32 %x) personality ptr @__CxxFrameHandler3 { -; CHECK-LABEL: @freeze_dominated_uses_catchswitch( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] -; CHECK: if.then: +; CHECK-LABEL: define void @freeze_dominated_uses_catchswitch( +; CHECK-SAME: i1 [[C:%.*]], i32 [[X:%.*]]) personality ptr @__CxxFrameHandler3 { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[C]], label %[[IF_THEN:.*]], label %[[IF_ELSE:.*]] +; CHECK: [[IF_THEN]]: ; CHECK-NEXT: invoke void @use_i32(i32 0) -; CHECK-NEXT: to label [[CLEANUP:%.*]] unwind label [[CATCH_DISPATCH:%.*]] -; CHECK: if.else: +; CHECK-NEXT: to label %[[CLEANUP:.*]] unwind label %[[CATCH_DISPATCH:.*]] +; CHECK: [[IF_ELSE]]: ; CHECK-NEXT: invoke void @use_i32(i32 1) -; CHECK-NEXT: to label [[CLEANUP]] unwind label [[CATCH_DISPATCH]] -; CHECK: catch.dispatch: -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ [[X:%.*]], [[IF_ELSE]] ] -; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label [[CATCH:%.*]], label %catch2] unwind to caller -; CHECK: catch: +; CHECK-NEXT: to label %[[CLEANUP]] unwind label %[[CATCH_DISPATCH]] +; CHECK: [[CATCH_DISPATCH]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, %[[IF_THEN]] ], [ [[X]], %[[IF_ELSE]] ] +; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label %[[CATCH:.*]], label %catch2] unwind to caller +; CHECK: [[CATCH]]: ; CHECK-NEXT: [[CP:%.*]] = catchpad within [[CS]] [ptr null, i32 64, ptr null] ; CHECK-NEXT: [[PHI_FREEZE:%.*]] = freeze i32 [[PHI]] ; CHECK-NEXT: call void @use_i32(i32 [[PHI_FREEZE]]) [ "funclet"(token [[CP]]) ] ; CHECK-NEXT: unreachable -; CHECK: catch2: +; CHECK: [[CATCH2:.*:]] ; CHECK-NEXT: [[CP2:%.*]] = catchpad within [[CS]] [ptr null, i32 64, ptr null] ; CHECK-NEXT: call void @use_i32(i32 [[PHI]]) [ "funclet"(token [[CP2]]) ] ; CHECK-NEXT: unreachable -; CHECK: cleanup: +; CHECK: [[CLEANUP]]: ; CHECK-NEXT: ret void ; entry: @@ -303,16 +319,17 @@ cleanup: declare i32 @get_i32() define i32 @freeze_use_in_different_branches(i1 %c) { -; CHECK-LABEL: @freeze_use_in_different_branches( -; CHECK-NEXT: entry: +; CHECK-LABEL: define i32 @freeze_use_in_different_branches( +; CHECK-SAME: i1 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: [[X:%.*]] = call i32 @get_i32() ; CHECK-NEXT: [[FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: call void @use_i32(i32 0) -; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[ELSE:%.*]] -; CHECK: if: +; CHECK-NEXT: br i1 [[C]], label %[[IF:.*]], label %[[ELSE:.*]] +; CHECK: [[IF]]: ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: ret i32 0 -; CHECK: else: +; CHECK: [[ELSE]]: ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: ret i32 1 @@ -334,16 +351,17 @@ else: } define i32 @freeze_phi_use(i1 %c) { -; CHECK-LABEL: @freeze_phi_use( -; CHECK-NEXT: entry: +; CHECK-LABEL: define i32 @freeze_phi_use( +; CHECK-SAME: i1 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: ; CHECK-NEXT: [[X:%.*]] = call i32 @get_i32() ; CHECK-NEXT: [[FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: call void @use_i32(i32 0) -; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[JOIN:%.*]] -; CHECK: if: -; CHECK-NEXT: br label [[JOIN]] -; CHECK: join: -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[FR]], [[IF]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: br i1 [[C]], label %[[IF:.*]], label %[[JOIN:.*]] +; CHECK: [[IF]]: +; CHECK-NEXT: br label %[[JOIN]] +; CHECK: [[JOIN]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[FR]], %[[IF]] ], [ 0, %[[ENTRY]] ] ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: ret i32 [[PHI]] ; @@ -363,14 +381,15 @@ join: } define i32 @freeze_phi_followed_by_phi(i1 %c, i32 %y, i32 %z) { -; CHECK-LABEL: @freeze_phi_followed_by_phi( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[JOIN:%.*]] -; CHECK: if: -; CHECK-NEXT: br label [[JOIN]] -; CHECK: join: -; CHECK-NEXT: [[X:%.*]] = phi i32 [ [[Y:%.*]], [[IF]] ], [ [[Z:%.*]], [[ENTRY:%.*]] ] -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[Z]], [[IF]] ], [ [[Y]], [[ENTRY]] ] +; CHECK-LABEL: define i32 @freeze_phi_followed_by_phi( +; CHECK-SAME: i1 [[C:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[C]], label %[[IF:.*]], label %[[JOIN:.*]] +; CHECK: [[IF]]: +; CHECK-NEXT: br label %[[JOIN]] +; CHECK: [[JOIN]]: +; CHECK-NEXT: [[X:%.*]] = phi i32 [ [[Y]], %[[IF]] ], [ [[Z]], %[[ENTRY]] ] +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[Z]], %[[IF]] ], [ [[Y]], %[[ENTRY]] ] ; CHECK-NEXT: [[FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) @@ -392,17 +411,18 @@ join: } define i32 @freeze_invoke_use_in_phi(i1 %c) personality ptr undef { -; CHECK-LABEL: @freeze_invoke_use_in_phi( -; CHECK-NEXT: entry: +; CHECK-LABEL: define i32 @freeze_invoke_use_in_phi( +; CHECK-SAME: i1 [[C:%.*]]) personality ptr undef { +; CHECK-NEXT: [[ENTRY:.*]]: ; CHECK-NEXT: [[X:%.*]] = invoke i32 @get_i32() -; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[INVOKE_UNWIND:%.*]] -; CHECK: invoke.cont: -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], [[ENTRY:%.*]] ], [ 0, [[INVOKE_CONT]] ] +; CHECK-NEXT: to label %[[INVOKE_CONT:.*]] unwind label %[[INVOKE_UNWIND:.*]] +; CHECK: [[INVOKE_CONT]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], %[[ENTRY]] ], [ 0, %[[INVOKE_CONT]] ] ; CHECK-NEXT: [[FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[PHI]]) -; CHECK-NEXT: br label [[INVOKE_CONT]] -; CHECK: invoke.unwind: +; CHECK-NEXT: br label %[[INVOKE_CONT]] +; CHECK: [[INVOKE_UNWIND]]: ; CHECK-NEXT: [[TMP0:%.*]] = landingpad i8 ; CHECK-NEXT: cleanup ; CHECK-NEXT: unreachable @@ -424,18 +444,19 @@ invoke.unwind: } define i32 @freeze_invoke_use_after_phi(i1 %c) personality ptr undef { -; CHECK-LABEL: @freeze_invoke_use_after_phi( -; CHECK-NEXT: entry: +; CHECK-LABEL: define i32 @freeze_invoke_use_after_phi( +; CHECK-SAME: i1 [[C:%.*]]) personality ptr undef { +; CHECK-NEXT: [[ENTRY:.*]]: ; CHECK-NEXT: [[X:%.*]] = invoke i32 @get_i32() -; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[INVOKE_UNWIND:%.*]] -; CHECK: invoke.cont: -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], [[ENTRY:%.*]] ], [ 0, [[INVOKE_CONT]] ] +; CHECK-NEXT: to label %[[INVOKE_CONT:.*]] unwind label %[[INVOKE_UNWIND:.*]] +; CHECK: [[INVOKE_CONT]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], %[[ENTRY]] ], [ 0, %[[INVOKE_CONT]] ] ; CHECK-NEXT: [[FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[PHI]]) -; CHECK-NEXT: br label [[INVOKE_CONT]] -; CHECK: invoke.unwind: +; CHECK-NEXT: br label %[[INVOKE_CONT]] +; CHECK: [[INVOKE_UNWIND]]: ; CHECK-NEXT: [[TMP0:%.*]] = landingpad i8 ; CHECK-NEXT: cleanup ; CHECK-NEXT: unreachable @@ -458,17 +479,18 @@ invoke.unwind: } define i32 @freeze_callbr_use_after_phi(i1 %c) { -; CHECK-LABEL: @freeze_callbr_use_after_phi( -; CHECK-NEXT: entry: +; CHECK-LABEL: define i32 @freeze_callbr_use_after_phi( +; CHECK-SAME: i1 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: ; CHECK-NEXT: [[X:%.*]] = callbr i32 asm sideeffect "", "=r"() #[[ATTR1:[0-9]+]] -; CHECK-NEXT: to label [[CALLBR_CONT:%.*]] [] -; CHECK: callbr.cont: -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], [[ENTRY:%.*]] ], [ 0, [[CALLBR_CONT]] ] +; CHECK-NEXT: to label %[[CALLBR_CONT:.*]] [] +; CHECK: [[CALLBR_CONT]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[X]], %[[ENTRY]] ], [ 0, %[[CALLBR_CONT]] ] ; CHECK-NEXT: call void @use_i32(i32 [[X]]) ; CHECK-NEXT: [[FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: call void @use_i32(i32 [[FR]]) ; CHECK-NEXT: call void @use_i32(i32 [[PHI]]) -; CHECK-NEXT: br label [[CALLBR_CONT]] +; CHECK-NEXT: br label %[[CALLBR_CONT]] ; entry: %x = callbr i32 asm sideeffect "", "=r"() @@ -484,8 +506,9 @@ callbr.cont: } define i1 @combine_and_after_freezing_uses(i32 %x) { -; CHECK-LABEL: @combine_and_after_freezing_uses( -; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X:%.*]] +; CHECK-LABEL: define i1 @combine_and_after_freezing_uses( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X_FR]], 15 ; CHECK-NEXT: [[AND:%.*]] = icmp eq i32 [[TMP1]], 15 ; CHECK-NEXT: ret i1 [[AND]] @@ -501,12 +524,13 @@ define i1 @combine_and_after_freezing_uses(i32 %x) { declare i1 @mock_use(i64, i64) define i1 @fully_propagate_freeze(i32 %0, i32 noundef %1) { -; CHECK-LABEL: @fully_propagate_freeze( -; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP0:%.*]] +; CHECK-LABEL: define i1 @fully_propagate_freeze( +; CHECK-SAME: i32 [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) { +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP0]] ; CHECK-NEXT: [[DR:%.*]] = lshr i32 [[DOTFR]], 2 ; CHECK-NEXT: [[IDX1:%.*]] = zext nneg i32 [[DR]] to i64 ; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[DR]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD]], [[TMP1:%.*]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD]], [[TMP1]] ; CHECK-NEXT: [[IDX2:%.*]] = zext nneg i32 [[DR]] to i64 ; CHECK-NEXT: [[V:%.*]] = call i1 @mock_use(i64 [[IDX1]], i64 [[IDX2]]) ; CHECK-NEXT: [[RET:%.*]] = and i1 [[V]], [[CMP]] @@ -524,8 +548,9 @@ define i1 @fully_propagate_freeze(i32 %0, i32 noundef %1) { } define i32 @propagate_drop_flags_add(i32 %arg) { -; CHECK-LABEL: @propagate_drop_flags_add( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_flags_add( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = add i32 [[ARG_FR]], 2 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -535,8 +560,9 @@ define i32 @propagate_drop_flags_add(i32 %arg) { } define i32 @propagate_drop_flags_add_foldaway(i32 noundef %arg) { -; CHECK-LABEL: @propagate_drop_flags_add_foldaway( -; CHECK-NEXT: [[V1:%.*]] = add i32 [[ARG:%.*]], 2 +; CHECK-LABEL: define i32 @propagate_drop_flags_add_foldaway( +; CHECK-SAME: i32 noundef [[ARG:%.*]]) { +; CHECK-NEXT: [[V1:%.*]] = add i32 [[ARG]], 2 ; CHECK-NEXT: ret i32 [[V1]] ; %v1 = add nsw nuw i32 %arg, 2 @@ -545,8 +571,9 @@ define i32 @propagate_drop_flags_add_foldaway(i32 noundef %arg) { } define i32 @propagate_drop_flags_sub(i32 %arg) { -; CHECK-LABEL: @propagate_drop_flags_sub( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_flags_sub( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = add i32 [[ARG_FR]], -2 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -556,8 +583,9 @@ define i32 @propagate_drop_flags_sub(i32 %arg) { } define i32 @propagate_drop_flags_mul(i32 %arg) { -; CHECK-LABEL: @propagate_drop_flags_mul( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_flags_mul( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = shl i32 [[ARG_FR]], 1 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -567,8 +595,9 @@ define i32 @propagate_drop_flags_mul(i32 %arg) { } define i32 @propagate_drop_flags_udiv(i32 %arg) { -; CHECK-LABEL: @propagate_drop_flags_udiv( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_flags_udiv( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V11:%.*]] = lshr i32 [[ARG_FR]], 1 ; CHECK-NEXT: ret i32 [[V11]] ; @@ -578,8 +607,9 @@ define i32 @propagate_drop_flags_udiv(i32 %arg) { } define i32 @propagate_drop_flags_sdiv(i32 %arg) { -; CHECK-LABEL: @propagate_drop_flags_sdiv( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_flags_sdiv( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = ashr i32 [[ARG_FR]], 1 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -589,8 +619,9 @@ define i32 @propagate_drop_flags_sdiv(i32 %arg) { } define i32 @propagate_drop_shl1(i32 %arg) { -; CHECK-LABEL: @propagate_drop_shl1( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_shl1( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = shl i32 [[ARG_FR]], 2 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -600,8 +631,9 @@ define i32 @propagate_drop_shl1(i32 %arg) { } define i32 @propagate_drop_shl2(i32 %arg, i32 %unknown) { -; CHECK-LABEL: @propagate_drop_shl2( -; CHECK-NEXT: [[V1:%.*]] = shl nuw nsw i32 [[ARG:%.*]], [[UNKNOWN:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_shl2( +; CHECK-SAME: i32 [[ARG:%.*]], i32 [[UNKNOWN:%.*]]) { +; CHECK-NEXT: [[V1:%.*]] = shl nuw nsw i32 [[ARG]], [[UNKNOWN]] ; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]] ; CHECK-NEXT: ret i32 [[V1_FR]] ; @@ -611,8 +643,9 @@ define i32 @propagate_drop_shl2(i32 %arg, i32 %unknown) { } define i32 @propagate_drop_ashr1(i32 %arg) { -; CHECK-LABEL: @propagate_drop_ashr1( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_ashr1( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = ashr i32 [[ARG_FR]], 2 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -622,8 +655,9 @@ define i32 @propagate_drop_ashr1(i32 %arg) { } define i32 @propagate_drop_ashr2(i32 %arg, i32 %unknown) { -; CHECK-LABEL: @propagate_drop_ashr2( -; CHECK-NEXT: [[V1:%.*]] = ashr exact i32 [[ARG:%.*]], [[UNKNOWN:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_ashr2( +; CHECK-SAME: i32 [[ARG:%.*]], i32 [[UNKNOWN:%.*]]) { +; CHECK-NEXT: [[V1:%.*]] = ashr exact i32 [[ARG]], [[UNKNOWN]] ; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]] ; CHECK-NEXT: ret i32 [[V1_FR]] ; @@ -633,8 +667,9 @@ define i32 @propagate_drop_ashr2(i32 %arg, i32 %unknown) { } define i32 @propagate_drop_lshr1(i32 %arg) { -; CHECK-LABEL: @propagate_drop_lshr1( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_lshr1( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = lshr i32 [[ARG_FR]], 2 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -644,8 +679,9 @@ define i32 @propagate_drop_lshr1(i32 %arg) { } define i32 @propagate_drop_lshr2(i32 %arg, i32 %unknown) { -; CHECK-LABEL: @propagate_drop_lshr2( -; CHECK-NEXT: [[V1:%.*]] = lshr exact i32 [[ARG:%.*]], [[UNKNOWN:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_lshr2( +; CHECK-SAME: i32 [[ARG:%.*]], i32 [[UNKNOWN:%.*]]) { +; CHECK-NEXT: [[V1:%.*]] = lshr exact i32 [[ARG]], [[UNKNOWN]] ; CHECK-NEXT: [[V1_FR:%.*]] = freeze i32 [[V1]] ; CHECK-NEXT: ret i32 [[V1_FR]] ; @@ -655,8 +691,9 @@ define i32 @propagate_drop_lshr2(i32 %arg, i32 %unknown) { } define ptr @propagate_drop_gep1(ptr %arg) { -; CHECK-LABEL: @propagate_drop_gep1( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze ptr [[ARG:%.*]] +; CHECK-LABEL: define ptr @propagate_drop_gep1( +; CHECK-SAME: ptr [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze ptr [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = getelementptr i8, ptr [[ARG_FR]], i64 16 ; CHECK-NEXT: ret ptr [[V1]] ; @@ -666,8 +703,9 @@ define ptr @propagate_drop_gep1(ptr %arg) { } define float @propagate_drop_fneg(float %arg) { -; CHECK-LABEL: @propagate_drop_fneg( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @propagate_drop_fneg( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = fneg float [[ARG_FR]] ; CHECK-NEXT: ret float [[V1]] ; @@ -678,8 +716,9 @@ define float @propagate_drop_fneg(float %arg) { define float @propagate_drop_fadd(float %arg) { -; CHECK-LABEL: @propagate_drop_fadd( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @propagate_drop_fadd( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = fadd float [[ARG_FR]], 2.000000e+00 ; CHECK-NEXT: ret float [[V1]] ; @@ -689,8 +728,9 @@ define float @propagate_drop_fadd(float %arg) { } define float @propagate_drop_fsub(float %arg) { -; CHECK-LABEL: @propagate_drop_fsub( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @propagate_drop_fsub( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = fadd float [[ARG_FR]], -2.000000e+00 ; CHECK-NEXT: ret float [[V1]] ; @@ -700,8 +740,9 @@ define float @propagate_drop_fsub(float %arg) { } define float @propagate_drop_fmul(float %arg) { -; CHECK-LABEL: @propagate_drop_fmul( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @propagate_drop_fmul( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = fmul float [[ARG_FR]], 2.000000e+00 ; CHECK-NEXT: ret float [[V1]] ; @@ -711,8 +752,9 @@ define float @propagate_drop_fmul(float %arg) { } define float @propagate_drop_fdiv(float %arg) { -; CHECK-LABEL: @propagate_drop_fdiv( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @propagate_drop_fdiv( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = fmul float [[ARG_FR]], 5.000000e-01 ; CHECK-NEXT: ret float [[V1]] ; @@ -722,8 +764,9 @@ define float @propagate_drop_fdiv(float %arg) { } define float @propagate_drop_frem(float %arg) { -; CHECK-LABEL: @propagate_drop_frem( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define float @propagate_drop_frem( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = frem float [[ARG_FR]], 2.000000e+00 ; CHECK-NEXT: ret float [[V1]] ; @@ -733,8 +776,9 @@ define float @propagate_drop_frem(float %arg) { } define i1 @propagate_drop_fcmp(float %arg) { -; CHECK-LABEL: @propagate_drop_fcmp( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG:%.*]] +; CHECK-LABEL: define i1 @propagate_drop_fcmp( +; CHECK-SAME: float [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze float [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = fcmp une float [[ARG_FR]], 2.000000e+00 ; CHECK-NEXT: ret i1 [[V1]] ; @@ -744,8 +788,9 @@ define i1 @propagate_drop_fcmp(float %arg) { } define float @propagate_drop_fmath_select(i1 %arg) { -; CHECK-LABEL: @propagate_drop_fmath_select( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i1 [[ARG:%.*]] +; CHECK-LABEL: define float @propagate_drop_fmath_select( +; CHECK-SAME: i1 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i1 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = select i1 [[ARG_FR]], float 1.000000e+00, float -1.000000e+00 ; CHECK-NEXT: ret float [[V1]] ; @@ -755,15 +800,16 @@ define float @propagate_drop_fmath_select(i1 %arg) { } define void @fold_phi_noop(i32 noundef %init, i32 %n) { -; CHECK-LABEL: @fold_phi_noop( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT:%.*]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_noop( +; CHECK-SAME: i32 noundef [[INIT:%.*]], i32 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -781,16 +827,17 @@ exit: ; preds = %loop } define void @fold_phi_through(i32 %init, i32 %n) { -; CHECK-LABEL: @fold_phi_through( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[INIT:%.*]] -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_through( +; CHECK-SAME: i32 [[INIT:%.*]], i32 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[TMP0]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -808,16 +855,17 @@ exit: ; preds = %loop } define void @fold_phi_drop_flags(i32 %init, i32 %n) { -; CHECK-LABEL: @fold_phi_drop_flags( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[INIT_FR:%.*]] = freeze i32 [[INIT:%.*]] -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT_FR]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_drop_flags( +; CHECK-SAME: i32 [[INIT:%.*]], i32 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[INIT_FR:%.*]] = freeze i32 [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT_FR]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -835,16 +883,17 @@ exit: ; preds = %loop } define void @fold_phi_non_add(i32 %init, i32 %n) { -; CHECK-LABEL: @fold_phi_non_add( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[INIT:%.*]] -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_non_add( +; CHECK-SAME: i32 [[INIT:%.*]], i32 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[TMP0]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_NEXT]] = shl i32 [[I]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -862,16 +911,17 @@ exit: ; preds = %loop } define void @fold_phi_gep(ptr %init, ptr %end) { -; CHECK-LABEL: @fold_phi_gep( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = freeze ptr [[INIT:%.*]] -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[TMP0]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_gep( +; CHECK-SAME: ptr [[INIT:%.*]], ptr [[END:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[TMP0:%.*]] = freeze ptr [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[TMP0]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_NEXT]] = getelementptr i8, ptr [[I]], i64 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT]], [[END:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT]], [[END]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -889,20 +939,21 @@ exit: ; preds = %loop } ; The recurrence for the GEP offset can't produce poison so the freeze should -; be pushed through to the ptr, but this is not currently supported. +; be pushed through to the ptr. define void @fold_phi_gep_phi_offset(ptr %init, ptr %end, i64 noundef %n) { -; CHECK-LABEL: @fold_phi_gep_phi_offset( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[INIT:%.*]], [[ENTRY:%.*]] ], [ [[I_NEXT_FR:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[OFF:%.*]] = phi i64 [ [[N:%.*]], [[ENTRY]] ], [ [[OFF_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_gep_phi_offset( +; CHECK-SAME: ptr [[INIT:%.*]], ptr [[END:%.*]], i64 noundef [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[TMP0:%.*]] = freeze ptr [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[TMP0]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] +; CHECK-NEXT: [[OFF:%.*]] = phi i64 [ [[N]], %[[ENTRY]] ], [ [[OFF_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[OFF_NEXT]] = shl i64 [[OFF]], 3 -; CHECK-NEXT: [[I_NEXT:%.*]] = getelementptr i8, ptr [[I]], i64 [[OFF_NEXT]] -; CHECK-NEXT: [[I_NEXT_FR]] = freeze ptr [[I_NEXT]] -; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT_FR]], [[END:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[I_NEXT]] = getelementptr i8, ptr [[I]], i64 [[OFF_NEXT]] +; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT]], [[END]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -921,21 +972,22 @@ exit: ; preds = %loop ret void } -; Offset is still guaranteed not to be poison, so the freeze could be moved -; here if we strip inbounds from the GEP, but this is not currently supported. +; Offset is still guaranteed not to be poison, so the freeze can be moved +; here if we strip inbounds from the GEP. define void @fold_phi_gep_inbounds_phi_offset(ptr %init, ptr %end, i64 noundef %n) { -; CHECK-LABEL: @fold_phi_gep_inbounds_phi_offset( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[INIT:%.*]], [[ENTRY:%.*]] ], [ [[I_NEXT_FR:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[OFF:%.*]] = phi i64 [ [[N:%.*]], [[ENTRY]] ], [ [[OFF_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_gep_inbounds_phi_offset( +; CHECK-SAME: ptr [[INIT:%.*]], ptr [[END:%.*]], i64 noundef [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[TMP0:%.*]] = freeze ptr [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[TMP0]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] +; CHECK-NEXT: [[OFF:%.*]] = phi i64 [ [[N]], %[[ENTRY]] ], [ [[OFF_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[OFF_NEXT]] = shl i64 [[OFF]], 3 -; CHECK-NEXT: [[I_NEXT:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 [[OFF_NEXT]] -; CHECK-NEXT: [[I_NEXT_FR]] = freeze ptr [[I_NEXT]] -; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT_FR]], [[END:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[I_NEXT]] = getelementptr i8, ptr [[I]], i64 [[OFF_NEXT]] +; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT]], [[END]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -954,20 +1006,22 @@ exit: ; preds = %loop ret void } -; GEP can produce poison, check freeze isn't moved. -define void @cant_fold_phi_gep_phi_offset(ptr %init, ptr %end, i64 %n) { -; CHECK-LABEL: @cant_fold_phi_gep_phi_offset( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[INIT:%.*]], [[ENTRY:%.*]] ], [ [[I_NEXT_FR:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[OFF:%.*]] = phi i64 [ [[N:%.*]], [[ENTRY]] ], [ [[OFF_NEXT:%.*]], [[LOOP]] ] +; Same as previous, but also requires freezing %n. +define void @fold_phi_gep_phi_offset_multiple(ptr %init, ptr %end, i64 %n) { +; CHECK-LABEL: define void @fold_phi_gep_phi_offset_multiple( +; CHECK-SAME: ptr [[INIT:%.*]], ptr [[END:%.*]], i64 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[TMP0:%.*]] = freeze ptr [[INIT]] +; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[N]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[TMP0]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] +; CHECK-NEXT: [[OFF:%.*]] = phi i64 [ [[TMP1]], %[[ENTRY]] ], [ [[OFF_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[OFF_NEXT]] = shl i64 [[OFF]], 3 -; CHECK-NEXT: [[I_NEXT:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 [[OFF_NEXT]] -; CHECK-NEXT: [[I_NEXT_FR]] = freeze ptr [[I_NEXT]] -; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT_FR]], [[END:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[I_NEXT]] = getelementptr i8, ptr [[I]], i64 [[OFF_NEXT]] +; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[I_NEXT]], [[END]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -987,17 +1041,18 @@ exit: ; preds = %loop } define void @fold_phi_multiple_insts(i32 %init, i32 %n) { -; CHECK-LABEL: @fold_phi_multiple_insts( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[INIT_FR:%.*]] = freeze i32 [[INIT:%.*]] -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT_FR]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_multiple_insts( +; CHECK-SAME: i32 [[INIT:%.*]], i32 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[INIT_FR:%.*]] = freeze i32 [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT_FR]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_SQ:%.*]] = mul i32 [[I]], [[I]] ; CHECK-NEXT: [[I_NEXT]] = add i32 [[I_SQ]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -1016,20 +1071,21 @@ exit: ; preds = %loop } define void @fold_phi_multiple_back_edges(i32 %init, i32 %n, i32 %m) { -; CHECK-LABEL: @fold_phi_multiple_back_edges( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[INIT_FR:%.*]] = freeze i32 [[INIT:%.*]] -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT_FR]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ], [ [[I_NEXT2:%.*]], [[LOOP_LATCH2:%.*]] ] +; CHECK-LABEL: define void @fold_phi_multiple_back_edges( +; CHECK-SAME: i32 [[INIT:%.*]], i32 [[N:%.*]], i32 [[M:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[INIT_FR:%.*]] = freeze i32 [[INIT]] +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT_FR]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ], [ [[I_NEXT2:%.*]], %[[LOOP_LATCH2:.*]] ] ; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[LOOP_LATCH2]] -; CHECK: loop.latch2: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[LOOP_LATCH2]] +; CHECK: [[LOOP_LATCH2]]: ; CHECK-NEXT: [[I_NEXT2]] = add i32 [[I]], 2 -; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[I_NEXT]], [[M:%.*]] -; CHECK-NEXT: br i1 [[COND2]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[I_NEXT]], [[M]] +; CHECK-NEXT: br i1 [[COND2]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -1052,18 +1108,19 @@ exit: ; preds = %loop } define void @fold_phi_multiple_start_values(i1 %c, i32 %init, i32 %init2, i32 %n) { -; CHECK-LABEL: @fold_phi_multiple_start_values( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LOOP:%.*]] -; CHECK: if: -; CHECK-NEXT: br label [[LOOP]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT:%.*]], [[ENTRY:%.*]] ], [ [[INIT2:%.*]], [[IF]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-LABEL: define void @fold_phi_multiple_start_values( +; CHECK-SAME: i1 [[C:%.*]], i32 [[INIT:%.*]], i32 [[INIT2:%.*]], i32 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[C]], label %[[IF:.*]], label %[[LOOP:.*]] +; CHECK: [[IF]]: +; CHECK-NEXT: br label %[[LOOP]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT]], %[[ENTRY]] ], [ [[INIT2]], %[[IF]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_FR:%.*]] = freeze i32 [[I]] ; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I_FR]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -1083,22 +1140,72 @@ exit: ret void } +; We can remove this freeze as the incoming values to the PHI have the same +; well-defined start value and the GEP can't produce poison, but this is +; currently unsupported. +define void @fold_phi_noundef_start_value(ptr noundef %init, i1 %cond.0, i1 %cond.1, i1 %cond.2) { +; CHECK-LABEL: define void @fold_phi_noundef_start_value( +; CHECK-SAME: ptr noundef [[INIT:%.*]], i1 [[COND_0:%.*]], i1 [[COND_1:%.*]], i1 [[COND_2:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[IV_0:%.*]] = phi ptr [ [[INIT]], %[[ENTRY]] ], [ [[IV_0_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] +; CHECK-NEXT: br i1 [[COND_0]], label %[[LOOP_LATCH]], label %[[IF_ELSE:.*]] +; CHECK: [[IF_ELSE]]: +; CHECK-NEXT: [[IV_1:%.*]] = getelementptr i8, ptr [[IV_0]], i64 -8 +; CHECK-NEXT: br label %[[LOOP_LATCH]] +; CHECK: [[LOOP_LATCH]]: +; CHECK-NEXT: [[IV_2:%.*]] = phi ptr [ [[IV_0]], %[[LOOP]] ], [ [[IV_1]], %[[IF_ELSE]] ] +; CHECK-NEXT: [[IV_2_FR:%.*]] = freeze ptr [[IV_2]] +; CHECK-NEXT: [[IV_2_FR_INT:%.*]] = ptrtoint ptr [[IV_2_FR]] to i64 +; CHECK-NEXT: [[IV_0_INT:%.*]] = ptrtoint ptr [[IV_0]] to i64 +; CHECK-NEXT: [[IDX:%.*]] = sub i64 [[IV_0_INT]], [[IV_2_FR_INT]] +; CHECK-NEXT: [[IV_0_NEXT]] = getelementptr i8, ptr [[IV_0]], i64 [[IDX]] +; CHECK-NEXT: br i1 [[COND_2]], label %[[EXIT:.*]], label %[[LOOP]] +; CHECK: [[EXIT]]: +; CHECK-NEXT: ret void +; +entry: + br label %loop + +loop: + %iv.0 = phi ptr [ %init, %entry ], [ %iv.0.next, %loop.latch ] + br i1 %cond.0, label %loop.latch, label %if.else + +if.else: + %iv.1 = getelementptr i8, ptr %iv.0, i64 -8 + br label %loop.latch + +loop.latch: + %iv.2 = phi ptr [ %iv.0, %loop ], [ %iv.1, %if.else ] + %iv.2.fr = freeze ptr %iv.2 + %iv.2.fr.int = ptrtoint ptr %iv.2.fr to i64 + %iv.0.int = ptrtoint ptr %iv.0 to i64 + %idx = sub i64 %iv.0.int, %iv.2.fr.int + %iv.0.next = getelementptr i8, ptr %iv.0, i64 %idx + br i1 %cond.2, label %exit, label %loop + +exit: + ret void +} + define void @fold_phi_invoke_start_value(i32 %n) personality ptr undef { -; CHECK-LABEL: @fold_phi_invoke_start_value( -; CHECK-NEXT: entry: +; CHECK-LABEL: define void @fold_phi_invoke_start_value( +; CHECK-SAME: i32 [[N:%.*]]) personality ptr undef { +; CHECK-NEXT: [[ENTRY:.*]]: ; CHECK-NEXT: [[INIT:%.*]] = invoke i32 @get_i32() -; CHECK-NEXT: to label [[LOOP:%.*]] unwind label [[UNWIND:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: to label %[[LOOP:.*]] unwind label %[[UNWIND:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_FR:%.*]] = freeze i32 [[I]] ; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I_FR]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: unwind: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[UNWIND]]: ; CHECK-NEXT: [[TMP0:%.*]] = landingpad i8 ; CHECK-NEXT: cleanup ; CHECK-NEXT: unreachable -; CHECK: exit: +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -1121,20 +1228,21 @@ exit: } define void @fold_phi_invoke_noundef_start_value(i32 %n) personality ptr undef { -; CHECK-LABEL: @fold_phi_invoke_noundef_start_value( -; CHECK-NEXT: entry: +; CHECK-LABEL: define void @fold_phi_invoke_noundef_start_value( +; CHECK-SAME: i32 [[N:%.*]]) personality ptr undef { +; CHECK-NEXT: [[ENTRY:.*]]: ; CHECK-NEXT: [[INIT:%.*]] = invoke noundef i32 @get_i32() -; CHECK-NEXT: to label [[LOOP:%.*]] unwind label [[UNWIND:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT]], [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: to label %[[LOOP:.*]] unwind label %[[UNWIND:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INIT]], %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ] ; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1 -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: unwind: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[I_NEXT]], [[N]] +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[UNWIND]]: ; CHECK-NEXT: [[TMP0:%.*]] = landingpad i8 ; CHECK-NEXT: cleanup ; CHECK-NEXT: unreachable -; CHECK: exit: +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: @@ -1157,8 +1265,9 @@ exit: } define ptr @freeze_load_noundef(ptr %ptr) { -; CHECK-LABEL: @freeze_load_noundef( -; CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[PTR:%.*]], align 8, !noundef [[META0:![0-9]+]] +; CHECK-LABEL: define ptr @freeze_load_noundef( +; CHECK-SAME: ptr [[PTR:%.*]]) { +; CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[PTR]], align 8, !noundef [[META0:![0-9]+]] ; CHECK-NEXT: ret ptr [[P]] ; %p = load ptr, ptr %ptr, !noundef !0 @@ -1167,8 +1276,9 @@ define ptr @freeze_load_noundef(ptr %ptr) { } define ptr @freeze_load_dereferenceable(ptr %ptr) { -; CHECK-LABEL: @freeze_load_dereferenceable( -; CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[PTR:%.*]], align 8, !dereferenceable [[META1:![0-9]+]] +; CHECK-LABEL: define ptr @freeze_load_dereferenceable( +; CHECK-SAME: ptr [[PTR:%.*]]) { +; CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[PTR]], align 8, !dereferenceable [[META1:![0-9]+]] ; CHECK-NEXT: ret ptr [[P]] ; %p = load ptr, ptr %ptr, !dereferenceable !1 @@ -1177,8 +1287,9 @@ define ptr @freeze_load_dereferenceable(ptr %ptr) { } define ptr @freeze_load_dereferenceable_or_null(ptr %ptr) { -; CHECK-LABEL: @freeze_load_dereferenceable_or_null( -; CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[PTR:%.*]], align 8, !dereferenceable_or_null [[META1]] +; CHECK-LABEL: define ptr @freeze_load_dereferenceable_or_null( +; CHECK-SAME: ptr [[PTR:%.*]]) { +; CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[PTR]], align 8, !dereferenceable_or_null [[META1]] ; CHECK-NEXT: ret ptr [[P]] ; %p = load ptr, ptr %ptr, !dereferenceable_or_null !1 @@ -1187,8 +1298,9 @@ define ptr @freeze_load_dereferenceable_or_null(ptr %ptr) { } define i32 @freeze_load_with_range(ptr %ptr) { -; CHECK-LABEL: @freeze_load_with_range( -; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !range [[RNG2:![0-9]+]] +; CHECK-LABEL: define i32 @freeze_load_with_range( +; CHECK-SAME: ptr [[PTR:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[PTR]], align 4, !range [[RNG2:![0-9]+]] ; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: ret i32 [[X_FR]] ; @@ -1200,7 +1312,7 @@ define i32 @freeze_load_with_range(ptr %ptr) { declare i32 @foo.i32() define i32 @freeze_call_with_range() { -; CHECK-LABEL: @freeze_call_with_range( +; CHECK-LABEL: define i32 @freeze_call_with_range() { ; CHECK-NEXT: [[X:%.*]] = call i32 @foo.i32(), !range [[RNG2]] ; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X]] ; CHECK-NEXT: ret i32 [[X_FR]] @@ -1213,8 +1325,9 @@ define i32 @freeze_call_with_range() { declare i32 @llvm.ctpop.i32(i32) define i32 @freeze_ctpop(i32 %x) { -; CHECK-LABEL: @freeze_ctpop( -; CHECK-NEXT: [[Y:%.*]] = lshr i32 2047, [[X:%.*]] +; CHECK-LABEL: define i32 @freeze_ctpop( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = lshr i32 2047, [[X]] ; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] ; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y_FR]]) ; CHECK-NEXT: ret i32 [[CTPOP]] @@ -1226,8 +1339,9 @@ define i32 @freeze_ctpop(i32 %x) { } define i32 @freeze_zext_nneg(i8 %x) { -; CHECK-LABEL: @freeze_zext_nneg( -; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]] +; CHECK-LABEL: define i32 @freeze_zext_nneg( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X]] ; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X_FR]] to i32 ; CHECK-NEXT: ret i32 [[ZEXT]] ; @@ -1237,8 +1351,9 @@ define i32 @freeze_zext_nneg(i8 %x) { } define float @freeze_uitofp_nneg(i8 %x) { -; CHECK-LABEL: @freeze_uitofp_nneg( -; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]] +; CHECK-LABEL: define float @freeze_uitofp_nneg( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X]] ; CHECK-NEXT: [[UITOFP:%.*]] = uitofp i8 [[X_FR]] to float ; CHECK-NEXT: ret float [[UITOFP]] ; @@ -1248,8 +1363,9 @@ define float @freeze_uitofp_nneg(i8 %x) { } define i32 @propagate_drop_flags_or(i32 %arg) { -; CHECK-LABEL: @propagate_drop_flags_or( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_flags_or( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = or i32 [[ARG_FR]], 2 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -1259,8 +1375,9 @@ define i32 @propagate_drop_flags_or(i32 %arg) { } define i32 @propagate_drop_flags_trunc(i64 %arg) { -; CHECK-LABEL: @propagate_drop_flags_trunc( -; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i64 [[ARG:%.*]] +; CHECK-LABEL: define i32 @propagate_drop_flags_trunc( +; CHECK-SAME: i64 [[ARG:%.*]]) { +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i64 [[ARG]] ; CHECK-NEXT: [[V1:%.*]] = trunc i64 [[ARG_FR]] to i32 ; CHECK-NEXT: ret i32 [[V1]] ; @@ -1270,8 +1387,9 @@ define i32 @propagate_drop_flags_trunc(i64 %arg) { } define ptr @propagate_drop_flags_gep_nusw(ptr %p) { -; CHECK-LABEL: @propagate_drop_flags_gep_nusw( -; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P:%.*]] +; CHECK-LABEL: define ptr @propagate_drop_flags_gep_nusw( +; CHECK-SAME: ptr [[P:%.*]]) { +; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P]] ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[P_FR]], i64 1 ; CHECK-NEXT: ret ptr [[GEP]] ; @@ -1281,8 +1399,9 @@ define ptr @propagate_drop_flags_gep_nusw(ptr %p) { } define ptr @propagate_drop_flags_gep_nuw(ptr %p) { -; CHECK-LABEL: @propagate_drop_flags_gep_nuw( -; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P:%.*]] +; CHECK-LABEL: define ptr @propagate_drop_flags_gep_nuw( +; CHECK-SAME: ptr [[P:%.*]]) { +; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P]] ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[P_FR]], i64 1 ; CHECK-NEXT: ret ptr [[GEP]] ; @@ -1292,8 +1411,9 @@ define ptr @propagate_drop_flags_gep_nuw(ptr %p) { } define i1 @propagate_drop_flags_icmp(i32 %a, i32 %b) { -; CHECK-LABEL: @propagate_drop_flags_icmp( -; CHECK-NEXT: [[A_FR:%.*]] = freeze i32 [[A:%.*]] +; CHECK-LABEL: define i1 @propagate_drop_flags_icmp( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[A_FR:%.*]] = freeze i32 [[A]] ; CHECK-NEXT: [[RET:%.*]] = icmp ult i32 [[A_FR]], 3 ; CHECK-NEXT: ret i1 [[RET]] ; @@ -1305,8 +1425,9 @@ define i1 @propagate_drop_flags_icmp(i32 %a, i32 %b) { declare i32 @llvm.umax.i32(i32 %a, i32 %b) define i32 @freeze_call_with_range_attr(i32 %a) { -; CHECK-LABEL: @freeze_call_with_range_attr( -; CHECK-NEXT: [[Y:%.*]] = lshr i32 2047, [[A:%.*]] +; CHECK-LABEL: define i32 @freeze_call_with_range_attr( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = lshr i32 2047, [[A]] ; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] ; CHECK-NEXT: [[X:%.*]] = call i32 @llvm.umax.i32(i32 [[Y_FR]], i32 50) ; CHECK-NEXT: ret i32 [[X]] @@ -1320,9 +1441,10 @@ define i32 @freeze_call_with_range_attr(i32 %a) { declare ptr @llvm.ptrmask.p0.i64(ptr, i64) define ptr @freeze_ptrmask_align(ptr %p, i64 noundef %m) { -; CHECK-LABEL: @freeze_ptrmask_align( -; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P:%.*]] -; CHECK-NEXT: [[MASK:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[P_FR]], i64 [[M:%.*]]) +; CHECK-LABEL: define ptr @freeze_ptrmask_align( +; CHECK-SAME: ptr [[P:%.*]], i64 noundef [[M:%.*]]) { +; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P]] +; CHECK-NEXT: [[MASK:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[P_FR]], i64 [[M]]) ; CHECK-NEXT: ret ptr [[MASK]] ; %mask = call align(4) ptr @llvm.ptrmask.p0.i64(ptr %p, i64 %m) @@ -1331,9 +1453,10 @@ define ptr @freeze_ptrmask_align(ptr %p, i64 noundef %m) { } define ptr @freeze_ptrmask_nonnull(ptr %p, i64 noundef %m) { -; CHECK-LABEL: @freeze_ptrmask_nonnull( -; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P:%.*]] -; CHECK-NEXT: [[MASK:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[P_FR]], i64 [[M:%.*]]) +; CHECK-LABEL: define ptr @freeze_ptrmask_nonnull( +; CHECK-SAME: ptr [[P:%.*]], i64 noundef [[M:%.*]]) { +; CHECK-NEXT: [[P_FR:%.*]] = freeze ptr [[P]] +; CHECK-NEXT: [[MASK:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[P_FR]], i64 [[M]]) ; CHECK-NEXT: ret ptr [[MASK]] ; %mask = call nonnull ptr @llvm.ptrmask.p0.i64(ptr %p, i64 %m) @@ -1345,9 +1468,6 @@ define ptr @freeze_ptrmask_nonnull(ptr %p, i64 noundef %m) { !1 = !{i64 4} !2 = !{i32 0, i32 100} ;. -; CHECK: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } -; CHECK: attributes #[[ATTR1]] = { nounwind } -;. ; CHECK: [[META0]] = !{} ; CHECK: [[META1]] = !{i64 4} ; CHECK: [[RNG2]] = !{i32 0, i32 100} diff --git a/llvm/test/Transforms/InstCombine/gep-addrspace.ll b/llvm/test/Transforms/InstCombine/gep-addrspace.ll index 0d1850b8fa02..fdd3b2e25dbf 100644 --- a/llvm/test/Transforms/InstCombine/gep-addrspace.ll +++ b/llvm/test/Transforms/InstCombine/gep-addrspace.ll @@ -24,10 +24,10 @@ define void @func(ptr addrspace(1) nocapture %p) nounwind { define void @keep_necessary_addrspacecast(i64 %i, ptr %out0, ptr %out1) { ; CHECK-LABEL: @keep_necessary_addrspacecast( -; CHECK-NEXT: [[T0:%.*]] = getelementptr [256 x float], ptr addrspacecast (ptr addrspace(3) @array to ptr), i64 0, i64 [[I:%.*]] -; CHECK-NEXT: [[T1:%.*]] = getelementptr [0 x float], ptr addrspacecast (ptr addrspace(3) @scalar to ptr), i64 0, i64 [[I]] -; CHECK-NEXT: store ptr [[T0]], ptr [[OUT0:%.*]], align 4 +; CHECK-NEXT: [[T1:%.*]] = getelementptr float, ptr addrspacecast (ptr addrspace(3) @array to ptr), i64 [[I:%.*]] +; CHECK-NEXT: [[T2:%.*]] = getelementptr float, ptr addrspacecast (ptr addrspace(3) @scalar to ptr), i64 [[I]] ; CHECK-NEXT: store ptr [[T1]], ptr [[OUT1:%.*]], align 4 +; CHECK-NEXT: store ptr [[T2]], ptr [[OUT2:%.*]], align 4 ; CHECK-NEXT: ret void ; %t0 = getelementptr [256 x float], ptr addrspacecast (ptr addrspace(3) @array to ptr), i64 0, i64 %i diff --git a/llvm/test/Transforms/InstCombine/gep-alias.ll b/llvm/test/Transforms/InstCombine/gep-alias.ll index 075359be6c40..0b573aa7c696 100644 --- a/llvm/test/Transforms/InstCombine/gep-alias.ll +++ b/llvm/test/Transforms/InstCombine/gep-alias.ll @@ -1,14 +1,20 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt -S -passes=instcombine -o - %s | FileCheck %s target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" -target triple = "aarch64-unknown-linux-android10000" @x.hwasan = private global { [3 x i32], [4 x i8] } { [3 x i32] [i32 42, i32 57, i32 10], [4 x i8] c"\00\00\00\87" }, align 16 @x = alias [3 x i32], inttoptr (i64 add (i64 ptrtoint (ptr @x.hwasan to i64), i64 -8718968878589280256) to ptr) define i32 @f(i64 %i) { +; CHECK-LABEL: define i32 @f( +; CHECK-SAME: i64 [[I:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr @x, i64 [[I]] +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 +; CHECK-NEXT: ret i32 [[TMP0]] +; entry: - ; CHECK: getelementptr inbounds [3 x i32], ptr @x %arrayidx = getelementptr inbounds [3 x i32], ptr @x, i64 0, i64 %i %0 = load i32, ptr %arrayidx ret i32 %0 diff --git a/llvm/test/Transforms/InstCombine/gep-canonicalize-constant-indices.ll b/llvm/test/Transforms/InstCombine/gep-canonicalize-constant-indices.ll index fa006ff992ba..8a4898ae923a 100644 --- a/llvm/test/Transforms/InstCombine/gep-canonicalize-constant-indices.ll +++ b/llvm/test/Transforms/InstCombine/gep-canonicalize-constant-indices.ll @@ -50,10 +50,9 @@ define ptr @partialConstant2(ptr %p, i64 %a, i64 %b) { ; result = ((ptr) p + a) + 3 define ptr @merge(ptr %p, i64 %a) { ; CHECK-LABEL: @merge( -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[P:%.*]], i64 4 -; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[A:%.*]] -; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP2]], i64 8 -; CHECK-NEXT: ret ptr [[TMP3]] +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i64 12 +; CHECK-NEXT: ret ptr [[TMP2]] ; %1 = getelementptr inbounds i32, ptr %p, i64 1 %2 = getelementptr inbounds i32, ptr %1, i64 %a @@ -67,13 +66,11 @@ define ptr @merge(ptr %p, i64 %a) { ; result = (ptr) ((ptr) ((ptr) ptr + a) + (a * b)) + 9 define ptr @nested(ptr %p, i64 %a, i64 %b) { ; CHECK-LABEL: @nested( -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[P:%.*]], i64 16 -; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 [[A:%.*]] -; CHECK-NEXT: [[TMP3:%.*]] = mul i64 [[A]], [[B:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP2]], i64 128 -; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i16, ptr [[TMP4]], i64 [[TMP3]] -; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP5]], i64 16 -; CHECK-NEXT: ret ptr [[TMP6]] +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[A]], [[B:%.*]] +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i16, ptr [[TMP1]], i64 [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP3]], i64 160 +; CHECK-NEXT: ret ptr [[TMP4]] ; %1 = getelementptr inbounds <3 x i32>, ptr %p, i64 1 %2 = getelementptr inbounds i8, ptr %1, i64 %a @@ -125,3 +122,138 @@ define ptr @multipleUses3(ptr %p) { %3 = getelementptr inbounds i32, ptr %1, i64 %2 ret ptr %3 } + +define ptr @merge_nuw(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_nuw( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr nuw i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr nuw i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nuw i8, ptr %p, i64 1 + %gep2 = getelementptr nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +define ptr @merge_nuw_inbounds(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_nuw_inbounds( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds nuw i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds nuw i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr inbounds nuw i8, ptr %p, i64 1 + %gep2 = getelementptr inbounds nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr inbounds nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +; It would be okay to preserve nusw here, as the constant addition does not +; overflow. +define ptr @merge_nuw_nusw(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_nuw_nusw( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr nusw nuw i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr nuw i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nusw nuw i8, ptr %p, i64 1 + %gep2 = getelementptr nusw nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr nusw nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +; Can't preserve nusw on the final GEP +define ptr @merge_nuw_nusw_overflow(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_nuw_nusw_overflow( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr nusw nuw i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr nuw i8, ptr [[GEP2]], i64 -2305843009213693952 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nusw nuw i8, ptr %p, i64 u0x7000000000000000 + %gep2 = getelementptr nusw nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr nusw nuw i8, ptr %gep2, i64 u0x7000000000000000 + ret ptr %gep3 +} + +define ptr @merge_missing_nuw1(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_missing_nuw1( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr i8, ptr %p, i64 1 + %gep2 = getelementptr nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +define ptr @merge_missing_nuw2(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_missing_nuw2( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nuw i8, ptr %p, i64 1 + %gep2 = getelementptr i32, ptr %gep1, i64 %a + %gep3 = getelementptr nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +define ptr @merge_missing_nuw3(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_missing_nuw3( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr nuw i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nuw i8, ptr %p, i64 1 + %gep2 = getelementptr nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +define ptr @merge_nuw_missing_inbounds(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_nuw_missing_inbounds( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr nuw i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr nuw i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nuw i8, ptr %p, i64 1 + %gep2 = getelementptr inbounds nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr inbounds nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +define ptr @merge_nuw_missing_nusw(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_nuw_missing_nusw( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr nuw i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr nuw i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nusw nuw i8, ptr %p, i64 1 + %gep2 = getelementptr nuw i32, ptr %gep1, i64 %a + %gep3 = getelementptr nusw nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +define ptr @merge_inbounds_missing_nuw(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_inbounds_missing_nuw( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr inbounds nuw i8, ptr %p, i64 1 + %gep2 = getelementptr inbounds i32, ptr %gep1, i64 %a + %gep3 = getelementptr inbounds nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} + +define ptr @merge_nusw_missing_nuw(ptr %p, i64 %a) { +; CHECK-LABEL: @merge_nusw_missing_nuw( +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr i8, ptr [[GEP2]], i64 5 +; CHECK-NEXT: ret ptr [[GEP3]] +; + %gep1 = getelementptr nusw nuw i8, ptr %p, i64 1 + %gep2 = getelementptr nusw i32, ptr %gep1, i64 %a + %gep3 = getelementptr nusw nuw i32, ptr %gep2, i64 1 + ret ptr %gep3 +} diff --git a/llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll b/llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll index acea9f8f555c..ecebaa7d9ae5 100644 --- a/llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll +++ b/llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll @@ -118,7 +118,8 @@ define ptr @structStruct(ptr %p) { ; result = (ptr) &((struct.B*) p)[i].member1 + 2 define ptr @appendIndex(ptr %p, i64 %i) { ; CHECK-LABEL: @appendIndex( -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_B:%.*]], ptr [[P:%.*]], i64 [[I:%.*]], i32 1, i64 2 +; CHECK-NEXT: [[DOTSPLIT:%.*]] = getelementptr inbounds [[STRUCT_B:%.*]], ptr [[P:%.*]], i64 [[I:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[DOTSPLIT]], i64 6 ; CHECK-NEXT: ret ptr [[TMP1]] ; %1 = getelementptr inbounds %struct.B, ptr %p, i64 %i, i32 1 @@ -173,7 +174,8 @@ define ptr @partialConstant3(ptr %p) { ; result = &((struct.C*) p + a).member2 define ptr @partialConstantMemberAliasing1(ptr %p, i64 %a) { ; CHECK-LABEL: @partialConstantMemberAliasing1( -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_C:%.*]], ptr [[P:%.*]], i64 [[A:%.*]], i32 2 +; CHECK-NEXT: [[DOTSPLIT:%.*]] = getelementptr inbounds [[STRUCT_C:%.*]], ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[DOTSPLIT]], i64 8 ; CHECK-NEXT: ret ptr [[TMP1]] ; %1 = getelementptr inbounds %struct.C, ptr %p, i64 %a, i32 1 @@ -185,8 +187,8 @@ define ptr @partialConstantMemberAliasing1(ptr %p, i64 %a) { ; address of another member. define ptr @partialConstantMemberAliasing2(ptr %p, i64 %a) { ; CHECK-LABEL: @partialConstantMemberAliasing2( -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_C:%.*]], ptr [[P:%.*]], i64 [[A:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 1 +; CHECK-NEXT: [[DOTSPLIT:%.*]] = getelementptr inbounds [[STRUCT_C:%.*]], ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[DOTSPLIT]], i64 5 ; CHECK-NEXT: ret ptr [[TMP2]] ; %1 = getelementptr inbounds %struct.C, ptr %p, i64 %a, i32 1 @@ -198,8 +200,8 @@ define ptr @partialConstantMemberAliasing2(ptr %p, i64 %a) { ; range of the object currently pointed by the non-constant GEP. define ptr @partialConstantMemberAliasing3(ptr %p, i64 %a) { ; CHECK-LABEL: @partialConstantMemberAliasing3( -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_C:%.*]], ptr [[P:%.*]], i64 [[A:%.*]], i32 2 -; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 4 +; CHECK-NEXT: [[DOTSPLIT:%.*]] = getelementptr inbounds [[STRUCT_C:%.*]], ptr [[P:%.*]], i64 [[A:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[DOTSPLIT]], i64 12 ; CHECK-NEXT: ret ptr [[TMP2]] ; %1 = getelementptr inbounds %struct.C, ptr %p, i64 %a, i32 2 diff --git a/llvm/test/Transforms/InstCombine/gep-vector.ll b/llvm/test/Transforms/InstCombine/gep-vector.ll index 313c7ef32fe1..920147b3576d 100644 --- a/llvm/test/Transforms/InstCombine/gep-vector.ll +++ b/llvm/test/Transforms/InstCombine/gep-vector.ll @@ -31,9 +31,9 @@ define <2 x ptr> @vectorindex3() { define ptr @bitcast_vec_to_array_gep(ptr %x, i64 %y, i64 %z) { ; CHECK-LABEL: @bitcast_vec_to_array_gep( -; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr [7 x i32], ptr [[X:%.*]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr [7 x i32], ptr [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] -; CHECK-NEXT: ret ptr [[GEP]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr [7 x i32], ptr [[GEP_SPLIT:%.*]], i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, ptr [[GEP]], i64 [[Z1:%.*]] +; CHECK-NEXT: ret ptr [[GEP1]] ; %gep = getelementptr [7 x i32], ptr %x, i64 %y, i64 %z ret ptr %gep @@ -43,9 +43,9 @@ define ptr @bitcast_vec_to_array_gep(ptr %x, i64 %y, i64 %z) { define ptr @bitcast_array_to_vec_gep(ptr %x, i64 %y, i64 %z) { ; CHECK-LABEL: @bitcast_array_to_vec_gep( -; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr inbounds <3 x i32>, ptr [[X:%.*]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <3 x i32>, ptr [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] -; CHECK-NEXT: ret ptr [[GEP]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <3 x i32>, ptr [[GEP_SPLIT:%.*]], i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[GEP]], i64 [[Z1:%.*]] +; CHECK-NEXT: ret ptr [[GEP1]] ; %gep = getelementptr inbounds <3 x i32>, ptr %x, i64 %y, i64 %z ret ptr %gep @@ -55,9 +55,9 @@ define ptr @bitcast_array_to_vec_gep(ptr %x, i64 %y, i64 %z) { define ptr @bitcast_vec_to_array_gep_matching_alloc_size(ptr %x, i64 %y, i64 %z) { ; CHECK-LABEL: @bitcast_vec_to_array_gep_matching_alloc_size( -; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr [4 x i32], ptr [[X:%.*]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr [4 x i32], ptr [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] -; CHECK-NEXT: ret ptr [[GEP]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr [4 x i32], ptr [[GEP_SPLIT:%.*]], i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, ptr [[GEP]], i64 [[Z1:%.*]] +; CHECK-NEXT: ret ptr [[GEP1]] ; %gep = getelementptr [4 x i32], ptr %x, i64 %y, i64 %z ret ptr %gep @@ -67,9 +67,9 @@ define ptr @bitcast_vec_to_array_gep_matching_alloc_size(ptr %x, i64 %y, i64 %z) define ptr @bitcast_array_to_vec_gep_matching_alloc_size(ptr %x, i64 %y, i64 %z) { ; CHECK-LABEL: @bitcast_array_to_vec_gep_matching_alloc_size( -; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr inbounds <4 x i32>, ptr [[X:%.*]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <4 x i32>, ptr [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] -; CHECK-NEXT: ret ptr [[GEP]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <4 x i32>, ptr [[GEP_SPLIT:%.*]], i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[GEP]], i64 [[Z1:%.*]] +; CHECK-NEXT: ret ptr [[GEP1]] ; %gep = getelementptr inbounds <4 x i32>, ptr %x, i64 %y, i64 %z ret ptr %gep @@ -81,7 +81,7 @@ define ptr addrspace(3) @bitcast_vec_to_array_addrspace(ptr %x, i64 %y, i64 %z) ; CHECK-LABEL: @bitcast_vec_to_array_addrspace( ; CHECK-NEXT: [[ASC:%.*]] = addrspacecast ptr [[X:%.*]] to ptr addrspace(3) ; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr [7 x i32], ptr addrspace(3) [[ASC]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr [7 x i32], ptr addrspace(3) [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr addrspace(3) [[GEP_SPLIT]], i64 [[Z:%.*]] ; CHECK-NEXT: ret ptr addrspace(3) [[GEP]] ; %asc = addrspacecast ptr %x to ptr addrspace(3) @@ -95,7 +95,7 @@ define ptr addrspace(3) @inbounds_bitcast_vec_to_array_addrspace(ptr %x, i64 %y, ; CHECK-LABEL: @inbounds_bitcast_vec_to_array_addrspace( ; CHECK-NEXT: [[ASC:%.*]] = addrspacecast ptr [[X:%.*]] to ptr addrspace(3) ; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr inbounds [7 x i32], ptr addrspace(3) [[ASC]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [7 x i32], ptr addrspace(3) [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[GEP_SPLIT]], i64 [[Z:%.*]] ; CHECK-NEXT: ret ptr addrspace(3) [[GEP]] ; %asc = addrspacecast ptr %x to ptr addrspace(3) @@ -109,7 +109,7 @@ define ptr addrspace(3) @bitcast_vec_to_array_addrspace_matching_alloc_size(ptr ; CHECK-LABEL: @bitcast_vec_to_array_addrspace_matching_alloc_size( ; CHECK-NEXT: [[ASC:%.*]] = addrspacecast ptr [[X:%.*]] to ptr addrspace(3) ; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr [4 x i32], ptr addrspace(3) [[ASC]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr [4 x i32], ptr addrspace(3) [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr addrspace(3) [[GEP_SPLIT]], i64 [[Z:%.*]] ; CHECK-NEXT: ret ptr addrspace(3) [[GEP]] ; %asc = addrspacecast ptr %x to ptr addrspace(3) @@ -123,7 +123,7 @@ define ptr addrspace(3) @inbounds_bitcast_vec_to_array_addrspace_matching_alloc_ ; CHECK-LABEL: @inbounds_bitcast_vec_to_array_addrspace_matching_alloc_size( ; CHECK-NEXT: [[ASC:%.*]] = addrspacecast ptr [[X:%.*]] to ptr addrspace(3) ; CHECK-NEXT: [[GEP_SPLIT:%.*]] = getelementptr inbounds [4 x i32], ptr addrspace(3) [[ASC]], i64 [[Y:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [4 x i32], ptr addrspace(3) [[GEP_SPLIT]], i64 0, i64 [[Z:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[GEP_SPLIT]], i64 [[Z:%.*]] ; CHECK-NEXT: ret ptr addrspace(3) [[GEP]] ; %asc = addrspacecast ptr %x to ptr addrspace(3) diff --git a/llvm/test/Transforms/InstCombine/gepofconstgepi8.ll b/llvm/test/Transforms/InstCombine/gepofconstgepi8.ll index e2f22b8322d2..42a461964599 100644 --- a/llvm/test/Transforms/InstCombine/gepofconstgepi8.ll +++ b/llvm/test/Transforms/InstCombine/gepofconstgepi8.ll @@ -85,10 +85,8 @@ define ptr @test_zero_sext_add_nsw(ptr %base, i32 %a) { ; CHECK-LABEL: define ptr @test_zero_sext_add_nsw( ; CHECK-SAME: ptr [[BASE:%.*]], i32 [[A:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[BASE]], i64 -4 ; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[A]] to i64 -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[P1]], i64 [[TMP0]] -; CHECK-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[TMP1]], i64 4 +; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[BASE]], i64 [[TMP0]] ; CHECK-NEXT: ret ptr [[P2]] ; entry: @@ -149,8 +147,8 @@ define ptr @test_too_many_indices(ptr %base, i64 %a, i64 %b) { ; CHECK-SAME: ptr [[BASE:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[BASE]], i64 [[B]] -; CHECK-NEXT: [[INDEX:%.*]] = add i64 [[A]], 1 -; CHECK-NEXT: [[P2:%.*]] = getelementptr [8 x i32], ptr [[P1]], i64 1, i64 [[INDEX]] +; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[P1]], i64 36 +; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[TMP0]], i64 [[A]] ; CHECK-NEXT: ret ptr [[P2]] ; entry: diff --git a/llvm/test/Transforms/InstCombine/gepphigep.ll b/llvm/test/Transforms/InstCombine/gepphigep.ll index cd1e38bbb2de..6a6b7708bbfc 100644 --- a/llvm/test/Transforms/InstCombine/gepphigep.ll +++ b/llvm/test/Transforms/InstCombine/gepphigep.ll @@ -21,7 +21,8 @@ define i32 @test1(ptr %dm, i1 %c, i64 %idx1, i64 %idx2) { ; CHECK-NEXT: br label [[BB3]] ; CHECK: bb3: ; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ [[IDX1]], [[BB1]] ], [ [[IDX2]], [[BB2]] ] -; CHECK-NEXT: [[INST24:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[INST1]], i64 [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT2]], ptr [[INST1]], i64 [[TMP0]] +; CHECK-NEXT: [[INST24:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 4 ; CHECK-NEXT: [[INST25:%.*]] = load i32, ptr [[INST24]], align 4 ; CHECK-NEXT: ret i32 [[INST25]] ; @@ -76,11 +77,13 @@ define i32 @test3(ptr %dm, i1 %c, i64 %idx1, i64 %idx2, i64 %idx3) personality p ; CHECK-NEXT: bb: ; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK: bb1: -; CHECK-NEXT: [[INST1:%.*]] = getelementptr inbounds [[STRUCT3:%.*]], ptr [[DM:%.*]], i64 [[IDX1:%.*]], i32 1 +; CHECK-NEXT: [[INST1_SPLIT:%.*]] = getelementptr inbounds [[STRUCT3:%.*]], ptr [[DM:%.*]], i64 [[IDX1:%.*]] +; CHECK-NEXT: [[INST1:%.*]] = getelementptr inbounds nuw i8, ptr [[INST1_SPLIT]], i64 4 ; CHECK-NEXT: store i32 0, ptr [[INST1]], align 4 ; CHECK-NEXT: br label [[BB3:%.*]] ; CHECK: bb2: -; CHECK-NEXT: [[INST12:%.*]] = getelementptr inbounds [[STRUCT3]], ptr [[DM]], i64 [[IDX2:%.*]], i32 1, i32 0, i32 1 +; CHECK-NEXT: [[INST2_SPLIT:%.*]] = getelementptr inbounds [[STRUCT3]], ptr [[DM]], i64 [[IDX2:%.*]] +; CHECK-NEXT: [[INST12:%.*]] = getelementptr inbounds nuw i8, ptr [[INST2_SPLIT]], i64 8 ; CHECK-NEXT: store i32 0, ptr [[INST12]], align 4 ; CHECK-NEXT: br label [[BB3]] ; CHECK: bb3: @@ -92,8 +95,9 @@ define i32 @test3(ptr %dm, i1 %c, i64 %idx1, i64 %idx2, i64 %idx3) personality p ; CHECK: bb5: ; CHECK-NEXT: [[INST27:%.*]] = landingpad { ptr, i32 } ; CHECK-NEXT: catch ptr @_ZTIi -; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT3]], ptr [[DM]], i64 [[TMP0]], i32 1 -; CHECK-NEXT: [[INST35:%.*]] = getelementptr inbounds [[STRUCT4:%.*]], ptr [[TMP1]], i64 [[IDX3:%.*]], i32 1, i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT3]], ptr [[DM]], i64 [[TMP0]] +; CHECK-NEXT: [[INST34_SPLIT:%.*]] = getelementptr [[STRUCT4:%.*]], ptr [[TMP1]], i64 [[IDX3:%.*]] +; CHECK-NEXT: [[INST35:%.*]] = getelementptr i8, ptr [[INST34_SPLIT]], i64 16 ; CHECK-NEXT: [[INST25:%.*]] = load i32, ptr [[INST35]], align 4 ; CHECK-NEXT: ret i32 [[INST25]] ; diff --git a/llvm/test/Transforms/InstCombine/getelementptr.ll b/llvm/test/Transforms/InstCombine/getelementptr.ll index 55b5b5eb1fc0..92b76c5d1b46 100644 --- a/llvm/test/Transforms/InstCombine/getelementptr.ll +++ b/llvm/test/Transforms/InstCombine/getelementptr.ll @@ -247,7 +247,7 @@ define <2 x i1> @test13_vector2(i64 %X, <2 x ptr> %P) nounwind { define <2 x i1> @test13_fixed_fixed(i64 %X, ptr %P, <2 x i64> %y) nounwind { ; CHECK-LABEL: @test13_fixed_fixed( -; CHECK-NEXT: [[A1:%.*]] = getelementptr inbounds <2 x i64>, ptr [[P:%.*]], i64 0, i64 [[X:%.*]] +; CHECK-NEXT: [[A1:%.*]] = getelementptr inbounds i64, ptr [[P:%.*]], i64 [[X:%.*]] ; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x ptr> poison, ptr [[A1]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x ptr> [[DOTSPLATINSERT]], <2 x ptr> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds <2 x i64>, ptr [[P]], <2 x i64> [[Y:%.*]] @@ -760,7 +760,7 @@ define i32 @test30(i32 %m, i32 %n) nounwind { ; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, i64 [[TMP0]], align 4 ; CHECK-NEXT: call void @test30f(ptr nonnull [[TMP1]]) #[[ATTR0]] ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[M:%.*]] to i64 -; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [0 x i32], ptr [[TMP1]], i64 0, i64 [[TMP2]] +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[TMP1]], i64 [[TMP2]] ; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 ; CHECK-NEXT: ret i32 [[TMP4]] ; @@ -1380,7 +1380,7 @@ define ptr @gep_of_gep_multiuse_var_and_var(ptr %p, i64 %idx, i64 %idx2) { ; CHECK-LABEL: @gep_of_gep_multiuse_var_and_var( ; CHECK-NEXT: [[GEP1:%.*]] = getelementptr [4 x i32], ptr [[P:%.*]], i64 [[IDX:%.*]] ; CHECK-NEXT: call void @use(ptr [[GEP1]]) -; CHECK-NEXT: [[GEP2:%.*]] = getelementptr [4 x i32], ptr [[GEP1]], i64 0, i64 [[IDX2:%.*]] +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, ptr [[GEP1]], i64 [[IDX2:%.*]] ; CHECK-NEXT: ret ptr [[GEP2]] ; %gep1 = getelementptr [4 x i32], ptr %p, i64 %idx @@ -1923,7 +1923,7 @@ define ptr @gep_merge_nusw(ptr %p, i64 %x, i64 %y) { define ptr @gep_merge_nuw_add_zero(ptr %p, i64 %idx, i64 %idx2) { ; CHECK-LABEL: @gep_merge_nuw_add_zero( ; CHECK-NEXT: [[GEP:%.*]] = getelementptr nuw [2 x i32], ptr [[GEP_SPLIT:%.*]], i64 [[IDX2:%.*]] -; CHECK-NEXT: [[GEP1:%.*]] = getelementptr nuw [2 x i32], ptr [[GEP]], i64 0, i64 [[IDX3:%.*]] +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr nuw i32, ptr [[GEP]], i64 [[IDX3:%.*]] ; CHECK-NEXT: ret ptr [[GEP1]] ; %gep1 = getelementptr nuw [2 x i32], ptr %p, i64 %idx @@ -1937,7 +1937,7 @@ define ptr @gep_merge_nuw_add_zero(ptr %p, i64 %idx, i64 %idx2) { define ptr @gep_merge_nusw_add_zero(ptr %p, i64 %idx, i64 %idx2) { ; CHECK-LABEL: @gep_merge_nusw_add_zero( ; CHECK-NEXT: [[GEP1:%.*]] = getelementptr nusw [2 x i32], ptr [[P:%.*]], i64 [[IDX:%.*]] -; CHECK-NEXT: [[GEP:%.*]] = getelementptr nusw [2 x i32], ptr [[GEP1]], i64 0, i64 [[IDX2:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr nusw i32, ptr [[GEP1]], i64 [[IDX2:%.*]] ; CHECK-NEXT: ret ptr [[GEP]] ; %gep1 = getelementptr nusw [2 x i32], ptr %p, i64 %idx @@ -1947,7 +1947,8 @@ define ptr @gep_merge_nusw_add_zero(ptr %p, i64 %idx, i64 %idx2) { define ptr @gep_merge_nuw_const(ptr %p, i64 %idx, i64 %idx2) { ; CHECK-LABEL: @gep_merge_nuw_const( -; CHECK-NEXT: [[GEP:%.*]] = getelementptr nuw [2 x i32], ptr [[P:%.*]], i64 [[IDX:%.*]], i64 1 +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr nuw [2 x i32], ptr [[P:%.*]], i64 [[IDX:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr nuw i8, ptr [[GEP1]], i64 4 ; CHECK-NEXT: ret ptr [[GEP]] ; %gep1 = getelementptr nuw [2 x i32], ptr %p, i64 %idx @@ -1970,7 +1971,8 @@ define ptr @gep_merge_nuw_const_neg(ptr %p, i64 %idx, i64 %idx2) { ; does not overflow. define ptr @gep_merge_nusw_const(ptr %p, i64 %idx, i64 %idx2) { ; CHECK-LABEL: @gep_merge_nusw_const( -; CHECK-NEXT: [[GEP:%.*]] = getelementptr [2 x i32], ptr [[P:%.*]], i64 [[IDX:%.*]], i64 1 +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr nusw [2 x i32], ptr [[P:%.*]], i64 [[IDX:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr nusw nuw i8, ptr [[GEP1]], i64 4 ; CHECK-NEXT: ret ptr [[GEP]] ; %gep1 = getelementptr nusw [2 x i32], ptr %p, i64 %idx diff --git a/llvm/test/Transforms/InstCombine/icmp-gep.ll b/llvm/test/Transforms/InstCombine/icmp-gep.ll index 1385dc3f625f..10d7b6df8eaf 100644 --- a/llvm/test/Transforms/InstCombine/icmp-gep.ll +++ b/llvm/test/Transforms/InstCombine/icmp-gep.ll @@ -838,9 +838,9 @@ define i1 @gep_mugtiple_ugt_not_all_nuw(ptr %base, i64 %idx, i64 %idx2) { define i1 @gep_mugtiple_ugt_inbounds_nusw(ptr %base, i64 %idx, i64 %idx2) { ; CHECK-LABEL: @gep_mugtiple_ugt_inbounds_nusw( -; CHECK-NEXT: [[GEP1_IDX1:%.*]] = add i64 [[IDX:%.*]], [[IDX2:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[GEP1_IDX1]], 2 -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP1]], 0 +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[BASE:%.*]], i64 [[IDX:%.*]] +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr nusw i32, ptr [[GEP1]], i64 [[IDX2:%.*]] +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt ptr [[GEP2]], [[BASE]] ; CHECK-NEXT: ret i1 [[CMP]] ; %gep1 = getelementptr inbounds i32, ptr %base, i64 %idx diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll index a090f9c4d261..0faa7da482ef 100644 --- a/llvm/test/Transforms/InstCombine/icmp.ll +++ b/llvm/test/Transforms/InstCombine/icmp.ll @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" @@ -11,8 +11,9 @@ declare void @use_i32(i32) declare void @use_i64(i64) define i32 @test1(i32 %X) { -; CHECK-LABEL: @test1( -; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i32 @test1( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 [[X]], 31 ; CHECK-NEXT: ret i32 [[X_LOBIT]] ; %a = icmp slt i32 %X, 0 @@ -21,8 +22,9 @@ define i32 @test1(i32 %X) { } define <2 x i32> @test1vec(<2 x i32> %X) { -; CHECK-LABEL: @test1vec( -; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr <2 x i32> [[X:%.*]], splat (i32 31) +; CHECK-LABEL: define <2 x i32> @test1vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr <2 x i32> [[X]], splat (i32 31) ; CHECK-NEXT: ret <2 x i32> [[X_LOBIT]] ; %a = icmp slt <2 x i32> %X, zeroinitializer @@ -31,8 +33,9 @@ define <2 x i32> @test1vec(<2 x i32> %X) { } define i32 @test2(i32 %X) { -; CHECK-LABEL: @test2( -; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -1 +; CHECK-LABEL: define i32 @test2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X]], -1 ; CHECK-NEXT: [[B:%.*]] = zext i1 [[A]] to i32 ; CHECK-NEXT: ret i32 [[B]] ; @@ -42,8 +45,9 @@ define i32 @test2(i32 %X) { } define <2 x i32> @test2vec(<2 x i32> %X) { -; CHECK-LABEL: @test2vec( -; CHECK-NEXT: [[A:%.*]] = icmp sgt <2 x i32> [[X:%.*]], splat (i32 -1) +; CHECK-LABEL: define <2 x i32> @test2vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = icmp sgt <2 x i32> [[X]], splat (i32 -1) ; CHECK-NEXT: [[B:%.*]] = zext <2 x i1> [[A]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[B]] ; @@ -53,8 +57,9 @@ define <2 x i32> @test2vec(<2 x i32> %X) { } define i32 @test3(i32 %X) { -; CHECK-LABEL: @test3( -; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i32 @test3( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X]], 31 ; CHECK-NEXT: ret i32 [[X_LOBIT]] ; %a = icmp slt i32 %X, 0 @@ -63,8 +68,9 @@ define i32 @test3(i32 %X) { } define i32 @test4(i32 %X) { -; CHECK-LABEL: @test4( -; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -1 +; CHECK-LABEL: define i32 @test4( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X]], -1 ; CHECK-NEXT: [[B:%.*]] = sext i1 [[A]] to i32 ; CHECK-NEXT: ret i32 [[B]] ; @@ -75,28 +81,31 @@ define i32 @test4(i32 %X) { ; PR4837 define <2 x i1> @test5_eq(<2 x i64> %x) { -; CHECK-LABEL: @test5_eq( +; CHECK-LABEL: define <2 x i1> @test5_eq( +; CHECK-SAME: <2 x i64> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i1> undef ; %V = icmp eq <2 x i64> %x, undef ret <2 x i1> %V } define <2 x i1> @test5_ne(<2 x i64> %x) { -; CHECK-LABEL: @test5_ne( +; CHECK-LABEL: define <2 x i1> @test5_ne( +; CHECK-SAME: <2 x i64> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i1> undef ; %V = icmp ne <2 x i64> %x, undef ret <2 x i1> %V } define <2 x i1> @test5_ugt(<2 x i64> %x) { -; CHECK-LABEL: @test5_ugt( +; CHECK-LABEL: define <2 x i1> @test5_ugt( +; CHECK-SAME: <2 x i64> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i1> zeroinitializer ; %V = icmp ugt <2 x i64> %x, undef ret <2 x i1> %V } define <2 x i1> @test5_zero() { -; CHECK-LABEL: @test5_zero( +; CHECK-LABEL: define <2 x i1> @test5_zero() { ; CHECK-NEXT: ret <2 x i1> undef ; %V = icmp eq <2 x i64> zeroinitializer, undef @@ -104,9 +113,10 @@ define <2 x i1> @test5_zero() { } define i32 @test6(i32 %a, i32 %b) { -; CHECK-LABEL: @test6( -; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[A:%.*]], 0 -; CHECK-NEXT: [[F:%.*]] = select i1 [[ISNEG]], i32 [[B:%.*]], i32 0 +; CHECK-LABEL: define i32 @test6( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[A]], 0 +; CHECK-NEXT: [[F:%.*]] = select i1 [[ISNEG]], i32 [[B]], i32 0 ; CHECK-NEXT: ret i32 [[F]] ; %c = icmp sle i32 %a, -1 @@ -118,8 +128,9 @@ define i32 @test6(i32 %a, i32 %b) { define i1 @test7(i32 %x) { -; CHECK-LABEL: @test7( -; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @test7( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[B]] ; %a = add i32 %x, -1 @@ -128,8 +139,9 @@ define i1 @test7(i32 %x) { } define <2 x i1> @test7_vec(<2 x i32> %x) { -; CHECK-LABEL: @test7_vec( -; CHECK-NEXT: [[B:%.*]] = icmp ne <2 x i32> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @test7_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ne <2 x i32> [[X]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[B]] ; %a = add <2 x i32> %x, <i32 -1, i32 -1> @@ -138,7 +150,8 @@ define <2 x i1> @test7_vec(<2 x i32> %x) { } define i1 @test8(i32 %x) { -; CHECK-LABEL: @test8( +; CHECK-LABEL: define i1 @test8( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i1 false ; %a = add i32 %x, -1 @@ -147,7 +160,8 @@ define i1 @test8(i32 %x) { } define <2 x i1> @test8_vec(<2 x i32> %x) { -; CHECK-LABEL: @test8_vec( +; CHECK-LABEL: define <2 x i1> @test8_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i1> zeroinitializer ; %a = add <2 x i32> %x, <i32 -1, i32 -1> @@ -156,8 +170,9 @@ define <2 x i1> @test8_vec(<2 x i32> %x) { } define i1 @test9(i32 %x) { -; CHECK-LABEL: @test9( -; CHECK-NEXT: [[B:%.*]] = icmp ugt i32 [[X:%.*]], 1 +; CHECK-LABEL: define i1 @test9( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ugt i32 [[X]], 1 ; CHECK-NEXT: ret i1 [[B]] ; %a = add i32 %x, -2 @@ -166,8 +181,9 @@ define i1 @test9(i32 %x) { } define <2 x i1> @test9_vec(<2 x i32> %x) { -; CHECK-LABEL: @test9_vec( -; CHECK-NEXT: [[B:%.*]] = icmp ugt <2 x i32> [[X:%.*]], splat (i32 1) +; CHECK-LABEL: define <2 x i1> @test9_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ugt <2 x i32> [[X]], splat (i32 1) ; CHECK-NEXT: ret <2 x i1> [[B]] ; %a = add <2 x i32> %x, <i32 -2, i32 -2> @@ -176,8 +192,9 @@ define <2 x i1> @test9_vec(<2 x i32> %x) { } define i1 @test9b(i32 %x) { -; CHECK-LABEL: @test9b( -; CHECK-NEXT: [[B:%.*]] = icmp ult i32 [[X:%.*]], 2 +; CHECK-LABEL: define i1 @test9b( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ult i32 [[X]], 2 ; CHECK-NEXT: ret i1 [[B]] ; %a = add i32 %x, -2 @@ -186,8 +203,9 @@ define i1 @test9b(i32 %x) { } define <2 x i1> @test9b_vec(<2 x i32> %x) { -; CHECK-LABEL: @test9b_vec( -; CHECK-NEXT: [[B:%.*]] = icmp ult <2 x i32> [[X:%.*]], splat (i32 2) +; CHECK-LABEL: define <2 x i1> @test9b_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ult <2 x i32> [[X]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[B]] ; %a = add <2 x i32> %x, <i32 -2, i32 -2> @@ -196,8 +214,9 @@ define <2 x i1> @test9b_vec(<2 x i32> %x) { } define i1 @test10(i32 %x) { -; CHECK-LABEL: @test10( -; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], -2147483648 +; CHECK-LABEL: define i1 @test10( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X]], -2147483648 ; CHECK-NEXT: ret i1 [[B]] ; %a = add i32 %x, -1 @@ -206,8 +225,9 @@ define i1 @test10(i32 %x) { } define <2 x i1> @test10_vec(<2 x i32> %x) { -; CHECK-LABEL: @test10_vec( -; CHECK-NEXT: [[B:%.*]] = icmp ne <2 x i32> [[X:%.*]], splat (i32 -2147483648) +; CHECK-LABEL: define <2 x i1> @test10_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ne <2 x i32> [[X]], splat (i32 -2147483648) ; CHECK-NEXT: ret <2 x i1> [[B]] ; %a = add <2 x i32> %x, <i32 -1, i32 -1> @@ -216,8 +236,9 @@ define <2 x i1> @test10_vec(<2 x i32> %x) { } define i1 @test10b(i32 %x) { -; CHECK-LABEL: @test10b( -; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[X:%.*]], -2147483648 +; CHECK-LABEL: define i1 @test10b( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[X]], -2147483648 ; CHECK-NEXT: ret i1 [[B]] ; %a = add i32 %x, -1 @@ -226,8 +247,9 @@ define i1 @test10b(i32 %x) { } define <2 x i1> @test10b_vec(<2 x i32> %x) { -; CHECK-LABEL: @test10b_vec( -; CHECK-NEXT: [[B:%.*]] = icmp eq <2 x i32> [[X:%.*]], splat (i32 -2147483648) +; CHECK-LABEL: define <2 x i1> @test10b_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp eq <2 x i32> [[X]], splat (i32 -2147483648) ; CHECK-NEXT: ret <2 x i1> [[B]] ; %a = add <2 x i32> %x, <i32 -1, i32 -1> @@ -236,7 +258,8 @@ define <2 x i1> @test10b_vec(<2 x i32> %x) { } define i1 @test11(i32 %x) { -; CHECK-LABEL: @test11( +; CHECK-LABEL: define i1 @test11( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i1 true ; %a = add nsw i32 %x, 8 @@ -245,7 +268,8 @@ define i1 @test11(i32 %x) { } define <2 x i1> @test11_vec(<2 x i32> %x) { -; CHECK-LABEL: @test11_vec( +; CHECK-LABEL: define <2 x i1> @test11_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i1> splat (i1 true) ; %a = add nsw <2 x i32> %x, <i32 8, i32 8> @@ -255,8 +279,9 @@ define <2 x i1> @test11_vec(<2 x i32> %x) { ; PR6195 define i1 @test12(i1 %A) { -; CHECK-LABEL: @test12( -; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 [[A:%.*]], true +; CHECK-LABEL: define i1 @test12( +; CHECK-SAME: i1 [[A:%.*]]) { +; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 [[A]], true ; CHECK-NEXT: ret i1 [[NOT_A]] ; %S = select i1 %A, i64 -4294967295, i64 8589934591 @@ -266,7 +291,8 @@ define i1 @test12(i1 %A) { ; PR6481 define i1 @test13(i8 %X) { -; CHECK-LABEL: @test13( +; CHECK-LABEL: define i1 @test13( +; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: ret i1 false ; %cmp = icmp slt i8 undef, %X @@ -274,7 +300,8 @@ define i1 @test13(i8 %X) { } define i1 @test14(i8 %X) { -; CHECK-LABEL: @test14( +; CHECK-LABEL: define i1 @test14( +; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: ret i1 false ; %cmp = icmp slt i8 undef, -128 @@ -282,7 +309,7 @@ define i1 @test14(i8 %X) { } define i1 @test15() { -; CHECK-LABEL: @test15( +; CHECK-LABEL: define i1 @test15() { ; CHECK-NEXT: ret i1 undef ; %cmp = icmp eq i8 undef, -128 @@ -290,7 +317,7 @@ define i1 @test15() { } define i1 @test16() { -; CHECK-LABEL: @test16( +; CHECK-LABEL: define i1 @test16() { ; CHECK-NEXT: ret i1 undef ; %cmp = icmp ne i8 undef, -128 @@ -298,8 +325,9 @@ define i1 @test16() { } define i1 @test17(i32 %x) { -; CHECK-LABEL: @test17( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test17( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X]], 3 ; CHECK-NEXT: ret i1 [[TMP1]] ; %shl = shl i32 1, %x @@ -309,8 +337,9 @@ define i1 @test17(i32 %x) { } define <2 x i1> @test17vec(<2 x i32> %x) { -; CHECK-LABEL: @test17vec( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i32> [[X:%.*]], splat (i32 3) +; CHECK-LABEL: define <2 x i1> @test17vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: ret <2 x i1> [[TMP1]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %x @@ -320,8 +349,9 @@ define <2 x i1> @test17vec(<2 x i32> %x) { } define i1 @test17a(i32 %x) { -; CHECK-LABEL: @test17a( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], 2 +; CHECK-LABEL: define i1 @test17a( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X]], 2 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %x @@ -331,8 +361,9 @@ define i1 @test17a(i32 %x) { } define <2 x i1> @test17a_vec(<2 x i32> %x) { -; CHECK-LABEL: @test17a_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X:%.*]], splat (i32 2) +; CHECK-LABEL: define <2 x i1> @test17a_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %x @@ -342,8 +373,9 @@ define <2 x i1> @test17a_vec(<2 x i32> %x) { } define i1 @test18_eq(i32 %x) { -; CHECK-LABEL: @test18_eq( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test18_eq( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X]], 3 ; CHECK-NEXT: ret i1 [[TMP1]] ; %sh = lshr i32 8, %x @@ -353,8 +385,9 @@ define i1 @test18_eq(i32 %x) { } define <2 x i1> @test18_eq_vec(<2 x i32> %x) { -; CHECK-LABEL: @test18_eq_vec( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i32> [[X:%.*]], splat (i32 3) +; CHECK-LABEL: define <2 x i1> @test18_eq_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: ret <2 x i1> [[TMP1]] ; %sh = lshr <2 x i32> <i32 8, i32 8>, %x @@ -364,8 +397,9 @@ define <2 x i1> @test18_eq_vec(<2 x i32> %x) { } define i1 @test18_ne(i32 %x) { -; CHECK-LABEL: @test18_ne( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test18_ne( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 3 ; CHECK-NEXT: ret i1 [[TMP1]] ; %sh = lshr i32 8, %x @@ -375,8 +409,9 @@ define i1 @test18_ne(i32 %x) { } define <2 x i1> @test18_ne_vec(<2 x i32> %x) { -; CHECK-LABEL: @test18_ne_vec( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X:%.*]], splat (i32 3) +; CHECK-LABEL: define <2 x i1> @test18_ne_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: ret <2 x i1> [[TMP1]] ; %sh = lshr <2 x i32> <i32 8, i32 8>, %x @@ -386,8 +421,9 @@ define <2 x i1> @test18_ne_vec(<2 x i32> %x) { } define i1 @test19(i32 %x) { -; CHECK-LABEL: @test19( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test19( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 3 ; CHECK-NEXT: ret i1 [[TMP1]] ; %shl = shl i32 1, %x @@ -397,8 +433,9 @@ define i1 @test19(i32 %x) { } define <2 x i1> @test19vec(<2 x i32> %x) { -; CHECK-LABEL: @test19vec( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X:%.*]], splat (i32 3) +; CHECK-LABEL: define <2 x i1> @test19vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: ret <2 x i1> [[TMP1]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %x @@ -408,8 +445,9 @@ define <2 x i1> @test19vec(<2 x i32> %x) { } define <2 x i1> @cmp_and_signbit_vec(<2 x i3> %x) { -; CHECK-LABEL: @cmp_and_signbit_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i3> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @cmp_and_signbit_vec( +; CHECK-SAME: <2 x i3> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i3> [[X]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %and = and <2 x i3> %x, <i3 4, i3 4> @@ -418,8 +456,9 @@ define <2 x i1> @cmp_and_signbit_vec(<2 x i3> %x) { } define i1 @test20(i32 %x) { -; CHECK-LABEL: @test20( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test20( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 3 ; CHECK-NEXT: ret i1 [[TMP1]] ; %shl = shl i32 1, %x @@ -429,8 +468,9 @@ define i1 @test20(i32 %x) { } define <2 x i1> @test20vec(<2 x i32> %x) { -; CHECK-LABEL: @test20vec( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X:%.*]], splat (i32 3) +; CHECK-LABEL: define <2 x i1> @test20vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: ret <2 x i1> [[TMP1]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %x @@ -440,8 +480,9 @@ define <2 x i1> @test20vec(<2 x i32> %x) { } define i1 @test20a(i32 %x) { -; CHECK-LABEL: @test20a( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test20a( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], 3 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %x @@ -451,8 +492,9 @@ define i1 @test20a(i32 %x) { } define <2 x i1> @test20a_vec(<2 x i32> %x) { -; CHECK-LABEL: @test20a_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], splat (i32 3) +; CHECK-LABEL: define <2 x i1> @test20a_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %x @@ -462,8 +504,9 @@ define <2 x i1> @test20a_vec(<2 x i32> %x) { } define i1 @test21(i8 %x, i8 %y) { -; CHECK-LABEL: @test21( -; CHECK-NEXT: [[B:%.*]] = icmp ugt i8 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test21( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ugt i8 [[X]], 3 ; CHECK-NEXT: ret i1 [[B]] ; %A = or i8 %x, 1 @@ -472,8 +515,9 @@ define i1 @test21(i8 %x, i8 %y) { } define i1 @test22(i8 %x, i8 %y) { -; CHECK-LABEL: @test22( -; CHECK-NEXT: [[B:%.*]] = icmp ult i8 [[X:%.*]], 4 +; CHECK-LABEL: define i1 @test22( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ult i8 [[X]], 4 ; CHECK-NEXT: ret i1 [[B]] ; %A = or i8 %x, 1 @@ -483,8 +527,9 @@ define i1 @test22(i8 %x, i8 %y) { ; PR2740 define i1 @test23(i32 %x) { -; CHECK-LABEL: @test23( -; CHECK-NEXT: [[I4:%.*]] = icmp sgt i32 [[X:%.*]], 1328634634 +; CHECK-LABEL: define i1 @test23( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[I4:%.*]] = icmp sgt i32 [[X]], 1328634634 ; CHECK-NEXT: ret i1 [[I4]] ; %i3 = sdiv i32 %x, -1328634635 @@ -493,8 +538,9 @@ define i1 @test23(i32 %x) { } define <2 x i1> @test23vec(<2 x i32> %x) { -; CHECK-LABEL: @test23vec( -; CHECK-NEXT: [[I4:%.*]] = icmp sgt <2 x i32> [[X:%.*]], splat (i32 1328634634) +; CHECK-LABEL: define <2 x i1> @test23vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[I4:%.*]] = icmp sgt <2 x i32> [[X]], splat (i32 1328634634) ; CHECK-NEXT: ret <2 x i1> [[I4]] ; %i3 = sdiv <2 x i32> %x, <i32 -1328634635, i32 -1328634635> @@ -505,8 +551,9 @@ define <2 x i1> @test23vec(<2 x i32> %x) { ; Note: offs can be negative, LLVM used to make an incorrect assumption that ; unsigned overflow does not happen during offset computation define i1 @test24_neg_offs(ptr %p, i64 %offs) { -; CHECK-LABEL: @test24_neg_offs( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[OFFS:%.*]], -2 +; CHECK-LABEL: define i1 @test24_neg_offs( +; CHECK-SAME: ptr [[P:%.*]], i64 [[OFFS:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[OFFS]], -2 ; CHECK-NEXT: ret i1 [[CMP]] ; %p1 = getelementptr inbounds i32, ptr %p, i64 %offs @@ -519,8 +566,9 @@ define i1 @test24_neg_offs(ptr %p, i64 %offs) { ; X - Z > Y - Z -> X > Y if there is no overflow. define i1 @test27(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test27( -; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test27( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %lhs = sub nsw i32 %x, %z @@ -530,10 +578,11 @@ define i1 @test27(i32 %x, i32 %y, i32 %z) { } define i1 @test27_extra_uses(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test27_extra_uses( -; CHECK-NEXT: [[LHS:%.*]] = sub nsw i32 [[X:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i1 @test27_extra_uses( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[LHS:%.*]] = sub nsw i32 [[X]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[LHS]]) -; CHECK-NEXT: [[RHS:%.*]] = sub nsw i32 [[Y:%.*]], [[Z]] +; CHECK-NEXT: [[RHS:%.*]] = sub nsw i32 [[Y]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[RHS]]) ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] @@ -548,8 +597,9 @@ define i1 @test27_extra_uses(i32 %x, i32 %y, i32 %z) { ; X - Z > Y - Z -> X > Y if there is no overflow. define i1 @test28(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test28( -; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test28( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %lhs = sub nuw i32 %x, %z @@ -559,10 +609,11 @@ define i1 @test28(i32 %x, i32 %y, i32 %z) { } define i1 @test28_extra_uses(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test28_extra_uses( -; CHECK-NEXT: [[LHS:%.*]] = sub nuw i32 [[X:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i1 @test28_extra_uses( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[LHS:%.*]] = sub nuw i32 [[X]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[LHS]]) -; CHECK-NEXT: [[RHS:%.*]] = sub nuw i32 [[Y:%.*]], [[Z]] +; CHECK-NEXT: [[RHS:%.*]] = sub nuw i32 [[Y]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[RHS]]) ; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] @@ -578,9 +629,10 @@ define i1 @test28_extra_uses(i32 %x, i32 %y, i32 %z) { ; PR36969 - https://bugs.llvm.org/show_bug.cgi?id=36969 define i1 @ugt_sub(i32 %xsrc, i32 %y) { -; CHECK-LABEL: @ugt_sub( -; CHECK-NEXT: [[X:%.*]] = udiv i32 [[XSRC:%.*]], 42 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[Y:%.*]], [[X]] +; CHECK-LABEL: define i1 @ugt_sub( +; CHECK-SAME: i32 [[XSRC:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = udiv i32 [[XSRC]], 42 +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[Y]], [[X]] ; CHECK-NEXT: ret i1 [[CMP]] ; %x = udiv i32 %xsrc, 42 ; thwart complexity-based canonicalization @@ -592,9 +644,10 @@ define i1 @ugt_sub(i32 %xsrc, i32 %y) { ; Swap operands and predicate. Try a vector type to verify that works too. define <2 x i1> @ult_sub(<2 x i8> %xsrc, <2 x i8> %y) { -; CHECK-LABEL: @ult_sub( -; CHECK-NEXT: [[X:%.*]] = udiv <2 x i8> [[XSRC:%.*]], <i8 42, i8 -42> -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i8> [[X]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i1> @ult_sub( +; CHECK-SAME: <2 x i8> [[XSRC:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = udiv <2 x i8> [[XSRC]], <i8 42, i8 -42> +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i8> [[X]], [[Y]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %x = udiv <2 x i8> %xsrc, <i8 42, i8 -42> ; thwart complexity-based canonicalization @@ -605,8 +658,9 @@ define <2 x i1> @ult_sub(<2 x i8> %xsrc, <2 x i8> %y) { ; X - Y > X -> 0 > Y if there is no overflow. define i1 @test33(i32 %x, i32 %y) { -; CHECK-LABEL: @test33( -; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[Y:%.*]], 0 +; CHECK-LABEL: define i1 @test33( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[Y]], 0 ; CHECK-NEXT: ret i1 [[C]] ; %lhs = sub nsw i32 %x, %y @@ -616,7 +670,8 @@ define i1 @test33(i32 %x, i32 %y) { ; X - Y > X -> 0 > Y if there is no overflow. define i1 @test34(i32 %x, i32 %y) { -; CHECK-LABEL: @test34( +; CHECK-LABEL: define i1 @test34( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { ; CHECK-NEXT: ret i1 false ; %lhs = sub nuw i32 %x, %y @@ -626,8 +681,9 @@ define i1 @test34(i32 %x, i32 %y) { ; X > X - Y -> Y > 0 if there is no overflow. define i1 @test35(i32 %x, i32 %y) { -; CHECK-LABEL: @test35( -; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Y:%.*]], 0 +; CHECK-LABEL: define i1 @test35( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Y]], 0 ; CHECK-NEXT: ret i1 [[C]] ; %rhs = sub nsw i32 %x, %y @@ -637,8 +693,9 @@ define i1 @test35(i32 %x, i32 %y) { ; X > X - Y -> Y > 0 if there is no overflow. define i1 @test36(i32 %x, i32 %y) { -; CHECK-LABEL: @test36( -; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[Y:%.*]], 0 +; CHECK-LABEL: define i1 @test36( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[Y]], 0 ; CHECK-NEXT: ret i1 [[C]] ; %rhs = sub nuw i32 %x, %y @@ -648,8 +705,9 @@ define i1 @test36(i32 %x, i32 %y) { ; X - Y > X - Z -> Z > Y if there is no overflow. define i1 @test37(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test37( -; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Z:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test37( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Z]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %lhs = sub nsw i32 %x, %y @@ -659,10 +717,11 @@ define i1 @test37(i32 %x, i32 %y, i32 %z) { } define i1 @test37_extra_uses(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test37_extra_uses( -; CHECK-NEXT: [[LHS:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test37_extra_uses( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[LHS:%.*]] = sub nsw i32 [[X]], [[Y]] ; CHECK-NEXT: call void @use_i32(i32 [[LHS]]) -; CHECK-NEXT: [[RHS:%.*]] = sub nsw i32 [[X]], [[Z:%.*]] +; CHECK-NEXT: [[RHS:%.*]] = sub nsw i32 [[X]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[RHS]]) ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[Z]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] @@ -678,8 +737,9 @@ define i1 @test37_extra_uses(i32 %x, i32 %y, i32 %z) { ; TODO: Min/max pattern should not prevent the fold. define i32 @neg_max_s32(i32 %x, i32 %y) { -; CHECK-LABEL: @neg_max_s32( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 [[Y:%.*]]) +; CHECK-LABEL: define i32 @neg_max_s32( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: ret i32 [[TMP1]] ; %nx = sub nsw i32 0, %x @@ -691,8 +751,9 @@ define i32 @neg_max_s32(i32 %x, i32 %y) { } define <4 x i32> @neg_max_v4s32(<4 x i32> %x, <4 x i32> %y) { -; CHECK-LABEL: @neg_max_v4s32( -; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) +; CHECK-LABEL: define <4 x i32> @neg_max_v4s32( +; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[X]], <4 x i32> [[Y]]) ; CHECK-NEXT: ret <4 x i32> [[TMP1]] ; %nx = sub nsw <4 x i32> zeroinitializer, %x @@ -705,8 +766,9 @@ define <4 x i32> @neg_max_v4s32(<4 x i32> %x, <4 x i32> %y) { ; X - Y > X - Z -> Z > Y if there is no overflow. define i1 @test38(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test38( -; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[Z:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test38( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[Z]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %lhs = sub nuw i32 %x, %y @@ -716,10 +778,11 @@ define i1 @test38(i32 %x, i32 %y, i32 %z) { } define i1 @test38_extra_uses(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @test38_extra_uses( -; CHECK-NEXT: [[LHS:%.*]] = sub nuw i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test38_extra_uses( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[LHS:%.*]] = sub nuw i32 [[X]], [[Y]] ; CHECK-NEXT: call void @use_i32(i32 [[LHS]]) -; CHECK-NEXT: [[RHS:%.*]] = sub nuw i32 [[X]], [[Z:%.*]] +; CHECK-NEXT: [[RHS:%.*]] = sub nuw i32 [[X]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[RHS]]) ; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[Z]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] @@ -733,8 +796,9 @@ define i1 @test38_extra_uses(i32 %x, i32 %y, i32 %z) { } define i1 @shr_exact(i132 %x) { -; CHECK-LABEL: @shr_exact( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i132 [[X:%.*]], 32 +; CHECK-LABEL: define i1 @shr_exact( +; CHECK-SAME: i132 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i132 [[X]], 32 ; CHECK-NEXT: ret i1 [[CMP]] ; %sh = ashr exact i132 %x, 4 @@ -743,8 +807,9 @@ define i1 @shr_exact(i132 %x) { } define <2 x i1> @shr_exact_vec(<2 x i132> %x) { -; CHECK-LABEL: @shr_exact_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i132> [[X:%.*]], splat (i132 32) +; CHECK-LABEL: define <2 x i1> @shr_exact_vec( +; CHECK-SAME: <2 x i132> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i132> [[X]], splat (i132 32) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %sh = lshr exact <2 x i132> %x, <i132 4, i132 4> @@ -754,7 +819,8 @@ define <2 x i1> @shr_exact_vec(<2 x i132> %x) { ; PR9343 #3 define i1 @test41(i32 %X, i32 %Y) { -; CHECK-LABEL: @test41( +; CHECK-LABEL: define i1 @test41( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { ; CHECK-NEXT: ret i1 true ; %A = urem i32 %X, %Y @@ -763,8 +829,9 @@ define i1 @test41(i32 %X, i32 %Y) { } define i1 @test42(i32 %X, i32 %Y) { -; CHECK-LABEL: @test42( -; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1 +; CHECK-LABEL: define i1 @test42( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y]], -1 ; CHECK-NEXT: ret i1 [[B]] ; %A = srem i32 %X, %Y @@ -773,8 +840,9 @@ define i1 @test42(i32 %X, i32 %Y) { } define i1 @test43(i32 %X, i32 %Y) { -; CHECK-LABEL: @test43( -; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[Y:%.*]], 0 +; CHECK-LABEL: define i1 @test43( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[Y]], 0 ; CHECK-NEXT: ret i1 [[B]] ; %A = srem i32 %X, %Y @@ -783,8 +851,9 @@ define i1 @test43(i32 %X, i32 %Y) { } define i1 @test44(i32 %X, i32 %Y) { -; CHECK-LABEL: @test44( -; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1 +; CHECK-LABEL: define i1 @test44( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y]], -1 ; CHECK-NEXT: ret i1 [[B]] ; %A = srem i32 %X, %Y @@ -793,8 +862,9 @@ define i1 @test44(i32 %X, i32 %Y) { } define i1 @test45(i32 %X, i32 %Y) { -; CHECK-LABEL: @test45( -; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[Y:%.*]], 0 +; CHECK-LABEL: define i1 @test45( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[Y]], 0 ; CHECK-NEXT: ret i1 [[B]] ; %A = srem i32 %X, %Y @@ -804,8 +874,9 @@ define i1 @test45(i32 %X, i32 %Y) { ; PR9343 #4 define i1 @test46(i32 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @test46( -; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test46( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %A = ashr exact i32 %X, %Z @@ -815,10 +886,11 @@ define i1 @test46(i32 %X, i32 %Y, i32 %Z) { } define i1 @test46_multiuse1(i32 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @test46_multiuse1( -; CHECK-NEXT: [[A:%.*]] = ashr exact i32 [[X:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i1 @test46_multiuse1( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = ashr exact i32 [[X]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[A]]) -; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X]], [[Y:%.*]] +; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %A = ashr exact i32 %X, %Z @@ -829,10 +901,11 @@ define i1 @test46_multiuse1(i32 %X, i32 %Y, i32 %Z) { } define i1 @test46_multiuse2(i32 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @test46_multiuse2( -; CHECK-NEXT: [[B:%.*]] = ashr exact i32 [[Y:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i1 @test46_multiuse2( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = ashr exact i32 [[Y]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[B]]) -; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], [[Y]] +; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %A = ashr exact i32 %X, %Z @@ -843,10 +916,11 @@ define i1 @test46_multiuse2(i32 %X, i32 %Y, i32 %Z) { } define i1 @test46_multiuse3(i32 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @test46_multiuse3( -; CHECK-NEXT: [[A:%.*]] = ashr exact i32 [[X:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i1 @test46_multiuse3( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = ashr exact i32 [[X]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[A]]) -; CHECK-NEXT: [[B:%.*]] = ashr exact i32 [[Y:%.*]], [[Z]] +; CHECK-NEXT: [[B:%.*]] = ashr exact i32 [[Y]], [[Z]] ; CHECK-NEXT: call void @use_i32(i32 [[B]]) ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A]], [[B]] ; CHECK-NEXT: ret i1 [[C]] @@ -861,8 +935,9 @@ define i1 @test46_multiuse3(i32 %X, i32 %Y, i32 %Z) { ; PR9343 #5 define i1 @test47(i32 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @test47( -; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test47( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %A = ashr exact i32 %X, %Z @@ -873,8 +948,9 @@ define i1 @test47(i32 %X, i32 %Y, i32 %Z) { ; PR9343 #8 define i1 @test48(i32 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @test48( -; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test48( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %A = sdiv exact i32 %X, %Z @@ -886,9 +962,10 @@ define i1 @test48(i32 %X, i32 %Y, i32 %Z) { ; The above transform only works for equality predicates. define i1 @PR32949(i32 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @PR32949( -; CHECK-NEXT: [[A:%.*]] = sdiv exact i32 [[X:%.*]], [[Z:%.*]] -; CHECK-NEXT: [[B:%.*]] = sdiv exact i32 [[Y:%.*]], [[Z]] +; CHECK-LABEL: define i1 @PR32949( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = sdiv exact i32 [[X]], [[Z]] +; CHECK-NEXT: [[B:%.*]] = sdiv exact i32 [[Y]], [[Z]] ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A]], [[B]] ; CHECK-NEXT: ret i1 [[C]] ; @@ -899,8 +976,9 @@ define i1 @PR32949(i32 %X, i32 %Y, i32 %Z) { } define i1 @test_sdiv_pos_slt(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_slt( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_slt( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -910,8 +988,9 @@ define i1 @test_sdiv_pos_slt(i32 %x, i32 %y) { } define i1 @test_sdiv_pos_sle(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_sle( -; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_sle( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -921,8 +1000,9 @@ define i1 @test_sdiv_pos_sle(i32 %x, i32 %y) { } define i1 @test_sdiv_pos_sgt(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_sgt( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_sgt( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -932,8 +1012,9 @@ define i1 @test_sdiv_pos_sgt(i32 %x, i32 %y) { } define i1 @test_sdiv_pos_sge(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_sge( -; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_sge( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -943,8 +1024,9 @@ define i1 @test_sdiv_pos_sge(i32 %x, i32 %y) { } define i1 @test_sdiv_pos_ult(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_ult( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_ult( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -954,8 +1036,9 @@ define i1 @test_sdiv_pos_ult(i32 %x, i32 %y) { } define i1 @test_sdiv_pos_ule(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_ule( -; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_ule( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -965,8 +1048,9 @@ define i1 @test_sdiv_pos_ule(i32 %x, i32 %y) { } define i1 @test_sdiv_pos_ugt(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_ugt( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_ugt( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -976,8 +1060,9 @@ define i1 @test_sdiv_pos_ugt(i32 %x, i32 %y) { } define i1 @test_sdiv_pos_uge(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_pos_uge( -; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test_sdiv_pos_uge( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %divx = sdiv exact i32 %x, 40 @@ -987,9 +1072,10 @@ define i1 @test_sdiv_pos_uge(i32 %x, i32 %y) { } define i1 @test_sdiv_neg_slt(i32 %x, i32 %y) { -; CHECK-LABEL: @test_sdiv_neg_slt( -; CHECK-NEXT: [[DIVX:%.*]] = sdiv exact i32 [[X:%.*]], -40 -; CHECK-NEXT: [[DIVY:%.*]] = sdiv exact i32 [[Y:%.*]], -40 +; CHECK-LABEL: define i1 @test_sdiv_neg_slt( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[DIVX:%.*]] = sdiv exact i32 [[X]], -40 +; CHECK-NEXT: [[DIVY:%.*]] = sdiv exact i32 [[Y]], -40 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[DIVX]], [[DIVY]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1001,8 +1087,9 @@ define i1 @test_sdiv_neg_slt(i32 %x, i32 %y) { ; PR8469 define <2 x i1> @test49(<2 x i32> %i3) { -; CHECK-LABEL: @test49( -; CHECK-NEXT: entry: +; CHECK-LABEL: define <2 x i1> @test49( +; CHECK-SAME: <2 x i32> [[I3:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: ret <2 x i1> splat (i1 true) ; entry: @@ -1013,7 +1100,8 @@ entry: ; PR9343 #7 define i1 @test50(i16 %X, i32 %Y) { -; CHECK-LABEL: @test50( +; CHECK-LABEL: define i1 @test50( +; CHECK-SAME: i16 [[X:%.*]], i32 [[Y:%.*]]) { ; CHECK-NEXT: ret i1 true ; %A = zext i16 %X to i32 @@ -1023,9 +1111,10 @@ define i1 @test50(i16 %X, i32 %Y) { } define i1 @test51(i32 %X, i32 %Y) { -; CHECK-LABEL: @test51( -; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], -2147483648 -; CHECK-NEXT: [[B:%.*]] = srem i32 [[A]], [[Y:%.*]] +; CHECK-LABEL: define i1 @test51( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = and i32 [[X]], -2147483648 +; CHECK-NEXT: [[B:%.*]] = srem i32 [[A]], [[Y]] ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[B]], -1 ; CHECK-NEXT: ret i1 [[C]] ; @@ -1036,8 +1125,9 @@ define i1 @test51(i32 %X, i32 %Y) { } define i1 @test52(i32 %x1) { -; CHECK-LABEL: @test52( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1:%.*]], 16711935 +; CHECK-LABEL: define i1 @test52( +; CHECK-SAME: i32 [[X1:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1]], 16711935 ; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[TMP1]], 4980863 ; CHECK-NEXT: ret i1 [[A]] ; @@ -1052,8 +1142,9 @@ define i1 @test52(i32 %x1) { } define i1 @test52_logical(i32 %x1) { -; CHECK-LABEL: @test52_logical( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1:%.*]], 16711935 +; CHECK-LABEL: define i1 @test52_logical( +; CHECK-SAME: i32 [[X1:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1]], 16711935 ; CHECK-NEXT: [[A:%.*]] = icmp eq i32 [[TMP1]], 4980863 ; CHECK-NEXT: ret i1 [[A]] ; @@ -1068,8 +1159,9 @@ define i1 @test52_logical(i32 %x1) { } define i1 @test52b(i128 %x1) { -; CHECK-LABEL: @test52b( -; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1:%.*]], 16711935 +; CHECK-LABEL: define i1 @test52b( +; CHECK-SAME: i128 [[X1:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1]], 16711935 ; CHECK-NEXT: [[A:%.*]] = icmp eq i128 [[TMP1]], 4980863 ; CHECK-NEXT: ret i1 [[A]] ; @@ -1084,8 +1176,9 @@ define i1 @test52b(i128 %x1) { } define i1 @test52b_logical(i128 %x1) { -; CHECK-LABEL: @test52b_logical( -; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1:%.*]], 16711935 +; CHECK-LABEL: define i1 @test52b_logical( +; CHECK-SAME: i128 [[X1:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1]], 16711935 ; CHECK-NEXT: [[A:%.*]] = icmp eq i128 [[TMP1]], 4980863 ; CHECK-NEXT: ret i1 [[A]] ; @@ -1101,9 +1194,10 @@ define i1 @test52b_logical(i128 %x1) { ; PR9838 define i1 @test53(i32 %a, i32 %b) { -; CHECK-LABEL: @test53( -; CHECK-NEXT: [[X:%.*]] = sdiv exact i32 [[A:%.*]], 30 -; CHECK-NEXT: [[Y:%.*]] = sdiv i32 [[B:%.*]], 30 +; CHECK-LABEL: define i1 @test53( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = sdiv exact i32 [[A]], 30 +; CHECK-NEXT: [[Y:%.*]] = sdiv i32 [[B]], 30 ; CHECK-NEXT: [[Z:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[Z]] ; @@ -1114,8 +1208,9 @@ define i1 @test53(i32 %a, i32 %b) { } define i1 @test54(i8 %a) { -; CHECK-LABEL: @test54( -; CHECK-NEXT: [[RET:%.*]] = icmp slt i8 [[A:%.*]], -64 +; CHECK-LABEL: define i1 @test54( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[RET:%.*]] = icmp slt i8 [[A]], -64 ; CHECK-NEXT: ret i1 [[RET]] ; %ext = zext i8 %a to i32 @@ -1125,8 +1220,9 @@ define i1 @test54(i8 %a) { } define i1 @test55(i32 %a) { -; CHECK-LABEL: @test55( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], -123 +; CHECK-LABEL: define i1 @test55( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], -123 ; CHECK-NEXT: ret i1 [[CMP]] ; %sub = sub i32 0, %a @@ -1135,8 +1231,9 @@ define i1 @test55(i32 %a) { } define <2 x i1> @test55vec(<2 x i32> %a) { -; CHECK-LABEL: @test55vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], splat (i32 -123) +; CHECK-LABEL: define <2 x i1> @test55vec( +; CHECK-SAME: <2 x i32> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A]], splat (i32 -123) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %sub = sub <2 x i32> zeroinitializer, %a @@ -1145,8 +1242,9 @@ define <2 x i1> @test55vec(<2 x i32> %a) { } define i1 @test56(i32 %a) { -; CHECK-LABEL: @test56( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], -113 +; CHECK-LABEL: define i1 @test56( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], -113 ; CHECK-NEXT: ret i1 [[CMP]] ; %sub = sub i32 10, %a @@ -1155,8 +1253,9 @@ define i1 @test56(i32 %a) { } define <2 x i1> @test56vec(<2 x i32> %a) { -; CHECK-LABEL: @test56vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], splat (i32 -113) +; CHECK-LABEL: define <2 x i1> @test56vec( +; CHECK-SAME: <2 x i32> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A]], splat (i32 -113) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %sub = sub <2 x i32> <i32 10, i32 10>, %a @@ -1166,8 +1265,9 @@ define <2 x i1> @test56vec(<2 x i32> %a) { ; PR10267 Don't make icmps more expensive when no other inst is subsumed. define i1 @test57(i32 %a) { -; CHECK-LABEL: @test57( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], -2 +; CHECK-LABEL: define i1 @test57( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[A]], -2 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 ; CHECK-NEXT: call void @use_i32(i32 [[AND]]) ; CHECK-NEXT: ret i1 [[CMP]] @@ -1180,8 +1280,9 @@ define i1 @test57(i32 %a) { ; rdar://problem/10482509 define zeroext i1 @cmpabs1(i64 %val) { -; CHECK-LABEL: @cmpabs1( -; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 [[VAL:%.*]], 0 +; CHECK-LABEL: define zeroext i1 @cmpabs1( +; CHECK-SAME: i64 [[VAL:%.*]]) { +; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 [[VAL]], 0 ; CHECK-NEXT: ret i1 [[TOBOOL]] ; %sub = sub nsw i64 0, %val @@ -1192,8 +1293,9 @@ define zeroext i1 @cmpabs1(i64 %val) { } define zeroext i1 @cmpabs2(i64 %val) { -; CHECK-LABEL: @cmpabs2( -; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 [[VAL:%.*]], 0 +; CHECK-LABEL: define zeroext i1 @cmpabs2( +; CHECK-SAME: i64 [[VAL:%.*]]) { +; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 [[VAL]], 0 ; CHECK-NEXT: ret i1 [[TOBOOL]] ; %sub = sub nsw i64 0, %val @@ -1204,8 +1306,9 @@ define zeroext i1 @cmpabs2(i64 %val) { } define i1 @abs_intrin_eq_zero(i8 %x) { -; CHECK-LABEL: @abs_intrin_eq_zero( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @abs_intrin_eq_zero( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %abs = call i8 @llvm.abs.i8(i8 %x, i1 false) @@ -1214,8 +1317,9 @@ define i1 @abs_intrin_eq_zero(i8 %x) { } define i1 @abs_intrin_ne_zero(i8 %x) { -; CHECK-LABEL: @abs_intrin_ne_zero( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @abs_intrin_ne_zero( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %abs = call i8 @llvm.abs.i8(i8 %x, i1 false) @@ -1224,7 +1328,7 @@ define i1 @abs_intrin_ne_zero(i8 %x) { } define void @test58() { -; CHECK-LABEL: @test58( +; CHECK-LABEL: define void @test58() { ; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 36029346783166592) ; CHECK-NEXT: ret void ; @@ -1236,8 +1340,9 @@ declare i32 @test58_d(i64) ; Negative test: GEP inbounds may cross sign boundary. define i1 @test62(ptr %a) { -; CHECK-LABEL: @test62( -; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i8, ptr [[A:%.*]], i64 1 +; CHECK-LABEL: define i1 @test62( +; CHECK-SAME: ptr [[A:%.*]]) { +; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 1 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 10 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt ptr [[ARRAYIDX1]], [[ARRAYIDX2]] ; CHECK-NEXT: ret i1 [[CMP]] @@ -1249,8 +1354,9 @@ define i1 @test62(ptr %a) { } define i1 @test62_as1(ptr addrspace(1) %a) { -; CHECK-LABEL: @test62_as1( -; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(1) [[A:%.*]], i16 1 +; CHECK-LABEL: define i1 @test62_as1( +; CHECK-SAME: ptr addrspace(1) [[A:%.*]]) { +; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(1) [[A]], i16 1 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(1) [[A]], i16 10 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt ptr addrspace(1) [[ARRAYIDX1]], [[ARRAYIDX2]] ; CHECK-NEXT: ret i1 [[CMP]] @@ -1262,9 +1368,10 @@ define i1 @test62_as1(ptr addrspace(1) %a) { } define i1 @low_mask_eq_zext(i8 %a, i32 %b) { -; CHECK-LABEL: @low_mask_eq_zext( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8 -; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], [[TMP1]] +; CHECK-LABEL: define i1 @low_mask_eq_zext( +; CHECK-SAME: i8 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B]] to i8 +; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] ; %z = zext i8 %a to i32 @@ -1274,9 +1381,10 @@ define i1 @low_mask_eq_zext(i8 %a, i32 %b) { } define i1 @low_mask_eq_zext_commute(i8 %a, i32 %b) { -; CHECK-LABEL: @low_mask_eq_zext_commute( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8 -; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], [[TMP1]] +; CHECK-LABEL: define i1 @low_mask_eq_zext_commute( +; CHECK-SAME: i8 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B]] to i8 +; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] ; %t = and i32 %b, 255 @@ -1288,9 +1396,10 @@ define i1 @low_mask_eq_zext_commute(i8 %a, i32 %b) { ; negative test define i1 @wrong_low_mask_eq_zext(i8 %a, i32 %b) { -; CHECK-LABEL: @wrong_low_mask_eq_zext( -; CHECK-NEXT: [[T:%.*]] = and i32 [[B:%.*]], 127 -; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A:%.*]] to i32 +; CHECK-LABEL: define i1 @wrong_low_mask_eq_zext( +; CHECK-SAME: i8 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[T:%.*]] = and i32 [[B]], 127 +; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A]] to i32 ; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[T]], [[Z]] ; CHECK-NEXT: ret i1 [[C]] ; @@ -1303,9 +1412,10 @@ define i1 @wrong_low_mask_eq_zext(i8 %a, i32 %b) { ; negative test define i1 @wrong_low_mask_eq_zext2(i8 %a, i32 %b) { -; CHECK-LABEL: @wrong_low_mask_eq_zext2( -; CHECK-NEXT: [[T:%.*]] = and i32 [[B:%.*]], 254 -; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A:%.*]] to i32 +; CHECK-LABEL: define i1 @wrong_low_mask_eq_zext2( +; CHECK-SAME: i8 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[T:%.*]] = and i32 [[B]], 254 +; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A]] to i32 ; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[T]], [[Z]] ; CHECK-NEXT: ret i1 [[C]] ; @@ -1316,11 +1426,12 @@ define i1 @wrong_low_mask_eq_zext2(i8 %a, i32 %b) { } define i1 @low_mask_eq_zext_use1(i8 %a, i32 %b) { -; CHECK-LABEL: @low_mask_eq_zext_use1( -; CHECK-NEXT: [[T:%.*]] = and i32 [[B:%.*]], 255 +; CHECK-LABEL: define i1 @low_mask_eq_zext_use1( +; CHECK-SAME: i8 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[T:%.*]] = and i32 [[B]], 255 ; CHECK-NEXT: call void @use_i32(i32 [[T]]) ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B]] to i8 -; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A:%.*]], [[TMP1]] +; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] ; %t = and i32 %b, 255 @@ -1331,10 +1442,11 @@ define i1 @low_mask_eq_zext_use1(i8 %a, i32 %b) { } define i1 @low_mask_eq_zext_use2(i8 %a, i32 %b) { -; CHECK-LABEL: @low_mask_eq_zext_use2( -; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A:%.*]] to i32 +; CHECK-LABEL: define i1 @low_mask_eq_zext_use2( +; CHECK-SAME: i8 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A]] to i32 ; CHECK-NEXT: call void @use_i32(i32 [[Z]]) -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8 +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B]] to i8 ; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] ; @@ -1346,10 +1458,11 @@ define i1 @low_mask_eq_zext_use2(i8 %a, i32 %b) { } define i1 @low_mask_eq_zext_use3(i8 %a, i32 %b) { -; CHECK-LABEL: @low_mask_eq_zext_use3( -; CHECK-NEXT: [[T:%.*]] = and i32 [[B:%.*]], 255 +; CHECK-LABEL: define i1 @low_mask_eq_zext_use3( +; CHECK-SAME: i8 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[T:%.*]] = and i32 [[B]], 255 ; CHECK-NEXT: call void @use_i32(i32 [[T]]) -; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A:%.*]] to i32 +; CHECK-NEXT: [[Z:%.*]] = zext i8 [[A]] to i32 ; CHECK-NEXT: call void @use_i32(i32 [[Z]]) ; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[T]], [[Z]] ; CHECK-NEXT: ret i1 [[C]] @@ -1363,9 +1476,10 @@ define i1 @low_mask_eq_zext_use3(i8 %a, i32 %b) { } define <2 x i1> @low_mask_eq_zext_vec_splat(<2 x i8> %a, <2 x i32> %b) { -; CHECK-LABEL: @low_mask_eq_zext_vec_splat( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[B:%.*]] to <2 x i8> -; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[A:%.*]], [[TMP1]] +; CHECK-LABEL: define <2 x i1> @low_mask_eq_zext_vec_splat( +; CHECK-SAME: <2 x i8> [[A:%.*]], <2 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[B]] to <2 x i8> +; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[A]], [[TMP1]] ; CHECK-NEXT: ret <2 x i1> [[C]] ; %t = and <2 x i32> %b, <i32 255, i32 255> @@ -1375,7 +1489,8 @@ define <2 x i1> @low_mask_eq_zext_vec_splat(<2 x i8> %a, <2 x i32> %b) { } define i1 @test65(i64 %A, i64 %B) { -; CHECK-LABEL: @test65( +; CHECK-LABEL: define i1 @test65( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { ; CHECK-NEXT: ret i1 true ; %s1 = add i64 %A, %B @@ -1385,7 +1500,8 @@ define i1 @test65(i64 %A, i64 %B) { } define i1 @test66(i64 %A, i64 %B) { -; CHECK-LABEL: @test66( +; CHECK-LABEL: define i1 @test66( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { ; CHECK-NEXT: ret i1 true ; %s1 = add i64 %A, %B @@ -1395,8 +1511,9 @@ define i1 @test66(i64 %A, i64 %B) { } define i1 @test67(i32 %x) { -; CHECK-LABEL: @test67( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 96 +; CHECK-LABEL: define i1 @test67( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], 96 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1406,8 +1523,9 @@ define i1 @test67(i32 %x) { } define i1 @test67inverse(i32 %x) { -; CHECK-LABEL: @test67inverse( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 96 +; CHECK-LABEL: define i1 @test67inverse( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], 96 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1420,8 +1538,9 @@ define i1 @test67inverse(i32 %x) { ; This test only checks the last of those (icmp ugt -> icmp ne). define <2 x i1> @test67vec(<2 x i32> %x) { -; CHECK-LABEL: @test67vec( -; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 96) +; CHECK-LABEL: define <2 x i1> @test67vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X]], splat (i32 96) ; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -1431,8 +1550,9 @@ define <2 x i1> @test67vec(<2 x i32> %x) { } define <2 x i1> @test67vec2(<2 x i32> %x) { -; CHECK-LABEL: @test67vec2( -; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 96) +; CHECK-LABEL: define <2 x i1> @test67vec2( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X]], splat (i32 96) ; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -1442,8 +1562,9 @@ define <2 x i1> @test67vec2(<2 x i32> %x) { } define <2 x i1> @test67vecinverse(<2 x i32> %x) { -; CHECK-LABEL: @test67vecinverse( -; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 96) +; CHECK-LABEL: define <2 x i1> @test67vecinverse( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X]], splat (i32 96) ; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[AND]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -1453,8 +1574,9 @@ define <2 x i1> @test67vecinverse(<2 x i32> %x) { } define i1 @test68(i32 %x) { -; CHECK-LABEL: @test68( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 127 +; CHECK-LABEL: define i1 @test68( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], 127 ; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[AND]], 30 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1465,8 +1587,9 @@ define i1 @test68(i32 %x) { ; PR15940 define i1 @test70(i32 %X) { -; CHECK-LABEL: @test70( -; CHECK-NEXT: [[A:%.*]] = srem i32 5, [[X:%.*]] +; CHECK-LABEL: define i1 @test70( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = srem i32 5, [[X]] ; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A]], 2 ; CHECK-NEXT: ret i1 [[C]] ; @@ -1477,8 +1600,9 @@ define i1 @test70(i32 %X) { } define <2 x i1> @test70vec(<2 x i32> %X) { -; CHECK-LABEL: @test70vec( -; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i32> [[X:%.*]], splat (i32 2) +; CHECK-LABEL: define <2 x i1> @test70vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i32> [[X]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[C]] ; %B = add <2 x i32> %X, <i32 2, i32 2> @@ -1487,8 +1611,9 @@ define <2 x i1> @test70vec(<2 x i32> %X) { } define i1 @icmp_sext16trunc(i32 %x) { -; CHECK-LABEL: @icmp_sext16trunc( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i16 +; CHECK-LABEL: define i1 @icmp_sext16trunc( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X]] to i16 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1499,8 +1624,9 @@ define i1 @icmp_sext16trunc(i32 %x) { } define i1 @icmp_sext8trunc(i32 %x) { -; CHECK-LABEL: @icmp_sext8trunc( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 +; CHECK-LABEL: define i1 @icmp_sext8trunc( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X]] to i8 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1512,8 +1638,9 @@ define i1 @icmp_sext8trunc(i32 %x) { ; Vectors should fold the same way. define <2 x i1> @icmp_sext8trunc_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_sext8trunc_vec( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i8> +; CHECK-LABEL: define <2 x i1> @icmp_sext8trunc_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X]] to <2 x i8> ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[TMP1]], splat (i8 36) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -1524,8 +1651,9 @@ define <2 x i1> @icmp_sext8trunc_vec(<2 x i32> %x) { } define i1 @icmp_shl16(i32 %x) { -; CHECK-LABEL: @icmp_shl16( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i16 +; CHECK-LABEL: define i1 @icmp_shl16( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X]] to i16 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1537,8 +1665,9 @@ define i1 @icmp_shl16(i32 %x) { ; D25952: Don't create illegal types like i15 in InstCombine define i1 @icmp_shl17(i32 %x) { -; CHECK-LABEL: @icmp_shl17( -; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], 17 +; CHECK-LABEL: define i1 @icmp_shl17( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X]], 17 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 2359296 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1548,8 +1677,9 @@ define i1 @icmp_shl17(i32 %x) { } define <2 x i1> @icmp_shl16_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_shl16_vec( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X:%.*]] to <2 x i16> +; CHECK-LABEL: define <2 x i1> @icmp_shl16_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[X]] to <2 x i16> ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i16> [[TMP1]], splat (i16 36) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -1559,8 +1689,9 @@ define <2 x i1> @icmp_shl16_vec(<2 x i32> %x) { } define i1 @icmp_shl24(i32 %x) { -; CHECK-LABEL: @icmp_shl24( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 +; CHECK-LABEL: define i1 @icmp_shl24( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X]] to i8 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1570,8 +1701,9 @@ define i1 @icmp_shl24(i32 %x) { } define i1 @icmp_shl_eq(i32 %x) { -; CHECK-LABEL: @icmp_shl_eq( -; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 [[X:%.*]], 134217727 +; CHECK-LABEL: define i1 @icmp_shl_eq( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 [[X]], 134217727 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[MUL_MASK]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1581,8 +1713,9 @@ define i1 @icmp_shl_eq(i32 %x) { } define <2 x i1> @icmp_shl_eq_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_shl_eq_vec( -; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 134217727) +; CHECK-LABEL: define <2 x i1> @icmp_shl_eq_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> [[X]], splat (i32 134217727) ; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[MUL_MASK]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -1592,8 +1725,9 @@ define <2 x i1> @icmp_shl_eq_vec(<2 x i32> %x) { } define i1 @icmp_shl_nsw_ne(i32 %x) { -; CHECK-LABEL: @icmp_shl_nsw_ne( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @icmp_shl_nsw_ne( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %mul = shl nsw i32 %x, 7 @@ -1602,8 +1736,9 @@ define i1 @icmp_shl_nsw_ne(i32 %x) { } define <2 x i1> @icmp_shl_nsw_ne_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_shl_nsw_ne_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @icmp_shl_nsw_ne_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %mul = shl nsw <2 x i32> %x, <i32 7, i32 7> @@ -1612,8 +1747,9 @@ define <2 x i1> @icmp_shl_nsw_ne_vec(<2 x i32> %x) { } define i1 @icmp_shl_ne(i32 %x) { -; CHECK-LABEL: @icmp_shl_ne( -; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 [[X:%.*]], 33554431 +; CHECK-LABEL: define i1 @icmp_shl_ne( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 [[X]], 33554431 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[MUL_MASK]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1623,8 +1759,9 @@ define i1 @icmp_shl_ne(i32 %x) { } define <2 x i1> @icmp_shl_ne_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_shl_ne_vec( -; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 33554431) +; CHECK-LABEL: define <2 x i1> @icmp_shl_ne_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[MUL_MASK:%.*]] = and <2 x i32> [[X]], splat (i32 33554431) ; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[MUL_MASK]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -1634,8 +1771,9 @@ define <2 x i1> @icmp_shl_ne_vec(<2 x i32> %x) { } define <2 x i1> @icmp_shl_nuw_ne_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_shl_nuw_ne_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], splat (i32 2) +; CHECK-LABEL: define <2 x i1> @icmp_shl_nuw_ne_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl nuw <2 x i32> %x, <i32 7, i32 7> @@ -1646,8 +1784,9 @@ define <2 x i1> @icmp_shl_nuw_ne_vec(<2 x i32> %x) { ; If the (mul x, C) preserved the sign and this is sign test, ; compare the LHS operand instead define i1 @icmp_mul_nsw(i32 %x) { -; CHECK-LABEL: @icmp_mul_nsw( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @icmp_mul_nsw( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %mul = mul nsw i32 %x, 12 @@ -1656,8 +1795,9 @@ define i1 @icmp_mul_nsw(i32 %x) { } define i1 @icmp_mul_nsw1(i32 %x) { -; CHECK-LABEL: @icmp_mul_nsw1( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @icmp_mul_nsw1( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %mul = mul nsw i32 %x, 12 @@ -1666,8 +1806,9 @@ define i1 @icmp_mul_nsw1(i32 %x) { } define i1 @icmp_mul_nsw_neg(i32 %x) { -; CHECK-LABEL: @icmp_mul_nsw_neg( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 1 +; CHECK-LABEL: define i1 @icmp_mul_nsw_neg( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 1 ; CHECK-NEXT: ret i1 [[CMP]] ; %mul = mul nsw i32 %x, -12 @@ -1676,8 +1817,9 @@ define i1 @icmp_mul_nsw_neg(i32 %x) { } define i1 @icmp_mul_nsw_neg1(i32 %x) { -; CHECK-LABEL: @icmp_mul_nsw_neg1( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @icmp_mul_nsw_neg1( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %mul = mul nsw i32 %x, -12 @@ -1686,8 +1828,9 @@ define i1 @icmp_mul_nsw_neg1(i32 %x) { } define <2 x i1> @icmp_mul_nsw_neg1_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_mul_nsw_neg1_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @icmp_mul_nsw_neg1_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %mul = mul nsw <2 x i32> %x, <i32 -12, i32 -12> @@ -1696,7 +1839,8 @@ define <2 x i1> @icmp_mul_nsw_neg1_vec(<2 x i32> %x) { } define i1 @icmp_mul_nsw_0(i32 %x) { -; CHECK-LABEL: @icmp_mul_nsw_0( +; CHECK-LABEL: define i1 @icmp_mul_nsw_0( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i1 false ; %mul = mul nsw i32 %x, 0 @@ -1705,8 +1849,9 @@ define i1 @icmp_mul_nsw_0(i32 %x) { } define i1 @icmp_mul(i32 %x) { -; CHECK-LABEL: @icmp_mul( -; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], -12 +; CHECK-LABEL: define i1 @icmp_mul( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X]], -12 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[MUL]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1717,8 +1862,9 @@ define i1 @icmp_mul(i32 %x) { ; Checks for icmp (eq|ne) (mul x, C), 0 define i1 @icmp_mul_neq0(i32 %x) { -; CHECK-LABEL: @icmp_mul_neq0( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @icmp_mul_neq0( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %mul = mul nsw i32 %x, -12 @@ -1727,8 +1873,9 @@ define i1 @icmp_mul_neq0(i32 %x) { } define <2 x i1> @icmp_mul_neq0_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_mul_neq0_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @icmp_mul_neq0_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %mul = mul nsw <2 x i32> %x, <i32 -12, i32 -12> @@ -1737,8 +1884,9 @@ define <2 x i1> @icmp_mul_neq0_vec(<2 x i32> %x) { } define i1 @icmp_mul_eq0(i32 %x) { -; CHECK-LABEL: @icmp_mul_eq0( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @icmp_mul_eq0( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %mul = mul nsw i32 %x, 12 @@ -1747,7 +1895,8 @@ define i1 @icmp_mul_eq0(i32 %x) { } define i1 @icmp_mul0_eq0(i32 %x) { -; CHECK-LABEL: @icmp_mul0_eq0( +; CHECK-LABEL: define i1 @icmp_mul0_eq0( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i1 true ; %mul = mul i32 %x, 0 @@ -1756,7 +1905,8 @@ define i1 @icmp_mul0_eq0(i32 %x) { } define i1 @icmp_mul0_ne0(i32 %x) { -; CHECK-LABEL: @icmp_mul0_ne0( +; CHECK-LABEL: define i1 @icmp_mul0_ne0( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i1 false ; %mul = mul i32 %x, 0 @@ -1765,9 +1915,10 @@ define i1 @icmp_mul0_ne0(i32 %x) { } define i1 @icmp_add20_eq_add57(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_add20_eq_add57( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[Y:%.*]], 37 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define i1 @icmp_add20_eq_add57( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[Y]], 37 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], [[TMP1]] ; CHECK-NEXT: ret i1 [[CMP]] ; %1 = add i32 %x, 20 @@ -1777,9 +1928,10 @@ define i1 @icmp_add20_eq_add57(i32 %x, i32 %y) { } define <2 x i1> @icmp_add20_eq_add57_splat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_add20_eq_add57_splat( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y:%.*]], splat (i32 37) -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define <2 x i1> @icmp_add20_eq_add57_splat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y]], splat (i32 37) +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X]], [[TMP1]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add <2 x i32> %x, <i32 20, i32 20> @@ -1789,9 +1941,10 @@ define <2 x i1> @icmp_add20_eq_add57_splat(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_add20_eq_add57_poison(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_add20_eq_add57_poison( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y:%.*]], splat (i32 37) -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define <2 x i1> @icmp_add20_eq_add57_poison( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y]], splat (i32 37) +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X]], [[TMP1]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add <2 x i32> %x, <i32 20, i32 20> @@ -1801,9 +1954,10 @@ define <2 x i1> @icmp_add20_eq_add57_poison(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_add20_eq_add57_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_add20_eq_add57_vec_nonsplat( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y:%.*]], <i32 37, i32 39> -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define <2 x i1> @icmp_add20_eq_add57_vec_nonsplat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y]], <i32 37, i32 39> +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[X]], [[TMP1]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add <2 x i32> %x, <i32 20, i32 19> @@ -1813,9 +1967,10 @@ define <2 x i1> @icmp_add20_eq_add57_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { } define i1 @icmp_sub57_ne_sub20(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_sub57_ne_sub20( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -37 -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_sub57_ne_sub20( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -37 +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %1 = add i32 %x, -57 @@ -1825,9 +1980,10 @@ define i1 @icmp_sub57_ne_sub20(i32 %x, i32 %y) { } define <2 x i1> @icmp_sub57_ne_sub20_splat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_sub57_ne_sub20_splat( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], splat (i32 -37) -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i1> @icmp_sub57_ne_sub20_splat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X]], splat (i32 -37) +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], [[Y]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add <2 x i32> %x, <i32 -57, i32 -57> @@ -1837,9 +1993,10 @@ define <2 x i1> @icmp_sub57_ne_sub20_splat(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_sub57_ne_sub20_vec_poison(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_sub57_ne_sub20_vec_poison( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], splat (i32 -37) -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i1> @icmp_sub57_ne_sub20_vec_poison( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X]], splat (i32 -37) +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], [[Y]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add <2 x i32> %x, <i32 -57, i32 poison> @@ -1849,9 +2006,10 @@ define <2 x i1> @icmp_sub57_ne_sub20_vec_poison(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_sub57_ne_sub20_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_sub57_ne_sub20_vec_nonsplat( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y:%.*]], splat (i32 37) -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define <2 x i1> @icmp_sub57_ne_sub20_vec_nonsplat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[Y]], splat (i32 37) +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[X]], [[TMP1]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add <2 x i32> %x, <i32 -57, i32 -58> @@ -1861,8 +2019,9 @@ define <2 x i1> @icmp_sub57_ne_sub20_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { } define i1 @icmp_sub1_sge(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_sub1_sge( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_sub1_sge( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %sub = add nsw i32 %x, -1 @@ -1871,8 +2030,9 @@ define i1 @icmp_sub1_sge(i32 %x, i32 %y) { } define i1 @icmp_add1_sgt(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_add1_sgt( -; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_add1_sgt( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %add = add nsw i32 %x, 1 @@ -1881,8 +2041,9 @@ define i1 @icmp_add1_sgt(i32 %x, i32 %y) { } define i1 @icmp_sub1_slt(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_sub1_slt( -; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_sub1_slt( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %sub = add nsw i32 %x, -1 @@ -1891,8 +2052,9 @@ define i1 @icmp_sub1_slt(i32 %x, i32 %y) { } define i1 @icmp_add1_sle(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_add1_sle( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_add1_sle( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %add = add nsw i32 %x, 1 @@ -1901,9 +2063,10 @@ define i1 @icmp_add1_sle(i32 %x, i32 %y) { } define i1 @icmp_slt_offset_with_common_divisor(i64 %x, i64 %y) { -; CHECK-LABEL: @icmp_slt_offset_with_common_divisor( -; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X:%.*]], 4 -; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_slt_offset_with_common_divisor( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X]], 4 +; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y]], 4 ; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[SHLX]], [[SHLY]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1915,9 +2078,10 @@ define i1 @icmp_slt_offset_with_common_divisor(i64 %x, i64 %y) { } define i1 @icmp_slt_offset_with_smaller_common_divisor(i64 %x, i64 %y) { -; CHECK-LABEL: @icmp_slt_offset_with_smaller_common_divisor( -; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X:%.*]], 4 -; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_slt_offset_with_smaller_common_divisor( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X]], 4 +; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y]], 4 ; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[SHLX]], [[SHLY]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1929,9 +2093,10 @@ define i1 @icmp_slt_offset_with_smaller_common_divisor(i64 %x, i64 %y) { } define i1 @icmp_sle_offset_with_common_divisor(i64 %x, i64 %y) { -; CHECK-LABEL: @icmp_sle_offset_with_common_divisor( -; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X:%.*]], 4 -; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_sle_offset_with_common_divisor( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X]], 4 +; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y]], 4 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[SHLX]], [[SHLY]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1943,9 +2108,10 @@ define i1 @icmp_sle_offset_with_common_divisor(i64 %x, i64 %y) { } define i1 @icmp_ule_offset_with_common_divisor(i64 %x, i64 %y) { -; CHECK-LABEL: @icmp_ule_offset_with_common_divisor( -; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X:%.*]], 4 -; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_ule_offset_with_common_divisor( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X]], 4 +; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y]], 4 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SHLX]], [[SHLY]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -1958,9 +2124,10 @@ define i1 @icmp_ule_offset_with_common_divisor(i64 %x, i64 %y) { ; TODO: Handle non-power-of-2 divisors define i1 @icmp_ule_offset_with_common_non_pow2_divisor(i64 %x, i64 %y) { -; CHECK-LABEL: @icmp_ule_offset_with_common_non_pow2_divisor( -; CHECK-NEXT: [[MULX:%.*]] = mul nuw i64 [[X:%.*]], 7 -; CHECK-NEXT: [[MULY:%.*]] = mul nuw i64 [[Y:%.*]], 7 +; CHECK-LABEL: define i1 @icmp_ule_offset_with_common_non_pow2_divisor( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[MULX:%.*]] = mul nuw i64 [[X]], 7 +; CHECK-NEXT: [[MULY:%.*]] = mul nuw i64 [[Y]], 7 ; CHECK-NEXT: [[MULX_OFFSET:%.*]] = add nuw i64 [[MULX]], 7 ; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[MULX_OFFSET]], [[MULY]] ; CHECK-NEXT: ret i1 [[CMP]] @@ -1973,9 +2140,10 @@ define i1 @icmp_ule_offset_with_common_non_pow2_divisor(i64 %x, i64 %y) { } define i1 @neg_icmp_slt_offset_without_common_divisor(i64 %x, i64 %y) { -; CHECK-LABEL: @neg_icmp_slt_offset_without_common_divisor( -; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X:%.*]], 4 -; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y:%.*]], 4 +; CHECK-LABEL: define i1 @neg_icmp_slt_offset_without_common_divisor( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X]], 4 +; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y]], 4 ; CHECK-NEXT: [[SHLX_OFFSET:%.*]] = add nsw i64 [[SHLX]], -32 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[SHLX_OFFSET]], [[SHLY]] ; CHECK-NEXT: ret i1 [[CMP]] @@ -1988,9 +2156,10 @@ define i1 @neg_icmp_slt_offset_without_common_divisor(i64 %x, i64 %y) { } define i1 @neg_icmp_slt_offset_with_wrong_sign(i64 %x, i64 %y) { -; CHECK-LABEL: @neg_icmp_slt_offset_with_wrong_sign( -; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X:%.*]], 4 -; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y:%.*]], 4 +; CHECK-LABEL: define i1 @neg_icmp_slt_offset_with_wrong_sign( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[SHLX:%.*]] = shl i64 [[X]], 4 +; CHECK-NEXT: [[SHLY:%.*]] = shl i64 [[Y]], 4 ; CHECK-NEXT: [[SHLX_OFFSET:%.*]] = add nsw i64 [[SHLX]], 16 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[SHLX_OFFSET]], [[SHLY]] ; CHECK-NEXT: ret i1 [[CMP]] @@ -2003,9 +2172,10 @@ define i1 @neg_icmp_slt_offset_with_wrong_sign(i64 %x, i64 %y) { } define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_add20_sge_add57( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[Y:%.*]], 37 -; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define i1 @icmp_add20_sge_add57( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[Y]], 37 +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X]], [[TMP1]] ; CHECK-NEXT: ret i1 [[CMP]] ; %1 = add nsw i32 %x, 20 @@ -2015,9 +2185,10 @@ define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) { } define <2 x i1> @icmp_add20_sge_add57_splat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_add20_sge_add57_splat( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[Y:%.*]], splat (i32 37) -; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define <2 x i1> @icmp_add20_sge_add57_splat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[Y]], splat (i32 37) +; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[X]], [[TMP1]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add nsw <2 x i32> %x, <i32 20, i32 20> @@ -2027,9 +2198,10 @@ define <2 x i1> @icmp_add20_sge_add57_splat(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_add20_sge_add57_poison(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_add20_sge_add57_poison( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[Y:%.*]], splat (i32 37) -; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[X:%.*]], [[TMP1]] +; CHECK-LABEL: define <2 x i1> @icmp_add20_sge_add57_poison( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[Y]], splat (i32 37) +; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[X]], [[TMP1]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add nsw <2 x i32> %x, <i32 20, i32 20> @@ -2039,9 +2211,10 @@ define <2 x i1> @icmp_add20_sge_add57_poison(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_add20_sge_add57_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_add20_sge_add57_vec_nonsplat( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X:%.*]], <i32 20, i32 19> -; CHECK-NEXT: [[TMP2:%.*]] = add nsw <2 x i32> [[Y:%.*]], <i32 57, i32 58> +; CHECK-LABEL: define <2 x i1> @icmp_add20_sge_add57_vec_nonsplat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X]], <i32 20, i32 19> +; CHECK-NEXT: [[TMP2:%.*]] = add nsw <2 x i32> [[Y]], <i32 57, i32 58> ; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -2052,9 +2225,10 @@ define <2 x i1> @icmp_add20_sge_add57_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { } define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_sub57_sge_sub20( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[X:%.*]], -37 -; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_sub57_sge_sub20( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[X]], -37 +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[TMP1]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %1 = add nsw i32 %x, -57 @@ -2064,9 +2238,10 @@ define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) { } define <2 x i1> @icmp_sub57_sge_sub20_splat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_sub57_sge_sub20_splat( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X:%.*]], splat (i32 -37) -; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i1> @icmp_sub57_sge_sub20_splat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X]], splat (i32 -37) +; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[TMP1]], [[Y]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add nsw <2 x i32> %x, <i32 -57, i32 -57> @@ -2076,9 +2251,10 @@ define <2 x i1> @icmp_sub57_sge_sub20_splat(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_sub57_sge_sub20_vec_poison(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_sub57_sge_sub20_vec_poison( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X:%.*]], splat (i32 -37) -; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i1> @icmp_sub57_sge_sub20_vec_poison( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X]], splat (i32 -37) +; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[TMP1]], [[Y]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %1 = add nsw <2 x i32> %x, <i32 -57, i32 poison> @@ -2088,9 +2264,10 @@ define <2 x i1> @icmp_sub57_sge_sub20_vec_poison(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_sub57_sge_sub20_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_sub57_sge_sub20_vec_nonsplat( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X:%.*]], <i32 -57, i32 -58> -; CHECK-NEXT: [[TMP2:%.*]] = add nsw <2 x i32> [[Y:%.*]], <i32 -20, i32 -21> +; CHECK-LABEL: define <2 x i1> @icmp_sub57_sge_sub20_vec_nonsplat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[X]], <i32 -57, i32 -58> +; CHECK-NEXT: [[TMP2:%.*]] = add nsw <2 x i32> [[Y]], <i32 -20, i32 -21> ; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i32> [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -2101,9 +2278,10 @@ define <2 x i1> @icmp_sub57_sge_sub20_vec_nonsplat(<2 x i32> %x, <2 x i32> %y) { } define i1 @icmp_and_shl_neg_ne_0(i32 %A, i32 %B) { -; CHECK-LABEL: @icmp_and_shl_neg_ne_0( -; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[B:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A:%.*]] +; CHECK-LABEL: define i1 @icmp_and_shl_neg_ne_0( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[B]] +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2115,9 +2293,10 @@ define i1 @icmp_and_shl_neg_ne_0(i32 %A, i32 %B) { } define i1 @icmp_and_shl_neg_ne_0_shl2_no_flags(i32 %A, i32 %B) { -; CHECK-LABEL: @icmp_and_shl_neg_ne_0_shl2_no_flags( -; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[A:%.*]], -1 -; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, [[B:%.*]] +; CHECK-LABEL: define i1 @icmp_and_shl_neg_ne_0_shl2_no_flags( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[A]], -1 +; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, [[B]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], [[NEG]] ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 ; CHECK-NEXT: ret i1 [[CMP]] @@ -2130,9 +2309,10 @@ define i1 @icmp_and_shl_neg_ne_0_shl2_no_flags(i32 %A, i32 %B) { } define i1 @icmp_and_shl_neg_ne_0_shl2_nuw(i32 %A, i32 %B) { -; CHECK-LABEL: @icmp_and_shl_neg_ne_0_shl2_nuw( -; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 2, [[B:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A:%.*]] +; CHECK-LABEL: define i1 @icmp_and_shl_neg_ne_0_shl2_nuw( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 2, [[B]] +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2144,9 +2324,10 @@ define i1 @icmp_and_shl_neg_ne_0_shl2_nuw(i32 %A, i32 %B) { } define i1 @icmp_and_shl_neg_ne_0_shl2_nsw(i32 %A, i32 %B) { -; CHECK-LABEL: @icmp_and_shl_neg_ne_0_shl2_nsw( -; CHECK-NEXT: [[SHL:%.*]] = shl nsw i32 2, [[B:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A:%.*]] +; CHECK-LABEL: define i1 @icmp_and_shl_neg_ne_0_shl2_nsw( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl nsw i32 2, [[B]] +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2158,9 +2339,10 @@ define i1 @icmp_and_shl_neg_ne_0_shl2_nsw(i32 %A, i32 %B) { } define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) { -; CHECK-LABEL: @icmp_and_shl_neg_eq_0( -; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[B:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A:%.*]] +; CHECK-LABEL: define i1 @icmp_and_shl_neg_eq_0( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[B]] +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], [[A]] ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2172,8 +2354,9 @@ define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) { } define i1 @icmp_add_and_shr_ne_0(i32 %X) { -; CHECK-LABEL: @icmp_add_and_shr_ne_0( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 240 +; CHECK-LABEL: define i1 @icmp_add_and_shr_ne_0( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], 240 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224 ; CHECK-NEXT: ret i1 [[TOBOOL]] ; @@ -2185,8 +2368,9 @@ define i1 @icmp_add_and_shr_ne_0(i32 %X) { } define <2 x i1> @icmp_add_and_shr_ne_0_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_add_and_shr_ne_0_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 240) +; CHECK-LABEL: define <2 x i1> @icmp_add_and_shr_ne_0_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 240) ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne <2 x i32> [[TMP1]], splat (i32 224) ; CHECK-NEXT: ret <2 x i1> [[TOBOOL]] ; @@ -2199,8 +2383,9 @@ define <2 x i1> @icmp_add_and_shr_ne_0_vec(<2 x i32> %X) { ; Variation of the above with an extra use of the shift define i1 @icmp_and_shr_multiuse(i32 %X) { -; CHECK-LABEL: @icmp_and_shr_multiuse( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 240 +; CHECK-LABEL: define i1 @icmp_and_shr_multiuse( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], 240 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496 ; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432 @@ -2217,8 +2402,9 @@ define i1 @icmp_and_shr_multiuse(i32 %X) { } define i1 @icmp_and_shr_multiuse_logical(i32 %X) { -; CHECK-LABEL: @icmp_and_shr_multiuse_logical( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 240 +; CHECK-LABEL: define i1 @icmp_and_shr_multiuse_logical( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], 240 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496 ; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432 @@ -2236,8 +2422,9 @@ define i1 @icmp_and_shr_multiuse_logical(i32 %X) { ; Variation of the above with an ashr define i1 @icmp_and_ashr_multiuse(i32 %X) { -; CHECK-LABEL: @icmp_and_ashr_multiuse( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 240 +; CHECK-LABEL: define i1 @icmp_and_ashr_multiuse( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], 240 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496 ; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432 @@ -2254,8 +2441,9 @@ define i1 @icmp_and_ashr_multiuse(i32 %X) { } define i1 @icmp_and_ashr_multiuse_logical(i32 %X) { -; CHECK-LABEL: @icmp_and_ashr_multiuse_logical( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 240 +; CHECK-LABEL: define i1 @icmp_and_ashr_multiuse_logical( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], 240 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496 ; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432 @@ -2272,8 +2460,9 @@ define i1 @icmp_and_ashr_multiuse_logical(i32 %X) { } define i1 @icmp_lshr_and_overshift(i8 %X) { -; CHECK-LABEL: @icmp_lshr_and_overshift( -; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ugt i8 [[X:%.*]], 31 +; CHECK-LABEL: define i1 @icmp_lshr_and_overshift( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ugt i8 [[X]], 31 ; CHECK-NEXT: ret i1 [[TOBOOL]] ; %shr = lshr i8 %X, 5 @@ -2284,8 +2473,9 @@ define i1 @icmp_lshr_and_overshift(i8 %X) { ; We shouldn't simplify this because the and uses bits that are shifted in. define i1 @icmp_ashr_and_overshift(i8 %X) { -; CHECK-LABEL: @icmp_ashr_and_overshift( -; CHECK-NEXT: [[SHR:%.*]] = ashr i8 [[X:%.*]], 5 +; CHECK-LABEL: define i1 @icmp_ashr_and_overshift( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[SHR:%.*]] = ashr i8 [[X]], 5 ; CHECK-NEXT: [[AND:%.*]] = and i8 [[SHR]], 15 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[AND]], 0 ; CHECK-NEXT: ret i1 [[TOBOOL]] @@ -2297,8 +2487,9 @@ define i1 @icmp_ashr_and_overshift(i8 %X) { } define i1 @icmp_and_ashr_neg_and_legal(i8 %x) { -; CHECK-LABEL: @icmp_and_ashr_neg_and_legal( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 32 +; CHECK-LABEL: define i1 @icmp_and_ashr_neg_and_legal( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X]], 32 ; CHECK-NEXT: ret i1 [[CMP]] ; %ashr = ashr i8 %x, 4 @@ -2309,8 +2500,9 @@ define i1 @icmp_and_ashr_neg_and_legal(i8 %x) { ; Negative test. define i1 @icmp_and_ashr_mixed_and_shiftout(i8 %x) { -; CHECK-LABEL: @icmp_and_ashr_mixed_and_shiftout( -; CHECK-NEXT: [[ASHR:%.*]] = ashr i8 [[X:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_and_ashr_mixed_and_shiftout( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[ASHR:%.*]] = ashr i8 [[X]], 4 ; CHECK-NEXT: [[AND:%.*]] = and i8 [[ASHR]], 31 ; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i8 [[AND]], 8 ; CHECK-NEXT: ret i1 [[CMP]] @@ -2322,8 +2514,9 @@ define i1 @icmp_and_ashr_mixed_and_shiftout(i8 %x) { } define i1 @icmp_and_ashr_neg_cmp_slt_legal(i8 %x) { -; CHECK-LABEL: @icmp_and_ashr_neg_cmp_slt_legal( -; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -32 +; CHECK-LABEL: define i1 @icmp_and_ashr_neg_cmp_slt_legal( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X]], -32 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], -64 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2335,8 +2528,9 @@ define i1 @icmp_and_ashr_neg_cmp_slt_legal(i8 %x) { ; Negative test. define i1 @icmp_and_ashr_neg_cmp_slt_shiftout(i8 %x) { -; CHECK-LABEL: @icmp_and_ashr_neg_cmp_slt_shiftout( -; CHECK-NEXT: [[ASHR:%.*]] = ashr i8 [[X:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_and_ashr_neg_cmp_slt_shiftout( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[ASHR:%.*]] = ashr i8 [[X]], 4 ; CHECK-NEXT: [[AND:%.*]] = and i8 [[ASHR]], -2 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[AND]], -68 ; CHECK-NEXT: ret i1 [[CMP]] @@ -2348,8 +2542,9 @@ define i1 @icmp_and_ashr_neg_cmp_slt_shiftout(i8 %x) { } define i1 @icmp_and_ashr_neg_cmp_eq_legal(i8 %x) { -; CHECK-LABEL: @icmp_and_ashr_neg_cmp_eq_legal( -; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -32 +; CHECK-LABEL: define i1 @icmp_and_ashr_neg_cmp_eq_legal( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X]], -32 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP1]], -64 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2360,7 +2555,8 @@ define i1 @icmp_and_ashr_neg_cmp_eq_legal(i8 %x) { } define i1 @icmp_and_ashr_neg_cmp_eq_shiftout(i8 %x) { -; CHECK-LABEL: @icmp_and_ashr_neg_cmp_eq_shiftout( +; CHECK-LABEL: define i1 @icmp_and_ashr_neg_cmp_eq_shiftout( +; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: ret i1 false ; %ashr = ashr i8 %x, 4 @@ -2370,7 +2566,8 @@ define i1 @icmp_and_ashr_neg_cmp_eq_shiftout(i8 %x) { } define i1 @icmp_and_ashr_neg_cmp_ne_shiftout(i8 %x) { -; CHECK-LABEL: @icmp_and_ashr_neg_cmp_ne_shiftout( +; CHECK-LABEL: define i1 @icmp_and_ashr_neg_cmp_ne_shiftout( +; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: ret i1 true ; %ashr = ashr i8 %x, 4 @@ -2380,8 +2577,9 @@ define i1 @icmp_and_ashr_neg_cmp_ne_shiftout(i8 %x) { } define i1 @icmp_shl_1_V_ult_32(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_ult_32( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V:%.*]], 5 +; CHECK-LABEL: define i1 @icmp_shl_1_V_ult_32( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V]], 5 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2390,8 +2588,9 @@ define i1 @icmp_shl_1_V_ult_32(i32 %V) { } define <2 x i1> @icmp_shl_1_V_ult_32_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_ult_32_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V:%.*]], splat (i32 5) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_ult_32_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V]], splat (i32 5) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2400,8 +2599,9 @@ define <2 x i1> @icmp_shl_1_V_ult_32_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_eq_32(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_eq_32( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 5 +; CHECK-LABEL: define i1 @icmp_shl_1_V_eq_32( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V]], 5 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2410,8 +2610,9 @@ define i1 @icmp_shl_1_V_eq_32(i32 %V) { } define <2 x i1> @icmp_shl_1_V_eq_32_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_eq_32_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V:%.*]], splat (i32 5) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_eq_32_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V]], splat (i32 5) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2420,8 +2621,9 @@ define <2 x i1> @icmp_shl_1_V_eq_32_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_ult_30(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_ult_30( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V:%.*]], 5 +; CHECK-LABEL: define i1 @icmp_shl_1_V_ult_30( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V]], 5 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2430,8 +2632,9 @@ define i1 @icmp_shl_1_V_ult_30(i32 %V) { } define <2 x i1> @icmp_shl_1_V_ult_30_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_ult_30_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V:%.*]], splat (i32 5) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_ult_30_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V]], splat (i32 5) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2440,8 +2643,9 @@ define <2 x i1> @icmp_shl_1_V_ult_30_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_ugt_30(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_ugt_30( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[V:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_shl_1_V_ugt_30( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[V]], 4 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2450,8 +2654,9 @@ define i1 @icmp_shl_1_V_ugt_30(i32 %V) { } define <2 x i1> @icmp_shl_1_V_ugt_30_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_ugt_30_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[V:%.*]], splat (i32 4) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_ugt_30_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[V]], splat (i32 4) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2460,8 +2665,9 @@ define <2 x i1> @icmp_shl_1_V_ugt_30_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_ule_30(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_ule_30( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V:%.*]], 5 +; CHECK-LABEL: define i1 @icmp_shl_1_V_ule_30( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V]], 5 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2470,8 +2676,9 @@ define i1 @icmp_shl_1_V_ule_30(i32 %V) { } define <2 x i1> @icmp_shl_1_V_ule_30_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_ule_30_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V:%.*]], splat (i32 5) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_ule_30_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[V]], splat (i32 5) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2480,8 +2687,9 @@ define <2 x i1> @icmp_shl_1_V_ule_30_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_uge_30(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_uge_30( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[V:%.*]], 4 +; CHECK-LABEL: define i1 @icmp_shl_1_V_uge_30( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[V]], 4 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2490,8 +2698,9 @@ define i1 @icmp_shl_1_V_uge_30(i32 %V) { } define <2 x i1> @icmp_shl_1_V_uge_30_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_uge_30_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[V:%.*]], splat (i32 4) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_uge_30_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[V]], splat (i32 4) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2500,8 +2709,9 @@ define <2 x i1> @icmp_shl_1_V_uge_30_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 31 +; CHECK-LABEL: define i1 @icmp_shl_1_V_uge_2147483648( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V]], 31 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2510,8 +2720,9 @@ define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) { } define <2 x i1> @icmp_shl_1_V_uge_2147483648_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V:%.*]], splat (i32 31) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_uge_2147483648_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V]], splat (i32 31) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2520,8 +2731,9 @@ define <2 x i1> @icmp_shl_1_V_uge_2147483648_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_ult_2147483648(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V:%.*]], 31 +; CHECK-LABEL: define i1 @icmp_shl_1_V_ult_2147483648( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V]], 31 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2530,8 +2742,9 @@ define i1 @icmp_shl_1_V_ult_2147483648(i32 %V) { } define <2 x i1> @icmp_shl_1_V_ult_2147483648_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V:%.*]], splat (i32 31) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_ult_2147483648_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V]], splat (i32 31) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2540,8 +2753,9 @@ define <2 x i1> @icmp_shl_1_V_ult_2147483648_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_sle_0(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_sle_0( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 31 +; CHECK-LABEL: define i1 @icmp_shl_1_V_sle_0( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V]], 31 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2550,8 +2764,9 @@ define i1 @icmp_shl_1_V_sle_0(i32 %V) { } define <2 x i1> @icmp_shl_1_V_sle_0_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_sle_0_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V:%.*]], splat (i32 31) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_sle_0_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V]], splat (i32 31) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2560,8 +2775,9 @@ define <2 x i1> @icmp_shl_1_V_sle_0_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_sle_negative(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_sle_negative( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V:%.*]], 31 +; CHECK-LABEL: define i1 @icmp_shl_1_V_sle_negative( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V]], 31 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2570,8 +2786,9 @@ define i1 @icmp_shl_1_V_sle_negative(i32 %V) { } define <2 x i1> @icmp_shl_1_V_sle_0_negative(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_sle_0_negative( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V:%.*]], splat (i32 31) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_sle_0_negative( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[V]], splat (i32 31) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2580,8 +2797,9 @@ define <2 x i1> @icmp_shl_1_V_sle_0_negative(<2 x i32> %V) { } define i1 @icmp_shl_1_V_sgt_0(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_sgt_0( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V:%.*]], 31 +; CHECK-LABEL: define i1 @icmp_shl_1_V_sgt_0( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V]], 31 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2590,8 +2808,9 @@ define i1 @icmp_shl_1_V_sgt_0(i32 %V) { } define <2 x i1> @icmp_shl_1_V_sgt_0_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_sgt_0_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V:%.*]], splat (i32 31) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_sgt_0_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V]], splat (i32 31) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2600,8 +2819,9 @@ define <2 x i1> @icmp_shl_1_V_sgt_0_vec(<2 x i32> %V) { } define i1 @icmp_shl_1_V_sgt_negative(i32 %V) { -; CHECK-LABEL: @icmp_shl_1_V_sgt_negative( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V:%.*]], 31 +; CHECK-LABEL: define i1 @icmp_shl_1_V_sgt_negative( +; CHECK-SAME: i32 [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V]], 31 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 1, %V @@ -2610,8 +2830,9 @@ define i1 @icmp_shl_1_V_sgt_negative(i32 %V) { } define <2 x i1> @icmp_shl_1_V_sgt_negative_vec(<2 x i32> %V) { -; CHECK-LABEL: @icmp_shl_1_V_sgt_negative_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V:%.*]], splat (i32 31) +; CHECK-LABEL: define <2 x i1> @icmp_shl_1_V_sgt_negative_vec( +; CHECK-SAME: <2 x i32> [[V:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V]], splat (i32 31) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 1, i32 1>, %V @@ -2620,9 +2841,10 @@ define <2 x i1> @icmp_shl_1_V_sgt_negative_vec(<2 x i32> %V) { } define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) { -; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B( -; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define i1 @or_icmp_eq_B_0_icmp_ult_A_B( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B]], -1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], [[A]] ; CHECK-NEXT: ret i1 [[TMP2]] ; %1 = icmp eq i64 %b, 0 @@ -2632,9 +2854,10 @@ define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) { } define i1 @or_icmp_eq_B_0_icmp_ult_A_B_logical(i64 %a, i64 %b) { -; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B_logical( -; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[A:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B:%.*]], -1 +; CHECK-LABEL: define i1 @or_icmp_eq_B_0_icmp_ult_A_B_logical( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[A]] +; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = icmp uge i64 [[TMP2]], [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2645,9 +2868,10 @@ define i1 @or_icmp_eq_B_0_icmp_ult_A_B_logical(i64 %a, i64 %b) { } define <2 x i1> @or_icmp_eq_B_0_icmp_ult_A_B_uniform(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B_uniform( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B:%.*]], splat (i64 -1) -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge <2 x i64> [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define <2 x i1> @or_icmp_eq_B_0_icmp_ult_A_B_uniform( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B]], splat (i64 -1) +; CHECK-NEXT: [[TMP2:%.*]] = icmp uge <2 x i64> [[TMP1]], [[A]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; %1 = icmp eq <2 x i64> %b, zeroinitializer @@ -2657,9 +2881,10 @@ define <2 x i1> @or_icmp_eq_B_0_icmp_ult_A_B_uniform(<2 x i64> %a, <2 x i64> %b) } define <2 x i1> @or_icmp_eq_B_0_icmp_ult_A_B_poison(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B_poison( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B:%.*]], splat (i64 -1) -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge <2 x i64> [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define <2 x i1> @or_icmp_eq_B_0_icmp_ult_A_B_poison( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B]], splat (i64 -1) +; CHECK-NEXT: [[TMP2:%.*]] = icmp uge <2 x i64> [[TMP1]], [[A]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; %1 = icmp eq <2 x i64> %b, <i64 0, i64 poison> @@ -2669,8 +2894,9 @@ define <2 x i1> @or_icmp_eq_B_0_icmp_ult_A_B_poison(<2 x i64> %a, <2 x i64> %b) } define i1 @or_icmp_ne_A_0_icmp_ne_B_0(i64 %a, i64 %b) { -; CHECK-LABEL: @or_icmp_ne_A_0_icmp_ne_B_0( -; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @or_icmp_ne_A_0_icmp_ne_B_0( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[A]], [[B]] ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[TMP2]] ; @@ -2681,9 +2907,10 @@ define i1 @or_icmp_ne_A_0_icmp_ne_B_0(i64 %a, i64 %b) { } define i1 @or_icmp_ne_A_0_icmp_ne_B_0_logical(i64 %a, i64 %b) { -; CHECK-LABEL: @or_icmp_ne_A_0_icmp_ne_B_0_logical( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B:%.*]], 0 +; CHECK-LABEL: define i1 @or_icmp_ne_A_0_icmp_ne_B_0_logical( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2694,8 +2921,9 @@ define i1 @or_icmp_ne_A_0_icmp_ne_B_0_logical(i64 %a, i64 %b) { } define <2 x i1> @or_icmp_ne_A_0_icmp_ne_B_0_uniform(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @or_icmp_ne_A_0_icmp_ne_B_0_uniform( -; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i64> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @or_icmp_ne_A_0_icmp_ne_B_0_uniform( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i64> [[A]], [[B]] ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i64> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; @@ -2706,8 +2934,9 @@ define <2 x i1> @or_icmp_ne_A_0_icmp_ne_B_0_uniform(<2 x i64> %a, <2 x i64> %b) } define <2 x i1> @or_icmp_ne_A_0_icmp_ne_B_0_poison(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @or_icmp_ne_A_0_icmp_ne_B_0_poison( -; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i64> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @or_icmp_ne_A_0_icmp_ne_B_0_poison( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i64> [[A]], [[B]] ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i64> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; @@ -2718,9 +2947,10 @@ define <2 x i1> @or_icmp_ne_A_0_icmp_ne_B_0_poison(<2 x i64> %a, <2 x i64> %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B( -; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B]], -1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A]] ; CHECK-NEXT: ret i1 [[TMP2]] ; %1 = icmp ne i64 %b, 0 @@ -2730,9 +2960,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted1(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_commuted1( -; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted1( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B]], -1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A]] ; CHECK-NEXT: ret i1 [[TMP2]] ; %1 = icmp uge i64 %a, %b @@ -2742,9 +2973,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted1(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted2(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_commuted2( -; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted2( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B]], -1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A]] ; CHECK-NEXT: ret i1 [[TMP2]] ; %1 = icmp ne i64 %b, 0 @@ -2754,9 +2986,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted2(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted1_logical(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_commuted1_logical( -; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted1_logical( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B]], -1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], [[A]] ; CHECK-NEXT: ret i1 [[TMP2]] ; %1 = icmp uge i64 %a, %b @@ -2766,9 +2999,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted1_logical(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted2_logical(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_commuted2_logical( -; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[A:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B:%.*]], -1 +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted2_logical( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[A]] +; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2779,11 +3013,12 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_commuted2_logical(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use1(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_extra_use1( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B:%.*]], 0 +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use1( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], 0 ; CHECK-NEXT: call void @use_i1(i1 [[TMP1]]) ; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B]], -1 -; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP2]], [[A:%.*]] +; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP2]], [[A]] ; CHECK-NEXT: ret i1 [[TMP3]] ; %1 = icmp ne i64 %b, 0 @@ -2794,8 +3029,9 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use1(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use2(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_extra_use2( -; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use2( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[A]], [[B]] ; CHECK-NEXT: call void @use_i1(i1 [[TMP1]]) ; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP2]], [[A]] @@ -2809,10 +3045,11 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use2(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use3(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_extra_use3( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B:%.*]], 0 +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use3( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], 0 ; CHECK-NEXT: call void @use_i1(i1 [[TMP1]]) -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A:%.*]], [[B]] +; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A]], [[B]] ; CHECK-NEXT: call void @use_i1(i1 [[TMP2]]) ; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP3]] @@ -2826,9 +3063,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_extra_use3(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred1(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred1( -; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[B:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A:%.*]], [[B]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred1( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[B]], 0 +; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A]], [[B]] ; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2839,9 +3077,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred1(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred2(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred2( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i64 [[A:%.*]], [[B]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred2( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], 0 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i64 [[A]], [[B]] ; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2852,9 +3091,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_pred2(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op1(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op1( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B:%.*]], 1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A:%.*]], [[B]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op1( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], 1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A]], [[B]] ; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2865,9 +3105,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op1(i64 %a, i64 %b) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op2(i64 %a, i64 %b, i64 %c) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op2( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B:%.*]], 0 -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A:%.*]], [[C:%.*]] +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op2( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]], i64 [[C:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[B]], 0 +; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[A]], [[C]] ; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2878,9 +3119,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_wrong_op2(i64 %a, i64 %b, i64 %c) { } define i1 @and_icmp_ne_B_0_icmp_uge_A_B_logical(i64 %a, i64 %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_logical( -; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[A:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B:%.*]], -1 +; CHECK-LABEL: define i1 @and_icmp_ne_B_0_icmp_uge_A_B_logical( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[A]] +; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[B]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP3]] ; @@ -2891,9 +3133,10 @@ define i1 @and_icmp_ne_B_0_icmp_uge_A_B_logical(i64 %a, i64 %b) { } define <2 x i1> @and_icmp_ne_B_0_icmp_uge_A_B_uniform(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_uniform( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B:%.*]], splat (i64 -1) -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i64> [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define <2 x i1> @and_icmp_ne_B_0_icmp_uge_A_B_uniform( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B]], splat (i64 -1) +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i64> [[TMP1]], [[A]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; %1 = icmp ne <2 x i64> %b, zeroinitializer @@ -2903,9 +3146,10 @@ define <2 x i1> @and_icmp_ne_B_0_icmp_uge_A_B_uniform(<2 x i64> %a, <2 x i64> %b } define <2 x i1> @and_icmp_ne_B_0_icmp_uge_A_B_poison(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @and_icmp_ne_B_0_icmp_uge_A_B_poison( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B:%.*]], splat (i64 -1) -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i64> [[TMP1]], [[A:%.*]] +; CHECK-LABEL: define <2 x i1> @and_icmp_ne_B_0_icmp_uge_A_B_poison( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[B]], splat (i64 -1) +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i64> [[TMP1]], [[A]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; %1 = icmp ne <2 x i64> %b, <i64 0, i64 poison> @@ -2915,8 +3159,9 @@ define <2 x i1> @and_icmp_ne_B_0_icmp_uge_A_B_poison(<2 x i64> %a, <2 x i64> %b) } define i1 @icmp_add_ult_2(i32 %X) { -; CHECK-LABEL: @icmp_add_ult_2( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2 +; CHECK-LABEL: define i1 @icmp_add_ult_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -2 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 14 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2926,8 +3171,9 @@ define i1 @icmp_add_ult_2(i32 %X) { } define <2 x i1> @icmp_add_X_-14_ult_2_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_add_X_-14_ult_2_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 -2) +; CHECK-LABEL: define <2 x i1> @icmp_add_X_-14_ult_2_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 -2) ; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[TMP1]], splat (i32 14) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -2937,8 +3183,9 @@ define <2 x i1> @icmp_add_X_-14_ult_2_vec(<2 x i32> %X) { } define i1 @icmp_sub_3_X_ult_2(i32 %X) { -; CHECK-LABEL: @icmp_sub_3_X_ult_2( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2 +; CHECK-LABEL: define i1 @icmp_sub_3_X_ult_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -2 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 2 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2948,8 +3195,9 @@ define i1 @icmp_sub_3_X_ult_2(i32 %X) { } define <2 x i1> @icmp_sub_3_X_ult_2_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_sub_3_X_ult_2_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 -2) +; CHECK-LABEL: define <2 x i1> @icmp_sub_3_X_ult_2_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 -2) ; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[TMP1]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -2959,8 +3207,9 @@ define <2 x i1> @icmp_sub_3_X_ult_2_vec(<2 x i32> %X) { } define i1 @icmp_add_X_-14_uge_2(i32 %X) { -; CHECK-LABEL: @icmp_add_X_-14_uge_2( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2 +; CHECK-LABEL: define i1 @icmp_add_X_-14_uge_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -2 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 14 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2970,8 +3219,9 @@ define i1 @icmp_add_X_-14_uge_2(i32 %X) { } define <2 x i1> @icmp_add_X_-14_uge_2_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_add_X_-14_uge_2_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 -2) +; CHECK-LABEL: define <2 x i1> @icmp_add_X_-14_uge_2_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 -2) ; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], splat (i32 14) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -2981,8 +3231,9 @@ define <2 x i1> @icmp_add_X_-14_uge_2_vec(<2 x i32> %X) { } define i1 @icmp_sub_3_X_uge_2(i32 %X) { -; CHECK-LABEL: @icmp_sub_3_X_uge_2( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2 +; CHECK-LABEL: define i1 @icmp_sub_3_X_uge_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -2 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 2 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -2992,8 +3243,9 @@ define i1 @icmp_sub_3_X_uge_2(i32 %X) { } define <2 x i1> @icmp_sub_3_X_uge_2_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_sub_3_X_uge_2_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 -2) +; CHECK-LABEL: define <2 x i1> @icmp_sub_3_X_uge_2_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 -2) ; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -3003,8 +3255,9 @@ define <2 x i1> @icmp_sub_3_X_uge_2_vec(<2 x i32> %X) { } define i1 @icmp_and_X_-16_eq-16(i32 %X) { -; CHECK-LABEL: @icmp_and_X_-16_eq-16( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], -17 +; CHECK-LABEL: define i1 @icmp_and_X_-16_eq-16( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X]], -17 ; CHECK-NEXT: ret i1 [[CMP]] ; %and = and i32 %X, -16 @@ -3013,8 +3266,9 @@ define i1 @icmp_and_X_-16_eq-16(i32 %X) { } define <2 x i1> @icmp_and_X_-16_eq-16_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_and_X_-16_eq-16_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X:%.*]], splat (i32 -17) +; CHECK-LABEL: define <2 x i1> @icmp_and_X_-16_eq-16_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X]], splat (i32 -17) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %and = and <2 x i32> %X, <i32 -16, i32 -16> @@ -3023,8 +3277,9 @@ define <2 x i1> @icmp_and_X_-16_eq-16_vec(<2 x i32> %X) { } define i1 @icmp_and_X_-16_ne-16(i32 %X) { -; CHECK-LABEL: @icmp_and_X_-16_ne-16( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], -16 +; CHECK-LABEL: define i1 @icmp_and_X_-16_ne-16( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], -16 ; CHECK-NEXT: ret i1 [[CMP]] ; %and = and i32 %X, -16 @@ -3033,8 +3288,9 @@ define i1 @icmp_and_X_-16_ne-16(i32 %X) { } define <2 x i1> @icmp_and_X_-16_ne-16_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_and_X_-16_ne-16_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], splat (i32 -16) +; CHECK-LABEL: define <2 x i1> @icmp_and_X_-16_ne-16_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X]], splat (i32 -16) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %and = and <2 x i32> %X, <i32 -16, i32 -16> @@ -3046,8 +3302,9 @@ define <2 x i1> @icmp_and_X_-16_ne-16_vec(<2 x i32> %X) { ; X | C == C --> X <=u C (when C+1 is PowerOf2). define i1 @or1_eq1(i32 %x) { -; CHECK-LABEL: @or1_eq1( -; CHECK-NEXT: [[T1:%.*]] = icmp ult i32 [[X:%.*]], 2 +; CHECK-LABEL: define i1 @or1_eq1( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = icmp ult i32 [[X]], 2 ; CHECK-NEXT: ret i1 [[T1]] ; %t0 = or i32 %x, 1 @@ -3056,8 +3313,9 @@ define i1 @or1_eq1(i32 %x) { } define <2 x i1> @or1_eq1_vec(<2 x i32> %x) { -; CHECK-LABEL: @or1_eq1_vec( -; CHECK-NEXT: [[T1:%.*]] = icmp ult <2 x i32> [[X:%.*]], splat (i32 2) +; CHECK-LABEL: define <2 x i1> @or1_eq1_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = icmp ult <2 x i32> [[X]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[T1]] ; %t0 = or <2 x i32> %x, splat (i32 1) @@ -3066,8 +3324,9 @@ define <2 x i1> @or1_eq1_vec(<2 x i32> %x) { } define <2 x i1> @or_eq_vec_nonsplat(<2 x i32> %x) { -; CHECK-LABEL: @or_eq_vec_nonsplat( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 -2, i32 -3> +; CHECK-LABEL: define <2 x i1> @or_eq_vec_nonsplat( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 -2, i32 -3> ; CHECK-NEXT: [[T1:%.*]] = icmp eq <2 x i32> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[T1]] ; @@ -3077,16 +3336,17 @@ define <2 x i1> @or_eq_vec_nonsplat(<2 x i32> %x) { } define void @or_eq_vec_multiple_nonsplat(<2 x i32> %x, <2 x i32> %y, <2 x i32> %z, ptr %ptr0, ptr %ptr1, ptr %ptr2) { -; CHECK-LABEL: @or_eq_vec_multiple_nonsplat( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 -2, i32 -3> +; CHECK-LABEL: define void @or_eq_vec_multiple_nonsplat( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]], ptr [[PTR0:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 -2, i32 -3> ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq <2 x i32> [[TMP1]], zeroinitializer -; CHECK-NEXT: store <2 x i1> [[CMP0]], ptr [[PTR0:%.*]], align 1 -; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -2, i32 -3> +; CHECK-NEXT: store <2 x i1> [[CMP0]], ptr [[PTR0]], align 1 +; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[Y]], <i32 -2, i32 -3> ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq <2 x i32> [[TMP2]], zeroinitializer -; CHECK-NEXT: store <2 x i1> [[CMP1]], ptr [[PTR1:%.*]], align 1 -; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[Z:%.*]], <i32 -2, i32 -3> +; CHECK-NEXT: store <2 x i1> [[CMP1]], ptr [[PTR1]], align 1 +; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[Z]], <i32 -2, i32 -3> ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq <2 x i32> [[TMP3]], zeroinitializer -; CHECK-NEXT: store <2 x i1> [[CMP2]], ptr [[PTR2:%.*]], align 1 +; CHECK-NEXT: store <2 x i1> [[CMP2]], ptr [[PTR2]], align 1 ; CHECK-NEXT: ret void ; %t0 = or <2 x i32> %x, <i32 1, i32 2> @@ -3105,13 +3365,14 @@ define void @or_eq_vec_multiple_nonsplat(<2 x i32> %x, <2 x i32> %y, <2 x i32> % ; Make sure use count of 1 doesn't matter define i1 @or1_eq1_multiple(i32 %x, i32 %y, i32 %z, ptr %ptr0, ptr %ptr1) { -; CHECK-LABEL: @or1_eq1_multiple( -; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], 2 -; CHECK-NEXT: store i1 [[CMP1]], ptr [[PTR:%.*]], align 1 -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], 2 -; CHECK-NEXT: store i1 [[CMP2]], ptr [[PTR1:%.*]], align 1 -; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[Z:%.*]], 2 -; CHECK-NEXT: ret i1 [[CMP3]] +; CHECK-LABEL: define i1 @or1_eq1_multiple( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]], ptr [[PTR0:%.*]], ptr [[PTR1:%.*]]) { +; CHECK-NEXT: [[CMP0:%.*]] = icmp ult i32 [[X]], 2 +; CHECK-NEXT: store i1 [[CMP0]], ptr [[PTR0]], align 1 +; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[Y]], 2 +; CHECK-NEXT: store i1 [[CMP1]], ptr [[PTR1]], align 1 +; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Z]], 2 +; CHECK-NEXT: ret i1 [[CMP2]] ; %t0 = or i32 %x, 1 %cmp0 = icmp eq i32 %t0, 1 @@ -3127,12 +3388,13 @@ define i1 @or1_eq1_multiple(i32 %x, i32 %y, i32 %z, ptr %ptr0, ptr %ptr1) { } define <2 x i1> @or1_eq1_multiple_vec(<2 x i32> %x, <2 x i32> %y, <2 x i32> %z, ptr %ptr0, ptr %ptr1) { -; CHECK-LABEL: @or1_eq1_multiple_vec( -; CHECK-NEXT: [[CMP0:%.*]] = icmp ult <2 x i32> [[X:%.*]], splat (i32 2) -; CHECK-NEXT: store <2 x i1> [[CMP0]], ptr [[PTR0:%.*]], align 1 -; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> [[Y:%.*]], splat (i32 2) -; CHECK-NEXT: store <2 x i1> [[CMP1]], ptr [[PTR1:%.*]], align 1 -; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i32> [[Z:%.*]], splat (i32 2) +; CHECK-LABEL: define <2 x i1> @or1_eq1_multiple_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]], ptr [[PTR0:%.*]], ptr [[PTR1:%.*]]) { +; CHECK-NEXT: [[CMP0:%.*]] = icmp ult <2 x i32> [[X]], splat (i32 2) +; CHECK-NEXT: store <2 x i1> [[CMP0]], ptr [[PTR0]], align 1 +; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> [[Y]], splat (i32 2) +; CHECK-NEXT: store <2 x i1> [[CMP1]], ptr [[PTR1]], align 1 +; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i32> [[Z]], splat (i32 2) ; CHECK-NEXT: ret <2 x i1> [[CMP2]] ; %t0 = or <2 x i32> %x, splat (i32 1) @@ -3151,8 +3413,9 @@ define <2 x i1> @or1_eq1_multiple_vec(<2 x i32> %x, <2 x i32> %y, <2 x i32> %z, ; X | C == C --> X <=u C (when C+1 is PowerOf2). define <2 x i1> @or3_eq3_vec(<2 x i8> %x) { -; CHECK-LABEL: @or3_eq3_vec( -; CHECK-NEXT: [[T1:%.*]] = icmp ult <2 x i8> [[X:%.*]], splat (i8 4) +; CHECK-LABEL: define <2 x i1> @or3_eq3_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = icmp ult <2 x i8> [[X]], splat (i8 4) ; CHECK-NEXT: ret <2 x i1> [[T1]] ; %t0 = or <2 x i8> %x, <i8 3, i8 3> @@ -3163,8 +3426,9 @@ define <2 x i1> @or3_eq3_vec(<2 x i8> %x) { ; X | C != C --> X >u C (when C+1 is PowerOf2). define i1 @or7_ne7(i32 %x) { -; CHECK-LABEL: @or7_ne7( -; CHECK-NEXT: [[T1:%.*]] = icmp ugt i32 [[X:%.*]], 7 +; CHECK-LABEL: define i1 @or7_ne7( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = icmp ugt i32 [[X]], 7 ; CHECK-NEXT: ret i1 [[T1]] ; %t0 = or i32 %x, 7 @@ -3175,8 +3439,9 @@ define i1 @or7_ne7(i32 %x) { ; X | C != C --> X >u C (when C+1 is PowerOf2). define <2 x i1> @or63_ne63_vec(<2 x i8> %x) { -; CHECK-LABEL: @or63_ne63_vec( -; CHECK-NEXT: [[T1:%.*]] = icmp ugt <2 x i8> [[X:%.*]], splat (i8 63) +; CHECK-LABEL: define <2 x i1> @or63_ne63_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = icmp ugt <2 x i8> [[X]], splat (i8 63) ; CHECK-NEXT: ret <2 x i1> [[T1]] ; %t0 = or <2 x i8> %x, <i8 63, i8 63> @@ -3188,8 +3453,9 @@ define <2 x i1> @or63_ne63_vec(<2 x i8> %x) { ; X | C == C --> (X & ~C) == 0 define i1 @orC_eqC(i32 %x) { -; CHECK-LABEL: @orC_eqC( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -43 +; CHECK-LABEL: define i1 @orC_eqC( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -43 ; CHECK-NEXT: [[T1:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[T1]] ; @@ -3201,8 +3467,9 @@ define i1 @orC_eqC(i32 %x) { ; X | C == C --> (X & ~C) == 0 define <2 x i1> @orC_eqC_vec(<2 x i8> %x) { -; CHECK-LABEL: @orC_eqC_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], splat (i8 -44) +; CHECK-LABEL: define <2 x i1> @orC_eqC_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X]], splat (i8 -44) ; CHECK-NEXT: [[T1:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[T1]] ; @@ -3214,8 +3481,9 @@ define <2 x i1> @orC_eqC_vec(<2 x i8> %x) { ; X | C != C --> (X & ~C) != 0 define i1 @orC_neC(i32 %x) { -; CHECK-LABEL: @orC_neC( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 41 +; CHECK-LABEL: define i1 @orC_neC( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], 41 ; CHECK-NEXT: [[T1:%.*]] = icmp ne i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[T1]] ; @@ -3227,8 +3495,9 @@ define i1 @orC_neC(i32 %x) { ; X | C != C --> (X & ~C) != 0 define <2 x i1> @orC_neC_vec(<2 x i8> %x) { -; CHECK-LABEL: @orC_neC_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], splat (i8 42) +; CHECK-LABEL: define <2 x i1> @orC_neC_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X]], splat (i8 42) ; CHECK-NEXT: [[T1:%.*]] = icmp ne <2 x i8> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[T1]] ; @@ -3238,8 +3507,9 @@ define <2 x i1> @orC_neC_vec(<2 x i8> %x) { } define i1 @shrink_constant(i32 %X) { -; CHECK-LABEL: @shrink_constant( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], -12 +; CHECK-LABEL: define i1 @shrink_constant( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], -12 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[XOR]], 4 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -3249,8 +3519,9 @@ define i1 @shrink_constant(i32 %X) { } define <2 x i1> @shrink_constant_vec(<2 x i32> %X) { -; CHECK-LABEL: @shrink_constant_vec( -; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[X:%.*]], splat (i32 -12) +; CHECK-LABEL: define <2 x i1> @shrink_constant_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[X]], splat (i32 -12) ; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[XOR]], splat (i32 4) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -3261,8 +3532,9 @@ define <2 x i1> @shrink_constant_vec(<2 x i32> %X) { ; This test requires 3 different transforms to get to the result. define i1 @icmp_sub_-1_X_ult_4(i32 %X) { -; CHECK-LABEL: @icmp_sub_-1_X_ult_4( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], -5 +; CHECK-LABEL: define i1 @icmp_sub_-1_X_ult_4( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X]], -5 ; CHECK-NEXT: ret i1 [[CMP]] ; %sub = sub i32 -1, %X @@ -3271,8 +3543,9 @@ define i1 @icmp_sub_-1_X_ult_4(i32 %X) { } define <2 x i1> @icmp_xor_neg4_X_ult_4_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_xor_neg4_X_ult_4_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X:%.*]], splat (i32 -5) +; CHECK-LABEL: define <2 x i1> @icmp_xor_neg4_X_ult_4_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X]], splat (i32 -5) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %xor = xor <2 x i32> %X, <i32 -4, i32 -4> @@ -3281,8 +3554,9 @@ define <2 x i1> @icmp_xor_neg4_X_ult_4_vec(<2 x i32> %X) { } define i1 @icmp_sub_-1_X_uge_4(i32 %X) { -; CHECK-LABEL: @icmp_sub_-1_X_uge_4( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], -4 +; CHECK-LABEL: define i1 @icmp_sub_-1_X_uge_4( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], -4 ; CHECK-NEXT: ret i1 [[CMP]] ; %sub = sub i32 -1, %X @@ -3291,8 +3565,9 @@ define i1 @icmp_sub_-1_X_uge_4(i32 %X) { } define <2 x i1> @icmp_xor_neg4_X_uge_4_vec(<2 x i32> %X) { -; CHECK-LABEL: @icmp_xor_neg4_X_uge_4_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X:%.*]], splat (i32 -4) +; CHECK-LABEL: define <2 x i1> @icmp_xor_neg4_X_uge_4_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[X]], splat (i32 -4) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %xor = xor <2 x i32> %X, <i32 -4, i32 -4> @@ -3301,8 +3576,9 @@ define <2 x i1> @icmp_xor_neg4_X_uge_4_vec(<2 x i32> %X) { } define <2 x i1> @xor_ult(<2 x i8> %x) { -; CHECK-LABEL: @xor_ult( -; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[X:%.*]], splat (i8 3) +; CHECK-LABEL: define <2 x i1> @xor_ult( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[X]], splat (i8 3) ; CHECK-NEXT: ret <2 x i1> [[R]] ; %xor = xor <2 x i8> %x, <i8 -4, i8 -4> @@ -3311,9 +3587,10 @@ define <2 x i1> @xor_ult(<2 x i8> %x) { } define i1 @xor_ult_extra_use(i8 %x, ptr %p) { -; CHECK-LABEL: @xor_ult_extra_use( -; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[X:%.*]], -32 -; CHECK-NEXT: store i8 [[XOR]], ptr [[P:%.*]], align 1 +; CHECK-LABEL: define i1 @xor_ult_extra_use( +; CHECK-SAME: i8 [[X:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[X]], -32 +; CHECK-NEXT: store i8 [[XOR]], ptr [[P]], align 1 ; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X]], 31 ; CHECK-NEXT: ret i1 [[R]] ; @@ -3324,8 +3601,9 @@ define i1 @xor_ult_extra_use(i8 %x, ptr %p) { } define <2 x i1> @xor_ugt(<2 x i8> %x) { -; CHECK-LABEL: @xor_ugt( -; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[X:%.*]], splat (i8 7) +; CHECK-LABEL: define <2 x i1> @xor_ugt( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[X]], splat (i8 7) ; CHECK-NEXT: ret <2 x i1> [[R]] ; %xor = xor <2 x i8> %x, <i8 7, i8 7> @@ -3334,9 +3612,10 @@ define <2 x i1> @xor_ugt(<2 x i8> %x) { } define i1 @xor_ugt_extra_use(i8 %x, ptr %p) { -; CHECK-LABEL: @xor_ugt_extra_use( -; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[X:%.*]], 63 -; CHECK-NEXT: store i8 [[XOR]], ptr [[P:%.*]], align 1 +; CHECK-LABEL: define i1 @xor_ugt_extra_use( +; CHECK-SAME: i8 [[X:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[X]], 63 +; CHECK-NEXT: store i8 [[XOR]], ptr [[P]], align 1 ; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X]], 63 ; CHECK-NEXT: ret i1 [[R]] ; @@ -3347,8 +3626,9 @@ define i1 @xor_ugt_extra_use(i8 %x, ptr %p) { } define i1 @icmp_lshr_lshr_eq(i32 %a, i32 %b) { -; CHECK-LABEL: @icmp_lshr_lshr_eq( -; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @icmp_lshr_lshr_eq( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 [[A]], [[B]] ; CHECK-NEXT: [[Z:%.*]] = icmp ult i32 [[Z_UNSHIFTED]], 1073741824 ; CHECK-NEXT: ret i1 [[Z]] ; @@ -3359,8 +3639,9 @@ define i1 @icmp_lshr_lshr_eq(i32 %a, i32 %b) { } define i1 @icmp_ashr_ashr_ne(i32 %a, i32 %b) { -; CHECK-LABEL: @icmp_ashr_ashr_ne( -; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @icmp_ashr_ashr_ne( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 [[A]], [[B]] ; CHECK-NEXT: [[Z:%.*]] = icmp ugt i32 [[Z_UNSHIFTED]], 255 ; CHECK-NEXT: ret i1 [[Z]] ; @@ -3371,8 +3652,9 @@ define i1 @icmp_ashr_ashr_ne(i32 %a, i32 %b) { } define i1 @icmp_neg_cst_slt(i32 %a) { -; CHECK-LABEL: @icmp_neg_cst_slt( -; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], 10 +; CHECK-LABEL: define i1 @icmp_neg_cst_slt( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A]], 10 ; CHECK-NEXT: ret i1 [[TMP1]] ; %1 = sub nsw i32 0, %a @@ -3381,10 +3663,11 @@ define i1 @icmp_neg_cst_slt(i32 %a) { } define i1 @icmp_and_or_lshr(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_and_or_lshr( -; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_and_or_lshr( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, [[Y]] ; CHECK-NEXT: [[OR2:%.*]] = or i32 [[SHF1]], 1 -; CHECK-NEXT: [[AND3:%.*]] = and i32 [[X:%.*]], [[OR2]] +; CHECK-NEXT: [[AND3:%.*]] = and i32 [[X]], [[OR2]] ; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND3]], 0 ; CHECK-NEXT: ret i1 [[RET]] ; @@ -3396,10 +3679,11 @@ define i1 @icmp_and_or_lshr(i32 %x, i32 %y) { } define i1 @icmp_and_or_lshr_samesign(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_and_or_lshr_samesign( -; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_and_or_lshr_samesign( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, [[Y]] ; CHECK-NEXT: [[OR2:%.*]] = or i32 [[SHF1]], 1 -; CHECK-NEXT: [[AND3:%.*]] = and i32 [[X:%.*]], [[OR2]] +; CHECK-NEXT: [[AND3:%.*]] = and i32 [[X]], [[OR2]] ; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND3]], 0 ; CHECK-NEXT: ret i1 [[RET]] ; @@ -3411,8 +3695,9 @@ define i1 @icmp_and_or_lshr_samesign(i32 %x, i32 %y) { } define <2 x i1> @icmp_and_or_lshr_vec(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @icmp_and_or_lshr_vec( -; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHF]], [[X]] ; CHECK-NEXT: [[RET:%.*]] = trunc <2 x i32> [[OR]] to <2 x i1> ; CHECK-NEXT: ret <2 x i1> [[RET]] @@ -3425,9 +3710,10 @@ define <2 x i1> @icmp_and_or_lshr_vec(<2 x i32> %x, <2 x i32> %y) { } define <2 x i1> @icmp_and_or_lshr_vec_commute(<2 x i32> %xp, <2 x i32> %y) { -; CHECK-LABEL: @icmp_and_or_lshr_vec_commute( -; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP:%.*]], splat (i32 42) -; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_vec_commute( +; CHECK-SAME: <2 x i32> [[XP:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP]], splat (i32 42) +; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[X]], [[SHF]] ; CHECK-NEXT: [[RET:%.*]] = trunc <2 x i32> [[OR]] to <2 x i1> ; CHECK-NEXT: ret <2 x i1> [[RET]] @@ -3441,8 +3727,9 @@ define <2 x i1> @icmp_and_or_lshr_vec_commute(<2 x i32> %xp, <2 x i32> %y) { } define i1 @icmp_and_or_lshr_cst(i32 %x) { -; CHECK-LABEL: @icmp_and_or_lshr_cst( -; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @icmp_and_or_lshr_cst( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X]], 3 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND1]], 0 ; CHECK-NEXT: ret i1 [[RET]] ; @@ -3454,8 +3741,9 @@ define i1 @icmp_and_or_lshr_cst(i32 %x) { } define <2 x i1> @icmp_and_or_lshr_cst_vec(<2 x i32> %x) { -; CHECK-LABEL: @icmp_and_or_lshr_cst_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 3) +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_cst_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[RET]] ; @@ -3467,8 +3755,9 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec(<2 x i32> %x) { } define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform(<2 x i32> %x) { -; CHECK-LABEL: @icmp_and_or_lshr_cst_vec_nonuniform( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 3, i32 5> +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 3, i32 5> ; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[RET]] ; @@ -3480,8 +3769,9 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform(<2 x i32> %x) { } define <2 x i1> @icmp_and_or_lshr_cst_vec_poison(<2 x i32> %x) { -; CHECK-LABEL: @icmp_and_or_lshr_cst_vec_poison( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 3, i32 poison> +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_cst_vec_poison( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 3, i32 poison> ; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[RET]] ; @@ -3493,8 +3783,9 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec_poison(<2 x i32> %x) { } define <2 x i1> @icmp_and_or_lshr_cst_vec_commute(<2 x i32> %xp) { -; CHECK-LABEL: @icmp_and_or_lshr_cst_vec_commute( -; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP:%.*]], splat (i32 42) +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_cst_vec_commute( +; CHECK-SAME: <2 x i32> [[XP:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP]], splat (i32 42) ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 3) ; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[RET]] @@ -3508,8 +3799,9 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec_commute(<2 x i32> %xp) { } define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform_commute(<2 x i32> %xp) { -; CHECK-LABEL: @icmp_and_or_lshr_cst_vec_nonuniform_commute( -; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP:%.*]], splat (i32 42) +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform_commute( +; CHECK-SAME: <2 x i32> [[XP:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP]], splat (i32 42) ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 3, i32 5> ; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[RET]] @@ -3523,8 +3815,9 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec_nonuniform_commute(<2 x i32> %xp) { } define <2 x i1> @icmp_and_or_lshr_cst_vec_poison_commute(<2 x i32> %xp) { -; CHECK-LABEL: @icmp_and_or_lshr_cst_vec_poison_commute( -; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP:%.*]], splat (i32 42) +; CHECK-LABEL: define <2 x i1> @icmp_and_or_lshr_cst_vec_poison_commute( +; CHECK-SAME: <2 x i32> [[XP:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> [[XP]], splat (i32 42) ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], <i32 3, i32 poison> ; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[RET]] @@ -3538,8 +3831,9 @@ define <2 x i1> @icmp_and_or_lshr_cst_vec_poison_commute(<2 x i32> %xp) { } define i1 @shl_ap1_zero_ap2_non_zero_2(i32 %a) { -; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 29 +; CHECK-LABEL: define i1 @shl_ap1_zero_ap2_non_zero_2( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A]], 29 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 4, %a @@ -3548,8 +3842,9 @@ define i1 @shl_ap1_zero_ap2_non_zero_2(i32 %a) { } define <2 x i1> @shl_ap1_zero_ap2_non_zero_2_vec(<2 x i32> %a) { -; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[A:%.*]], splat (i32 29) +; CHECK-LABEL: define <2 x i1> @shl_ap1_zero_ap2_non_zero_2_vec( +; CHECK-SAME: <2 x i32> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[A]], splat (i32 29) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %shl = shl <2 x i32> <i32 4, i32 4>, %a @@ -3558,8 +3853,9 @@ define <2 x i1> @shl_ap1_zero_ap2_non_zero_2_vec(<2 x i32> %a) { } define <2 x i1> @shl_ap1_zero_ap2_non_zero_2_vec_nonuniform(<2 x i32> %a) { -; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2_vec_nonuniform( -; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 4, i32 5>, [[A:%.*]] +; CHECK-LABEL: define <2 x i1> @shl_ap1_zero_ap2_non_zero_2_vec_nonuniform( +; CHECK-SAME: <2 x i32> [[A:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 4, i32 5>, [[A]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[SHL]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -3569,8 +3865,9 @@ define <2 x i1> @shl_ap1_zero_ap2_non_zero_2_vec_nonuniform(<2 x i32> %a) { } define i1 @shl_ap1_zero_ap2_non_zero_4(i32 %a) { -; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_4( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 30 +; CHECK-LABEL: define i1 @shl_ap1_zero_ap2_non_zero_4( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A]], 30 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 -2, %a @@ -3579,8 +3876,9 @@ define i1 @shl_ap1_zero_ap2_non_zero_4(i32 %a) { } define i1 @shl_ap1_non_zero_ap2_non_zero_both_positive(i32 %a) { -; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_positive( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @shl_ap1_non_zero_ap2_non_zero_both_positive( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 50, %a @@ -3589,8 +3887,9 @@ define i1 @shl_ap1_non_zero_ap2_non_zero_both_positive(i32 %a) { } define i1 @shl_ap1_non_zero_ap2_non_zero_both_negative(i32 %a) { -; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_negative( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @shl_ap1_non_zero_ap2_non_zero_both_negative( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 -50, %a @@ -3599,7 +3898,8 @@ define i1 @shl_ap1_non_zero_ap2_non_zero_both_negative(i32 %a) { } define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_1(i32 %a) { -; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_1( +; CHECK-LABEL: define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_1( +; CHECK-SAME: i32 [[A:%.*]]) { ; CHECK-NEXT: ret i1 false ; %shl = shl i32 50, %a @@ -3608,8 +3908,9 @@ define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_1(i32 %a) { } define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_2(i32 %a) { -; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_2( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 1 +; CHECK-LABEL: define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_2( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 1 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl i32 25, %a @@ -3618,7 +3919,8 @@ define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_2(i32 %a) { } define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_3(i32 %a) { -; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_3( +; CHECK-LABEL: define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_3( +; CHECK-SAME: i32 [[A:%.*]]) { ; CHECK-NEXT: ret i1 false ; %shl = shl i32 26, %a @@ -3627,8 +3929,9 @@ define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_3(i32 %a) { } define i1 @icmp_sgt_zero_add_nsw(i32 %a) { -; CHECK-LABEL: @icmp_sgt_zero_add_nsw( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -1 +; CHECK-LABEL: define i1 @icmp_sgt_zero_add_nsw( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; %add = add nsw i32 %a, 1 @@ -3637,8 +3940,9 @@ define i1 @icmp_sgt_zero_add_nsw(i32 %a) { } define i1 @icmp_sge_zero_add_nsw(i32 %a) { -; CHECK-LABEL: @icmp_sge_zero_add_nsw( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -2 +; CHECK-LABEL: define i1 @icmp_sge_zero_add_nsw( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -2 ; CHECK-NEXT: ret i1 [[CMP]] ; %add = add nsw i32 %a, 1 @@ -3647,8 +3951,9 @@ define i1 @icmp_sge_zero_add_nsw(i32 %a) { } define i1 @icmp_sle_zero_add_nsw(i32 %a) { -; CHECK-LABEL: @icmp_sle_zero_add_nsw( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @icmp_sle_zero_add_nsw( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %add = add nsw i32 %a, 1 @@ -3657,8 +3962,9 @@ define i1 @icmp_sle_zero_add_nsw(i32 %a) { } define zeroext i1 @icmp_cmpxchg_strong(ptr %sc, i32 %old_val, i32 %new_val) { -; CHECK-LABEL: @icmp_cmpxchg_strong( -; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg ptr [[SC:%.*]], i32 [[OLD_VAL:%.*]], i32 [[NEW_VAL:%.*]] seq_cst seq_cst, align 4 +; CHECK-LABEL: define zeroext i1 @icmp_cmpxchg_strong( +; CHECK-SAME: ptr [[SC:%.*]], i32 [[OLD_VAL:%.*]], i32 [[NEW_VAL:%.*]]) { +; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg ptr [[SC]], i32 [[OLD_VAL]], i32 [[NEW_VAL]] seq_cst seq_cst, align 4 ; CHECK-NEXT: [[ICMP:%.*]] = extractvalue { i32, i1 } [[XCHG]], 1 ; CHECK-NEXT: ret i1 [[ICMP]] ; @@ -3669,8 +3975,9 @@ define zeroext i1 @icmp_cmpxchg_strong(ptr %sc, i32 %old_val, i32 %new_val) { } define i1 @f1(i64 %a, i64 %b) { -; CHECK-LABEL: @f1( -; CHECK-NEXT: [[V:%.*]] = icmp sge i64 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @f1( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp sge i64 [[A]], [[B]] ; CHECK-NEXT: ret i1 [[V]] ; %t = sub nsw i64 %a, %b @@ -3679,8 +3986,9 @@ define i1 @f1(i64 %a, i64 %b) { } define <2 x i1> @f1_vec(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @f1_vec( -; CHECK-NEXT: [[V:%.*]] = icmp sge <2 x i64> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @f1_vec( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp sge <2 x i64> [[A]], [[B]] ; CHECK-NEXT: ret <2 x i1> [[V]] ; %t = sub nsw <2 x i64> %a, %b @@ -3689,8 +3997,9 @@ define <2 x i1> @f1_vec(<2 x i64> %a, <2 x i64> %b) { } define i1 @f2(i64 %a, i64 %b) { -; CHECK-LABEL: @f2( -; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @f2( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 [[A]], [[B]] ; CHECK-NEXT: ret i1 [[V]] ; %t = sub nsw i64 %a, %b @@ -3699,8 +4008,9 @@ define i1 @f2(i64 %a, i64 %b) { } define <2 x i1> @f2_vec(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @f2_vec( -; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @f2_vec( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp sgt <2 x i64> [[A]], [[B]] ; CHECK-NEXT: ret <2 x i1> [[V]] ; %t = sub nsw <2 x i64> %a, %b @@ -3709,8 +4019,9 @@ define <2 x i1> @f2_vec(<2 x i64> %a, <2 x i64> %b) { } define i1 @f3(i64 %a, i64 %b) { -; CHECK-LABEL: @f3( -; CHECK-NEXT: [[V:%.*]] = icmp slt i64 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @f3( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp slt i64 [[A]], [[B]] ; CHECK-NEXT: ret i1 [[V]] ; %t = sub nsw i64 %a, %b @@ -3719,8 +4030,9 @@ define i1 @f3(i64 %a, i64 %b) { } define <2 x i1> @f3_vec(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @f3_vec( -; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @f3_vec( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp slt <2 x i64> [[A]], [[B]] ; CHECK-NEXT: ret <2 x i1> [[V]] ; %t = sub nsw <2 x i64> %a, %b @@ -3729,8 +4041,9 @@ define <2 x i1> @f3_vec(<2 x i64> %a, <2 x i64> %b) { } define i1 @f4(i64 %a, i64 %b) { -; CHECK-LABEL: @f4( -; CHECK-NEXT: [[V:%.*]] = icmp sle i64 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i1 @f4( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp sle i64 [[A]], [[B]] ; CHECK-NEXT: ret i1 [[V]] ; %t = sub nsw i64 %a, %b @@ -3739,8 +4052,9 @@ define i1 @f4(i64 %a, i64 %b) { } define <2 x i1> @f4_vec(<2 x i64> %a, <2 x i64> %b) { -; CHECK-LABEL: @f4_vec( -; CHECK-NEXT: [[V:%.*]] = icmp sle <2 x i64> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @f4_vec( +; CHECK-SAME: <2 x i64> [[A:%.*]], <2 x i64> [[B:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp sle <2 x i64> [[A]], [[B]] ; CHECK-NEXT: ret <2 x i1> [[V]] ; %t = sub nsw <2 x i64> %a, %b @@ -3749,9 +4063,10 @@ define <2 x i1> @f4_vec(<2 x i64> %a, <2 x i64> %b) { } define i32 @f5(i8 %a, i8 %b) { -; CHECK-LABEL: @f5( -; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32 -; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[B:%.*]] to i32 +; CHECK-LABEL: define i32 @f5( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A]] to i32 +; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[B]] to i32 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV3]] ; CHECK-NEXT: [[SUB7_SUB:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 true) ; CHECK-NEXT: ret i32 [[SUB7_SUB]] @@ -3766,8 +4081,9 @@ define i32 @f5(i8 %a, i8 %b) { } define i32 @f6(i32 %a, i32 %b) { -; CHECK-LABEL: @f6( -; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i32 @f6( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 [[A]], [[B]] ; CHECK-NEXT: [[CMP_MASK:%.*]] = and i32 [[CMP_UNSHIFTED]], 255 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CMP_MASK]], 0 ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i32 10000, i32 0 @@ -3783,8 +4099,9 @@ define i32 @f6(i32 %a, i32 %b) { } define i32 @f7(i32 %a, i32 %b) { -; CHECK-LABEL: @f7( -; CHECK-NEXT: [[CMP_NOT_UNSHIFTED:%.*]] = xor i32 [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define i32 @f7( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[CMP_NOT_UNSHIFTED:%.*]] = xor i32 [[A]], [[B]] ; CHECK-NEXT: [[CMP_NOT_MASK:%.*]] = and i32 [[CMP_NOT_UNSHIFTED]], 511 ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[CMP_NOT_MASK]], 0 ; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP_NOT]], i32 0, i32 10000 @@ -3798,8 +4115,9 @@ define i32 @f7(i32 %a, i32 %b) { } define i1 @f8(i32 %val, i32 %lim) { -; CHECK-LABEL: @f8( -; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[LIM:%.*]], 0 +; CHECK-LABEL: define i1 @f8( +; CHECK-SAME: i32 [[VAL:%.*]], i32 [[LIM:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[LIM]], 0 ; CHECK-NEXT: ret i1 [[R]] ; %lim.sub = add i32 %lim, -1 @@ -3809,8 +4127,9 @@ define i1 @f8(i32 %val, i32 %lim) { } define i1 @f9(i32 %val, i32 %lim) { -; CHECK-LABEL: @f9( -; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[LIM:%.*]], 0 +; CHECK-LABEL: define i1 @f9( +; CHECK-SAME: i32 [[VAL:%.*]], i32 [[LIM:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[LIM]], 0 ; CHECK-NEXT: ret i1 [[R]] ; %lim.sub = sub i32 %lim, 1 @@ -3820,11 +4139,12 @@ define i1 @f9(i32 %val, i32 %lim) { } define i1 @f10(i16 %p) { -; CHECK-LABEL: @f10( +; CHECK-LABEL: define i1 @f10( +; CHECK-SAME: i16 [[P:%.*]]) { ; CHECK-NEXT: [[EXT1:%.*]] = zext i8 ptrtoint (ptr @f10 to i8) to i16 ; CHECK-NEXT: [[EXT2:%.*]] = zext i8 ptrtoint (ptr @f10 to i8) to i16 ; CHECK-NEXT: [[MUL:%.*]] = mul nuw i16 [[EXT1]], [[EXT2]] -; CHECK-NEXT: [[CMP580:%.*]] = icmp ule i16 [[MUL]], [[P:%.*]] +; CHECK-NEXT: [[CMP580:%.*]] = icmp ule i16 [[MUL]], [[P]] ; CHECK-NEXT: ret i1 [[CMP580]] ; %ext1 = zext i8 ptrtoint (ptr @f10 to i8) to i16 @@ -3839,9 +4159,10 @@ define i1 @f10(i16 %p) { ; equivalent to one another. define i1 @cmp_sgt_rhs_dec(float %x, i32 %i) { -; CHECK-LABEL: @cmp_sgt_rhs_dec( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[I:%.*]], [[CONV]] +; CHECK-LABEL: define i1 @cmp_sgt_rhs_dec( +; CHECK-SAME: float [[X:%.*]], i32 [[I:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[I]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; %conv = fptosi float %x to i32 @@ -3851,9 +4172,10 @@ define i1 @cmp_sgt_rhs_dec(float %x, i32 %i) { } define i1 @cmp_sle_rhs_dec(float %x, i32 %i) { -; CHECK-LABEL: @cmp_sle_rhs_dec( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[I:%.*]], [[CONV]] +; CHECK-LABEL: define i1 @cmp_sle_rhs_dec( +; CHECK-SAME: float [[X:%.*]], i32 [[I:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[I]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; %conv = fptosi float %x to i32 @@ -3863,9 +4185,10 @@ define i1 @cmp_sle_rhs_dec(float %x, i32 %i) { } define i1 @cmp_sge_rhs_inc(float %x, i32 %i) { -; CHECK-LABEL: @cmp_sge_rhs_inc( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I:%.*]], [[CONV]] +; CHECK-LABEL: define i1 @cmp_sge_rhs_inc( +; CHECK-SAME: float [[X:%.*]], i32 [[I:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; %conv = fptosi float %x to i32 @@ -3875,9 +4198,10 @@ define i1 @cmp_sge_rhs_inc(float %x, i32 %i) { } define i1 @cmp_slt_rhs_inc(float %x, i32 %i) { -; CHECK-LABEL: @cmp_slt_rhs_inc( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[I:%.*]], [[CONV]] +; CHECK-LABEL: define i1 @cmp_slt_rhs_inc( +; CHECK-SAME: float [[X:%.*]], i32 [[I:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[I]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; %conv = fptosi float %x to i32 @@ -3887,9 +4211,10 @@ define i1 @cmp_slt_rhs_inc(float %x, i32 %i) { } define i1 @PR26407(i32 %x, i32 %y) { -; CHECK-LABEL: @PR26407( -; CHECK-NEXT: [[ADDX:%.*]] = add i32 [[X:%.*]], 2147483647 -; CHECK-NEXT: [[ADDY:%.*]] = add i32 [[Y:%.*]], 2147483647 +; CHECK-LABEL: define i1 @PR26407( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ADDX:%.*]] = add i32 [[X]], 2147483647 +; CHECK-NEXT: [[ADDY:%.*]] = add i32 [[Y]], 2147483647 ; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[ADDX]], [[ADDY]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -3900,8 +4225,9 @@ define i1 @PR26407(i32 %x, i32 %y) { } define i1 @cmp_inverse_mask_bits_set_eq(i32 %x) { -; CHECK-LABEL: @cmp_inverse_mask_bits_set_eq( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -43 +; CHECK-LABEL: define i1 @cmp_inverse_mask_bits_set_eq( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -43 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], -43 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -3911,8 +4237,9 @@ define i1 @cmp_inverse_mask_bits_set_eq(i32 %x) { } define <2 x i1> @cmp_inverse_mask_bits_set_eq_vec(<2 x i32> %x) { -; CHECK-LABEL: @cmp_inverse_mask_bits_set_eq_vec( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 -43) +; CHECK-LABEL: define <2 x i1> @cmp_inverse_mask_bits_set_eq_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X]], splat (i32 -43) ; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[TMP1]], splat (i32 -43) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -3922,8 +4249,9 @@ define <2 x i1> @cmp_inverse_mask_bits_set_eq_vec(<2 x i32> %x) { } define i1 @cmp_inverse_mask_bits_set_ne(i32 %x) { -; CHECK-LABEL: @cmp_inverse_mask_bits_set_ne( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -43 +; CHECK-LABEL: define i1 @cmp_inverse_mask_bits_set_ne( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -43 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], -43 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -3935,8 +4263,9 @@ define i1 @cmp_inverse_mask_bits_set_ne(i32 %x) { ; When canonicalizing to 'gt/lt', make sure the constant is correct. define i1 @PR27792(i128 %a) { -; CHECK-LABEL: @PR27792( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i128 [[A:%.*]], -1 +; CHECK-LABEL: define i1 @PR27792( +; CHECK-SAME: i128 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i128 [[A]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; %cmp = icmp sge i128 %a, 0 @@ -3944,8 +4273,9 @@ define i1 @PR27792(i128 %a) { } define i1 @PR27792_2(i128 %a) { -; CHECK-LABEL: @PR27792_2( -; CHECK-NEXT: [[B:%.*]] = icmp ne i128 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @PR27792_2( +; CHECK-SAME: i128 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ne i128 [[A]], 0 ; CHECK-NEXT: ret i1 [[B]] ; %b = icmp uge i128 %a, 1 @@ -3953,8 +4283,9 @@ define i1 @PR27792_2(i128 %a) { } define i1 @ugtMaxSignedVal(i8 %a) { -; CHECK-LABEL: @ugtMaxSignedVal( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @ugtMaxSignedVal( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %cmp = icmp ugt i8 %a, 127 @@ -3962,8 +4293,9 @@ define i1 @ugtMaxSignedVal(i8 %a) { } define <2 x i1> @ugtMaxSignedValVec(<2 x i8> %a) { -; CHECK-LABEL: @ugtMaxSignedValVec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @ugtMaxSignedValVec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %cmp = icmp ugt <2 x i8> %a, <i8 127, i8 127> @@ -3971,8 +4303,9 @@ define <2 x i1> @ugtMaxSignedValVec(<2 x i8> %a) { } define i1 @ugtKnownBits(i8 %a) { -; CHECK-LABEL: @ugtKnownBits( -; CHECK-NEXT: [[B:%.*]] = and i8 [[A:%.*]], 17 +; CHECK-LABEL: define i1 @ugtKnownBits( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = and i8 [[A]], 17 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[B]], 17 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -3982,8 +4315,9 @@ define i1 @ugtKnownBits(i8 %a) { } define <2 x i1> @ugtKnownBitsVec(<2 x i8> %a) { -; CHECK-LABEL: @ugtKnownBitsVec( -; CHECK-NEXT: [[B:%.*]] = and <2 x i8> [[A:%.*]], splat (i8 17) +; CHECK-LABEL: define <2 x i1> @ugtKnownBitsVec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = and <2 x i8> [[A]], splat (i8 17) ; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[B]], splat (i8 17) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -3993,9 +4327,10 @@ define <2 x i1> @ugtKnownBitsVec(<2 x i8> %a) { } define i1 @or_ptrtoint_mismatch(ptr %p, ptr %q) { -; CHECK-LABEL: @or_ptrtoint_mismatch( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq ptr [[P:%.*]], null -; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[Q:%.*]], null +; CHECK-LABEL: define i1 @or_ptrtoint_mismatch( +; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq ptr [[P]], null +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[Q]], null ; CHECK-NEXT: [[B:%.*]] = and i1 [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret i1 [[B]] ; @@ -4008,8 +4343,9 @@ define i1 @or_ptrtoint_mismatch(ptr %p, ptr %q) { } define i1 @icmp_add1_ugt(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_add1_ugt( -; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_add1_ugt( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %add = add nuw i32 %x, 1 @@ -4018,8 +4354,9 @@ define i1 @icmp_add1_ugt(i32 %x, i32 %y) { } define i1 @icmp_add1_ule(i32 %x, i32 %y) { -; CHECK-LABEL: @icmp_add1_ule( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @icmp_add1_ule( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %add = add nuw i32 %x, 1 @@ -4028,9 +4365,10 @@ define i1 @icmp_add1_ule(i32 %x, i32 %y) { } define i1 @cmp_uge_rhs_inc(float %x, i32 %i) { -; CHECK-LABEL: @cmp_uge_rhs_inc( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[I:%.*]], [[CONV]] +; CHECK-LABEL: define i1 @cmp_uge_rhs_inc( +; CHECK-SAME: float [[X:%.*]], i32 [[I:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[I]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; %conv = fptosi float %x to i32 @@ -4040,9 +4378,10 @@ define i1 @cmp_uge_rhs_inc(float %x, i32 %i) { } define i1 @cmp_ult_rhs_inc(float %x, i32 %i) { -; CHECK-LABEL: @cmp_ult_rhs_inc( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[I:%.*]], [[CONV]] +; CHECK-LABEL: define i1 @cmp_ult_rhs_inc( +; CHECK-SAME: float [[X:%.*]], i32 [[I:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[I]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; %conv = fptosi float %x to i32 @@ -4052,9 +4391,10 @@ define i1 @cmp_ult_rhs_inc(float %x, i32 %i) { } define i1 @cmp_sge_lhs_inc(i32 %x, i32 %y) { -; CHECK-LABEL: @cmp_sge_lhs_inc( -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[X:%.*]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[INC]], [[Y:%.*]] +; CHECK-LABEL: define i1 @cmp_sge_lhs_inc( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[X]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[INC]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %inc = add nsw i32 %x, 1 @@ -4063,9 +4403,10 @@ define i1 @cmp_sge_lhs_inc(i32 %x, i32 %y) { } define i1 @cmp_uge_lhs_inc(i32 %x, i32 %y) { -; CHECK-LABEL: @cmp_uge_lhs_inc( -; CHECK-NEXT: [[INC:%.*]] = add nuw i32 [[X:%.*]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[INC]], [[Y:%.*]] +; CHECK-LABEL: define i1 @cmp_uge_lhs_inc( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[INC:%.*]] = add nuw i32 [[X]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[INC]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %inc = add nuw i32 %x, 1 @@ -4074,9 +4415,10 @@ define i1 @cmp_uge_lhs_inc(i32 %x, i32 %y) { } define i1 @cmp_sgt_lhs_dec(i32 %x, i32 %y) { -; CHECK-LABEL: @cmp_sgt_lhs_dec( -; CHECK-NEXT: [[DEC:%.*]] = add nsw i32 [[X:%.*]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[DEC]], [[Y:%.*]] +; CHECK-LABEL: define i1 @cmp_sgt_lhs_dec( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[DEC:%.*]] = add nsw i32 [[X]], -1 +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[DEC]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %dec = sub nsw i32 %x, 1 @@ -4085,9 +4427,10 @@ define i1 @cmp_sgt_lhs_dec(i32 %x, i32 %y) { } define i1 @cmp_ugt_lhs_dec(i32 %x, i32 %y) { -; CHECK-LABEL: @cmp_ugt_lhs_dec( -; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC]], [[Y:%.*]] +; CHECK-LABEL: define i1 @cmp_ugt_lhs_dec( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X]], -1 +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %dec = sub nuw i32 %x, 1 @@ -4096,9 +4439,10 @@ define i1 @cmp_ugt_lhs_dec(i32 %x, i32 %y) { } define i1 @cmp_sle_rhs_inc(float %x, i32 %y) { -; CHECK-LABEL: @cmp_sle_rhs_inc( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[Y:%.*]], 1 +; CHECK-LABEL: define i1 @cmp_sle_rhs_inc( +; CHECK-SAME: float [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[Y]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[INC]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -4109,9 +4453,10 @@ define i1 @cmp_sle_rhs_inc(float %x, i32 %y) { } define i1 @cmp_ule_rhs_inc(float %x, i32 %y) { -; CHECK-LABEL: @cmp_ule_rhs_inc( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[INC:%.*]] = add nuw i32 [[Y:%.*]], 1 +; CHECK-LABEL: define i1 @cmp_ule_rhs_inc( +; CHECK-SAME: float [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[INC:%.*]] = add nuw i32 [[Y]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[INC]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -4122,9 +4467,10 @@ define i1 @cmp_ule_rhs_inc(float %x, i32 %y) { } define i1 @cmp_slt_rhs_dec(float %x, i32 %y) { -; CHECK-LABEL: @cmp_slt_rhs_dec( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[DEC:%.*]] = add nsw i32 [[Y:%.*]], -1 +; CHECK-LABEL: define i1 @cmp_slt_rhs_dec( +; CHECK-SAME: float [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[DEC:%.*]] = add nsw i32 [[Y]], -1 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[DEC]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -4135,9 +4481,10 @@ define i1 @cmp_slt_rhs_dec(float %x, i32 %y) { } define i1 @cmp_ult_rhs_dec(float %x, i32 %y) { -; CHECK-LABEL: @cmp_ult_rhs_dec( -; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X:%.*]] to i32 -; CHECK-NEXT: [[DEC:%.*]] = add i32 [[Y:%.*]], -1 +; CHECK-LABEL: define i1 @cmp_ult_rhs_dec( +; CHECK-SAME: float [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[X]] to i32 +; CHECK-NEXT: [[DEC:%.*]] = add i32 [[Y]], -1 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[DEC]], [[CONV]] ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -4148,8 +4495,9 @@ define i1 @cmp_ult_rhs_dec(float %x, i32 %y) { } define i1 @eq_add_constants(i32 %x, i32 %y) { -; CHECK-LABEL: @eq_add_constants( -; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @eq_add_constants( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[C]] ; %A = add i32 %x, 5 @@ -4161,8 +4509,9 @@ define i1 @eq_add_constants(i32 %x, i32 %y) { declare i32 @llvm.bswap.i32(i32) define i1 @bswap_ne(i32 %x, i32 %y) { -; CHECK-LABEL: @bswap_ne( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @bswap_ne( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %swapx = call i32 @llvm.bswap.i32(i32 %x) @@ -4174,8 +4523,9 @@ define i1 @bswap_ne(i32 %x, i32 %y) { declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>) define <8 x i1> @bswap_vec_eq(<8 x i16> %x, <8 x i16> %y) { -; CHECK-LABEL: @bswap_vec_eq( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define <8 x i1> @bswap_vec_eq( +; CHECK-SAME: <8 x i16> [[X:%.*]], <8 x i16> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[X]], [[Y]] ; CHECK-NEXT: ret <8 x i1> [[CMP]] ; %swapx = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %x) @@ -4187,8 +4537,9 @@ define <8 x i1> @bswap_vec_eq(<8 x i16> %x, <8 x i16> %y) { declare i64 @llvm.bitreverse.i64(i64) define i1 @bitreverse_eq(i64 %x, i64 %y) { -; CHECK-LABEL: @bitreverse_eq( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i1 @bitreverse_eq( +; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[X]], [[Y]] ; CHECK-NEXT: ret i1 [[CMP]] ; %revx = call i64 @llvm.bitreverse.i64(i64 %x) @@ -4200,8 +4551,9 @@ define i1 @bitreverse_eq(i64 %x, i64 %y) { declare <8 x i16> @llvm.bitreverse.v8i16(<8 x i16>) define <8 x i1> @bitreverse_vec_ne(<8 x i16> %x, <8 x i16> %y) { -; CHECK-LABEL: @bitreverse_vec_ne( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i16> [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define <8 x i1> @bitreverse_vec_ne( +; CHECK-SAME: <8 x i16> [[X:%.*]], <8 x i16> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i16> [[X]], [[Y]] ; CHECK-NEXT: ret <8 x i1> [[CMP]] ; %revx = call <8 x i16> @llvm.bitreverse.v8i16(<8 x i16> %x) @@ -4213,9 +4565,10 @@ define <8 x i1> @bitreverse_vec_ne(<8 x i16> %x, <8 x i16> %y) { ; These perform a comparison of a value known to be between 4 and 5 with a value between 5 and 7. ; They should all simplify to equality compares. define i1 @knownbits1(i8 %a, i8 %b) { -; CHECK-LABEL: @knownbits1( -; CHECK-NEXT: [[A1:%.*]] = and i8 [[A:%.*]], 1 -; CHECK-NEXT: [[B1:%.*]] = and i8 [[B:%.*]], 2 +; CHECK-LABEL: define i1 @knownbits1( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and i8 [[A]], 1 +; CHECK-NEXT: [[B1:%.*]] = and i8 [[B]], 2 ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i8 [[B1]], 1 ; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A1]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] @@ -4229,9 +4582,10 @@ define i1 @knownbits1(i8 %a, i8 %b) { } define i1 @knownbits2(i8 %a, i8 %b) { -; CHECK-LABEL: @knownbits2( -; CHECK-NEXT: [[A1:%.*]] = and i8 [[A:%.*]], 1 -; CHECK-NEXT: [[B1:%.*]] = and i8 [[B:%.*]], 2 +; CHECK-LABEL: define i1 @knownbits2( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and i8 [[A]], 1 +; CHECK-NEXT: [[B1:%.*]] = and i8 [[B]], 2 ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i8 [[B1]], 1 ; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[A1]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] @@ -4245,9 +4599,10 @@ define i1 @knownbits2(i8 %a, i8 %b) { } define i1 @knownbits3(i8 %a, i8 %b) { -; CHECK-LABEL: @knownbits3( -; CHECK-NEXT: [[A1:%.*]] = and i8 [[A:%.*]], 1 -; CHECK-NEXT: [[B1:%.*]] = and i8 [[B:%.*]], 2 +; CHECK-LABEL: define i1 @knownbits3( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and i8 [[A]], 1 +; CHECK-NEXT: [[B1:%.*]] = and i8 [[B]], 2 ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i8 [[B1]], 1 ; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], [[A1]] ; CHECK-NEXT: ret i1 [[C]] @@ -4261,9 +4616,10 @@ define i1 @knownbits3(i8 %a, i8 %b) { } define <2 x i1> @knownbits4(<2 x i8> %a, <2 x i8> %b) { -; CHECK-LABEL: @knownbits4( -; CHECK-NEXT: [[A1:%.*]] = and <2 x i8> [[A:%.*]], splat (i8 1) -; CHECK-NEXT: [[B1:%.*]] = and <2 x i8> [[B:%.*]], splat (i8 2) +; CHECK-LABEL: define <2 x i1> @knownbits4( +; CHECK-SAME: <2 x i8> [[A:%.*]], <2 x i8> [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and <2 x i8> [[A]], splat (i8 1) +; CHECK-NEXT: [[B1:%.*]] = and <2 x i8> [[B]], splat (i8 2) ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint <2 x i8> [[B1]], splat (i8 1) ; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[TMP1]], [[A1]] ; CHECK-NEXT: ret <2 x i1> [[C]] @@ -4279,9 +4635,10 @@ define <2 x i1> @knownbits4(<2 x i8> %a, <2 x i8> %b) { ; These are the signed versions of the above. One value is less than or equal to 5, but maybe negative. ; The other is known to be a value 5-7. These should simplify to equality comparisons. define i1 @knownbits5(i8 %a, i8 %b) { -; CHECK-LABEL: @knownbits5( -; CHECK-NEXT: [[A1:%.*]] = and i8 [[A:%.*]], -127 -; CHECK-NEXT: [[B1:%.*]] = and i8 [[B:%.*]], 2 +; CHECK-LABEL: define i1 @knownbits5( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and i8 [[A]], -127 +; CHECK-NEXT: [[B1:%.*]] = and i8 [[B]], 2 ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i8 [[B1]], 1 ; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[A1]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] @@ -4295,9 +4652,10 @@ define i1 @knownbits5(i8 %a, i8 %b) { } define i1 @knownbits6(i8 %a, i8 %b) { -; CHECK-LABEL: @knownbits6( -; CHECK-NEXT: [[A1:%.*]] = and i8 [[A:%.*]], -127 -; CHECK-NEXT: [[B1:%.*]] = and i8 [[B:%.*]], 2 +; CHECK-LABEL: define i1 @knownbits6( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and i8 [[A]], -127 +; CHECK-NEXT: [[B1:%.*]] = and i8 [[B]], 2 ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i8 [[B1]], 1 ; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[A1]], [[TMP1]] ; CHECK-NEXT: ret i1 [[C]] @@ -4311,9 +4669,10 @@ define i1 @knownbits6(i8 %a, i8 %b) { } define <2 x i1> @knownbits7(<2 x i8> %a, <2 x i8> %b) { -; CHECK-LABEL: @knownbits7( -; CHECK-NEXT: [[A1:%.*]] = and <2 x i8> [[A:%.*]], splat (i8 -127) -; CHECK-NEXT: [[B1:%.*]] = and <2 x i8> [[B:%.*]], splat (i8 2) +; CHECK-LABEL: define <2 x i1> @knownbits7( +; CHECK-SAME: <2 x i8> [[A:%.*]], <2 x i8> [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and <2 x i8> [[A]], splat (i8 -127) +; CHECK-NEXT: [[B1:%.*]] = and <2 x i8> [[B]], splat (i8 2) ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint <2 x i8> [[B1]], splat (i8 1) ; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i8> [[TMP1]], [[A1]] ; CHECK-NEXT: ret <2 x i1> [[C]] @@ -4327,9 +4686,10 @@ define <2 x i1> @knownbits7(<2 x i8> %a, <2 x i8> %b) { } define i1 @knownbits8(i8 %a, i8 %b) { -; CHECK-LABEL: @knownbits8( -; CHECK-NEXT: [[A1:%.*]] = and i8 [[A:%.*]], -127 -; CHECK-NEXT: [[B1:%.*]] = and i8 [[B:%.*]], 2 +; CHECK-LABEL: define i1 @knownbits8( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = and i8 [[A]], -127 +; CHECK-NEXT: [[B1:%.*]] = and i8 [[B]], 2 ; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i8 [[B1]], 1 ; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[TMP1]], [[A1]] ; CHECK-NEXT: ret i1 [[C]] @@ -4344,8 +4704,9 @@ define i1 @knownbits8(i8 %a, i8 %b) { ; Make sure InstCombine doesn't try too hard to simplify the icmp and break the abs idiom define i32 @abs_preserve(i32 %x) { -; CHECK-LABEL: @abs_preserve( -; CHECK-NEXT: [[A:%.*]] = shl nsw i32 [[X:%.*]], 1 +; CHECK-LABEL: define i32 @abs_preserve( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = shl nsw i32 [[X]], 1 ; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false) ; CHECK-NEXT: ret i32 [[ABS]] ; @@ -4360,8 +4721,9 @@ define i32 @abs_preserve(i32 %x) { declare void @llvm.assume(i1) define i1 @PR35794(ptr %a) { -; CHECK-LABEL: @PR35794( -; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq ptr [[A:%.*]], null +; CHECK-LABEL: define i1 @PR35794( +; CHECK-SAME: ptr [[A:%.*]]) { +; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq ptr [[A]], null ; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]]) ; CHECK-NEXT: ret i1 true ; @@ -4373,8 +4735,9 @@ define i1 @PR35794(ptr %a) { ; Don't crash by assuming the compared values are integers. define <2 x i1> @PR36583(<2 x ptr>) { -; CHECK-LABEL: @PR36583( -; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x ptr> [[TMP0:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @PR36583( +; CHECK-SAME: <2 x ptr> [[TMP0:%.*]]) { +; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x ptr> [[TMP0]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[RES]] ; %cast = ptrtoint <2 x ptr> %0 to <2 x i64> @@ -4384,8 +4747,9 @@ define <2 x i1> @PR36583(<2 x ptr>) { ; fold (icmp pred (sub (0, X)) C1) for vec type define <2 x i32> @Op1Negated_Vec(<2 x i32> %x) { -; CHECK-LABEL: @Op1Negated_Vec( -; CHECK-NEXT: [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true) +; CHECK-LABEL: define <2 x i32> @Op1Negated_Vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X]], i1 true) ; CHECK-NEXT: ret <2 x i32> [[COND]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x @@ -4395,8 +4759,9 @@ define <2 x i32> @Op1Negated_Vec(<2 x i32> %x) { } define i1 @signbit_bitcast_fpext(float %x) { -; CHECK-LABEL: @signbit_bitcast_fpext( -; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[X:%.*]] to i32 +; CHECK-LABEL: define i1 @signbit_bitcast_fpext( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[R]] ; @@ -4407,8 +4772,9 @@ define i1 @signbit_bitcast_fpext(float %x) { } define <2 x i1> @signbit_bitcast_fpext_vec(<2 x half> %x) { -; CHECK-LABEL: @signbit_bitcast_fpext_vec( -; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x half> [[X:%.*]] to <2 x i16> +; CHECK-LABEL: define <2 x i1> @signbit_bitcast_fpext_vec( +; CHECK-SAME: <2 x half> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x half> [[X]] to <2 x i16> ; CHECK-NEXT: [[R:%.*]] = icmp slt <2 x i16> [[TMP1]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[R]] ; @@ -4419,8 +4785,9 @@ define <2 x i1> @signbit_bitcast_fpext_vec(<2 x half> %x) { } define i1 @signbit_bitcast_fptrunc(float %x) { -; CHECK-LABEL: @signbit_bitcast_fptrunc( -; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[X:%.*]] to i32 +; CHECK-LABEL: define i1 @signbit_bitcast_fptrunc( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[X]] to i32 ; CHECK-NEXT: [[R:%.*]] = icmp sgt i32 [[TMP1]], -1 ; CHECK-NEXT: ret i1 [[R]] ; @@ -4431,8 +4798,9 @@ define i1 @signbit_bitcast_fptrunc(float %x) { } define <2 x i1> @signbit_bitcast_fptrunc_vec(<2 x double> %x) { -; CHECK-LABEL: @signbit_bitcast_fptrunc_vec( -; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x double> [[X:%.*]] to <2 x i64> +; CHECK-LABEL: define <2 x i1> @signbit_bitcast_fptrunc_vec( +; CHECK-SAME: <2 x double> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x double> [[X]] to <2 x i64> ; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i64> [[TMP1]], splat (i64 -1) ; CHECK-NEXT: ret <2 x i1> [[R]] ; @@ -4443,8 +4811,9 @@ define <2 x i1> @signbit_bitcast_fptrunc_vec(<2 x double> %x) { } define i1 @signbit_bitcast_fpext_wrong_cmp(float %x) { -; CHECK-LABEL: @signbit_bitcast_fpext_wrong_cmp( -; CHECK-NEXT: [[F:%.*]] = fpext float [[X:%.*]] to double +; CHECK-LABEL: define i1 @signbit_bitcast_fpext_wrong_cmp( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[F:%.*]] = fpext float [[X]] to double ; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64 ; CHECK-NEXT: [[R:%.*]] = icmp slt i64 [[B]], 1 ; CHECK-NEXT: ret i1 [[R]] @@ -4456,8 +4825,9 @@ define i1 @signbit_bitcast_fpext_wrong_cmp(float %x) { } define <4 x i1> @signbit_bitcast_fpext_vec_wrong_bitcast(<2 x half> %x) { -; CHECK-LABEL: @signbit_bitcast_fpext_vec_wrong_bitcast( -; CHECK-NEXT: [[F:%.*]] = fpext <2 x half> [[X:%.*]] to <2 x float> +; CHECK-LABEL: define <4 x i1> @signbit_bitcast_fpext_vec_wrong_bitcast( +; CHECK-SAME: <2 x half> [[X:%.*]]) { +; CHECK-NEXT: [[F:%.*]] = fpext <2 x half> [[X]] to <2 x float> ; CHECK-NEXT: [[B:%.*]] = bitcast <2 x float> [[F]] to <4 x i16> ; CHECK-NEXT: [[R:%.*]] = icmp sgt <4 x i16> [[B]], splat (i16 -1) ; CHECK-NEXT: ret <4 x i1> [[R]] @@ -4469,8 +4839,9 @@ define <4 x i1> @signbit_bitcast_fpext_vec_wrong_bitcast(<2 x half> %x) { } define i1 @signbit_bitcast_fpext_extra_use(float %x, ptr %p) { -; CHECK-LABEL: @signbit_bitcast_fpext_extra_use( -; CHECK-NEXT: [[F:%.*]] = fpext float [[X:%.*]] to double +; CHECK-LABEL: define i1 @signbit_bitcast_fpext_extra_use( +; CHECK-SAME: float [[X:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[F:%.*]] = fpext float [[X]] to double ; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64 ; CHECK-NEXT: call void @use_i64(i64 [[B]]) ; CHECK-NEXT: [[R:%.*]] = icmp slt i64 [[B]], 0 @@ -4484,8 +4855,9 @@ define i1 @signbit_bitcast_fpext_extra_use(float %x, ptr %p) { } define i1 @signbit_bitcast_fpext_ppc_fp128(float %x) { -; CHECK-LABEL: @signbit_bitcast_fpext_ppc_fp128( -; CHECK-NEXT: [[S2:%.*]] = fpext float [[X:%.*]] to ppc_fp128 +; CHECK-LABEL: define i1 @signbit_bitcast_fpext_ppc_fp128( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[S2:%.*]] = fpext float [[X]] to ppc_fp128 ; CHECK-NEXT: [[S3:%.*]] = bitcast ppc_fp128 [[S2]] to i128 ; CHECK-NEXT: [[S4:%.*]] = icmp slt i128 [[S3]], 0 ; CHECK-NEXT: ret i1 [[S4]] @@ -4497,8 +4869,9 @@ define i1 @signbit_bitcast_fpext_ppc_fp128(float %x) { } define i1 @signbit_bitcast_fptrunc_ppc_fp128(ppc_fp128 %x) { -; CHECK-LABEL: @signbit_bitcast_fptrunc_ppc_fp128( -; CHECK-NEXT: [[S2:%.*]] = fptrunc ppc_fp128 [[X:%.*]] to float +; CHECK-LABEL: define i1 @signbit_bitcast_fptrunc_ppc_fp128( +; CHECK-SAME: ppc_fp128 [[X:%.*]]) { +; CHECK-NEXT: [[S2:%.*]] = fptrunc ppc_fp128 [[X]] to float ; CHECK-NEXT: [[S3:%.*]] = bitcast float [[S2]] to i32 ; CHECK-NEXT: [[S4:%.*]] = icmp slt i32 [[S3]], 0 ; CHECK-NEXT: ret i1 [[S4]] @@ -4512,9 +4885,10 @@ define i1 @signbit_bitcast_fptrunc_ppc_fp128(ppc_fp128 %x) { @x = external dso_local local_unnamed_addr global i32, align 4 @y = external dso_local local_unnamed_addr global i32, align 4 define i1 @pr47997(i32 %arg) { -; CHECK-LABEL: @pr47997( -; CHECK-NEXT: bb: -; CHECK-NEXT: [[I:%.*]] = add nsw i32 [[ARG:%.*]], -1 +; CHECK-LABEL: define i1 @pr47997( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[BB:.*:]] +; CHECK-NEXT: [[I:%.*]] = add nsw i32 [[ARG]], -1 ; CHECK-NEXT: store i32 [[I]], ptr @x, align 4 ; CHECK-NEXT: [[I1:%.*]] = sub nsw i32 1, [[ARG]] ; CHECK-NEXT: store i32 [[I1]], ptr @y, align 4 @@ -4533,7 +4907,8 @@ bb: ; PR50944 define i1 @thread_cmp_over_select_with_poison_trueval(i1 %b) { -; CHECK-LABEL: @thread_cmp_over_select_with_poison_trueval( +; CHECK-LABEL: define i1 @thread_cmp_over_select_with_poison_trueval( +; CHECK-SAME: i1 [[B:%.*]]) { ; CHECK-NEXT: ret i1 false ; %s = select i1 %b, i32 poison, i32 0 @@ -4542,7 +4917,8 @@ define i1 @thread_cmp_over_select_with_poison_trueval(i1 %b) { } define i1 @thread_cmp_over_select_with_poison_falseval(i1 %b) { -; CHECK-LABEL: @thread_cmp_over_select_with_poison_falseval( +; CHECK-LABEL: define i1 @thread_cmp_over_select_with_poison_falseval( +; CHECK-SAME: i1 [[B:%.*]]) { ; CHECK-NEXT: ret i1 true ; %s = select i1 %b, i32 1, i32 poison @@ -4551,8 +4927,9 @@ define i1 @thread_cmp_over_select_with_poison_falseval(i1 %b) { } define i1 @signbit_true_logic(i8 %x) { -; CHECK-LABEL: @signbit_true_logic( -; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[X:%.*]], 0 +; CHECK-LABEL: define i1 @signbit_true_logic( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[X]], 0 ; CHECK-NEXT: ret i1 [[R]] ; %dec = add i8 %x, -1 @@ -4563,8 +4940,9 @@ define i1 @signbit_true_logic(i8 %x) { } define <2 x i1> @signbit_false_logic(<2 x i5> %x) { -; CHECK-LABEL: @signbit_false_logic( -; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i5> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @signbit_false_logic( +; CHECK-SAME: <2 x i5> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i5> [[X]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[R]] ; %dec = add <2 x i5> %x, <i5 -1, i5 poison> @@ -4577,8 +4955,9 @@ define <2 x i1> @signbit_false_logic(<2 x i5> %x) { ; Confirm that complexity canonicalization works for commuted pattern. define i1 @signbit_true_logic_uses_commute(i64 %x) { -; CHECK-LABEL: @signbit_true_logic_uses_commute( -; CHECK-NEXT: [[DEC:%.*]] = add i64 [[X:%.*]], -1 +; CHECK-LABEL: define i1 @signbit_true_logic_uses_commute( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[DEC:%.*]] = add i64 [[X]], -1 ; CHECK-NEXT: call void @use_i64(i64 [[DEC]]) ; CHECK-NEXT: [[NOT:%.*]] = xor i64 [[X]], -1 ; CHECK-NEXT: call void @use_i64(i64 [[NOT]]) @@ -4598,8 +4977,9 @@ define i1 @signbit_true_logic_uses_commute(i64 %x) { } define i1 @redundant_sign_bit_count_ult_1_2(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_1_2( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 4 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ult_1_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 4 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], 8 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4610,8 +4990,9 @@ define i1 @redundant_sign_bit_count_ult_1_2(i32 %x) { } define i1 @redundant_sign_bit_count_ult_1_30(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_1_30( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1073741824 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ult_1_30( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 1073741824 ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[TMP1]], -1 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4622,8 +5003,9 @@ define i1 @redundant_sign_bit_count_ult_1_30(i32 %x) { } define i1 @redundant_sign_bit_count_ult_31_2(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_31_2( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 4 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ult_31_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 4 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], 8 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4634,8 +5016,9 @@ define i1 @redundant_sign_bit_count_ult_31_2(i32 %x) { } define i1 @redundant_sign_bit_count_ult_31_30(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_31_30( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1073741824 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ult_31_30( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 1073741824 ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[TMP1]], -1 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4646,8 +5029,9 @@ define i1 @redundant_sign_bit_count_ult_31_30(i32 %x) { } define i1 @redundant_sign_bit_count_ult_31_30_extra_use_ashr(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_31_30_extra_use_ashr( -; CHECK-NEXT: [[Y:%.*]] = ashr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ult_31_30_extra_use_ashr( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = ashr i32 [[X]], 31 ; CHECK-NEXT: call void @use_i32(i32 [[Y]]) ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 1073741824 ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[TMP1]], -1 @@ -4661,8 +5045,9 @@ define i1 @redundant_sign_bit_count_ult_31_30_extra_use_ashr(i32 %x) { } define i1 @redundant_sign_bit_count_ult_31_30_extra_use_xor(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_31_30_extra_use_xor( -; CHECK-NEXT: [[Y:%.*]] = ashr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ult_31_30_extra_use_xor( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = ashr i32 [[X]], 31 ; CHECK-NEXT: [[Z:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: call void @use_i32(i32 [[Z]]) ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[Z]], 1073741824 @@ -4676,9 +5061,10 @@ define i1 @redundant_sign_bit_count_ult_31_30_extra_use_xor(i32 %x) { } define i1 @not_redundant_sign_bit_count_ult(i32 %w, i32 %x) { -; CHECK-LABEL: @not_redundant_sign_bit_count_ult( -; CHECK-NEXT: [[Y:%.*]] = ashr i32 [[X:%.*]], 31 -; CHECK-NEXT: [[Z:%.*]] = xor i32 [[Y]], [[W:%.*]] +; CHECK-LABEL: define i1 @not_redundant_sign_bit_count_ult( +; CHECK-SAME: i32 [[W:%.*]], i32 [[X:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = ashr i32 [[X]], 31 +; CHECK-NEXT: [[Z:%.*]] = xor i32 [[Y]], [[W]] ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[Z]], 1073741824 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4689,8 +5075,9 @@ define i1 @not_redundant_sign_bit_count_ult(i32 %w, i32 %x) { } define i1 @wrong_shift_opcode_i8(i8 %x) { -; CHECK-LABEL: @wrong_shift_opcode_i8( -; CHECK-NEXT: [[Y:%.*]] = lshr i8 [[X:%.*]], 5 +; CHECK-LABEL: define i1 @wrong_shift_opcode_i8( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = lshr i8 [[X]], 5 ; CHECK-NEXT: [[Z:%.*]] = xor i8 [[Y]], [[X]] ; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[Z]], 2 ; CHECK-NEXT: ret i1 [[C]] @@ -4702,8 +5089,9 @@ define i1 @wrong_shift_opcode_i8(i8 %x) { } define i1 @redundant_sign_bit_count_ult_31_30_commute(i32 %xsrc) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_31_30_commute( -; CHECK-NEXT: [[X:%.*]] = mul i32 [[XSRC:%.*]], 13 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ult_31_30_commute( +; CHECK-SAME: i32 [[XSRC:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = mul i32 [[XSRC]], 13 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 1073741824 ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[TMP1]], -1 ; CHECK-NEXT: ret i1 [[C]] @@ -4716,8 +5104,9 @@ define i1 @redundant_sign_bit_count_ult_31_30_commute(i32 %xsrc) { } define i1 @redundant_sign_bit_count_i8(i8 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_i8( -; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], 2 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_i8( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 2 ; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[TMP1]], 4 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4728,8 +5117,9 @@ define i1 @redundant_sign_bit_count_i8(i8 %x) { } define <2 x i1> @redundant_sign_bit_count_ult_31_30_vector(<2 x i32> %xsrc) { -; CHECK-LABEL: @redundant_sign_bit_count_ult_31_30_vector( -; CHECK-NEXT: [[X:%.*]] = mul <2 x i32> [[XSRC:%.*]], splat (i32 13) +; CHECK-LABEL: define <2 x i1> @redundant_sign_bit_count_ult_31_30_vector( +; CHECK-SAME: <2 x i32> [[XSRC:%.*]]) { +; CHECK-NEXT: [[X:%.*]] = mul <2 x i32> [[XSRC]], splat (i32 13) ; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X]], splat (i32 1073741824) ; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[TMP1]], splat (i32 -1) ; CHECK-NEXT: ret <2 x i1> [[C]] @@ -4742,8 +5132,9 @@ define <2 x i1> @redundant_sign_bit_count_ult_31_30_vector(<2 x i32> %xsrc) { } define i1 @redundant_sign_bit_count_ugt_1_2(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ugt_1_2( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -4 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ugt_1_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -4 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -8 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4754,8 +5145,9 @@ define i1 @redundant_sign_bit_count_ugt_1_2(i32 %x) { } define i1 @redundant_sign_bit_count_ugt_1_30(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ugt_1_30( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1073741824 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ugt_1_30( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 1073741824 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4766,8 +5158,9 @@ define i1 @redundant_sign_bit_count_ugt_1_30(i32 %x) { } define i1 @redundant_sign_bit_count_ugt_31_2(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ugt_31_2( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -4 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ugt_31_2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -4 ; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[TMP1]], -8 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4778,8 +5171,9 @@ define i1 @redundant_sign_bit_count_ugt_31_2(i32 %x) { } define i1 @redundant_sign_bit_count_ugt_31_30(i32 %x) { -; CHECK-LABEL: @redundant_sign_bit_count_ugt_31_30( -; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1073741824 +; CHECK-LABEL: define i1 @redundant_sign_bit_count_ugt_31_30( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], 1073741824 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[C]] ; @@ -4790,10 +5184,11 @@ define i1 @redundant_sign_bit_count_ugt_31_30(i32 %x) { } define i1 @zext_bool_and_eq0(i1 %x, i8 %y) { -; CHECK-LABEL: @zext_bool_and_eq0( -; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i1 @zext_bool_and_eq0( +; CHECK-SAME: i1 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y]], 1 ; CHECK-NEXT: [[R1:%.*]] = icmp eq i8 [[TMP1]], 0 -; CHECK-NEXT: [[NOT_X:%.*]] = xor i1 [[X:%.*]], true +; CHECK-NEXT: [[NOT_X:%.*]] = xor i1 [[X]], true ; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_X]], i1 true, i1 [[R1]] ; CHECK-NEXT: ret i1 [[R]] ; @@ -4804,10 +5199,11 @@ define i1 @zext_bool_and_eq0(i1 %x, i8 %y) { } define <2 x i1> @zext_bool_and_eq0_commute(<2 x i1> %x, <2 x i8> %p) { -; CHECK-LABEL: @zext_bool_and_eq0_commute( -; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[P:%.*]], splat (i8 1) +; CHECK-LABEL: define <2 x i1> @zext_bool_and_eq0_commute( +; CHECK-SAME: <2 x i1> [[X:%.*]], <2 x i8> [[P:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[P]], splat (i8 1) ; CHECK-NEXT: [[R1:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer -; CHECK-NEXT: [[NOT_X:%.*]] = xor <2 x i1> [[X:%.*]], splat (i1 true) +; CHECK-NEXT: [[NOT_X:%.*]] = xor <2 x i1> [[X]], splat (i1 true) ; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOT_X]], <2 x i1> splat (i1 true), <2 x i1> [[R1]] ; CHECK-NEXT: ret <2 x i1> [[R]] ; @@ -4819,10 +5215,11 @@ define <2 x i1> @zext_bool_and_eq0_commute(<2 x i1> %x, <2 x i8> %p) { } define i1 @zext_bool_and_ne0(i1 %x, i8 %y) { -; CHECK-LABEL: @zext_bool_and_ne0( -; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i1 @zext_bool_and_ne0( +; CHECK-SAME: i1 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y]], 1 ; CHECK-NEXT: [[R1:%.*]] = icmp ne i8 [[TMP1]], 0 -; CHECK-NEXT: [[R:%.*]] = select i1 [[X:%.*]], i1 [[R1]], i1 false +; CHECK-NEXT: [[R:%.*]] = select i1 [[X]], i1 [[R1]], i1 false ; CHECK-NEXT: ret i1 [[R]] ; %zx = zext i1 %x to i8 @@ -4832,10 +5229,11 @@ define i1 @zext_bool_and_ne0(i1 %x, i8 %y) { } define i1 @zext_bool_and_ne1(i1 %x, i8 %y) { -; CHECK-LABEL: @zext_bool_and_ne1( -; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i1 @zext_bool_and_ne1( +; CHECK-SAME: i1 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y]], 1 ; CHECK-NEXT: [[R1:%.*]] = icmp eq i8 [[TMP1]], 0 -; CHECK-NEXT: [[NOT_X:%.*]] = xor i1 [[X:%.*]], true +; CHECK-NEXT: [[NOT_X:%.*]] = xor i1 [[X]], true ; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_X]], i1 true, i1 [[R1]] ; CHECK-NEXT: ret i1 [[R]] ; @@ -4846,9 +5244,10 @@ define i1 @zext_bool_and_ne1(i1 %x, i8 %y) { } define <2 x i1> @zext_bool_and_eq1(<2 x i1> %x, <2 x i8> %y) { -; CHECK-LABEL: @zext_bool_and_eq1( -; CHECK-NEXT: [[R1:%.*]] = trunc <2 x i8> [[Y:%.*]] to <2 x i1> -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[X:%.*]], <2 x i1> [[R1]], <2 x i1> zeroinitializer +; CHECK-LABEL: define <2 x i1> @zext_bool_and_eq1( +; CHECK-SAME: <2 x i1> [[X:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[R1:%.*]] = trunc <2 x i8> [[Y]] to <2 x i1> +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[X]], <2 x i1> [[R1]], <2 x i1> zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[R]] ; %zx = zext <2 x i1> %x to <2 x i8> @@ -4860,9 +5259,10 @@ define <2 x i1> @zext_bool_and_eq1(<2 x i1> %x, <2 x i8> %y) { ; negative test - wrong logic op define i1 @zext_bool_or_eq0(i1 %x, i8 %y) { -; CHECK-LABEL: @zext_bool_or_eq0( -; CHECK-NEXT: [[ZX:%.*]] = zext i1 [[X:%.*]] to i8 -; CHECK-NEXT: [[A:%.*]] = or i8 [[Y:%.*]], [[ZX]] +; CHECK-LABEL: define i1 @zext_bool_or_eq0( +; CHECK-SAME: i1 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[ZX:%.*]] = zext i1 [[X]] to i8 +; CHECK-NEXT: [[A:%.*]] = or i8 [[Y]], [[ZX]] ; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[A]], 0 ; CHECK-NEXT: ret i1 [[R]] ; @@ -4875,10 +5275,11 @@ define i1 @zext_bool_or_eq0(i1 %x, i8 %y) { ; negative test - extra use define i1 @zext_bool_and_eq0_use(i1 %x, i64 %y) { -; CHECK-LABEL: @zext_bool_and_eq0_use( -; CHECK-NEXT: [[ZX:%.*]] = zext i1 [[X:%.*]] to i64 +; CHECK-LABEL: define i1 @zext_bool_and_eq0_use( +; CHECK-SAME: i1 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[ZX:%.*]] = zext i1 [[X]] to i64 ; CHECK-NEXT: call void @use_i64(i64 [[ZX]]) -; CHECK-NEXT: [[A:%.*]] = and i64 [[Y:%.*]], [[ZX]] +; CHECK-NEXT: [[A:%.*]] = and i64 [[Y]], [[ZX]] ; CHECK-NEXT: [[R:%.*]] = icmp eq i64 [[A]], 0 ; CHECK-NEXT: ret i1 [[R]] ; @@ -4892,9 +5293,10 @@ define i1 @zext_bool_and_eq0_use(i1 %x, i64 %y) { ; negative test - extra use define i1 @zext_bool_and_ne0_use(i1 %x, i64 %y) { -; CHECK-LABEL: @zext_bool_and_ne0_use( -; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[Y:%.*]], 1 -; CHECK-NEXT: [[A:%.*]] = select i1 [[X:%.*]], i64 [[TMP1]], i64 0 +; CHECK-LABEL: define i1 @zext_bool_and_ne0_use( +; CHECK-SAME: i1 [[X:%.*]], i64 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[Y]], 1 +; CHECK-NEXT: [[A:%.*]] = select i1 [[X]], i64 [[TMP1]], i64 0 ; CHECK-NEXT: call void @use_i64(i64 [[A]]) ; CHECK-NEXT: [[R:%.*]] = icmp ne i64 [[A]], 0 ; CHECK-NEXT: ret i1 [[R]] @@ -4909,9 +5311,10 @@ define i1 @zext_bool_and_ne0_use(i1 %x, i64 %y) { ; negative test - must zext from i1 define i1 @zext_notbool_and_ne0(i2 %x, i8 %y) { -; CHECK-LABEL: @zext_notbool_and_ne0( -; CHECK-NEXT: [[ZX:%.*]] = zext i2 [[X:%.*]] to i8 -; CHECK-NEXT: [[A:%.*]] = and i8 [[Y:%.*]], [[ZX]] +; CHECK-LABEL: define i1 @zext_notbool_and_ne0( +; CHECK-SAME: i2 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[ZX:%.*]] = zext i2 [[X]] to i8 +; CHECK-NEXT: [[A:%.*]] = and i8 [[Y]], [[ZX]] ; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[A]], 0 ; CHECK-NEXT: ret i1 [[R]] ; @@ -4924,8 +5327,9 @@ define i1 @zext_notbool_and_ne0(i2 %x, i8 %y) { ; fold icmp(X | OrC, C) --> icmp(X, 0) define i1 @or_positive_sgt_zero(i8 %a) { -; CHECK-LABEL: @or_positive_sgt_zero( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A:%.*]], -1 +; CHECK-LABEL: define i1 @or_positive_sgt_zero( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -4934,8 +5338,9 @@ define i1 @or_positive_sgt_zero(i8 %a) { } define <2 x i1> @or_postive_sgt_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_sgt_zero_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A:%.*]], splat (i8 -1) +; CHECK-LABEL: define <2 x i1> @or_postive_sgt_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A]], splat (i8 -1) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -4945,7 +5350,8 @@ define <2 x i1> @or_postive_sgt_zero_vec(<2 x i8> %a) { } define <2 x i1> @or_poison_vec_sgt_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_poison_vec_sgt_zero_vec( +; CHECK-LABEL: define <2 x i1> @or_poison_vec_sgt_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { ; CHECK-NEXT: ret <2 x i1> poison ; @@ -4955,8 +5361,9 @@ define <2 x i1> @or_poison_vec_sgt_zero_vec(<2 x i8> %a) { } define i1 @or_positive_sge_zero(i8 %a) { -; CHECK-LABEL: @or_positive_sge_zero( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A:%.*]], -1 +; CHECK-LABEL: define i1 @or_positive_sge_zero( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -4965,8 +5372,9 @@ define i1 @or_positive_sge_zero(i8 %a) { } define <2 x i1> @or_postive_sge_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_sge_zero_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A:%.*]], splat (i8 -1) +; CHECK-LABEL: define <2 x i1> @or_postive_sge_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A]], splat (i8 -1) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -4976,7 +5384,8 @@ define <2 x i1> @or_postive_sge_zero_vec(<2 x i8> %a) { } define <2 x i1> @or_poison_vec_sge_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_poison_vec_sge_zero_vec( +; CHECK-LABEL: define <2 x i1> @or_poison_vec_sge_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { ; CHECK-NEXT: ret <2 x i1> poison ; @@ -4986,8 +5395,9 @@ define <2 x i1> @or_poison_vec_sge_zero_vec(<2 x i8> %a) { } define i1 @or_positive_sge_postive(i8 %a) { -; CHECK-LABEL: @or_positive_sge_postive( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A:%.*]], -1 +; CHECK-LABEL: define i1 @or_positive_sge_postive( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -4996,8 +5406,9 @@ define i1 @or_positive_sge_postive(i8 %a) { } define <2 x i1> @or_postive_sge_positive_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_sge_positive_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A:%.*]], splat (i8 -1) +; CHECK-LABEL: define <2 x i1> @or_postive_sge_positive_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A]], splat (i8 -1) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5007,7 +5418,8 @@ define <2 x i1> @or_postive_sge_positive_vec(<2 x i8> %a) { } define <2 x i1> @or_poison_vec_sge_positive_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_poison_vec_sge_positive_vec( +; CHECK-LABEL: define <2 x i1> @or_poison_vec_sge_positive_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { ; CHECK-NEXT: ret <2 x i1> poison ; @@ -5017,8 +5429,9 @@ define <2 x i1> @or_poison_vec_sge_positive_vec(<2 x i8> %a) { } define i1 @or_positive_sle_zero(i8 %a) { -; CHECK-LABEL: @or_positive_sle_zero( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @or_positive_sle_zero( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -5027,8 +5440,9 @@ define i1 @or_positive_sle_zero(i8 %a) { } define <2 x i1> @or_postive_sle_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_sle_zero_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @or_postive_sle_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5038,7 +5452,8 @@ define <2 x i1> @or_postive_sle_zero_vec(<2 x i8> %a) { } define <2 x i1> @or_poison_vec_sle_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_poison_vec_sle_zero_vec( +; CHECK-LABEL: define <2 x i1> @or_poison_vec_sle_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { ; CHECK-NEXT: ret <2 x i1> poison ; @@ -5048,8 +5463,9 @@ define <2 x i1> @or_poison_vec_sle_zero_vec(<2 x i8> %a) { } define i1 @or_positive_slt_zero(i8 %a) { -; CHECK-LABEL: @or_positive_slt_zero( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @or_positive_slt_zero( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -5058,8 +5474,9 @@ define i1 @or_positive_slt_zero(i8 %a) { } define <2 x i1> @or_postive_slt_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_slt_zero_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @or_postive_slt_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5069,7 +5486,8 @@ define <2 x i1> @or_postive_slt_zero_vec(<2 x i8> %a) { } define <2 x i1> @or_poison_vec_slt_zero_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_poison_vec_slt_zero_vec( +; CHECK-LABEL: define <2 x i1> @or_poison_vec_slt_zero_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { ; CHECK-NEXT: ret <2 x i1> poison ; @@ -5079,8 +5497,9 @@ define <2 x i1> @or_poison_vec_slt_zero_vec(<2 x i8> %a) { } define i1 @or_positive_slt_postive(i8 %a) { -; CHECK-LABEL: @or_positive_slt_postive( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @or_positive_slt_postive( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -5089,8 +5508,9 @@ define i1 @or_positive_slt_postive(i8 %a) { } define <2 x i1> @or_postive_slt_positive_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_slt_positive_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @or_postive_slt_positive_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5100,7 +5520,8 @@ define <2 x i1> @or_postive_slt_positive_vec(<2 x i8> %a) { } define <2 x i1> @or_poison_vec_slt_positive_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_poison_vec_slt_positive_vec( +; CHECK-LABEL: define <2 x i1> @or_poison_vec_slt_positive_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { ; CHECK-NEXT: ret <2 x i1> poison ; @@ -5112,8 +5533,9 @@ define <2 x i1> @or_poison_vec_slt_positive_vec(<2 x i8> %a) { ; negative tests for icmp(X | OrC, C) --> icmp(X, 0) define i1 @or_positive_sgt_neg(i8 %a) { -; CHECK-LABEL: @or_positive_sgt_neg( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A:%.*]], -1 +; CHECK-LABEL: define i1 @or_positive_sgt_neg( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -5122,8 +5544,9 @@ define i1 @or_positive_sgt_neg(i8 %a) { } define <2 x i1> @or_postive_sgt_neg_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_sgt_neg_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A:%.*]], splat (i8 -1) +; CHECK-LABEL: define <2 x i1> @or_postive_sgt_neg_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[A]], splat (i8 -1) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5133,8 +5556,9 @@ define <2 x i1> @or_postive_sgt_neg_vec(<2 x i8> %a) { } define i1 @mul_or_positive_sge_neg(i8 %a) { -; CHECK-LABEL: @mul_or_positive_sge_neg( -; CHECK-NEXT: [[B:%.*]] = or i8 [[A:%.*]], 24 +; CHECK-LABEL: define i1 @mul_or_positive_sge_neg( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or i8 [[A]], 24 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[B]], -2 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5144,8 +5568,9 @@ define i1 @mul_or_positive_sge_neg(i8 %a) { } define <2 x i1> @or_postive_sge_neg_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_sge_neg_vec( -; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A:%.*]], splat (i8 24) +; CHECK-LABEL: define <2 x i1> @or_postive_sge_neg_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A]], splat (i8 24) ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[B]], splat (i8 -2) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5156,8 +5581,9 @@ define <2 x i1> @or_postive_sge_neg_vec(<2 x i8> %a) { } define i1 @mul_or_small_sge_large(i8 %a) { -; CHECK-LABEL: @mul_or_small_sge_large( -; CHECK-NEXT: [[B:%.*]] = or i8 [[A:%.*]], 24 +; CHECK-LABEL: define i1 @mul_or_small_sge_large( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or i8 [[A]], 24 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[B]], 24 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5167,8 +5593,9 @@ define i1 @mul_or_small_sge_large(i8 %a) { } define <2 x i1> @or_small_sge_large_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_small_sge_large_vec( -; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A:%.*]], splat (i8 24) +; CHECK-LABEL: define <2 x i1> @or_small_sge_large_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A]], splat (i8 24) ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> [[B]], splat (i8 24) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5179,8 +5606,9 @@ define <2 x i1> @or_small_sge_large_vec(<2 x i8> %a) { } define i1 @or_positive_sle_neg(i8 %a) { -; CHECK-LABEL: @or_positive_sle_neg( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A:%.*]], 0 +; CHECK-LABEL: define i1 @or_positive_sle_neg( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[A]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; %b = or i8 %a, 24 @@ -5189,8 +5617,9 @@ define i1 @or_positive_sle_neg(i8 %a) { } define <2 x i1> @or_sle_neg_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_sle_neg_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i1> @or_sle_neg_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[A]], zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5200,8 +5629,9 @@ define <2 x i1> @or_sle_neg_vec(<2 x i8> %a) { } define i1 @or_positive_slt_neg(i8 %a) { -; CHECK-LABEL: @or_positive_slt_neg( -; CHECK-NEXT: [[B:%.*]] = or i8 [[A:%.*]], 24 +; CHECK-LABEL: define i1 @or_positive_slt_neg( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or i8 [[A]], 24 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[B]], -1 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5211,8 +5641,9 @@ define i1 @or_positive_slt_neg(i8 %a) { } define <2 x i1> @or_postive_slt_neg_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_postive_slt_neg_vec( -; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A:%.*]], splat (i8 24) +; CHECK-LABEL: define <2 x i1> @or_postive_slt_neg_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A]], splat (i8 24) ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[B]], splat (i8 -1) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5223,8 +5654,9 @@ define <2 x i1> @or_postive_slt_neg_vec(<2 x i8> %a) { } define i1 @or_small_slt_large(i8 %a) { -; CHECK-LABEL: @or_small_slt_large( -; CHECK-NEXT: [[B:%.*]] = or i8 [[A:%.*]], 24 +; CHECK-LABEL: define i1 @or_small_slt_large( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or i8 [[A]], 24 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[B]], 25 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5234,8 +5666,9 @@ define i1 @or_small_slt_large(i8 %a) { } define <2 x i1> @or_small_slt_large_vec(<2 x i8> %a) { -; CHECK-LABEL: @or_small_slt_large_vec( -; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A:%.*]], splat (i8 24) +; CHECK-LABEL: define <2 x i1> @or_small_slt_large_vec( +; CHECK-SAME: <2 x i8> [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or <2 x i8> [[A]], splat (i8 24) ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[B]], splat (i8 25) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5246,8 +5679,9 @@ define <2 x i1> @or_small_slt_large_vec(<2 x i8> %a) { } define i1 @or_positive_sgt_zero_multi_use(i8 %a) { -; CHECK-LABEL: @or_positive_sgt_zero_multi_use( -; CHECK-NEXT: [[B:%.*]] = or i8 [[A:%.*]], 24 +; CHECK-LABEL: define i1 @or_positive_sgt_zero_multi_use( +; CHECK-SAME: i8 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or i8 [[A]], 24 ; CHECK-NEXT: call void @use_i8(i8 [[B]]) ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A]], -1 ; CHECK-NEXT: ret i1 [[CMP]] @@ -5260,9 +5694,10 @@ define i1 @or_positive_sgt_zero_multi_use(i8 %a) { define i1 @disjoint_or_sgt_1(i8 %a, i8 %b) { -; CHECK-LABEL: @disjoint_or_sgt_1( -; CHECK-NEXT: [[B1:%.*]] = add nsw i8 [[B:%.*]], 2 -; CHECK-NEXT: [[ICMP_:%.*]] = icmp sge i8 [[A:%.*]], [[B1]] +; CHECK-LABEL: define i1 @disjoint_or_sgt_1( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[B1:%.*]] = add nsw i8 [[B]], 2 +; CHECK-NEXT: [[ICMP_:%.*]] = icmp sge i8 [[A]], [[B1]] ; CHECK-NEXT: ret i1 [[ICMP_]] ; %a1 = or disjoint i8 %a, 1 @@ -5272,9 +5707,10 @@ define i1 @disjoint_or_sgt_1(i8 %a, i8 %b) { } define i1 @disjoint_or_sgt_2(i8 %a, i8 %b) { -; CHECK-LABEL: @disjoint_or_sgt_2( -; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2 -; CHECK-NEXT: [[B1:%.*]] = add i8 [[B:%.*]], 1 +; CHECK-LABEL: define i1 @disjoint_or_sgt_2( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A]], 2 +; CHECK-NEXT: [[B1:%.*]] = add i8 [[B]], 1 ; CHECK-NEXT: [[ICMP_:%.*]] = icmp sgt i8 [[A1]], [[B1]] ; CHECK-NEXT: ret i1 [[ICMP_]] ; @@ -5285,9 +5721,10 @@ define i1 @disjoint_or_sgt_2(i8 %a, i8 %b) { } define i1 @disjoint_or_sgt_3(i8 %a, i8 %b) { -; CHECK-LABEL: @disjoint_or_sgt_3( -; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2 -; CHECK-NEXT: [[B1:%.*]] = add nuw i8 [[B:%.*]], 1 +; CHECK-LABEL: define i1 @disjoint_or_sgt_3( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A]], 2 +; CHECK-NEXT: [[B1:%.*]] = add nuw i8 [[B]], 1 ; CHECK-NEXT: [[ICMP_:%.*]] = icmp sgt i8 [[A1]], [[B1]] ; CHECK-NEXT: ret i1 [[ICMP_]] ; @@ -5298,9 +5735,10 @@ define i1 @disjoint_or_sgt_3(i8 %a, i8 %b) { } define i1 @disjoint_or_ugt_1(i8 %a, i8 %b) { -; CHECK-LABEL: @disjoint_or_ugt_1( -; CHECK-NEXT: [[B1:%.*]] = add nsw i8 [[B:%.*]], 2 -; CHECK-NEXT: [[ICMP_:%.*]] = icmp uge i8 [[A:%.*]], [[B1]] +; CHECK-LABEL: define i1 @disjoint_or_ugt_1( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[B1:%.*]] = add nsw i8 [[B]], 2 +; CHECK-NEXT: [[ICMP_:%.*]] = icmp uge i8 [[A]], [[B1]] ; CHECK-NEXT: ret i1 [[ICMP_]] ; %a1 = or disjoint i8 %a, 1 @@ -5310,9 +5748,10 @@ define i1 @disjoint_or_ugt_1(i8 %a, i8 %b) { } define i1 @disjoint_or_ugt_2(i8 %a, i8 %b) { -; CHECK-LABEL: @disjoint_or_ugt_2( -; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2 -; CHECK-NEXT: [[B1:%.*]] = add i8 [[B:%.*]], 1 +; CHECK-LABEL: define i1 @disjoint_or_ugt_2( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A]], 2 +; CHECK-NEXT: [[B1:%.*]] = add i8 [[B]], 1 ; CHECK-NEXT: [[ICMP_:%.*]] = icmp ugt i8 [[A1]], [[B1]] ; CHECK-NEXT: ret i1 [[ICMP_]] ; @@ -5323,9 +5762,10 @@ define i1 @disjoint_or_ugt_2(i8 %a, i8 %b) { } define i1 @disjoint_or_ugt_3(i8 %a, i8 %b) { -; CHECK-LABEL: @disjoint_or_ugt_3( -; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2 -; CHECK-NEXT: [[B1:%.*]] = add nuw i8 [[B:%.*]], 1 +; CHECK-LABEL: define i1 @disjoint_or_ugt_3( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A]], 2 +; CHECK-NEXT: [[B1:%.*]] = add nuw i8 [[B]], 1 ; CHECK-NEXT: [[ICMP_:%.*]] = icmp ugt i8 [[A1]], [[B1]] ; CHECK-NEXT: ret i1 [[ICMP_]] ; @@ -5336,10 +5776,11 @@ define i1 @disjoint_or_ugt_3(i8 %a, i8 %b) { } define i1 @deduce_nuw_flag_1(i8 %a, i8 %b) { -; CHECK-LABEL: @deduce_nuw_flag_1( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = add nuw i8 [[B:%.*]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP0]], [[A:%.*]] +; CHECK-LABEL: define i1 @deduce_nuw_flag_1( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[TMP0:%.*]] = add nuw i8 [[B]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP0]], [[A]] ; CHECK-NEXT: ret i1 [[CMP]] ; entry: @@ -5350,10 +5791,11 @@ entry: } define i1 @deduce_nuw_flag_2(i8 %a, i8 %b) { -; CHECK-LABEL: @deduce_nuw_flag_2( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = add nuw i8 [[B:%.*]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], [[TMP0]] +; CHECK-LABEL: define i1 @deduce_nuw_flag_2( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[TMP0:%.*]] = add nuw i8 [[B]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], [[TMP0]] ; CHECK-NEXT: ret i1 [[CMP]] ; entry: @@ -5364,10 +5806,11 @@ entry: } define i1 @dont_deduce_nuw_flag_1(i8 %a, i8 %b) { -; CHECK-LABEL: @dont_deduce_nuw_flag_1( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[B:%.*]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP0]], [[A:%.*]] +; CHECK-LABEL: define i1 @dont_deduce_nuw_flag_1( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[B]], -1 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP0]], [[A]] ; CHECK-NEXT: ret i1 [[CMP]] ; entry: @@ -5378,10 +5821,11 @@ entry: } define i1 @dont_deduce_nuw_flag_2(i8 %a, i8 %b) { -; CHECK-LABEL: @dont_deduce_nuw_flag_2( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[B:%.*]], -1 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], [[TMP0]] +; CHECK-LABEL: define i1 @dont_deduce_nuw_flag_2( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[B]], -1 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], [[TMP0]] ; CHECK-NEXT: ret i1 [[CMP]] ; entry: @@ -5392,11 +5836,11 @@ entry: } define i1 @icmp_freeze_sext(i16 %x, i16 %y) { -; CHECK-LABEL: @icmp_freeze_sext( -; CHECK-NEXT: [[CMP1:%.*]] = icmp uge i16 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[CMP1_FR:%.*]] = freeze i1 [[CMP1]] -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[Y]], 0 -; CHECK-NEXT: [[CMP2:%.*]] = or i1 [[TMP1]], [[CMP1_FR]] +; CHECK-LABEL: define i1 @icmp_freeze_sext( +; CHECK-SAME: i16 [[X:%.*]], i16 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i16 [[Y]] +; CHECK-NEXT: [[X_FR:%.*]] = freeze i16 [[X]] +; CHECK-NEXT: [[CMP2:%.*]] = icmp uge i16 [[X_FR]], [[Y_FR]] ; CHECK-NEXT: ret i1 [[CMP2]] ; %cmp1 = icmp uge i16 %x, %y @@ -5407,8 +5851,9 @@ define i1 @icmp_freeze_sext(i16 %x, i16 %y) { } define i1 @test_icmp_shl(i64 %x) { -; CHECK-LABEL: @test_icmp_shl( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 +; CHECK-LABEL: define i1 @test_icmp_shl( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X]] to i32 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 3 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5418,8 +5863,9 @@ define i1 @test_icmp_shl(i64 %x) { } define i1 @test_icmp_shl_multiuse(i64 %x) { -; CHECK-LABEL: @test_icmp_shl_multiuse( -; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[X:%.*]], 32 +; CHECK-LABEL: define i1 @test_icmp_shl_multiuse( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[X]], 32 ; CHECK-NEXT: call void @use_i64(i64 [[SHL]]) ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SHL]], 8589934593 ; CHECK-NEXT: ret i1 [[CMP]] @@ -5431,8 +5877,9 @@ define i1 @test_icmp_shl_multiuse(i64 %x) { } define i1 @test_icmp_shl_illegal_length(i64 %x) { -; CHECK-LABEL: @test_icmp_shl_illegal_length( -; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[X:%.*]], 31 +; CHECK-LABEL: define i1 @test_icmp_shl_illegal_length( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[X]], 31 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SHL]], 8589934593 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5442,8 +5889,9 @@ define i1 @test_icmp_shl_illegal_length(i64 %x) { } define i1 @test_icmp_shl_invalid_rhsc(i64 %x) { -; CHECK-LABEL: @test_icmp_shl_invalid_rhsc( -; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[X:%.*]], 32 +; CHECK-LABEL: define i1 @test_icmp_shl_invalid_rhsc( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[X]], 32 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[SHL]], 8589934595 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5453,8 +5901,9 @@ define i1 @test_icmp_shl_invalid_rhsc(i64 %x) { } define i1 @test_icmp_shl_nuw(i64 %x) { -; CHECK-LABEL: @test_icmp_shl_nuw( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test_icmp_shl_nuw( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X]], 3 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl nuw i64 %x, 32 @@ -5463,8 +5912,9 @@ define i1 @test_icmp_shl_nuw(i64 %x) { } define i1 @test_icmp_shl_nuw_i31(i31 %x) { -; CHECK-LABEL: @test_icmp_shl_nuw_i31( -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i31 [[X:%.*]], 250 +; CHECK-LABEL: define i1 @test_icmp_shl_nuw_i31( +; CHECK-SAME: i31 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i31 [[X]], 250 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl nuw i31 %x, 23 @@ -5473,8 +5923,9 @@ define i1 @test_icmp_shl_nuw_i31(i31 %x) { } define i1 @test_icmp_shl_nsw(i64 %x) { -; CHECK-LABEL: @test_icmp_shl_nsw( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X:%.*]], 3 +; CHECK-LABEL: define i1 @test_icmp_shl_nsw( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X]], 3 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl nsw i64 %x, 32 @@ -5483,8 +5934,9 @@ define i1 @test_icmp_shl_nsw(i64 %x) { } define i1 @test_icmp_shl_nsw_i31(i31 %x) { -; CHECK-LABEL: @test_icmp_shl_nsw_i31( -; CHECK-NEXT: [[TMP1:%.*]] = trunc nsw i31 [[X:%.*]] to i8 +; CHECK-LABEL: define i1 @test_icmp_shl_nsw_i31( +; CHECK-SAME: i31 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc nsw i31 [[X]] to i8 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[TMP1]], -6 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5494,8 +5946,9 @@ define i1 @test_icmp_shl_nsw_i31(i31 %x) { } define <2 x i1> @test_icmp_shl_vec(<2 x i64> %x) { -; CHECK-LABEL: @test_icmp_shl_vec( -; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[X:%.*]] to <2 x i32> +; CHECK-LABEL: define <2 x i1> @test_icmp_shl_vec( +; CHECK-SAME: <2 x i64> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[X]] to <2 x i32> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TMP1]], splat (i32 3) ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; @@ -5505,7 +5958,8 @@ define <2 x i1> @test_icmp_shl_vec(<2 x i64> %x) { } define i1 @test_icmp_shl_eq(i64 %x) { -; CHECK-LABEL: @test_icmp_shl_eq( +; CHECK-LABEL: define i1 @test_icmp_shl_eq( +; CHECK-SAME: i64 [[X:%.*]]) { ; CHECK-NEXT: ret i1 false ; %shl = shl i64 %x, 32 @@ -5514,8 +5968,9 @@ define i1 @test_icmp_shl_eq(i64 %x) { } define i1 @test_icmp_shl_sgt(i64 %x) { -; CHECK-LABEL: @test_icmp_shl_sgt( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 +; CHECK-LABEL: define i1 @test_icmp_shl_sgt( +; CHECK-SAME: i64 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X]] to i32 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5525,8 +5980,9 @@ define i1 @test_icmp_shl_sgt(i64 %x) { } define i1 @pr94897(i32 range(i32 -2147483648, 0) %x) { -; CHECK-LABEL: @pr94897( -; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[X:%.*]], -3 +; CHECK-LABEL: define i1 @pr94897( +; CHECK-SAME: i32 range(i32 -2147483648, 0) [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[X]], -3 ; CHECK-NEXT: ret i1 [[CMP]] ; %shl = shl nsw i32 %x, 24 @@ -5535,11 +5991,12 @@ define i1 @pr94897(i32 range(i32 -2147483648, 0) %x) { } define i1 @icmp_and_inv_pow2_ne_0(i32 %A, i32 %B) { -; CHECK-LABEL: @icmp_and_inv_pow2_ne_0( -; CHECK-NEXT: [[POPCNT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[A:%.*]]) +; CHECK-LABEL: define i1 @icmp_and_inv_pow2_ne_0( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[POPCNT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[A]]) ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[POPCNT]], 1 ; CHECK-NEXT: call void @llvm.assume(i1 [[COND]]) -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A]], [[B:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A]], [[B]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -5554,11 +6011,12 @@ define i1 @icmp_and_inv_pow2_ne_0(i32 %A, i32 %B) { } define i1 @icmp_and_inv_pow2_or_zero_ne_0(i32 %A, i32 %B) { -; CHECK-LABEL: @icmp_and_inv_pow2_or_zero_ne_0( -; CHECK-NEXT: [[POPCNT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[A:%.*]]) +; CHECK-LABEL: define i1 @icmp_and_inv_pow2_or_zero_ne_0( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[POPCNT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[A]]) ; CHECK-NEXT: [[COND:%.*]] = icmp samesign ult i32 [[POPCNT]], 2 ; CHECK-NEXT: call void @llvm.assume(i1 [[COND]]) -; CHECK-NEXT: [[INV:%.*]] = xor i32 [[B:%.*]], -1 +; CHECK-NEXT: [[INV:%.*]] = xor i32 [[B]], -1 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[A]], [[INV]] ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 ; CHECK-NEXT: ret i1 [[CMP]] @@ -5574,9 +6032,10 @@ define i1 @icmp_and_inv_pow2_or_zero_ne_0(i32 %A, i32 %B) { } define i1 @icmp_samesign_logical_and(i32 %In) { -; CHECK-LABEL: @icmp_samesign_logical_and( -; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[IN:%.*]], 1 -; CHECK-NEXT: ret i1 [[C2]] +; CHECK-LABEL: define i1 @icmp_samesign_logical_and( +; CHECK-SAME: i32 [[IN:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp eq i32 [[IN]], 1 +; CHECK-NEXT: ret i1 [[V]] ; %c1 = icmp samesign sgt i32 %In, -1 %c2 = icmp samesign eq i32 %In, 1 @@ -5585,8 +6044,9 @@ define i1 @icmp_samesign_logical_and(i32 %In) { } define i1 @icmp_samesign_logical_or(i32 %In) { -; CHECK-LABEL: @icmp_samesign_logical_or( -; CHECK-NEXT: [[V:%.*]] = icmp ne i32 [[IN:%.*]], 1 +; CHECK-LABEL: define i1 @icmp_samesign_logical_or( +; CHECK-SAME: i32 [[IN:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = icmp ne i32 [[IN]], 1 ; CHECK-NEXT: ret i1 [[V]] ; %c1 = icmp samesign slt i32 %In, 0 diff --git a/llvm/test/Transforms/InstCombine/load-bitcast-select.ll b/llvm/test/Transforms/InstCombine/load-bitcast-select.ll index 61afa3ba9d71..3c43618b1356 100644 --- a/llvm/test/Transforms/InstCombine/load-bitcast-select.ll +++ b/llvm/test/Transforms/InstCombine/load-bitcast-select.ll @@ -16,8 +16,8 @@ define void @_Z3foov() { ; CHECK-NEXT: ret void ; CHECK: for.body: ; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[I_0]] to i64 -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1000 x float], ptr @a, i64 0, i64 [[TMP0]] -; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw [1000 x float], ptr @b, i64 0, i64 [[TMP0]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr @a, i64 [[TMP0]] +; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw float, ptr @b, i64 [[TMP0]] ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[ARRAYIDX2]], align 4 ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp fast olt float [[TMP1]], [[TMP2]] diff --git a/llvm/test/Transforms/InstCombine/load-cmp.ll b/llvm/test/Transforms/InstCombine/load-cmp.ll index f44d27c691b5..10fe07295eed 100644 --- a/llvm/test/Transforms/InstCombine/load-cmp.ll +++ b/llvm/test/Transforms/InstCombine/load-cmp.ll @@ -312,7 +312,7 @@ define i1 @test10_struct_arr_i16(i16 %x) { define i1 @test10_struct_arr_i64(i64 %x) { ; CHECK-LABEL: @test10_struct_arr_i64( -; CHECK-NEXT: [[R:%.*]] = icmp ne i64 [[TMP1:%.*]], 1 +; CHECK-NEXT: [[R:%.*]] = icmp ne i64 [[X:%.*]], 1 ; CHECK-NEXT: ret i1 [[R]] ; %p = getelementptr inbounds [4 x %Foo], ptr @GStructArr, i64 0, i64 %x, i32 2 @@ -361,7 +361,7 @@ define i1 @test10_struct_arr_noarrayty(i32 %x) { define i1 @pr93017(i64 %idx) { ; CHECK-LABEL: @pr93017( ; CHECK-NEXT: [[TMP1:%.*]] = trunc nsw i64 [[IDX:%.*]] to i32 -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr @table, i32 0, i32 [[TMP1]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds ptr, ptr @table, i32 [[TMP1]] ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[GEP]], align 4 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr [[V]], null ; CHECK-NEXT: ret i1 [[CMP]] @@ -371,3 +371,246 @@ define i1 @pr93017(i64 %idx) { %cmp = icmp ne ptr %v, null ret i1 %cmp } + +@g_i32_lo = internal constant [4 x i32] [i32 1, i32 2, i32 3, i32 4] + +; Mask is 0b10101010 +define i1 @load_vs_array_type_mismatch1(i32 %idx) { +; CHECK-LABEL: @load_vs_array_type_mismatch1( +; CHECK-NEXT: [[TMP2:%.*]] = shl nuw i32 1, [[TMP1:%.*]] +; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 170 +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP3]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep = getelementptr inbounds i16, ptr @g_i32_lo, i32 %idx + %load = load i16, ptr %gep + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +@g_i32_hi = internal constant [4 x i32] [i32 u0x00010000, i32 u0x00020000, i32 u0x00030000, i32 u0x00040000] + +; Mask is 0b01010101 +define i1 @load_vs_array_type_mismatch2(i32 %idx) { +; CHECK-LABEL: @load_vs_array_type_mismatch2( +; CHECK-NEXT: [[TMP2:%.*]] = shl nuw i32 1, [[TMP1:%.*]] +; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 85 +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP3]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep = getelementptr inbounds i16, ptr @g_i32_hi, i32 %idx + %load = load i16, ptr %gep + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +@g_i16_1 = internal constant [8 x i16] [i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1, i16 0] + +; idx == 1 || idx == 3 +define i1 @load_vs_array_type_mismatch_offset1(i32 %idx) { +; CHECK-LABEL: @load_vs_array_type_mismatch_offset1( +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IDX:%.*]], -3 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 1 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep = getelementptr inbounds {i16, i16}, ptr @g_i16_1, i32 %idx, i32 1 + %load = load i16, ptr %gep + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +define i1 @load_vs_array_type_mismatch_offset1_separate_gep(i32 %idx) { +; CHECK-LABEL: @load_vs_array_type_mismatch_offset1_separate_gep( +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IDX:%.*]], -3 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 1 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep1 = getelementptr inbounds {i16, i16}, ptr @g_i16_1, i32 %idx + %gep2 = getelementptr inbounds i8, ptr %gep1, i32 2 + %load = load i16, ptr %gep2 + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +define i1 @load_vs_array_type_mismatch_offset1_separate_gep_swapped(i32 %idx) { +; CHECK-LABEL: @load_vs_array_type_mismatch_offset1_separate_gep_swapped( +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IDX:%.*]], -3 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 1 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep1 = getelementptr inbounds i8, ptr @g_i16_1, i32 2 + %gep2 = getelementptr inbounds {i16, i16}, ptr %gep1, i32 %idx + %load = load i16, ptr %gep2 + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +@g_i16_2 = internal constant [8 x i16] [i16 1, i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1] + +; idx == 0 || idx == 2 +define i1 @load_vs_array_type_mismatch_offset2(i32 %idx) { +; CHECK-LABEL: @load_vs_array_type_mismatch_offset2( +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IDX:%.*]], -3 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep = getelementptr inbounds {i16, i16}, ptr @g_i16_2, i32 %idx, i32 1 + %load = load i16, ptr %gep + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +define i1 @offset_larger_than_stride(i32 %idx) { +; CHECK-LABEL: @offset_larger_than_stride( +; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr getelementptr inbounds nuw (i8, ptr @g_i16_1, i32 4), i32 [[IDX:%.*]] +; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[GEP]], align 2 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[LOAD]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep = getelementptr [2 x i16], ptr @g_i16_1, i64 1, i32 %idx + %load = load i16, ptr %gep + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +define i1 @load_size_larger_stride(i32 %idx) { +; CHECK-LABEL: @load_size_larger_stride( +; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr @g_i16_1, i32 [[IDX:%.*]] +; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[GEP]], align 2 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[LOAD]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep = getelementptr i8, ptr @g_i16_1, i32 %idx + %load = load i16, ptr %gep + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +@CG_MESSY = constant [9 x i32] [i32 1, i32 7, i32 -1, i32 5, i32 4, i32 1, i32 1, i32 5, i32 4] + +define i1 @cmp_load_constant_array_messy(i32 %x){ +; CHECK-LABEL: @cmp_load_constant_array_messy( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0:%.*]], 1073741823 +; CHECK-NEXT: [[TMP2:%.*]] = shl nuw i32 1, [[TMP1]] +; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 373 +; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[TMP3]], 0 +; CHECK-NEXT: ret i1 [[COND]] +; + +entry: + %isOK_ptr = getelementptr i32, ptr @CG_MESSY, i32 %x + %isOK = load i32, ptr %isOK_ptr + %cond = icmp slt i32 %isOK, 5 + ret i1 %cond +} + +define i1 @cmp_diff_load_constant_array_messy0(i32 %x){ +; CHECK-LABEL: @cmp_diff_load_constant_array_messy0( +; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1:%.*]], 1073741823 +; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i32 1, [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP3]], 373 +; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[TMP4]], 0 +; CHECK-NEXT: ret i1 [[COND]] +; + %isOK_ptr = getelementptr i32, ptr @CG_MESSY, i32 %x + %isOK = load i16, ptr %isOK_ptr + %cond = icmp slt i16 %isOK, 5 + ret i1 %cond +} + +; Load size larger than store size currently not supported. +define i1 @cmp_diff_load_constant_array_messy1(i32 %x){ +; CHECK-LABEL: @cmp_diff_load_constant_array_messy1( +; CHECK-NEXT: [[ISOK_PTR:%.*]] = getelementptr i6, ptr @CG_MESSY, i32 [[TMP1:%.*]] +; CHECK-NEXT: [[ISOK:%.*]] = load i16, ptr [[ISOK_PTR]], align 2 +; CHECK-NEXT: [[COND:%.*]] = icmp slt i16 [[ISOK]], 5 +; CHECK-NEXT: ret i1 [[COND]] +; + %isOK_ptr = getelementptr i6, ptr @CG_MESSY, i32 %x + %isOK = load i16, ptr %isOK_ptr + %cond = icmp slt i16 %isOK, 5 + ret i1 %cond +} + +define i1 @cmp_load_constant_array_variable_icmp(i32 %x, i32 %y) { +; CHECK-LABEL: @cmp_load_constant_array_variable_icmp( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[ISOK_PTR:%.*]] = getelementptr inbounds i32, ptr @CG_MESSY, i32 [[X:%.*]] +; CHECK-NEXT: [[ISOK:%.*]] = load i32, ptr [[ISOK_PTR]], align 4 +; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ISOK]], [[Y:%.*]] +; CHECK-NEXT: ret i1 [[COND]] +; +entry: + %isOK_ptr = getelementptr inbounds i32, ptr @CG_MESSY, i32 %x + %isOK = load i32, ptr %isOK_ptr + %cond = icmp ult i32 %isOK, %y + ret i1 %cond +} + +@CG_CLEAR = constant [10 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9] + +; Offsets not supported if negative or larger than stride. +define i1 @cmp_load_constant_additional_positive_offset(i32 %x) { +; CHECK-LABEL: @cmp_load_constant_additional_positive_offset( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[ISOK_PTR:%.*]] = getelementptr inbounds i32, ptr getelementptr inbounds nuw (i8, ptr @CG_CLEAR, i32 20), i32 [[X:%.*]] +; CHECK-NEXT: [[ISOK:%.*]] = load i32, ptr [[ISOK_PTR]], align 4 +; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ISOK]], 5 +; CHECK-NEXT: ret i1 [[COND]] +; +entry: + %isOK_ptr = getelementptr inbounds [1 x i32], ptr @CG_CLEAR, i32 5, i32 %x + %isOK = load i32, ptr %isOK_ptr + %cond = icmp ult i32 %isOK, 5 + ret i1 %cond +} + +define i1 @cmp_load_constant_additional_negative_offset(i32 %x) { +; CHECK-LABEL: @cmp_load_constant_additional_negative_offset( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[ISOK_PTR_SPLIT:%.*]] = getelementptr inbounds [1 x i32], ptr @CG_CLEAR, i32 [[X:%.*]] +; CHECK-NEXT: [[ISOK_PTR:%.*]] = getelementptr inbounds i8, ptr [[ISOK_PTR_SPLIT]], i32 -20 +; CHECK-NEXT: [[ISOK:%.*]] = load i32, ptr [[ISOK_PTR]], align 4 +; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ISOK]], 5 +; CHECK-NEXT: ret i1 [[COND]] +; +entry: + %isOK_ptr = getelementptr inbounds [1 x i32], ptr @CG_CLEAR, i32 %x, i32 -5 + %isOK = load i32, ptr %isOK_ptr + %cond = icmp ult i32 %isOK, 5 + ret i1 %cond +} + +define i1 @cmp_load_multiple_indices(i32 %idx, i32 %idx2) { +; CHECK-LABEL: @cmp_load_multiple_indices( +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i16, ptr @g_i16_1, i32 [[IDX:%.*]] +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i16, ptr [[GEP1]], i32 [[IDX2:%.*]] +; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds nuw i8, ptr [[GEP2]], i32 2 +; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[GEP3]], align 2 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[LOAD]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep1 = getelementptr inbounds i16, ptr @g_i16_1, i32 %idx + %gep2 = getelementptr inbounds i16, ptr %gep1, i32 %idx2 + %gep3 = getelementptr inbounds i8, ptr %gep2, i32 2 + %load = load i16, ptr %gep3 + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} + +define i1 @cmp_load_multiple_indices2(i32 %idx, i32 %idx2) { +; CHECK-LABEL: @cmp_load_multiple_indices2( +; CHECK-NEXT: [[GEP1_SPLIT:%.*]] = getelementptr inbounds [1 x i16], ptr @g_i16_1, i32 [[IDX:%.*]] +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i16, ptr [[GEP1_SPLIT]], i32 [[IDX2:%.*]] +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds nuw i8, ptr [[GEP1]], i32 2 +; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[GEP2]], align 2 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[LOAD]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +; + %gep1 = getelementptr inbounds [1 x i16], ptr @g_i16_1, i32 %idx, i32 %idx2 + %gep2 = getelementptr inbounds i8, ptr %gep1, i32 2 + %load = load i16, ptr %gep2 + %cmp = icmp eq i16 %load, 0 + ret i1 %cmp +} diff --git a/llvm/test/Transforms/InstCombine/loadstore-alignment.ll b/llvm/test/Transforms/InstCombine/loadstore-alignment.ll index 2cdc73e4cff1..e6a752575901 100644 --- a/llvm/test/Transforms/InstCombine/loadstore-alignment.ll +++ b/llvm/test/Transforms/InstCombine/loadstore-alignment.ll @@ -34,7 +34,7 @@ define <2 x i64> @hem_2d(i32 %i, i32 %j) { ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[J:%.*]] to i64 ; CHECK-NEXT: [[T_SPLIT:%.*]] = getelementptr [13 x <2 x i64>], ptr @xx, i64 [[TMP1]] -; CHECK-NEXT: [[T:%.*]] = getelementptr [13 x <2 x i64>], ptr [[T_SPLIT]], i64 0, i64 [[TMP2]] +; CHECK-NEXT: [[T:%.*]] = getelementptr <2 x i64>, ptr [[T_SPLIT]], i64 [[TMP2]] ; CHECK-NEXT: [[L:%.*]] = load <2 x i64>, ptr [[T]], align 1 ; CHECK-NEXT: ret <2 x i64> [[L]] ; @@ -92,7 +92,7 @@ define void @hem_2d_store(i32 %i, i32 %j, <2 x i64> %y) { ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[J:%.*]] to i64 ; CHECK-NEXT: [[T_SPLIT:%.*]] = getelementptr [13 x <2 x i64>], ptr @xx, i64 [[TMP1]] -; CHECK-NEXT: [[T:%.*]] = getelementptr [13 x <2 x i64>], ptr [[T_SPLIT]], i64 0, i64 [[TMP2]] +; CHECK-NEXT: [[T:%.*]] = getelementptr <2 x i64>, ptr [[T_SPLIT]], i64 [[TMP2]] ; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr [[T]], align 1 ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/InstCombine/mem-gep-zidx.ll b/llvm/test/Transforms/InstCombine/mem-gep-zidx.ll index f0580edd1207..8840374de1c1 100644 --- a/llvm/test/Transforms/InstCombine/mem-gep-zidx.ll +++ b/llvm/test/Transforms/InstCombine/mem-gep-zidx.ll @@ -48,7 +48,7 @@ define signext i32 @test3(i32 signext %x, i1 %y) #0 { define signext i32 @test4(i32 signext %x, i1 %y) #0 { ; CHECK-LABEL: @test4( ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[X:%.*]] to i64 -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1 x i32], ptr @f.c, i64 0, i64 [[IDXPROM]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr @f.c, i64 [[IDXPROM]] ; CHECK-NEXT: [[R:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: ret i32 [[R]] ; diff --git a/llvm/test/Transforms/InstCombine/memchr-11.ll b/llvm/test/Transforms/InstCombine/memchr-11.ll index c316f89a0cac..426b34463b91 100644 --- a/llvm/test/Transforms/InstCombine/memchr-11.ll +++ b/llvm/test/Transforms/InstCombine/memchr-11.ll @@ -45,7 +45,7 @@ define i1 @fold_memchr_a_c_n_eq_a(i32 %c, i64 %n) { define i1 @call_memchr_api_c_n_eq_a(i64 %i, i32 %c, i64 %n) { ; CHECK-LABEL: @call_memchr_api_c_n_eq_a( -; CHECK-NEXT: [[P:%.*]] = getelementptr [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[P:%.*]] = getelementptr i8, ptr @a5, i64 [[I:%.*]] ; CHECK-NEXT: [[Q:%.*]] = call ptr @memchr(ptr [[P]], i32 [[C:%.*]], i64 [[N:%.*]]) ; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[Q]], [[P]] ; CHECK-NEXT: ret i1 [[CMP]] diff --git a/llvm/test/Transforms/InstCombine/memcmp-8.ll b/llvm/test/Transforms/InstCombine/memcmp-8.ll index 031d2c4532d1..361764d75720 100644 --- a/llvm/test/Transforms/InstCombine/memcmp-8.ll +++ b/llvm/test/Transforms/InstCombine/memcmp-8.ll @@ -41,7 +41,7 @@ define i32 @fold_memcmp_a5p5_a5p5_n(i64 %n) { define i32 @fold_memcmp_a5pi_a5p5_n(i32 %i, i64 %n) { ; CHECK-LABEL: @fold_memcmp_a5pi_a5p5_n( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64 -; CHECK-NEXT: [[PA5_PI:%.*]] = getelementptr [5 x i8], ptr @a5, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[PA5_PI:%.*]] = getelementptr i8, ptr @a5, i64 [[TMP1]] ; CHECK-NEXT: [[CMP:%.*]] = call i32 @memcmp(ptr [[PA5_PI]], ptr nonnull getelementptr inbounds nuw (i8, ptr @a5, i64 5), i64 [[N:%.*]]) ; CHECK-NEXT: ret i32 [[CMP]] ; diff --git a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll index d6624010acb2..cfec7b855841 100644 --- a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll +++ b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll @@ -6,7 +6,7 @@ define void @test_load(ptr addrspace(1) %out, i64 %x) { ; CHECK-LABEL: @test_load( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 @@ -26,7 +26,7 @@ entry: define void @test_load_gep_nusw_nuw(ptr addrspace(1) %out, i64 %x) { ; CHECK-LABEL: @test_load_gep_nusw_nuw( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr nusw nuw [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr nusw nuw i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr nusw nuw i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 @@ -66,7 +66,7 @@ define void @test_call(ptr addrspace(1) %out, i64 %x) { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[X:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 @@ -87,7 +87,7 @@ define void @test_call_no_null_opt(ptr addrspace(1) %out, i64 %x) #0 { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[X:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr [[ARRAYIDX]]) ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 @@ -108,7 +108,7 @@ define void @test_load_and_call(ptr addrspace(1) %out, i64 %x, i64 %y) { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[X:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 @@ -135,7 +135,7 @@ define void @test_load_and_call_no_null_opt(ptr addrspace(1) %out, i64 %x, i64 % ; CHECK-NEXT: entry: ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[X:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 diff --git a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll index 64091a90752b..ff85d827bdcb 100644 --- a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll +++ b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll @@ -9,25 +9,25 @@ define float @test1(i32 %hash, float %x, float %y, float %z, float %w) { ; CHECK-NEXT: [[T3:%.*]] = shl i32 [[HASH:%.*]], 2 ; CHECK-NEXT: [[T5:%.*]] = and i32 [[T3]], 124 ; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[T5]] to i64 -; CHECK-NEXT: [[T753:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP0]] +; CHECK-NEXT: [[T753:%.*]] = getelementptr float, ptr @C.0.1248, i64 [[TMP0]] ; CHECK-NEXT: [[T9:%.*]] = load float, ptr [[T753]], align 4 ; CHECK-NEXT: [[T11:%.*]] = fmul float [[T9]], [[X:%.*]] ; CHECK-NEXT: [[T13:%.*]] = fadd float [[T11]], 0.000000e+00 -; CHECK-NEXT: [[T17_SUM52:%.*]] = or disjoint i32 [[T5]], 1 -; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[T17_SUM52]] to i64 -; CHECK-NEXT: [[T1851:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[T5]] to i64 +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr @C.0.1248, i64 [[TMP1]] +; CHECK-NEXT: [[T1851:%.*]] = getelementptr i8, ptr [[TMP2]], i64 4 ; CHECK-NEXT: [[T19:%.*]] = load float, ptr [[T1851]], align 4 ; CHECK-NEXT: [[T21:%.*]] = fmul float [[T19]], [[Y:%.*]] ; CHECK-NEXT: [[T23:%.*]] = fadd float [[T21]], [[T13]] -; CHECK-NEXT: [[T27_SUM50:%.*]] = or disjoint i32 [[T5]], 2 -; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[T27_SUM50]] to i64 -; CHECK-NEXT: [[T2849:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP2]] +; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i32 [[T5]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, ptr @C.0.1248, i64 [[TMP3]] +; CHECK-NEXT: [[T2849:%.*]] = getelementptr i8, ptr [[TMP4]], i64 8 ; CHECK-NEXT: [[T29:%.*]] = load float, ptr [[T2849]], align 4 ; CHECK-NEXT: [[T31:%.*]] = fmul float [[T29]], [[Z:%.*]] ; CHECK-NEXT: [[T33:%.*]] = fadd float [[T31]], [[T23]] -; CHECK-NEXT: [[T37_SUM48:%.*]] = or disjoint i32 [[T5]], 3 -; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i32 [[T37_SUM48]] to i64 -; CHECK-NEXT: [[T3847:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP3]] +; CHECK-NEXT: [[TMP5:%.*]] = zext nneg i32 [[T5]] to i64 +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr float, ptr @C.0.1248, i64 [[TMP5]] +; CHECK-NEXT: [[T3847:%.*]] = getelementptr i8, ptr [[TMP6]], i64 12 ; CHECK-NEXT: [[T39:%.*]] = load float, ptr [[T3847]], align 4 ; CHECK-NEXT: [[T41:%.*]] = fmul float [[T39]], [[W:%.*]] ; CHECK-NEXT: [[T43:%.*]] = fadd float [[T41]], [[T33]] @@ -322,7 +322,7 @@ define float @test11_volatile(i64 %i) { ; CHECK-NEXT: [[A:%.*]] = alloca [4 x float], align 4 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(ptr nonnull [[A]]) ; CHECK-NEXT: call void @llvm.memcpy.p0.p1.i64(ptr align 4 [[A]], ptr addrspace(1) align 4 @I, i64 16, i1 true) -; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds [4 x float], ptr [[A]], i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[I:%.*]] ; CHECK-NEXT: [[R:%.*]] = load float, ptr [[G]], align 4 ; CHECK-NEXT: ret float [[R]] ; diff --git a/llvm/test/Transforms/InstCombine/nsw.ll b/llvm/test/Transforms/InstCombine/nsw.ll index b00f2e58add7..4615ac0ec1ff 100644 --- a/llvm/test/Transforms/InstCombine/nsw.ll +++ b/llvm/test/Transforms/InstCombine/nsw.ll @@ -255,9 +255,10 @@ define i32 @sub_sub1_nsw_nsw(i32 %a, i32 %b, i32 %c) { define i8 @neg_nsw_freeze(i8 %a1, i8 %a2) { ; CHECK-LABEL: @neg_nsw_freeze( -; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw i8 [[A2:%.*]], [[A1:%.*]] -; CHECK-NEXT: [[FR_NEG:%.*]] = freeze i8 [[A_NEG]] -; CHECK-NEXT: ret i8 [[FR_NEG]] +; CHECK-NEXT: [[A1_FR:%.*]] = freeze i8 [[A1:%.*]] +; CHECK-NEXT: [[A2_FR:%.*]] = freeze i8 [[A2:%.*]] +; CHECK-NEXT: [[A_NEG:%.*]] = sub i8 [[A2_FR]], [[A1_FR]] +; CHECK-NEXT: ret i8 [[A_NEG]] ; %a = sub nsw i8 %a1, %a2 %fr = freeze i8 %a diff --git a/llvm/test/Transforms/InstCombine/opaque-ptr.ll b/llvm/test/Transforms/InstCombine/opaque-ptr.ll index 99d1fa032db1..1d80724d2355 100644 --- a/llvm/test/Transforms/InstCombine/opaque-ptr.ll +++ b/llvm/test/Transforms/InstCombine/opaque-ptr.ll @@ -223,7 +223,8 @@ define ptr @geps_combinable_different_elem_type5(ptr %a) { define ptr @geps_combinable_different_elem_type6(ptr %a, i64 %idx) { ; CHECK-LABEL: @geps_combinable_different_elem_type6( -; CHECK-NEXT: [[A3:%.*]] = getelementptr { i32, i32 }, ptr [[A:%.*]], i64 [[IDX:%.*]], i32 1 +; CHECK-NEXT: [[A2:%.*]] = getelementptr { i32, i32 }, ptr [[A:%.*]], i64 [[IDX:%.*]] +; CHECK-NEXT: [[A3:%.*]] = getelementptr i8, ptr [[A2]], i64 4 ; CHECK-NEXT: ret ptr [[A3]] ; %a2 = getelementptr { i32, i32 }, ptr %a, i64 %idx @@ -233,8 +234,8 @@ define ptr @geps_combinable_different_elem_type6(ptr %a, i64 %idx) { define ptr @geps_combinable_different_elem_type7(ptr %a, i64 %idx) { ; CHECK-LABEL: @geps_combinable_different_elem_type7( -; CHECK-NEXT: [[A2:%.*]] = getelementptr { i32, i32 }, ptr [[A:%.*]], i64 [[IDX:%.*]], i32 1 -; CHECK-NEXT: [[A3:%.*]] = getelementptr i8, ptr [[A2]], i64 4 +; CHECK-NEXT: [[A2_SPLIT:%.*]] = getelementptr { i32, i32 }, ptr [[A:%.*]], i64 [[IDX:%.*]] +; CHECK-NEXT: [[A3:%.*]] = getelementptr i8, ptr [[A2_SPLIT]], i64 8 ; CHECK-NEXT: ret ptr [[A3]] ; %a2 = getelementptr { i32, i32 }, ptr %a, i64 %idx, i32 1 @@ -244,8 +245,8 @@ define ptr @geps_combinable_different_elem_type7(ptr %a, i64 %idx) { define ptr @geps_combinable_different_elem_type8(ptr %a, i64 %idx) { ; CHECK-LABEL: @geps_combinable_different_elem_type8( -; CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds { { i32, i32 } }, ptr [[A:%.*]], i64 [[IDX:%.*]], i32 0, i32 1 -; CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds nuw i8, ptr [[A2]], i64 4 +; CHECK-NEXT: [[A2_SPLIT:%.*]] = getelementptr inbounds { { i32, i32 } }, ptr [[A:%.*]], i64 [[IDX:%.*]] +; CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds nuw i8, ptr [[A2_SPLIT]], i64 8 ; CHECK-NEXT: ret ptr [[A3]] ; %a2 = getelementptr inbounds { { i32, i32 } }, ptr %a, i64 %idx, i32 0, i32 1 @@ -530,7 +531,7 @@ define i1 @cmp_load_gep_global(i64 %idx) { define i1 @cmp_load_gep_global_different_load_type(i64 %idx) { ; CHECK-LABEL: @cmp_load_gep_global_different_load_type( -; CHECK-NEXT: [[GEP:%.*]] = getelementptr [4 x i8], ptr @ary, i64 0, i64 [[IDX:%.*]] +; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr @ary, i64 [[IDX:%.*]] ; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[GEP]], align 2 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[LOAD]], 3 ; CHECK-NEXT: ret i1 [[CMP]] @@ -543,10 +544,7 @@ define i1 @cmp_load_gep_global_different_load_type(i64 %idx) { define i1 @cmp_load_gep_global_different_gep_type(i64 %idx) { ; CHECK-LABEL: @cmp_load_gep_global_different_gep_type( -; CHECK-NEXT: [[GEP:%.*]] = getelementptr [4 x i16], ptr @ary, i64 0, i64 [[IDX:%.*]] -; CHECK-NEXT: [[LOAD:%.*]] = load i16, ptr [[GEP]], align 2 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[LOAD]], 3 -; CHECK-NEXT: ret i1 [[CMP]] +; CHECK-NEXT: ret i1 false ; %gep = getelementptr [4 x i16], ptr @ary, i64 0, i64 %idx %load = load i16, ptr %gep diff --git a/llvm/test/Transforms/InstCombine/or.ll b/llvm/test/Transforms/InstCombine/or.ll index a5cc93327898..6b090e982af0 100644 --- a/llvm/test/Transforms/InstCombine/or.ll +++ b/llvm/test/Transforms/InstCombine/or.ll @@ -2047,3 +2047,69 @@ define i1 @or_truncs(i8 %x) { %or1 = or i1 %trunc1, %trunc2 ret i1 %or1 } + +define i32 @or_zext_constant(i8 %a) { +; CHECK-LABEL: @or_zext_constant( +; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[A:%.*]], 1 +; CHECK-NEXT: [[AND:%.*]] = zext i8 [[TMP1]] to i32 +; CHECK-NEXT: ret i32 [[AND]] +; + %zext = zext i8 %a to i32 + %or = or i32 %zext, 1 + ret i32 %or +} + +define i32 @or_zext_minus_constant(i8 %a) { +; CHECK-LABEL: @or_zext_minus_constant( +; CHECK-NEXT: [[OR:%.*]] = zext i8 [[TMP1:%.*]] to i32 +; CHECK-NEXT: [[OR1:%.*]] = or i32 [[OR]], -9 +; CHECK-NEXT: ret i32 [[OR1]] +; + %zext = zext i8 %a to i32 + %or = or i32 %zext, -9 + ret i32 %or +} + +define i32 @or_zext_nneg_constant(i8 %a) { +; CHECK-LABEL: @or_zext_nneg_constant( +; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[A:%.*]], 9 +; CHECK-NEXT: [[AND:%.*]] = zext nneg i8 [[TMP1]] to i32 +; CHECK-NEXT: ret i32 [[AND]] +; + %zext = zext nneg i8 %a to i32 + %or = or i32 %zext, 9 + ret i32 %or +} + +define <4 x i32> @or_zext_nneg_constant_splat(<4 x i8> %a) { +; CHECK-LABEL: @or_zext_nneg_constant_splat( +; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i8> [[A:%.*]], splat (i8 9) +; CHECK-NEXT: [[OR:%.*]] = zext nneg <4 x i8> [[TMP1]] to <4 x i32> +; CHECK-NEXT: ret <4 x i32> [[OR]] +; + %zext = zext nneg <4 x i8> %a to <4 x i32> + %or = or <4 x i32> %zext, splat (i32 9) + ret <4 x i32> %or +} + +define i32 @or_zext_nneg_minus_constant(i8 %a) { +; CHECK-LABEL: @or_zext_nneg_minus_constant( +; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[A:%.*]], -9 +; CHECK-NEXT: [[ZEXT:%.*]] = sext i8 [[TMP1]] to i32 +; CHECK-NEXT: ret i32 [[ZEXT]] +; + %zext = zext nneg i8 %a to i32 + %or = or i32 %zext, -9 + ret i32 %or +} + +define <4 x i32> @or_zext_nneg_minus_constant_splat(<4 x i8> %a) { +; CHECK-LABEL: @or_zext_nneg_minus_constant_splat( +; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i8> [[A:%.*]], splat (i8 -9) +; CHECK-NEXT: [[OR:%.*]] = sext <4 x i8> [[TMP1]] to <4 x i32> +; CHECK-NEXT: ret <4 x i32> [[OR]] +; + %zext = zext nneg <4 x i8> %a to <4 x i32> + %or = or <4 x i32> %zext, splat (i32 -9) + ret <4 x i32> %or +} diff --git a/llvm/test/Transforms/InstCombine/pr58901.ll b/llvm/test/Transforms/InstCombine/pr58901.ll index 3d836aae7700..aa5aad23b082 100644 --- a/llvm/test/Transforms/InstCombine/pr58901.ll +++ b/llvm/test/Transforms/InstCombine/pr58901.ll @@ -4,7 +4,7 @@ define ptr @f1(ptr %arg, i64 %arg1) { ; CHECK-LABEL: @f1( ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[ARG:%.*]], i64 72 -; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [6 x i32], ptr [[TMP1]], i64 0, i64 [[ARG1:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[TMP1]], i64 [[ARG1:%.*]] ; CHECK-NEXT: ret ptr [[TMP2]] ; %1 = getelementptr [6 x i32], ptr %arg, i64 3 @@ -16,7 +16,7 @@ define ptr @f2(ptr %arg, i64 %arg1) { ; CHECK-LABEL: @f2( ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[ARG:%.*]], i64 72 ; CHECK-NEXT: [[DOTSPLIT:%.*]] = getelementptr [6 x i32], ptr [[TMP1]], i64 [[ARG1:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [6 x i32], ptr [[DOTSPLIT]], i64 0, i64 [[ARG1]] +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[DOTSPLIT]], i64 [[ARG1]] ; CHECK-NEXT: ret ptr [[TMP2]] ; %1 = getelementptr [6 x i32], ptr %arg, i64 3 diff --git a/llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll b/llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll index 17a9d540983c..bf978801fec5 100644 --- a/llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll +++ b/llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll @@ -307,8 +307,8 @@ define i64 @fold_ptrtoint_nullgep_variable_known_nonzero_inbounds_multiple_indic ; INSTCOMBINE-LABEL: define {{[^@]+}}@fold_ptrtoint_nullgep_variable_known_nonzero_inbounds_multiple_indices ; INSTCOMBINE-SAME: (i64 [[VAL:%.*]]) { ; INSTCOMBINE-NEXT: [[NON_ZERO_OFFSET:%.*]] = shl i64 [[VAL]], 1 -; INSTCOMBINE-NEXT: [[PTR_OFFS:%.*]] = or i64 [[NON_ZERO_OFFSET]], 3 -; INSTCOMBINE-NEXT: ret i64 [[PTR_OFFS]] +; INSTCOMBINE-NEXT: [[RET:%.*]] = or i64 [[NON_ZERO_OFFSET]], 3 +; INSTCOMBINE-NEXT: ret i64 [[RET]] ; %non_zero_offset = or i64 %val, 1 %ptr = getelementptr inbounds [2 x i8], ptr addrspace(1) null, i64 %non_zero_offset, i32 1 @@ -455,8 +455,8 @@ define i64 @fold_complex_index_multiple_nonzero(i64 %x) local_unnamed_addr #0 { ; INSTCOMBINE-LABEL: define {{[^@]+}}@fold_complex_index_multiple_nonzero ; INSTCOMBINE-SAME: (i64 [[X:%.*]]) local_unnamed_addr { ; INSTCOMBINE-NEXT: entry: -; INSTCOMBINE-NEXT: [[PTR_OFFS:%.*]] = add nsw i64 [[X]], 96 -; INSTCOMBINE-NEXT: ret i64 [[PTR_OFFS]] +; INSTCOMBINE-NEXT: [[RET:%.*]] = add i64 [[X]], 96 +; INSTCOMBINE-NEXT: ret i64 [[RET]] ; entry: %ptr = getelementptr inbounds %struct.S, ptr addrspace(1) null, i64 1, i32 0, i64 1, i32 0, i64 %x @@ -500,9 +500,9 @@ define i64 @fold_ptrtoint_nullgep_array_one_var_1(i64 %x) { ; ; INSTCOMBINE-LABEL: define {{[^@]+}}@fold_ptrtoint_nullgep_array_one_var_1 ; INSTCOMBINE-SAME: (i64 [[X:%.*]]) { -; INSTCOMBINE-NEXT: [[PTR_IDX:%.*]] = shl i64 [[X]], 2 -; INSTCOMBINE-NEXT: [[PTR_OFFS:%.*]] = add i64 [[PTR_IDX]], 6 -; INSTCOMBINE-NEXT: ret i64 [[PTR_OFFS]] +; INSTCOMBINE-NEXT: [[PTR_SPLIT_IDX:%.*]] = shl i64 [[X]], 2 +; INSTCOMBINE-NEXT: [[RET:%.*]] = add i64 [[PTR_SPLIT_IDX]], 6 +; INSTCOMBINE-NEXT: ret i64 [[RET]] ; %ptr = getelementptr [2 x i16], ptr addrspace(1) null, i64 %x, i64 3 %ret = ptrtoint ptr addrspace(1) %ptr to i64 @@ -525,8 +525,8 @@ define i64 @fold_ptrtoint_nullgep_array_one_var_2(i64 %x) { ; INSTCOMBINE-LABEL: define {{[^@]+}}@fold_ptrtoint_nullgep_array_one_var_2 ; INSTCOMBINE-SAME: (i64 [[X:%.*]]) { ; INSTCOMBINE-NEXT: [[PTR_IDX:%.*]] = shl i64 [[X]], 1 -; INSTCOMBINE-NEXT: [[PTR_OFFS:%.*]] = add i64 [[PTR_IDX]], 28 -; INSTCOMBINE-NEXT: ret i64 [[PTR_OFFS]] +; INSTCOMBINE-NEXT: [[RET:%.*]] = add i64 [[PTR_IDX]], 28 +; INSTCOMBINE-NEXT: ret i64 [[RET]] ; %ptr = getelementptr [2 x i16], ptr addrspace(1) null, i64 7, i64 %x %ret = ptrtoint ptr addrspace(1) %ptr to i64 @@ -600,9 +600,9 @@ define i64 @fold_ptrtoint_nested_array_two_vars_plus_const(i64 %x, i64 %y) { ; INSTCOMBINE-LABEL: define {{[^@]+}}@fold_ptrtoint_nested_array_two_vars_plus_const ; INSTCOMBINE-SAME: (i64 [[X:%.*]], i64 [[Y:%.*]]) { ; INSTCOMBINE-NEXT: [[PTR_SPLIT_IDX:%.*]] = shl i64 [[X]], 3 -; INSTCOMBINE-NEXT: [[PTR_IDX:%.*]] = shl i64 [[Y]], 2 -; INSTCOMBINE-NEXT: [[PTR_OFFS:%.*]] = or disjoint i64 [[PTR_IDX]], 2 -; INSTCOMBINE-NEXT: [[RET:%.*]] = add i64 [[PTR_SPLIT_IDX]], [[PTR_OFFS]] +; INSTCOMBINE-NEXT: [[PTR_SPLIT1_IDX:%.*]] = shl i64 [[Y]], 2 +; INSTCOMBINE-NEXT: [[TMP1:%.*]] = add i64 [[PTR_SPLIT_IDX]], [[PTR_SPLIT1_IDX]] +; INSTCOMBINE-NEXT: [[RET:%.*]] = or disjoint i64 [[TMP1]], 2 ; INSTCOMBINE-NEXT: ret i64 [[RET]] ; %ptr = getelementptr [2 x [2 x i16]], ptr addrspace(1) null, i64 %x, i64 %y, i64 1 @@ -629,7 +629,7 @@ define i64 @fold_ptrtoint_nested_nullgep_array_variable_multiple_uses(i64 %x, i6 ; INSTCOMBINE-LABEL: define {{[^@]+}}@fold_ptrtoint_nested_nullgep_array_variable_multiple_uses ; INSTCOMBINE-SAME: (i64 [[X:%.*]], i64 [[Y:%.*]]) { ; INSTCOMBINE-NEXT: [[PTR_SPLIT:%.*]] = getelementptr [2 x i16], ptr addrspace(1) null, i64 [[X]] -; INSTCOMBINE-NEXT: [[PTR:%.*]] = getelementptr [2 x i16], ptr addrspace(1) [[PTR_SPLIT]], i64 0, i64 [[Y]] +; INSTCOMBINE-NEXT: [[PTR:%.*]] = getelementptr i16, ptr addrspace(1) [[PTR_SPLIT]], i64 [[Y]] ; INSTCOMBINE-NEXT: call void @use_ptr(ptr addrspace(1) [[PTR]]) ; INSTCOMBINE-NEXT: [[RET:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64 ; INSTCOMBINE-NEXT: ret i64 [[RET]] diff --git a/llvm/test/Transforms/InstCombine/remove-loop-phi-multiply-by-zero.ll b/llvm/test/Transforms/InstCombine/remove-loop-phi-multiply-by-zero.ll index 3c10378d1722..a4a9de7fd128 100644 --- a/llvm/test/Transforms/InstCombine/remove-loop-phi-multiply-by-zero.ll +++ b/llvm/test/Transforms/InstCombine/remove-loop-phi-multiply-by-zero.ll @@ -67,7 +67,7 @@ define double @test_nnan_flag_enabled(ptr %arr_d) { ; CHECK: for.body: ; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[F_PROD_01:%.*]] = phi double [ 0.000000e+00, [[ENTRY]] ], [ [[MUL:%.*]], [[FOR_BODY]] ] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw double, ptr [[ARR_D:%.*]], i64 [[I_02]] ; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8 ; CHECK-NEXT: [[MUL]] = fmul nnan double [[F_PROD_01]], [[TMP0]] ; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1 @@ -101,7 +101,7 @@ define double @test_ninf_flag_enabled(ptr %arr_d) { ; CHECK: for.body: ; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[F_PROD_01:%.*]] = phi double [ 0.000000e+00, [[ENTRY]] ], [ [[MUL:%.*]], [[FOR_BODY]] ] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw double, ptr [[ARR_D:%.*]], i64 [[I_02]] ; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8 ; CHECK-NEXT: [[MUL]] = fmul ninf double [[F_PROD_01]], [[TMP0]] ; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1 @@ -135,7 +135,7 @@ define double @test_nsz_flag_enabled(ptr %arr_d) { ; CHECK: for.body: ; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[F_PROD_01:%.*]] = phi double [ 0.000000e+00, [[ENTRY]] ], [ [[MUL:%.*]], [[FOR_BODY]] ] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw double, ptr [[ARR_D:%.*]], i64 [[I_02]] ; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8 ; CHECK-NEXT: [[MUL]] = fmul nsz double [[F_PROD_01]], [[TMP0]] ; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1 @@ -169,7 +169,7 @@ define double @test_phi_initalise_to_non_zero(ptr %arr_d) { ; CHECK: for.body: ; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[F_PROD_01:%.*]] = phi double [ 1.000000e+00, [[ENTRY]] ], [ [[MUL:%.*]], [[FOR_BODY]] ] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw double, ptr [[ARR_D:%.*]], i64 [[I_02]] ; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8 ; CHECK-NEXT: [[MUL]] = fmul fast double [[F_PROD_01]], [[TMP0]] ; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1 @@ -205,7 +205,7 @@ define double @test_multiple_phi_operands(ptr %arr_d, i1 %entry_cond) { ; CHECK: for.body: ; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ 0, [[ENTRY_2]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[F_PROD_01:%.*]] = phi double [ 0.000000e+00, [[ENTRY]] ], [ 0.000000e+00, [[ENTRY_2]] ], [ [[MUL:%.*]], [[FOR_BODY]] ] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw double, ptr [[ARR_D:%.*]], i64 [[I_02]] ; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8 ; CHECK-NEXT: [[MUL]] = fmul fast double [[F_PROD_01]], [[TMP0]] ; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1 @@ -244,7 +244,7 @@ define double @test_multiple_phi_operands_with_non_zero(ptr %arr_d, i1 %entry_co ; CHECK: for.body: ; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ 0, [[ENTRY_2]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[F_PROD_01:%.*]] = phi double [ 1.000000e+00, [[ENTRY]] ], [ 0.000000e+00, [[ENTRY_2]] ], [ [[MUL:%.*]], [[FOR_BODY]] ] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw double, ptr [[ARR_D:%.*]], i64 [[I_02]] ; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8 ; CHECK-NEXT: [[MUL]] = fmul fast double [[F_PROD_01]], [[TMP0]] ; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1 diff --git a/llvm/test/Transforms/InstCombine/select-gep.ll b/llvm/test/Transforms/InstCombine/select-gep.ll index d3c357ea9751..dd8dffba11b0 100644 --- a/llvm/test/Transforms/InstCombine/select-gep.ll +++ b/llvm/test/Transforms/InstCombine/select-gep.ll @@ -161,8 +161,10 @@ define ptr @test2d(ptr %p, i64 %x, i64 %y) { define ptr @test3a(ptr %p, i64 %x, i64 %y) { ; CHECK-LABEL: @test3a( -; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [4 x i32], ptr [[P:%.*]], i64 2, i64 [[X:%.*]] -; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds [4 x i32], ptr [[P]], i64 2, i64 [[Y:%.*]] +; CHECK-NEXT: [[GEP1_SPLIT:%.*]] = getelementptr inbounds nuw i8, ptr [[P:%.*]], i64 32 +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[GEP1_SPLIT]], i64 [[X:%.*]] +; CHECK-NEXT: [[GEP2_SPLIT:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 32 +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[GEP2_SPLIT]], i64 [[Y:%.*]] ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X]], [[Y]] ; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], ptr [[GEP1]], ptr [[GEP2]] ; CHECK-NEXT: ret ptr [[SELECT]] @@ -176,11 +178,11 @@ define ptr @test3a(ptr %p, i64 %x, i64 %y) { define ptr @test3b(ptr %p, ptr %q, i64 %x, i64 %y) { ; CHECK-LABEL: @test3b( -; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [4 x i32], ptr [[P:%.*]], i64 2, i64 [[X:%.*]] -; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds [4 x i32], ptr [[Q:%.*]], i64 2, i64 [[X]] -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], ptr [[GEP1]], ptr [[GEP2]] -; CHECK-NEXT: ret ptr [[SELECT]] +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], ptr [[GEP1:%.*]], ptr [[GEP2:%.*]] +; CHECK-NEXT: [[SELECT_V:%.*]] = getelementptr inbounds nuw i8, ptr [[SELECT]], i64 32 +; CHECK-NEXT: [[SELECT1:%.*]] = getelementptr inbounds i32, ptr [[SELECT_V]], i64 [[X]] +; CHECK-NEXT: ret ptr [[SELECT1]] ; %gep1 = getelementptr inbounds [4 x i32], ptr %p, i64 2, i64 %x %gep2 = getelementptr inbounds [4 x i32], ptr %q, i64 2, i64 %x @@ -191,7 +193,8 @@ define ptr @test3b(ptr %p, ptr %q, i64 %x, i64 %y) { define ptr @test3c(ptr %p, ptr %q, i64 %x, i64 %y) { ; CHECK-LABEL: @test3c( -; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [4 x i32], ptr [[P:%.*]], i64 [[X:%.*]], i64 2 +; CHECK-NEXT: [[GEP1_SPLIT:%.*]] = getelementptr inbounds [4 x i32], ptr [[P:%.*]], i64 [[X:%.*]] +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds nuw i8, ptr [[GEP1_SPLIT]], i64 8 ; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[Q:%.*]], i64 [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X]], [[Y:%.*]] ; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], ptr [[GEP1]], ptr [[GEP2]] @@ -207,7 +210,8 @@ define ptr @test3c(ptr %p, ptr %q, i64 %x, i64 %y) { define ptr @test3d(ptr %p, ptr %q, i64 %x, i64 %y) { ; CHECK-LABEL: @test3d( ; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 [[X:%.*]] -; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds [4 x i32], ptr [[Q:%.*]], i64 [[X]], i64 2 +; CHECK-NEXT: [[GEP2_SPLIT:%.*]] = getelementptr inbounds [4 x i32], ptr [[Q:%.*]], i64 [[X]] +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds nuw i8, ptr [[GEP2_SPLIT]], i64 8 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X]], [[Y:%.*]] ; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], ptr [[GEP1]], ptr [[GEP2]] ; CHECK-NEXT: ret ptr [[SELECT]] diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll index 1f9ee8353601..db117aa28cad 100644 --- a/llvm/test/Transforms/InstCombine/select.ll +++ b/llvm/test/Transforms/InstCombine/select.ll @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s ; PR1822 @@ -6,8 +6,9 @@ target datalayout = "e-p:64:64-p1:16:16-p2:32:32:32-p3:64:64:64" define i1 @test5(i1 %C) { -; CHECK-LABEL: @test5( -; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true +; CHECK-LABEL: define i1 @test5( +; CHECK-SAME: i1 [[C:%.*]]) { +; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C]], true ; CHECK-NEXT: ret i1 [[NOT_C]] ; %V = select i1 %C, i1 false, i1 true @@ -15,8 +16,9 @@ define i1 @test5(i1 %C) { } define i32 @test6(i1 %C) { -; CHECK-LABEL: @test6( -; CHECK-NEXT: [[V:%.*]] = zext i1 [[C:%.*]] to i32 +; CHECK-LABEL: define i32 @test6( +; CHECK-SAME: i1 [[C:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = zext i1 [[C]] to i32 ; CHECK-NEXT: ret i32 [[V]] ; %V = select i1 %C, i32 1, i32 0 @@ -24,8 +26,9 @@ define i32 @test6(i1 %C) { } define i1 @trueval_is_true(i1 %C, i1 %X) { -; CHECK-LABEL: @trueval_is_true( -; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[X:%.*]] +; CHECK-LABEL: define i1 @trueval_is_true( +; CHECK-SAME: i1 [[C:%.*]], i1 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i1 true, i1 [[X]] ; CHECK-NEXT: ret i1 [[R]] ; %R = select i1 %C, i1 true, i1 %X @@ -33,8 +36,9 @@ define i1 @trueval_is_true(i1 %C, i1 %X) { } define <2 x i1> @trueval_is_true_vec(<2 x i1> %C, <2 x i1> %X) { -; CHECK-LABEL: @trueval_is_true_vec( -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> splat (i1 true), <2 x i1> [[X:%.*]] +; CHECK-LABEL: define <2 x i1> @trueval_is_true_vec( +; CHECK-SAME: <2 x i1> [[C:%.*]], <2 x i1> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C]], <2 x i1> splat (i1 true), <2 x i1> [[X]] ; CHECK-NEXT: ret <2 x i1> [[R]] ; %R = select <2 x i1> %C, <2 x i1> <i1 true, i1 true>, <2 x i1> %X @@ -42,8 +46,9 @@ define <2 x i1> @trueval_is_true_vec(<2 x i1> %C, <2 x i1> %X) { } define <2 x i1> @trueval_is_true_vec_poison_elt(<2 x i1> %C, <2 x i1> %X) { -; CHECK-LABEL: @trueval_is_true_vec_poison_elt( -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> <i1 poison, i1 true>, <2 x i1> [[X:%.*]] +; CHECK-LABEL: define <2 x i1> @trueval_is_true_vec_poison_elt( +; CHECK-SAME: <2 x i1> [[C:%.*]], <2 x i1> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C]], <2 x i1> <i1 poison, i1 true>, <2 x i1> [[X]] ; CHECK-NEXT: ret <2 x i1> [[R]] ; %R = select <2 x i1> %C, <2 x i1> <i1 poison, i1 true>, <2 x i1> %X @@ -51,8 +56,9 @@ define <2 x i1> @trueval_is_true_vec_poison_elt(<2 x i1> %C, <2 x i1> %X) { } define i1 @test8(i1 %C, i1 %X) { -; CHECK-LABEL: @test8( -; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i1 [[X:%.*]], i1 false +; CHECK-LABEL: define i1 @test8( +; CHECK-SAME: i1 [[C:%.*]], i1 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i1 [[X]], i1 false ; CHECK-NEXT: ret i1 [[R]] ; %R = select i1 %C, i1 %X, i1 false @@ -60,8 +66,9 @@ define i1 @test8(i1 %C, i1 %X) { } define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) { -; CHECK-LABEL: @test8vec( -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> [[X:%.*]], <2 x i1> zeroinitializer +; CHECK-LABEL: define <2 x i1> @test8vec( +; CHECK-SAME: <2 x i1> [[C:%.*]], <2 x i1> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C]], <2 x i1> [[X]], <2 x i1> zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[R]] ; %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 false, i1 false> @@ -69,8 +76,9 @@ define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) { } define <vscale x 2 x i1> @test8vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X) { -; CHECK-LABEL: @test8vvec( -; CHECK-NEXT: [[R:%.*]] = select <vscale x 2 x i1> [[C:%.*]], <vscale x 2 x i1> [[X:%.*]], <vscale x 2 x i1> zeroinitializer +; CHECK-LABEL: define <vscale x 2 x i1> @test8vvec( +; CHECK-SAME: <vscale x 2 x i1> [[C:%.*]], <vscale x 2 x i1> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select <vscale x 2 x i1> [[C]], <vscale x 2 x i1> [[X]], <vscale x 2 x i1> zeroinitializer ; CHECK-NEXT: ret <vscale x 2 x i1> [[R]] ; %R = select <vscale x 2 x i1> %C, <vscale x 2 x i1> %X, <vscale x 2 x i1> zeroinitializer @@ -78,9 +86,10 @@ define <vscale x 2 x i1> @test8vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X) } define i1 @test9(i1 %C, i1 %X) { -; CHECK-LABEL: @test9( -; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true -; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 [[X:%.*]], i1 false +; CHECK-LABEL: define i1 @test9( +; CHECK-SAME: i1 [[C:%.*]], i1 [[X:%.*]]) { +; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C]], true +; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 [[X]], i1 false ; CHECK-NEXT: ret i1 [[R]] ; %R = select i1 %C, i1 false, i1 %X @@ -88,9 +97,10 @@ define i1 @test9(i1 %C, i1 %X) { } define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) { -; CHECK-LABEL: @test9vec( -; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], splat (i1 true) -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOT_C]], <2 x i1> [[X:%.*]], <2 x i1> zeroinitializer +; CHECK-LABEL: define <2 x i1> @test9vec( +; CHECK-SAME: <2 x i1> [[C:%.*]], <2 x i1> [[X:%.*]]) { +; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C]], splat (i1 true) +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOT_C]], <2 x i1> [[X]], <2 x i1> zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[R]] ; %R = select <2 x i1> %C, <2 x i1> <i1 false, i1 false>, <2 x i1> %X @@ -98,9 +108,10 @@ define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) { } define <vscale x 2 x i1> @test9vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X) { -; CHECK-LABEL: @test9vvec( -; CHECK-NEXT: [[NOT_C:%.*]] = xor <vscale x 2 x i1> [[C:%.*]], splat (i1 true) -; CHECK-NEXT: [[R:%.*]] = select <vscale x 2 x i1> [[NOT_C]], <vscale x 2 x i1> [[X:%.*]], <vscale x 2 x i1> zeroinitializer +; CHECK-LABEL: define <vscale x 2 x i1> @test9vvec( +; CHECK-SAME: <vscale x 2 x i1> [[C:%.*]], <vscale x 2 x i1> [[X:%.*]]) { +; CHECK-NEXT: [[NOT_C:%.*]] = xor <vscale x 2 x i1> [[C]], splat (i1 true) +; CHECK-NEXT: [[R:%.*]] = select <vscale x 2 x i1> [[NOT_C]], <vscale x 2 x i1> [[X]], <vscale x 2 x i1> zeroinitializer ; CHECK-NEXT: ret <vscale x 2 x i1> [[R]] ; %R = select <vscale x 2 x i1> %C, <vscale x 2 x i1> zeroinitializer, <vscale x 2 x i1> %X @@ -108,9 +119,10 @@ define <vscale x 2 x i1> @test9vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X) } define i1 @test10(i1 %C, i1 %X) { -; CHECK-LABEL: @test10( -; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true -; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[X:%.*]] +; CHECK-LABEL: define i1 @test10( +; CHECK-SAME: i1 [[C:%.*]], i1 [[X:%.*]]) { +; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C]], true +; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[X]] ; CHECK-NEXT: ret i1 [[R]] ; %R = select i1 %C, i1 %X, i1 true @@ -118,9 +130,10 @@ define i1 @test10(i1 %C, i1 %X) { } define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) { -; CHECK-LABEL: @test10vec( -; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], splat (i1 true) -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOT_C]], <2 x i1> splat (i1 true), <2 x i1> [[X:%.*]] +; CHECK-LABEL: define <2 x i1> @test10vec( +; CHECK-SAME: <2 x i1> [[C:%.*]], <2 x i1> [[X:%.*]]) { +; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C]], splat (i1 true) +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOT_C]], <2 x i1> splat (i1 true), <2 x i1> [[X]] ; CHECK-NEXT: ret <2 x i1> [[R]] ; %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 true, i1 true> @@ -128,8 +141,9 @@ define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) { } define i1 @test23(i1 %a, i1 %b) { -; CHECK-LABEL: @test23( -; CHECK-NEXT: [[C:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false +; CHECK-LABEL: define i1 @test23( +; CHECK-SAME: i1 [[A:%.*]], i1 [[B:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false ; CHECK-NEXT: ret i1 [[C]] ; %c = select i1 %a, i1 %b, i1 %a @@ -137,8 +151,9 @@ define i1 @test23(i1 %a, i1 %b) { } define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) { -; CHECK-LABEL: @test23vec( -; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[A:%.*]], <2 x i1> [[B:%.*]], <2 x i1> zeroinitializer +; CHECK-LABEL: define <2 x i1> @test23vec( +; CHECK-SAME: <2 x i1> [[A:%.*]], <2 x i1> [[B:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[A]], <2 x i1> [[B]], <2 x i1> zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[C]] ; %c = select <2 x i1> %a, <2 x i1> %b, <2 x i1> %a @@ -146,8 +161,9 @@ define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) { } define i1 @test24(i1 %a, i1 %b) { -; CHECK-LABEL: @test24( -; CHECK-NEXT: [[C:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]] +; CHECK-LABEL: define i1 @test24( +; CHECK-SAME: i1 [[A:%.*]], i1 [[B:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = select i1 [[A]], i1 true, i1 [[B]] ; CHECK-NEXT: ret i1 [[C]] ; %c = select i1 %a, i1 %a, i1 %b @@ -155,8 +171,9 @@ define i1 @test24(i1 %a, i1 %b) { } define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) { -; CHECK-LABEL: @test24vec( -; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[A:%.*]], <2 x i1> splat (i1 true), <2 x i1> [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @test24vec( +; CHECK-SAME: <2 x i1> [[A:%.*]], <2 x i1> [[B:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[A]], <2 x i1> splat (i1 true), <2 x i1> [[B]] ; CHECK-NEXT: ret <2 x i1> [[C]] ; %c = select <2 x i1> %a, <2 x i1> %a, <2 x i1> %b @@ -164,9 +181,10 @@ define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) { } define i1 @test62(i1 %A, i1 %B) { -; CHECK-LABEL: @test62( -; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 [[A:%.*]], true -; CHECK-NEXT: [[C:%.*]] = select i1 [[NOT_A]], i1 [[B:%.*]], i1 false +; CHECK-LABEL: define i1 @test62( +; CHECK-SAME: i1 [[A:%.*]], i1 [[B:%.*]]) { +; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 [[A]], true +; CHECK-NEXT: [[C:%.*]] = select i1 [[NOT_A]], i1 [[B]], i1 false ; CHECK-NEXT: ret i1 [[C]] ; %not = xor i1 %A, true @@ -175,9 +193,10 @@ define i1 @test62(i1 %A, i1 %B) { } define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) { -; CHECK-LABEL: @test62vec( -; CHECK-NEXT: [[NOT_A:%.*]] = xor <2 x i1> [[A:%.*]], splat (i1 true) -; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[NOT_A]], <2 x i1> [[B:%.*]], <2 x i1> zeroinitializer +; CHECK-LABEL: define <2 x i1> @test62vec( +; CHECK-SAME: <2 x i1> [[A:%.*]], <2 x i1> [[B:%.*]]) { +; CHECK-NEXT: [[NOT_A:%.*]] = xor <2 x i1> [[A]], splat (i1 true) +; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[NOT_A]], <2 x i1> [[B]], <2 x i1> zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[C]] ; %not = xor <2 x i1> %A, <i1 true, i1 true> @@ -186,9 +205,10 @@ define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) { } define i1 @test63(i1 %A, i1 %B) { -; CHECK-LABEL: @test63( -; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 [[A:%.*]], true -; CHECK-NEXT: [[C:%.*]] = select i1 [[NOT_A]], i1 true, i1 [[B:%.*]] +; CHECK-LABEL: define i1 @test63( +; CHECK-SAME: i1 [[A:%.*]], i1 [[B:%.*]]) { +; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 [[A]], true +; CHECK-NEXT: [[C:%.*]] = select i1 [[NOT_A]], i1 true, i1 [[B]] ; CHECK-NEXT: ret i1 [[C]] ; %not = xor i1 %A, true @@ -197,9 +217,10 @@ define i1 @test63(i1 %A, i1 %B) { } define <2 x i1> @test63vec(<2 x i1> %A, <2 x i1> %B) { -; CHECK-LABEL: @test63vec( -; CHECK-NEXT: [[NOT_A:%.*]] = xor <2 x i1> [[A:%.*]], splat (i1 true) -; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[NOT_A]], <2 x i1> splat (i1 true), <2 x i1> [[B:%.*]] +; CHECK-LABEL: define <2 x i1> @test63vec( +; CHECK-SAME: <2 x i1> [[A:%.*]], <2 x i1> [[B:%.*]]) { +; CHECK-NEXT: [[NOT_A:%.*]] = xor <2 x i1> [[A]], splat (i1 true) +; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[NOT_A]], <2 x i1> splat (i1 true), <2 x i1> [[B]] ; CHECK-NEXT: ret <2 x i1> [[C]] ; %not = xor <2 x i1> %A, <i1 true, i1 true> @@ -208,8 +229,9 @@ define <2 x i1> @test63vec(<2 x i1> %A, <2 x i1> %B) { } define i32 @test11(i32 %a) { -; CHECK-LABEL: @test11( -; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A:%.*]], 0 +; CHECK-LABEL: define i32 @test11( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A]], 0 ; CHECK-NEXT: [[R:%.*]] = zext i1 [[C]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; @@ -219,9 +241,10 @@ define i32 @test11(i32 %a) { } define i32 @test12(i1 %cond, i32 %a) { -; CHECK-LABEL: @test12( -; CHECK-NEXT: [[B:%.*]] = zext i1 [[COND:%.*]] to i32 -; CHECK-NEXT: [[C:%.*]] = or i32 [[A:%.*]], [[B]] +; CHECK-LABEL: define i32 @test12( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = zext i1 [[COND]] to i32 +; CHECK-NEXT: [[C:%.*]] = or i32 [[A]], [[B]] ; CHECK-NEXT: ret i32 [[C]] ; %b = or i32 %a, 1 @@ -230,9 +253,10 @@ define i32 @test12(i1 %cond, i32 %a) { } define <2 x i32> @test12vec(<2 x i1> %cond, <2 x i32> %a) { -; CHECK-LABEL: @test12vec( -; CHECK-NEXT: [[B:%.*]] = zext <2 x i1> [[COND:%.*]] to <2 x i32> -; CHECK-NEXT: [[C:%.*]] = or <2 x i32> [[A:%.*]], [[B]] +; CHECK-LABEL: define <2 x i32> @test12vec( +; CHECK-SAME: <2 x i1> [[COND:%.*]], <2 x i32> [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = zext <2 x i1> [[COND]] to <2 x i32> +; CHECK-NEXT: [[C:%.*]] = or <2 x i32> [[A]], [[B]] ; CHECK-NEXT: ret <2 x i32> [[C]] ; %b = or <2 x i32> %a, <i32 1, i32 1> @@ -241,9 +265,10 @@ define <2 x i32> @test12vec(<2 x i1> %cond, <2 x i32> %a) { } define i32 @test12a(i1 %cond, i32 %a) { -; CHECK-LABEL: @test12a( -; CHECK-NEXT: [[B:%.*]] = zext i1 [[COND:%.*]] to i32 -; CHECK-NEXT: [[C:%.*]] = ashr i32 [[A:%.*]], [[B]] +; CHECK-LABEL: define i32 @test12a( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = zext i1 [[COND]] to i32 +; CHECK-NEXT: [[C:%.*]] = ashr i32 [[A]], [[B]] ; CHECK-NEXT: ret i32 [[C]] ; %b = ashr i32 %a, 1 @@ -252,9 +277,10 @@ define i32 @test12a(i1 %cond, i32 %a) { } define <2 x i32> @test12avec(<2 x i1> %cond, <2 x i32> %a) { -; CHECK-LABEL: @test12avec( -; CHECK-NEXT: [[B:%.*]] = zext <2 x i1> [[COND:%.*]] to <2 x i32> -; CHECK-NEXT: [[C:%.*]] = ashr <2 x i32> [[A:%.*]], [[B]] +; CHECK-LABEL: define <2 x i32> @test12avec( +; CHECK-SAME: <2 x i1> [[COND:%.*]], <2 x i32> [[A:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = zext <2 x i1> [[COND]] to <2 x i32> +; CHECK-NEXT: [[C:%.*]] = ashr <2 x i32> [[A]], [[B]] ; CHECK-NEXT: ret <2 x i32> [[C]] ; %b = ashr <2 x i32> %a, <i32 1, i32 1> @@ -263,10 +289,11 @@ define <2 x i32> @test12avec(<2 x i1> %cond, <2 x i32> %a) { } define i32 @test12b(i1 %cond, i32 %a) { -; CHECK-LABEL: @test12b( -; CHECK-NEXT: [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true +; CHECK-LABEL: define i32 @test12b( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]]) { +; CHECK-NEXT: [[NOT_COND:%.*]] = xor i1 [[COND]], true ; CHECK-NEXT: [[B:%.*]] = zext i1 [[NOT_COND]] to i32 -; CHECK-NEXT: [[D:%.*]] = ashr i32 [[A:%.*]], [[B]] +; CHECK-NEXT: [[D:%.*]] = ashr i32 [[A]], [[B]] ; CHECK-NEXT: ret i32 [[D]] ; %b = ashr i32 %a, 1 @@ -275,10 +302,11 @@ define i32 @test12b(i1 %cond, i32 %a) { } define <2 x i32> @test12bvec(<2 x i1> %cond, <2 x i32> %a) { -; CHECK-LABEL: @test12bvec( -; CHECK-NEXT: [[NOT_COND:%.*]] = xor <2 x i1> [[COND:%.*]], splat (i1 true) +; CHECK-LABEL: define <2 x i32> @test12bvec( +; CHECK-SAME: <2 x i1> [[COND:%.*]], <2 x i32> [[A:%.*]]) { +; CHECK-NEXT: [[NOT_COND:%.*]] = xor <2 x i1> [[COND]], splat (i1 true) ; CHECK-NEXT: [[B:%.*]] = zext <2 x i1> [[NOT_COND]] to <2 x i32> -; CHECK-NEXT: [[D:%.*]] = ashr <2 x i32> [[A:%.*]], [[B]] +; CHECK-NEXT: [[D:%.*]] = ashr <2 x i32> [[A]], [[B]] ; CHECK-NEXT: ret <2 x i32> [[D]] ; %b = ashr <2 x i32> %a, <i32 1, i32 1> @@ -287,8 +315,9 @@ define <2 x i32> @test12bvec(<2 x i1> %cond, <2 x i32> %a) { } define i32 @test13(i32 %a, i32 %b) { -; CHECK-LABEL: @test13( -; CHECK-NEXT: ret i32 [[B:%.*]] +; CHECK-LABEL: define i32 @test13( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: ret i32 [[B]] ; %C = icmp eq i32 %a, %b %V = select i1 %C, i32 %a, i32 %b @@ -296,8 +325,9 @@ define i32 @test13(i32 %a, i32 %b) { } define i32 @test13a(i32 %a, i32 %b) { -; CHECK-LABEL: @test13a( -; CHECK-NEXT: ret i32 [[A:%.*]] +; CHECK-LABEL: define i32 @test13a( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: ret i32 [[A]] ; %C = icmp ne i32 %a, %b %V = select i1 %C, i32 %a, i32 %b @@ -305,8 +335,9 @@ define i32 @test13a(i32 %a, i32 %b) { } define i32 @test13b(i32 %a, i32 %b) { -; CHECK-LABEL: @test13b( -; CHECK-NEXT: ret i32 [[A:%.*]] +; CHECK-LABEL: define i32 @test13b( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: ret i32 [[A]] ; %C = icmp eq i32 %a, %b %V = select i1 %C, i32 %b, i32 %a @@ -314,9 +345,10 @@ define i32 @test13b(i32 %a, i32 %b) { } define i1 @test14a(i1 %C, i32 %X) { -; CHECK-LABEL: @test14a( -; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1 -; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true +; CHECK-LABEL: define i1 @test14a( +; CHECK-SAME: i1 [[C:%.*]], i32 [[X:%.*]]) { +; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X]], 1 +; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C]], true ; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[R1]] ; CHECK-NEXT: ret i1 [[R]] ; @@ -327,9 +359,10 @@ define i1 @test14a(i1 %C, i32 %X) { } define i1 @test14b(i1 %C, i32 %X) { -; CHECK-LABEL: @test14b( -; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1 -; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[R1]] +; CHECK-LABEL: define i1 @test14b( +; CHECK-SAME: i1 [[C:%.*]], i32 [[X:%.*]]) { +; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X]], 1 +; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i1 true, i1 [[R1]] ; CHECK-NEXT: ret i1 [[R]] ; %V = select i1 %C, i32 0, i32 %X @@ -339,8 +372,9 @@ define i1 @test14b(i1 %C, i32 %X) { } define i32 @test16(i1 %C, ptr %P) { -; CHECK-LABEL: @test16( -; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4 +; CHECK-LABEL: define i32 @test16( +; CHECK-SAME: i1 [[C:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; %P2 = select i1 %C, ptr %P, ptr null @@ -350,8 +384,9 @@ define i32 @test16(i1 %C, ptr %P) { ;; It may be legal to load from a null address in a non-zero address space define i32 @test16_neg(i1 %C, ptr addrspace(1) %P) { -; CHECK-LABEL: @test16_neg( -; CHECK-NEXT: [[P2:%.*]] = select i1 [[C:%.*]], ptr addrspace(1) [[P:%.*]], ptr addrspace(1) null +; CHECK-LABEL: define i32 @test16_neg( +; CHECK-SAME: i1 [[C:%.*]], ptr addrspace(1) [[P:%.*]]) { +; CHECK-NEXT: [[P2:%.*]] = select i1 [[C]], ptr addrspace(1) [[P]], ptr addrspace(1) null ; CHECK-NEXT: [[V:%.*]] = load i32, ptr addrspace(1) [[P2]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; @@ -361,8 +396,9 @@ define i32 @test16_neg(i1 %C, ptr addrspace(1) %P) { } define i32 @test16_neg2(i1 %C, ptr addrspace(1) %P) { -; CHECK-LABEL: @test16_neg2( -; CHECK-NEXT: [[P2:%.*]] = select i1 [[C:%.*]], ptr addrspace(1) null, ptr addrspace(1) [[P:%.*]] +; CHECK-LABEL: define i32 @test16_neg2( +; CHECK-SAME: i1 [[C:%.*]], ptr addrspace(1) [[P:%.*]]) { +; CHECK-NEXT: [[P2:%.*]] = select i1 [[C]], ptr addrspace(1) null, ptr addrspace(1) [[P]] ; CHECK-NEXT: [[V:%.*]] = load i32, ptr addrspace(1) [[P2]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; @@ -373,8 +409,9 @@ define i32 @test16_neg2(i1 %C, ptr addrspace(1) %P) { ;; It may be legal to load from a null address with null pointer valid attribute. define i32 @test16_no_null_opt(i1 %C, ptr %P) #0 { -; CHECK-LABEL: @test16_no_null_opt( -; CHECK-NEXT: [[P2:%.*]] = select i1 [[C:%.*]], ptr [[P:%.*]], ptr null +; CHECK-LABEL: define i32 @test16_no_null_opt( +; CHECK-SAME: i1 [[C:%.*]], ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] { +; CHECK-NEXT: [[P2:%.*]] = select i1 [[C]], ptr [[P]], ptr null ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P2]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; @@ -384,8 +421,9 @@ define i32 @test16_no_null_opt(i1 %C, ptr %P) #0 { } define i32 @test16_no_null_opt_2(i1 %C, ptr %P) #0 { -; CHECK-LABEL: @test16_no_null_opt_2( -; CHECK-NEXT: [[P2:%.*]] = select i1 [[C:%.*]], ptr null, ptr [[P:%.*]] +; CHECK-LABEL: define i32 @test16_no_null_opt_2( +; CHECK-SAME: i1 [[C:%.*]], ptr [[P:%.*]]) #[[ATTR0]] { +; CHECK-NEXT: [[P2:%.*]] = select i1 [[C]], ptr null, ptr [[P]] ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P2]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; @@ -397,9 +435,10 @@ define i32 @test16_no_null_opt_2(i1 %C, ptr %P) #0 { attributes #0 = { null_pointer_is_valid } define i1 @test17(ptr %X, i1 %C) { -; CHECK-LABEL: @test17( -; CHECK-NEXT: [[RV1:%.*]] = icmp eq ptr [[X:%.*]], null -; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true +; CHECK-LABEL: define i1 @test17( +; CHECK-SAME: ptr [[X:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[RV1:%.*]] = icmp eq ptr [[X]], null +; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C]], true ; CHECK-NEXT: [[RV:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[RV1]] ; CHECK-NEXT: ret i1 [[RV]] ; @@ -409,8 +448,9 @@ define i1 @test17(ptr %X, i1 %C) { } define i32 @test18(i32 %X, i32 %Y, i1 %C) { -; CHECK-LABEL: @test18( -; CHECK-NEXT: [[V:%.*]] = sdiv i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @test18( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[V:%.*]] = sdiv i32 [[Y]], [[X]] ; CHECK-NEXT: ret i32 [[V]] ; %R = select i1 %C, i32 %X, i32 0 @@ -419,8 +459,9 @@ define i32 @test18(i32 %X, i32 %Y, i1 %C) { } define i32 @test19(i32 %x) { -; CHECK-LABEL: @test19( -; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i32 @test19( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X]], 31 ; CHECK-NEXT: ret i32 [[X_LOBIT]] ; %t = icmp ugt i32 %x, 2147483647 @@ -429,8 +470,9 @@ define i32 @test19(i32 %x) { } define i32 @test20(i32 %x) { -; CHECK-LABEL: @test20( -; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i32 @test20( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X]], 31 ; CHECK-NEXT: ret i32 [[X_LOBIT]] ; %t = icmp slt i32 %x, 0 @@ -439,8 +481,9 @@ define i32 @test20(i32 %x) { } define i64 @test21(i32 %x) { -; CHECK-LABEL: @test21( -; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i64 @test21( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X]], 31 ; CHECK-NEXT: [[RETVAL:%.*]] = sext i32 [[X_LOBIT]] to i64 ; CHECK-NEXT: ret i64 [[RETVAL]] ; @@ -450,8 +493,9 @@ define i64 @test21(i32 %x) { } define i16 @test22(i32 %x) { -; CHECK-LABEL: @test22( -; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31 +; CHECK-LABEL: define i16 @test22( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X]], 31 ; CHECK-NEXT: [[RETVAL:%.*]] = trunc nsw i32 [[X_LOBIT]] to i16 ; CHECK-NEXT: ret i16 [[RETVAL]] ; @@ -461,13 +505,14 @@ define i16 @test22(i32 %x) { } define i32 @test25(i1 %c) { -; CHECK-LABEL: @test25( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[C:%.*]], label [[JUMP:%.*]], label [[RET:%.*]] -; CHECK: jump: -; CHECK-NEXT: br label [[RET]] -; CHECK: ret: -; CHECK-NEXT: [[B:%.*]] = phi i32 [ 10, [[JUMP]] ], [ 20, [[ENTRY:%.*]] ] +; CHECK-LABEL: define i32 @test25( +; CHECK-SAME: i1 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[C]], label %[[JUMP:.*]], label %[[RET:.*]] +; CHECK: [[JUMP]]: +; CHECK-NEXT: br label %[[RET]] +; CHECK: [[RET]]: +; CHECK-NEXT: [[B:%.*]] = phi i32 [ 10, %[[JUMP]] ], [ 20, %[[ENTRY]] ] ; CHECK-NEXT: ret i32 [[B]] ; entry: @@ -481,13 +526,14 @@ ret: } define i32 @test26(i1 %cond) { -; CHECK-LABEL: @test26( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]] -; CHECK: jump: -; CHECK-NEXT: br label [[RET]] -; CHECK: ret: -; CHECK-NEXT: [[B:%.*]] = phi i32 [ 20, [[ENTRY:%.*]] ], [ 10, [[JUMP]] ] +; CHECK-LABEL: define i32 @test26( +; CHECK-SAME: i1 [[COND:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[COND]], label %[[JUMP:.*]], label %[[RET:.*]] +; CHECK: [[JUMP]]: +; CHECK-NEXT: br label %[[RET]] +; CHECK: [[RET]]: +; CHECK-NEXT: [[B:%.*]] = phi i32 [ 20, %[[ENTRY]] ], [ 10, %[[JUMP]] ] ; CHECK-NEXT: ret i32 [[B]] ; entry: @@ -502,13 +548,14 @@ ret: } define i32 @test26_logical(i1 %cond) { -; CHECK-LABEL: @test26_logical( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]] -; CHECK: jump: -; CHECK-NEXT: br label [[RET]] -; CHECK: ret: -; CHECK-NEXT: [[B:%.*]] = phi i32 [ 20, [[ENTRY:%.*]] ], [ 10, [[JUMP]] ] +; CHECK-LABEL: define i32 @test26_logical( +; CHECK-SAME: i1 [[COND:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[COND]], label %[[JUMP:.*]], label %[[RET:.*]] +; CHECK: [[JUMP]]: +; CHECK-NEXT: br label %[[RET]] +; CHECK: [[RET]]: +; CHECK-NEXT: [[B:%.*]] = phi i32 [ 20, %[[ENTRY]] ], [ 10, %[[JUMP]] ] ; CHECK-NEXT: ret i32 [[B]] ; entry: @@ -523,13 +570,14 @@ ret: } define i32 @test27(i1 %c, i32 %A, i32 %B) { -; CHECK-LABEL: @test27( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[C:%.*]], label [[JUMP:%.*]], label [[RET:%.*]] -; CHECK: jump: -; CHECK-NEXT: br label [[RET]] -; CHECK: ret: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ] +; CHECK-LABEL: define i32 @test27( +; CHECK-SAME: i1 [[C:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[C]], label %[[JUMP:.*]], label %[[RET:.*]] +; CHECK: [[JUMP]]: +; CHECK-NEXT: br label %[[RET]] +; CHECK: [[RET]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[A]], %[[JUMP]] ], [ [[B]], %[[ENTRY]] ] ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -543,13 +591,14 @@ ret: } define i32 @test28(i1 %cond, i32 %A, i32 %B) { -; CHECK-LABEL: @test28( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]] -; CHECK: jump: -; CHECK-NEXT: br label [[RET]] -; CHECK: ret: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ] +; CHECK-LABEL: define i32 @test28( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[COND]], label %[[JUMP:.*]], label %[[RET:.*]] +; CHECK: [[JUMP]]: +; CHECK-NEXT: br label %[[RET]] +; CHECK: [[RET]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[A]], %[[JUMP]] ], [ [[B]], %[[ENTRY]] ] ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -564,15 +613,16 @@ ret: } define i32 @test29(i1 %cond, i32 %A, i32 %B) { -; CHECK-LABEL: @test29( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]] -; CHECK: jump: -; CHECK-NEXT: br label [[RET]] -; CHECK: ret: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ] -; CHECK-NEXT: br label [[NEXT:%.*]] -; CHECK: next: +; CHECK-LABEL: define i32 @test29( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[COND]], label %[[JUMP:.*]], label %[[RET:.*]] +; CHECK: [[JUMP]]: +; CHECK-NEXT: br label %[[RET]] +; CHECK: [[RET]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[A]], %[[JUMP]] ], [ [[B]], %[[ENTRY]] ] +; CHECK-NEXT: br label %[[NEXT:.*]] +; CHECK: [[NEXT]]: ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -591,8 +641,9 @@ next: ; SMAX(SMAX(x, y), x) -> SMAX(x, y) define i32 @test30(i32 %x, i32 %y) { -; CHECK-LABEL: @test30( -; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[Y:%.*]]) +; CHECK-LABEL: define i32 @test30( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, %y @@ -604,8 +655,9 @@ define i32 @test30(i32 %x, i32 %y) { ; UMAX(UMAX(x, y), x) -> UMAX(x, y) define i32 @test31(i32 %x, i32 %y) { -; CHECK-LABEL: @test31( -; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[Y:%.*]]) +; CHECK-LABEL: define i32 @test31( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.umax.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp ugt i32 %x, %y @@ -617,8 +669,9 @@ define i32 @test31(i32 %x, i32 %y) { ; SMIN(SMIN(x, y), x) -> SMIN(x, y) define i32 @test32(i32 %x, i32 %y) { -; CHECK-LABEL: @test32( -; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 [[Y:%.*]]) +; CHECK-LABEL: define i32 @test32( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smin.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, %y @@ -630,8 +683,9 @@ define i32 @test32(i32 %x, i32 %y) { ; MAX(MIN(x, y), x) -> x define i32 @test33(i32 %x, i32 %y) { -; CHECK-LABEL: @test33( -; CHECK-NEXT: ret i32 [[X:%.*]] +; CHECK-LABEL: define i32 @test33( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: ret i32 [[X]] ; %cmp = icmp sgt i32 %x, %y %cond = select i1 %cmp, i32 %y, i32 %x @@ -642,8 +696,9 @@ define i32 @test33(i32 %x, i32 %y) { ; MIN(MAX(x, y), x) -> x define i32 @test34(i32 %x, i32 %y) { -; CHECK-LABEL: @test34( -; CHECK-NEXT: ret i32 [[X:%.*]] +; CHECK-LABEL: define i32 @test34( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: ret i32 [[X]] ; %cmp = icmp sgt i32 %x, %y %cond = select i1 %cmp, i32 %x, i32 %y @@ -653,7 +708,8 @@ define i32 @test34(i32 %x, i32 %y) { } define i1 @test38(i1 %cond) { -; CHECK-LABEL: @test38( +; CHECK-LABEL: define i1 @test38( +; CHECK-SAME: i1 [[COND:%.*]]) { ; CHECK-NEXT: ret i1 false ; %zero = alloca i32 @@ -664,7 +720,8 @@ define i1 @test38(i1 %cond) { } define i1 @test39(i1 %cond, double %x) { -; CHECK-LABEL: @test39( +; CHECK-LABEL: define i1 @test39( +; CHECK-SAME: i1 [[COND:%.*]], double [[X:%.*]]) { ; CHECK-NEXT: ret i1 true ; %s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty @@ -673,7 +730,8 @@ define i1 @test39(i1 %cond, double %x) { } define i1 @test40(i1 %cond) { -; CHECK-LABEL: @test40( +; CHECK-LABEL: define i1 @test40( +; CHECK-SAME: i1 [[COND:%.*]]) { ; CHECK-NEXT: ret i1 false ; %a = alloca i32 @@ -685,8 +743,9 @@ define i1 @test40(i1 %cond) { } define i32 @test41(i1 %cond, i32 %x, i32 %y) { -; CHECK-LABEL: @test41( -; CHECK-NEXT: [[R:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @test41( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: ret i32 [[R]] ; %z = and i32 %x, %y @@ -696,10 +755,11 @@ define i32 @test41(i1 %cond, i32 %x, i32 %y) { } define i32 @test42(i32 %x, i32 %y) { -; CHECK-LABEL: @test42( -; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[X:%.*]], 0 +; CHECK-LABEL: define i32 @test42( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[X]], 0 ; CHECK-NEXT: [[B:%.*]] = sext i1 [[COND]] to i32 -; CHECK-NEXT: [[C:%.*]] = add i32 [[Y:%.*]], [[B]] +; CHECK-NEXT: [[C:%.*]] = add i32 [[Y]], [[B]] ; CHECK-NEXT: ret i32 [[C]] ; %b = add i32 %y, -1 @@ -709,10 +769,11 @@ define i32 @test42(i32 %x, i32 %y) { } define <2 x i32> @test42vec(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @test42vec( -; CHECK-NEXT: [[COND:%.*]] = icmp eq <2 x i32> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i32> @test42vec( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[COND:%.*]] = icmp eq <2 x i32> [[X]], zeroinitializer ; CHECK-NEXT: [[B:%.*]] = sext <2 x i1> [[COND]] to <2 x i32> -; CHECK-NEXT: [[C:%.*]] = add <2 x i32> [[Y:%.*]], [[B]] +; CHECK-NEXT: [[C:%.*]] = add <2 x i32> [[Y]], [[B]] ; CHECK-NEXT: ret <2 x i32> [[C]] ; %b = add <2 x i32> %y, <i32 -1, i32 -1> @@ -726,8 +787,9 @@ define <2 x i32> @test42vec(<2 x i32> %x, <2 x i32> %y) { ; This select instruction can't be eliminated because trying to do so would ; change the number of vector elements. This used to assert. define i48 @test51(<3 x i1> %icmp, <3 x i16> %t) { -; CHECK-LABEL: @test51( -; CHECK-NEXT: [[SELECT:%.*]] = select <3 x i1> [[ICMP:%.*]], <3 x i16> zeroinitializer, <3 x i16> [[T:%.*]] +; CHECK-LABEL: define i48 @test51( +; CHECK-SAME: <3 x i1> [[ICMP:%.*]], <3 x i16> [[T:%.*]]) { +; CHECK-NEXT: [[SELECT:%.*]] = select <3 x i1> [[ICMP]], <3 x i16> zeroinitializer, <3 x i16> [[T]] ; CHECK-NEXT: [[T2:%.*]] = bitcast <3 x i16> [[SELECT]] to i48 ; CHECK-NEXT: ret i48 [[T2]] ; @@ -737,9 +799,10 @@ define i48 @test51(<3 x i1> %icmp, <3 x i16> %t) { } define <vscale x 4 x float> @bitcast_select_bitcast(<vscale x 4 x i1> %icmp, <vscale x 4 x i32> %a, <vscale x 4 x float> %b) { -; CHECK-LABEL: @bitcast_select_bitcast( -; CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[A:%.*]] to <vscale x 4 x float> -; CHECK-NEXT: [[BC2:%.*]] = select <vscale x 4 x i1> [[ICMP:%.*]], <vscale x 4 x float> [[B:%.*]], <vscale x 4 x float> [[TMP1]] +; CHECK-LABEL: define <vscale x 4 x float> @bitcast_select_bitcast( +; CHECK-SAME: <vscale x 4 x i1> [[ICMP:%.*]], <vscale x 4 x i32> [[A:%.*]], <vscale x 4 x float> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[A]] to <vscale x 4 x float> +; CHECK-NEXT: [[BC2:%.*]] = select <vscale x 4 x i1> [[ICMP]], <vscale x 4 x float> [[B]], <vscale x 4 x float> [[TMP1]] ; CHECK-NEXT: ret <vscale x 4 x float> [[BC2]] ; %bc1 = bitcast <vscale x 4 x float> %b to <vscale x 4 x i32> @@ -749,10 +812,11 @@ define <vscale x 4 x float> @bitcast_select_bitcast(<vscale x 4 x i1> %icmp, <vs } define void @select_oneuse_bitcast(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x i32> %c, <vscale x 4 x i32> %d, ptr %ptr1) { -; CHECK-LABEL: @select_oneuse_bitcast( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <vscale x 4 x i32> [[C:%.*]], [[D:%.*]] -; CHECK-NEXT: [[SEL1_V:%.*]] = select <vscale x 4 x i1> [[CMP]], <vscale x 4 x float> [[A:%.*]], <vscale x 4 x float> [[B:%.*]] -; CHECK-NEXT: store <vscale x 4 x float> [[SEL1_V]], ptr [[PTR1:%.*]], align 16 +; CHECK-LABEL: define void @select_oneuse_bitcast( +; CHECK-SAME: <vscale x 4 x float> [[A:%.*]], <vscale x 4 x float> [[B:%.*]], <vscale x 4 x i32> [[C:%.*]], <vscale x 4 x i32> [[D:%.*]], ptr [[PTR1:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <vscale x 4 x i32> [[C]], [[D]] +; CHECK-NEXT: [[SEL1_V:%.*]] = select <vscale x 4 x i1> [[CMP]], <vscale x 4 x float> [[A]], <vscale x 4 x float> [[B]] +; CHECK-NEXT: store <vscale x 4 x float> [[SEL1_V]], ptr [[PTR1]], align 16 ; CHECK-NEXT: ret void ; %cmp = icmp ult <vscale x 4 x i32> %c, %d @@ -767,12 +831,13 @@ define void @select_oneuse_bitcast(<vscale x 4 x float> %a, <vscale x 4 x float> ; Hoisting the selects allows later pattern matching to see that these are min/max ops. define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, ptr %ptr1, ptr %ptr2) { -; CHECK-LABEL: @min_max_bitcast( -; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define void @min_max_bitcast( +; CHECK-SAME: <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[A]], [[B]] ; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[A]], <4 x float> [[B]] ; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B]], <4 x float> [[A]] -; CHECK-NEXT: store <4 x float> [[SEL1_V]], ptr [[PTR1:%.*]], align 16 -; CHECK-NEXT: store <4 x float> [[SEL2_V]], ptr [[PTR2:%.*]], align 16 +; CHECK-NEXT: store <4 x float> [[SEL1_V]], ptr [[PTR1]], align 16 +; CHECK-NEXT: store <4 x float> [[SEL2_V]], ptr [[PTR2]], align 16 ; CHECK-NEXT: ret void ; %cmp = fcmp olt <4 x float> %a, %b @@ -786,12 +851,13 @@ define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, ptr %ptr1, ptr %ptr } define void @min_max_bitcast1(<vscale x 4 x float> %a, <vscale x 4 x float> %b, ptr %ptr1, ptr %ptr2) { -; CHECK-LABEL: @min_max_bitcast1( -; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <vscale x 4 x float> [[A:%.*]], [[B:%.*]] +; CHECK-LABEL: define void @min_max_bitcast1( +; CHECK-SAME: <vscale x 4 x float> [[A:%.*]], <vscale x 4 x float> [[B:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <vscale x 4 x float> [[A]], [[B]] ; CHECK-NEXT: [[SEL1_V:%.*]] = select <vscale x 4 x i1> [[CMP]], <vscale x 4 x float> [[A]], <vscale x 4 x float> [[B]] ; CHECK-NEXT: [[SEL2_V:%.*]] = select <vscale x 4 x i1> [[CMP]], <vscale x 4 x float> [[B]], <vscale x 4 x float> [[A]] -; CHECK-NEXT: store <vscale x 4 x float> [[SEL1_V]], ptr [[PTR1:%.*]], align 16 -; CHECK-NEXT: store <vscale x 4 x float> [[SEL2_V]], ptr [[PTR2:%.*]], align 16 +; CHECK-NEXT: store <vscale x 4 x float> [[SEL1_V]], ptr [[PTR1]], align 16 +; CHECK-NEXT: store <vscale x 4 x float> [[SEL2_V]], ptr [[PTR2]], align 16 ; CHECK-NEXT: ret void ; %cmp = fcmp olt <vscale x 4 x float> %a, %b @@ -807,14 +873,15 @@ define void @min_max_bitcast1(<vscale x 4 x float> %a, <vscale x 4 x float> %b, ; To avoid potential backend problems, we don't do the same transform for other casts. define void @truncs_before_selects(<4 x float> %f1, <4 x float> %f2, <4 x i64> %a, <4 x i64> %b, ptr %ptr1, ptr %ptr2) { -; CHECK-LABEL: @truncs_before_selects( -; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[F1:%.*]], [[F2:%.*]] -; CHECK-NEXT: [[BC1:%.*]] = trunc <4 x i64> [[A:%.*]] to <4 x i32> -; CHECK-NEXT: [[BC2:%.*]] = trunc <4 x i64> [[B:%.*]] to <4 x i32> +; CHECK-LABEL: define void @truncs_before_selects( +; CHECK-SAME: <4 x float> [[F1:%.*]], <4 x float> [[F2:%.*]], <4 x i64> [[A:%.*]], <4 x i64> [[B:%.*]], ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[F1]], [[F2]] +; CHECK-NEXT: [[BC1:%.*]] = trunc <4 x i64> [[A]] to <4 x i32> +; CHECK-NEXT: [[BC2:%.*]] = trunc <4 x i64> [[B]] to <4 x i32> ; CHECK-NEXT: [[SEL1:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC1]], <4 x i32> [[BC2]] ; CHECK-NEXT: [[SEL2:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC2]], <4 x i32> [[BC1]] -; CHECK-NEXT: store <4 x i32> [[SEL1]], ptr [[PTR1:%.*]], align 16 -; CHECK-NEXT: store <4 x i32> [[SEL2]], ptr [[PTR2:%.*]], align 16 +; CHECK-NEXT: store <4 x i32> [[SEL1]], ptr [[PTR1]], align 16 +; CHECK-NEXT: store <4 x i32> [[SEL2]], ptr [[PTR2]], align 16 ; CHECK-NEXT: ret void ; %cmp = fcmp olt <4 x float> %f1, %f2 @@ -830,8 +897,9 @@ define void @truncs_before_selects(<4 x float> %f1, <4 x float> %f2, <4 x i64> % ; PR8575 define i32 @test52(i32 %n, i32 %m) { -; CHECK-LABEL: @test52( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], [[M:%.*]] +; CHECK-LABEL: define i32 @test52( +; CHECK-SAME: i32 [[N:%.*]], i32 [[M:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], [[M]] ; CHECK-NEXT: [[STOREMERGE:%.*]] = select i1 [[CMP]], i32 1, i32 6 ; CHECK-NEXT: ret i32 [[STOREMERGE]] ; @@ -845,8 +913,9 @@ define i32 @test52(i32 %n, i32 %m) { ; PR9454 define i32 @test53(i32 %x) { -; CHECK-LABEL: @test53( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -3 +; CHECK-LABEL: define i32 @test53( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X]], -3 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 2, i32 1 ; CHECK-NEXT: ret i32 [[SEL]] @@ -858,8 +927,9 @@ define i32 @test53(i32 %x) { } define i32 @test54(i32 %X, i32 %Y) { -; CHECK-LABEL: @test54( -; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], 0 +; CHECK-LABEL: define i32 @test54( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X]], 0 ; CHECK-NEXT: [[C:%.*]] = zext i1 [[B]] to i32 ; CHECK-NEXT: ret i32 [[C]] ; @@ -870,8 +940,9 @@ define i32 @test54(i32 %X, i32 %Y) { } define i1 @test55(i1 %X, i32 %Y, i32 %Z) { -; CHECK-LABEL: @test55( -; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[Y:%.*]], 0 +; CHECK-LABEL: define i1 @test55( +; CHECK-SAME: i1 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[Y]], 0 ; CHECK-NEXT: ret i1 [[C]] ; %A = ashr exact i32 %Y, %Z @@ -881,8 +952,9 @@ define i1 @test55(i1 %X, i32 %Y, i32 %Z) { } define i32 @test56(i16 %x) { -; CHECK-LABEL: @test56( -; CHECK-NEXT: [[CONV:%.*]] = zext i16 [[X:%.*]] to i32 +; CHECK-LABEL: define i32 @test56( +; CHECK-SAME: i16 [[X:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = zext i16 [[X]] to i32 ; CHECK-NEXT: ret i32 [[CONV]] ; %tobool = icmp eq i16 %x, 0 @@ -892,9 +964,10 @@ define i32 @test56(i16 %x) { } define i32 @test57(i32 %x, i32 %y) { -; CHECK-LABEL: @test57( -; CHECK-NEXT: [[Y:%.*]] = freeze i32 [[Y1:%.*]] -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]] +; CHECK-LABEL: define i32 @test57( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y_FR]] ; CHECK-NEXT: ret i32 [[AND]] ; %and = and i32 %x, %y @@ -904,8 +977,9 @@ define i32 @test57(i32 %x, i32 %y) { } define i32 @test58(i16 %x) { -; CHECK-LABEL: @test58( -; CHECK-NEXT: [[CONV:%.*]] = zext i16 [[X:%.*]] to i32 +; CHECK-LABEL: define i32 @test58( +; CHECK-SAME: i16 [[X:%.*]]) { +; CHECK-NEXT: [[CONV:%.*]] = zext i16 [[X]] to i32 ; CHECK-NEXT: ret i32 [[CONV]] ; %tobool = icmp ne i16 %x, 1 @@ -915,8 +989,9 @@ define i32 @test58(i16 %x) { } define i32 @test59(i32 %x, i32 %y) { -; CHECK-LABEL: @test59( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @test59( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: ret i32 [[AND]] ; %and = and i32 %x, %y @@ -926,9 +1001,10 @@ define i32 @test59(i32 %x, i32 %y) { } define i1 @test60(i32 %x, ptr %y) { -; CHECK-LABEL: @test60( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0 -; CHECK-NEXT: [[LOAD:%.*]] = load i1, ptr [[Y:%.*]], align 1 +; CHECK-LABEL: define i1 @test60( +; CHECK-SAME: i32 [[X:%.*]], ptr [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], 0 +; CHECK-NEXT: [[LOAD:%.*]] = load i1, ptr [[Y]], align 1 ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X]], 1 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i1 [[LOAD]], i1 [[CMP1]] ; CHECK-NEXT: ret i1 [[SEL]] @@ -942,7 +1018,8 @@ define i1 @test60(i32 %x, ptr %y) { @glbl = constant i32 10 define i32 @test61(ptr %ptr) { -; CHECK-LABEL: @test61( +; CHECK-LABEL: define i32 @test61( +; CHECK-SAME: ptr [[PTR:%.*]]) { ; CHECK-NEXT: ret i32 10 ; %A = load i32, ptr %ptr @@ -953,19 +1030,20 @@ define i32 @test61(ptr %ptr) { ; PR14131 define void @test64(i32 %p, i16 %b, i1 %c1) noreturn { -; CHECK-LABEL: @test64( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[C1:%.*]], label [[LOR_RHS:%.*]], label [[LOR_END:%.*]] -; CHECK: lor.rhs: -; CHECK-NEXT: br label [[LOR_END]] -; CHECK: lor.end: -; CHECK-NEXT: br i1 poison, label [[COND_END17:%.*]], label [[COND_FALSE16:%.*]] -; CHECK: cond.false16: -; CHECK-NEXT: br label [[COND_END17]] -; CHECK: cond.end17: -; CHECK-NEXT: br label [[WHILE_BODY:%.*]] -; CHECK: while.body: -; CHECK-NEXT: br label [[WHILE_BODY]] +; CHECK-LABEL: define void @test64( +; CHECK-SAME: i32 [[P:%.*]], i16 [[B:%.*]], i1 [[C1:%.*]]) #[[ATTR1:[0-9]+]] { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[C1]], label %[[LOR_RHS:.*]], label %[[LOR_END:.*]] +; CHECK: [[LOR_RHS]]: +; CHECK-NEXT: br label %[[LOR_END]] +; CHECK: [[LOR_END]]: +; CHECK-NEXT: br i1 poison, label %[[COND_END17:.*]], label %[[COND_FALSE16:.*]] +; CHECK: [[COND_FALSE16]]: +; CHECK-NEXT: br label %[[COND_END17]] +; CHECK: [[COND_END17]]: +; CHECK-NEXT: br label %[[WHILE_BODY:.*]] +; CHECK: [[WHILE_BODY]]: +; CHECK-NEXT: br label %[[WHILE_BODY]] ; entry: %p.addr.0.insert.mask = and i32 %p, -65536 @@ -1003,9 +1081,10 @@ while.body: ; select is trivially dereferenceable but may have a lower alignment than the ; load does. define i32 @test76(i1 %flag, ptr %x) { -; CHECK-LABEL: @test76( -; CHECK-NEXT: store i32 0, ptr [[X:%.*]], align 4 -; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], ptr @under_aligned, ptr [[X]] +; CHECK-LABEL: define i32 @test76( +; CHECK-SAME: i1 [[FLAG:%.*]], ptr [[X:%.*]]) { +; CHECK-NEXT: store i32 0, ptr [[X]], align 4 +; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG]], ptr @under_aligned, ptr [[X]] ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; @@ -1022,11 +1101,12 @@ declare void @scribble_on_i32(ptr) ; load does. define i32 @test77(i1 %flag, ptr %x) { -; CHECK-LABEL: @test77( +; CHECK-LABEL: define i32 @test77( +; CHECK-SAME: i1 [[FLAG:%.*]], ptr [[X:%.*]]) { ; CHECK-NEXT: [[UNDER_ALIGNED:%.*]] = alloca i32, align 1 ; CHECK-NEXT: call void @scribble_on_i32(ptr nonnull [[UNDER_ALIGNED]]) -; CHECK-NEXT: store i32 0, ptr [[X:%.*]], align 4 -; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], ptr [[UNDER_ALIGNED]], ptr [[X]] +; CHECK-NEXT: store i32 0, ptr [[X]], align 4 +; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG]], ptr [[UNDER_ALIGNED]], ptr [[X]] ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; @@ -1041,14 +1121,15 @@ define i32 @test77(i1 %flag, ptr %x) { define i32 @test78(i1 %flag, ptr %x, ptr %y, ptr %z) { ; Test that we can speculate the loads around the select even when we can't ; fold the load completely away. -; CHECK-LABEL: @test78( -; CHECK-NEXT: entry: -; CHECK-NEXT: store i32 0, ptr [[X:%.*]], align 4 -; CHECK-NEXT: store i32 0, ptr [[Y:%.*]], align 4 -; CHECK-NEXT: store i32 42, ptr [[Z:%.*]], align 4 +; CHECK-LABEL: define i32 @test78( +; CHECK-SAME: i1 [[FLAG:%.*]], ptr [[X:%.*]], ptr [[Y:%.*]], ptr [[Z:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: store i32 0, ptr [[X]], align 4 +; CHECK-NEXT: store i32 0, ptr [[Y]], align 4 +; CHECK-NEXT: store i32 42, ptr [[Z]], align 4 ; CHECK-NEXT: [[X_VAL:%.*]] = load i32, ptr [[X]], align 4 ; CHECK-NEXT: [[Y_VAL:%.*]] = load i32, ptr [[Y]], align 4 -; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i32 [[X_VAL]], i32 [[Y_VAL]] +; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG]], i32 [[X_VAL]], i32 [[Y_VAL]] ; CHECK-NEXT: ret i32 [[V]] ; entry: @@ -1064,10 +1145,11 @@ entry: ; Test that we can speculate the loads around the select even when we can't ; fold the load completely away. define i32 @test78_deref(i1 %flag, ptr dereferenceable(4) align 4 %x, ptr dereferenceable(4) align 4 %y, ptr %z) nofree nosync { -; CHECK-LABEL: @test78_deref( -; CHECK-NEXT: [[X_VAL:%.*]] = load i32, ptr [[X:%.*]], align 4 -; CHECK-NEXT: [[Y_VAL:%.*]] = load i32, ptr [[Y:%.*]], align 4 -; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i32 [[X_VAL]], i32 [[Y_VAL]] +; CHECK-LABEL: define i32 @test78_deref( +; CHECK-SAME: i1 [[FLAG:%.*]], ptr align 4 dereferenceable(4) [[X:%.*]], ptr align 4 dereferenceable(4) [[Y:%.*]], ptr [[Z:%.*]]) #[[ATTR2:[0-9]+]] { +; CHECK-NEXT: [[X_VAL:%.*]] = load i32, ptr [[X]], align 4 +; CHECK-NEXT: [[Y_VAL:%.*]] = load i32, ptr [[Y]], align 4 +; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG]], i32 [[X_VAL]], i32 [[Y_VAL]] ; CHECK-NEXT: ret i32 [[V]] ; %p = select i1 %flag, ptr %x, ptr %y @@ -1078,11 +1160,12 @@ define i32 @test78_deref(i1 %flag, ptr dereferenceable(4) align 4 %x, ptr derefe ; The same as @test78 but we can't speculate the load because it can trap ; if under-aligned. define i32 @test78_neg(i1 %flag, ptr %x, ptr %y, ptr %z) { -; CHECK-LABEL: @test78_neg( -; CHECK-NEXT: store i32 0, ptr [[X:%.*]], align 4 -; CHECK-NEXT: store i32 0, ptr [[Y:%.*]], align 4 -; CHECK-NEXT: store i32 42, ptr [[Z:%.*]], align 4 -; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], ptr [[X]], ptr [[Y]] +; CHECK-LABEL: define i32 @test78_neg( +; CHECK-SAME: i1 [[FLAG:%.*]], ptr [[X:%.*]], ptr [[Y:%.*]], ptr [[Z:%.*]]) { +; CHECK-NEXT: store i32 0, ptr [[X]], align 4 +; CHECK-NEXT: store i32 0, ptr [[Y]], align 4 +; CHECK-NEXT: store i32 42, ptr [[Z]], align 4 +; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG]], ptr [[X]], ptr [[Y]] ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P]], align 16 ; CHECK-NEXT: ret i32 [[V]] ; @@ -1098,8 +1181,9 @@ define i32 @test78_neg(i1 %flag, ptr %x, ptr %y, ptr %z) { ; The same as @test78_deref but we can't speculate the load because ; one of the arguments is not sufficiently dereferenceable. define i32 @test78_deref_neg(i1 %flag, ptr dereferenceable(2) %x, ptr dereferenceable(4) %y, ptr %z) nofree nosync { -; CHECK-LABEL: @test78_deref_neg( -; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], ptr [[X:%.*]], ptr [[Y:%.*]] +; CHECK-LABEL: define i32 @test78_deref_neg( +; CHECK-SAME: i1 [[FLAG:%.*]], ptr dereferenceable(2) [[X:%.*]], ptr dereferenceable(4) [[Y:%.*]], ptr [[Z:%.*]]) #[[ATTR2]] { +; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG]], ptr [[X]], ptr [[Y]] ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P]], align 4 ; CHECK-NEXT: ret i32 [[V]] ; @@ -1111,13 +1195,14 @@ define i32 @test78_deref_neg(i1 %flag, ptr dereferenceable(2) %x, ptr dereferenc ; Test that we can speculate the loads around the select even when we can't ; fold the load completely away. define float @test79(i1 %flag, ptr %x, ptr %y, ptr %z) { -; CHECK-LABEL: @test79( -; CHECK-NEXT: store i32 0, ptr [[X:%.*]], align 4 -; CHECK-NEXT: store i32 0, ptr [[Y:%.*]], align 4 -; CHECK-NEXT: store i32 42, ptr [[Z:%.*]], align 4 +; CHECK-LABEL: define float @test79( +; CHECK-SAME: i1 [[FLAG:%.*]], ptr [[X:%.*]], ptr [[Y:%.*]], ptr [[Z:%.*]]) { +; CHECK-NEXT: store i32 0, ptr [[X]], align 4 +; CHECK-NEXT: store i32 0, ptr [[Y]], align 4 +; CHECK-NEXT: store i32 42, ptr [[Z]], align 4 ; CHECK-NEXT: [[X_VAL:%.*]] = load float, ptr [[X]], align 4 ; CHECK-NEXT: [[Y_VAL:%.*]] = load float, ptr [[Y]], align 4 -; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], float [[X_VAL]], float [[Y_VAL]] +; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG]], float [[X_VAL]], float [[Y_VAL]] ; CHECK-NEXT: ret float [[V]] ; store i32 0, ptr %x @@ -1132,7 +1217,8 @@ define float @test79(i1 %flag, ptr %x, ptr %y, ptr %z) { ; Test that when we speculate the loads around the select they fold throug ; load->load folding and load->store folding. define i32 @test80(i1 %flag) { -; CHECK-LABEL: @test80( +; CHECK-LABEL: define i32 @test80( +; CHECK-SAME: i1 [[FLAG:%.*]]) { ; CHECK-NEXT: [[X:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[Y:%.*]] = alloca i32, align 4 ; CHECK-NEXT: call void @scribble_on_i32(ptr nonnull [[X]]) @@ -1155,7 +1241,8 @@ define i32 @test80(i1 %flag) { ; Test that we can speculate the load around the select even though they use ; differently typed pointers. define float @test81(i1 %flag) { -; CHECK-LABEL: @test81( +; CHECK-LABEL: define float @test81( +; CHECK-SAME: i1 [[FLAG:%.*]]) { ; CHECK-NEXT: [[X:%.*]] = alloca float, align 4 ; CHECK-NEXT: [[Y:%.*]] = alloca i32, align 4 ; CHECK-NEXT: call void @scribble_on_i32(ptr nonnull [[X]]) @@ -1179,7 +1266,8 @@ define float @test81(i1 %flag) { ; Test that we can speculate the load around the select even though they use ; differently typed pointers. define i32 @test82(i1 %flag) { -; CHECK-LABEL: @test82( +; CHECK-LABEL: define i32 @test82( +; CHECK-SAME: i1 [[FLAG:%.*]]) { ; CHECK-NEXT: [[X:%.*]] = alloca float, align 4 ; CHECK-NEXT: [[Y:%.*]] = alloca i32, align 4 ; CHECK-NEXT: call void @scribble_on_i32(ptr nonnull [[X]]) @@ -1206,7 +1294,8 @@ declare void @scribble_on_i128(ptr) ; Test that we can speculate the load around the select even though they use ; differently typed pointers and requires inttoptr casts. define ptr @test83(i1 %flag) { -; CHECK-LABEL: @test83( +; CHECK-LABEL: define ptr @test83( +; CHECK-SAME: i1 [[FLAG:%.*]]) { ; CHECK-NEXT: [[X:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[Y:%.*]] = alloca i64, align 8 ; CHECK-NEXT: call void @scribble_on_i64(ptr nonnull [[X]]) @@ -1230,7 +1319,8 @@ define ptr @test83(i1 %flag) { ; Test that we can speculate the load around the select even though they use ; differently typed pointers and requires a ptrtoint cast. define i64 @test84(i1 %flag) { -; CHECK-LABEL: @test84( +; CHECK-LABEL: define i64 @test84( +; CHECK-SAME: i1 [[FLAG:%.*]]) { ; CHECK-NEXT: [[X:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[Y:%.*]] = alloca i64, align 8 ; CHECK-NEXT: call void @scribble_on_i64(ptr nonnull [[X]]) @@ -1255,7 +1345,8 @@ define i64 @test84(i1 %flag) { ; pointer doesn't load all of the stored integer bits. We could fix this, but it ; would require endianness checks and other nastiness. define ptr @test85(i1 %flag) { -; CHECK-LABEL: @test85( +; CHECK-LABEL: define ptr @test85( +; CHECK-SAME: i1 [[FLAG:%.*]]) { ; CHECK-NEXT: [[X:%.*]] = alloca [2 x ptr], align 8 ; CHECK-NEXT: [[Y:%.*]] = alloca i128, align 8 ; CHECK-NEXT: call void @scribble_on_i128(ptr nonnull [[X]]) @@ -1264,7 +1355,7 @@ define ptr @test85(i1 %flag) { ; CHECK-NEXT: store i128 [[T]], ptr [[Y]], align 4 ; CHECK-NEXT: [[X_VAL:%.*]] = load ptr, ptr [[X]], align 8 ; CHECK-NEXT: [[Y_VAL:%.*]] = load ptr, ptr [[Y]], align 8 -; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], ptr [[X_VAL]], ptr [[Y_VAL]] +; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG]], ptr [[X_VAL]], ptr [[Y_VAL]] ; CHECK-NEXT: ret ptr [[V]] ; %x = alloca [2 x ptr] @@ -1282,7 +1373,8 @@ define ptr @test85(i1 %flag) { ; is larger than the pointer size. The store of the pointer doesn't store to all ; the bits of the integer. define i128 @test86(i1 %flag) { -; CHECK-LABEL: @test86( +; CHECK-LABEL: define i128 @test86( +; CHECK-SAME: i1 [[FLAG:%.*]]) { ; CHECK-NEXT: [[X:%.*]] = alloca [2 x ptr], align 8 ; CHECK-NEXT: [[Y:%.*]] = alloca i128, align 8 ; CHECK-NEXT: call void @scribble_on_i128(ptr nonnull [[X]]) @@ -1291,7 +1383,7 @@ define i128 @test86(i1 %flag) { ; CHECK-NEXT: store ptr [[T]], ptr [[Y]], align 8 ; CHECK-NEXT: [[X_VAL:%.*]] = load i128, ptr [[X]], align 4 ; CHECK-NEXT: [[Y_VAL:%.*]] = load i128, ptr [[Y]], align 4 -; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i128 [[X_VAL]], i128 [[Y_VAL]] +; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG]], i128 [[X_VAL]], i128 [[Y_VAL]] ; CHECK-NEXT: ret i128 [[V]] ; %x = alloca [2 x ptr] @@ -1306,10 +1398,11 @@ define i128 @test86(i1 %flag) { } define i32 @test_select_select0(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { -; CHECK-LABEL: @test_select_select0( -; CHECK-NEXT: [[C0_NOT:%.*]] = icmp slt i32 [[A:%.*]], [[V1:%.*]] -; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0_NOT]], i32 [[R1:%.*]], i32 [[R0:%.*]] -; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[A]], [[V2:%.*]] +; CHECK-LABEL: define i32 @test_select_select0( +; CHECK-SAME: i32 [[A:%.*]], i32 [[R0:%.*]], i32 [[R1:%.*]], i32 [[V1:%.*]], i32 [[V2:%.*]]) { +; CHECK-NEXT: [[C0_NOT:%.*]] = icmp slt i32 [[A]], [[V1]] +; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0_NOT]], i32 [[R1]], i32 [[R0]] +; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[A]], [[V2]] ; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], i32 [[S0]], i32 [[R1]] ; CHECK-NEXT: ret i32 [[S1]] ; @@ -1321,10 +1414,11 @@ define i32 @test_select_select0(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { } define i32 @test_select_select1(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { -; CHECK-LABEL: @test_select_select1( -; CHECK-NEXT: [[C0_NOT:%.*]] = icmp slt i32 [[A:%.*]], [[V1:%.*]] -; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0_NOT]], i32 [[R1:%.*]], i32 [[R0:%.*]] -; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[A]], [[V2:%.*]] +; CHECK-LABEL: define i32 @test_select_select1( +; CHECK-SAME: i32 [[A:%.*]], i32 [[R0:%.*]], i32 [[R1:%.*]], i32 [[V1:%.*]], i32 [[V2:%.*]]) { +; CHECK-NEXT: [[C0_NOT:%.*]] = icmp slt i32 [[A]], [[V1]] +; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0_NOT]], i32 [[R1]], i32 [[R0]] +; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[A]], [[V2]] ; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], i32 [[R0]], i32 [[S0]] ; CHECK-NEXT: ret i32 [[S1]] ; @@ -1336,8 +1430,9 @@ define i32 @test_select_select1(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { } define i32 @PR23757(i32 %x) { -; CHECK-LABEL: @PR23757( -; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X:%.*]], 1 +; CHECK-LABEL: define i32 @PR23757( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X]], 1 ; CHECK-NEXT: ret i32 [[ADD]] ; %cmp = icmp eq i32 %x, 2147483647 @@ -1347,7 +1442,8 @@ define i32 @PR23757(i32 %x) { } define i32 @PR23757_swapped(i32 %x) { -; CHECK-LABEL: @PR23757_swapped( +; CHECK-LABEL: define i32 @PR23757_swapped( +; CHECK-SAME: i32 [[X:%.*]]) { ; CHECK-NEXT: ret i32 -2147483648 ; %cmp = icmp eq i32 %x, 2147483647 @@ -1357,9 +1453,10 @@ define i32 @PR23757_swapped(i32 %x) { } define i32 @PR23757_ne(i32 %x, ptr %p) { -; CHECK-LABEL: @PR23757_ne( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 2147483647 -; CHECK-NEXT: store i1 [[CMP]], ptr [[P:%.*]], align 1 +; CHECK-LABEL: define i32 @PR23757_ne( +; CHECK-SAME: i32 [[X:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X]], 2147483647 +; CHECK-NEXT: store i1 [[CMP]], ptr [[P]], align 1 ; CHECK-NEXT: ret i32 -2147483648 ; %cmp = icmp ne i32 %x, 2147483647 @@ -1370,9 +1467,10 @@ define i32 @PR23757_ne(i32 %x, ptr %p) { } define i32 @PR23757_ne_swapped(i32 %x, ptr %p) { -; CHECK-LABEL: @PR23757_ne_swapped( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X:%.*]], 2147483647 -; CHECK-NEXT: store i1 [[CMP]], ptr [[P:%.*]], align 1 +; CHECK-LABEL: define i32 @PR23757_ne_swapped( +; CHECK-SAME: i32 [[X:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[X]], 2147483647 +; CHECK-NEXT: store i1 [[CMP]], ptr [[P]], align 1 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X]], 1 ; CHECK-NEXT: ret i32 [[ADD]] ; @@ -1386,8 +1484,9 @@ define i32 @PR23757_ne_swapped(i32 %x, ptr %p) { ; max(max(~a, -1), -1) --> ~min(a, 0) define i32 @PR27137(i32 %a) { -; CHECK-LABEL: @PR27137( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 0) +; CHECK-LABEL: define i32 @PR27137( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 0) ; CHECK-NEXT: [[S1:%.*]] = xor i32 [[TMP1]], -1 ; CHECK-NEXT: ret i32 [[S1]] ; @@ -1401,8 +1500,9 @@ define i32 @PR27137(i32 %a) { ; ub-safe negation pattern define i32 @PR27817(i32 %x) { -; CHECK-LABEL: @PR27817( -; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]] +; CHECK-LABEL: define i32 @PR27817( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X]] ; CHECK-NEXT: ret i32 [[SUB]] ; %cmp = icmp eq i32 %x, -2147483648 @@ -1412,8 +1512,9 @@ define i32 @PR27817(i32 %x) { } define i32 @PR27817_nsw(i32 %x) { -; CHECK-LABEL: @PR27817_nsw( -; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]] +; CHECK-LABEL: define i32 @PR27817_nsw( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X]] ; CHECK-NEXT: ret i32 [[SUB]] ; %cmp = icmp eq i32 %x, -2147483648 @@ -1423,8 +1524,9 @@ define i32 @PR27817_nsw(i32 %x) { } define <2 x i32> @PR27817_nsw_vec(<2 x i32> %x) { -; CHECK-LABEL: @PR27817_nsw_vec( -; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> zeroinitializer, [[X:%.*]] +; CHECK-LABEL: define <2 x i32> @PR27817_nsw_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> zeroinitializer, [[X]] ; CHECK-NEXT: ret <2 x i32> [[SUB]] ; %cmp = icmp eq <2 x i32> %x, <i32 -2147483648, i32 -2147483648> @@ -1434,8 +1536,9 @@ define <2 x i32> @PR27817_nsw_vec(<2 x i32> %x) { } define i32 @select_icmp_slt0_xor(i32 %x) { -; CHECK-LABEL: @select_icmp_slt0_xor( -; CHECK-NEXT: [[X_XOR:%.*]] = or i32 [[X:%.*]], -2147483648 +; CHECK-LABEL: define i32 @select_icmp_slt0_xor( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[X_XOR:%.*]] = or i32 [[X]], -2147483648 ; CHECK-NEXT: ret i32 [[X_XOR]] ; %cmp = icmp slt i32 %x, zeroinitializer @@ -1445,8 +1548,9 @@ define i32 @select_icmp_slt0_xor(i32 %x) { } define <2 x i32> @select_icmp_slt0_xor_vec(<2 x i32> %x) { -; CHECK-LABEL: @select_icmp_slt0_xor_vec( -; CHECK-NEXT: [[X_XOR:%.*]] = or <2 x i32> [[X:%.*]], splat (i32 -2147483648) +; CHECK-LABEL: define <2 x i32> @select_icmp_slt0_xor_vec( +; CHECK-SAME: <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[X_XOR:%.*]] = or <2 x i32> [[X]], splat (i32 -2147483648) ; CHECK-NEXT: ret <2 x i32> [[X_XOR]] ; %cmp = icmp slt <2 x i32> %x, zeroinitializer @@ -1456,8 +1560,9 @@ define <2 x i32> @select_icmp_slt0_xor_vec(<2 x i32> %x) { } define <4 x i32> @canonicalize_to_shuffle(<4 x i32> %a, <4 x i32> %b) { -; CHECK-LABEL: @canonicalize_to_shuffle( -; CHECK-NEXT: [[SEL:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> <i32 0, i32 5, i32 6, i32 3> +; CHECK-LABEL: define <4 x i32> @canonicalize_to_shuffle( +; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 0, i32 5, i32 6, i32 3> ; CHECK-NEXT: ret <4 x i32> [[SEL]] ; %sel = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> %a, <4 x i32> %b @@ -1469,8 +1574,9 @@ define <4 x i32> @canonicalize_to_shuffle(<4 x i32> %a, <4 x i32> %b) { ; https://bugs.llvm.org/show_bug.cgi?id=32486 define <4 x i32> @undef_elts_in_condition(<4 x i32> %a, <4 x i32> %b) { -; CHECK-LABEL: @undef_elts_in_condition( -; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]] +; CHECK-LABEL: define <4 x i32> @undef_elts_in_condition( +; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> [[A]], <4 x i32> [[B]] ; CHECK-NEXT: ret <4 x i32> [[SEL]] ; %sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> %a, <4 x i32> %b @@ -1482,8 +1588,9 @@ define <4 x i32> @undef_elts_in_condition(<4 x i32> %a, <4 x i32> %b) { @g = global i32 0 define <4 x i32> @cannot_canonicalize_to_shuffle1(<4 x i32> %a, <4 x i32> %b) { -; CHECK-LABEL: @cannot_canonicalize_to_shuffle1( -; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> bitcast (i4 ptrtoint (ptr @g to i4) to <4 x i1>), <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]] +; CHECK-LABEL: define <4 x i32> @cannot_canonicalize_to_shuffle1( +; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> bitcast (i4 ptrtoint (ptr @g to i4) to <4 x i1>), <4 x i32> [[A]], <4 x i32> [[B]] ; CHECK-NEXT: ret <4 x i32> [[SEL]] ; %sel = select <4 x i1> bitcast (i4 ptrtoint (ptr @g to i4) to <4 x i1>), <4 x i32> %a, <4 x i32> %b @@ -1491,8 +1598,9 @@ define <4 x i32> @cannot_canonicalize_to_shuffle1(<4 x i32> %a, <4 x i32> %b) { } define <4 x i32> @cannot_canonicalize_to_shuffle2(<4 x i32> %a, <4 x i32> %b) { -; CHECK-LABEL: @cannot_canonicalize_to_shuffle2( -; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 ptrtoint (ptr @g to i1)>, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]] +; CHECK-LABEL: define <4 x i32> @cannot_canonicalize_to_shuffle2( +; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 ptrtoint (ptr @g to i1)>, <4 x i32> [[A]], <4 x i32> [[B]] ; CHECK-NEXT: ret <4 x i32> [[SEL]] ; %sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 ptrtoint (ptr @g to i1)>, <4 x i32> %a, <4 x i32> %b @@ -1502,9 +1610,10 @@ define <4 x i32> @cannot_canonicalize_to_shuffle2(<4 x i32> %a, <4 x i32> %b) { declare void @llvm.assume(i1) define i8 @assume_cond_true(i1 %cond, i8 %x, i8 %y) { -; CHECK-LABEL: @assume_cond_true( -; CHECK-NEXT: call void @llvm.assume(i1 [[COND:%.*]]) -; CHECK-NEXT: ret i8 [[X:%.*]] +; CHECK-LABEL: define i8 @assume_cond_true( +; CHECK-SAME: i1 [[COND:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: call void @llvm.assume(i1 [[COND]]) +; CHECK-NEXT: ret i8 [[X]] ; call void @llvm.assume(i1 %cond) %sel = select i1 %cond, i8 %x, i8 %y @@ -1514,10 +1623,11 @@ define i8 @assume_cond_true(i1 %cond, i8 %x, i8 %y) { ; computeKnownBitsFromAssume() understands the 'not' of an assumed condition. define i8 @assume_cond_false(i1 %cond, i8 %x, i8 %y) { -; CHECK-LABEL: @assume_cond_false( -; CHECK-NEXT: [[NOTCOND:%.*]] = xor i1 [[COND:%.*]], true +; CHECK-LABEL: define i8 @assume_cond_false( +; CHECK-SAME: i1 [[COND:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[NOTCOND:%.*]] = xor i1 [[COND]], true ; CHECK-NEXT: call void @llvm.assume(i1 [[NOTCOND]]) -; CHECK-NEXT: ret i8 [[Y:%.*]] +; CHECK-NEXT: ret i8 [[Y]] ; %notcond = xor i1 %cond, true call void @llvm.assume(i1 %notcond) @@ -1527,9 +1637,10 @@ define i8 @assume_cond_false(i1 %cond, i8 %x, i8 %y) { ; Test case to make sure we don't consider an all ones float values for converting the select into a sext. define <4 x float> @PR33721(<4 x float> %w) { -; CHECK-LABEL: @PR33721( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = fcmp ole <4 x float> [[W:%.*]], zeroinitializer +; CHECK-LABEL: define <4 x float> @PR33721( +; CHECK-SAME: <4 x float> [[W:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[TMP0:%.*]] = fcmp ole <4 x float> [[W]], zeroinitializer ; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[TMP0]], <4 x float> splat (float 0xFFFFFFFFE0000000), <4 x float> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[TMP1]] ; @@ -1541,9 +1652,10 @@ entry: ; select(C, binop(select(C, X, Y), W), Z) -> select(C, binop(X, W), Z) define i8 @test87(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @test87( -; CHECK-NEXT: [[B:%.*]] = add i8 [[X:%.*]], [[W:%.*]] -; CHECK-NEXT: [[C:%.*]] = select i1 [[COND:%.*]], i8 [[B]], i8 [[Z:%.*]] +; CHECK-LABEL: define i8 @test87( +; CHECK-SAME: i1 [[COND:%.*]], i8 [[W:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = add i8 [[X]], [[W]] +; CHECK-NEXT: [[C:%.*]] = select i1 [[COND]], i8 [[B]], i8 [[Z]] ; CHECK-NEXT: ret i8 [[C]] ; %a = select i1 %cond, i8 %x, i8 %y @@ -1554,9 +1666,10 @@ define i8 @test87(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { ; select(C, binop(select(C, X, Y), W), Z) -> select(C, Z, binop(Y, W)) define i8 @test88(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @test88( -; CHECK-NEXT: [[B:%.*]] = sub i8 [[Y:%.*]], [[W:%.*]] -; CHECK-NEXT: [[C:%.*]] = select i1 [[COND:%.*]], i8 [[Z:%.*]], i8 [[B]] +; CHECK-LABEL: define i8 @test88( +; CHECK-SAME: i1 [[COND:%.*]], i8 [[W:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = sub i8 [[Y]], [[W]] +; CHECK-NEXT: [[C:%.*]] = select i1 [[COND]], i8 [[Z]], i8 [[B]] ; CHECK-NEXT: ret i8 [[C]] ; %a = select i1 %cond, i8 %x, i8 %y @@ -1567,9 +1680,10 @@ define i8 @test88(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { ; select(C, Z, binop(W, select(C, X, Y))) -> select(C, binop(X, W), Z) define i8 @test89(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @test89( -; CHECK-NEXT: [[B:%.*]] = and i8 [[W:%.*]], [[X:%.*]] -; CHECK-NEXT: [[C:%.*]] = select i1 [[COND:%.*]], i8 [[B]], i8 [[Z:%.*]] +; CHECK-LABEL: define i8 @test89( +; CHECK-SAME: i1 [[COND:%.*]], i8 [[W:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = and i8 [[W]], [[X]] +; CHECK-NEXT: [[C:%.*]] = select i1 [[COND]], i8 [[B]], i8 [[Z]] ; CHECK-NEXT: ret i8 [[C]] ; %a = select i1 %cond, i8 %x, i8 %y @@ -1580,9 +1694,10 @@ define i8 @test89(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { ; select(C, Z, binop(W, select(C, X, Y))) -> select(C, Z, binop(W, Y)) define i8 @test90(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @test90( -; CHECK-NEXT: [[B:%.*]] = or i8 [[W:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[C:%.*]] = select i1 [[COND:%.*]], i8 [[Z:%.*]], i8 [[B]] +; CHECK-LABEL: define i8 @test90( +; CHECK-SAME: i1 [[COND:%.*]], i8 [[W:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[B:%.*]] = or i8 [[W]], [[Y]] +; CHECK-NEXT: [[C:%.*]] = select i1 [[COND]], i8 [[Z]], i8 [[B]] ; CHECK-NEXT: ret i8 [[C]] ; %a = select i1 %cond, i8 %x, i8 %y @@ -1592,8 +1707,9 @@ define i8 @test90(i1 %cond, i8 %w, i8 %x, i8 %y, i8 %z) { } define i32 @test_shl_zext_bool(i1 %t) { -; CHECK-LABEL: @test_shl_zext_bool( -; CHECK-NEXT: [[R:%.*]] = select i1 [[T:%.*]], i32 4, i32 0 +; CHECK-LABEL: define i32 @test_shl_zext_bool( +; CHECK-SAME: i1 [[T:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select i1 [[T]], i32 4, i32 0 ; CHECK-NEXT: ret i32 [[R]] ; %r = select i1 %t, i32 4, i32 0 @@ -1601,8 +1717,9 @@ define i32 @test_shl_zext_bool(i1 %t) { } define <2 x i32> @test_shl_zext_bool_splat(<2 x i1> %t) { -; CHECK-LABEL: @test_shl_zext_bool_splat( -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> splat (i32 8), <2 x i32> zeroinitializer +; CHECK-LABEL: define <2 x i32> @test_shl_zext_bool_splat( +; CHECK-SAME: <2 x i1> [[T:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[T]], <2 x i32> splat (i32 8), <2 x i32> zeroinitializer ; CHECK-NEXT: ret <2 x i32> [[R]] ; %r = select <2 x i1> %t, <2 x i32> <i32 8, i32 8>, <2 x i32> zeroinitializer @@ -1610,8 +1727,9 @@ define <2 x i32> @test_shl_zext_bool_splat(<2 x i1> %t) { } define <2 x i32> @test_shl_zext_bool_vec(<2 x i1> %t) { -; CHECK-LABEL: @test_shl_zext_bool_vec( -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> <i32 4, i32 8>, <2 x i32> zeroinitializer +; CHECK-LABEL: define <2 x i32> @test_shl_zext_bool_vec( +; CHECK-SAME: <2 x i1> [[T:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[T]], <2 x i32> <i32 4, i32 8>, <2 x i32> zeroinitializer ; CHECK-NEXT: ret <2 x i32> [[R]] ; %r = select <2 x i1> %t, <2 x i32> <i32 4, i32 8>, <2 x i32> zeroinitializer @@ -1619,8 +1737,9 @@ define <2 x i32> @test_shl_zext_bool_vec(<2 x i1> %t) { } define float @copysign1(float %x) { -; CHECK-LABEL: @copysign1( -; CHECK-NEXT: [[R:%.*]] = call float @llvm.copysign.f32(float 1.000000e+00, float [[X:%.*]]) +; CHECK-LABEL: define float @copysign1( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = call float @llvm.copysign.f32(float 1.000000e+00, float [[X]]) ; CHECK-NEXT: ret float [[R]] ; %i = bitcast float %x to i32 @@ -1630,8 +1749,9 @@ define float @copysign1(float %x) { } define float @copysign1_fmf(float %x) { -; CHECK-LABEL: @copysign1_fmf( -; CHECK-NEXT: [[R:%.*]] = call float @llvm.copysign.f32(float 1.000000e+00, float [[X:%.*]]) +; CHECK-LABEL: define float @copysign1_fmf( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = call float @llvm.copysign.f32(float 1.000000e+00, float [[X]]) ; CHECK-NEXT: ret float [[R]] ; %i = bitcast float %x to i32 @@ -1641,8 +1761,9 @@ define float @copysign1_fmf(float %x) { } define <2 x float> @copysign2(<2 x float> %x) { -; CHECK-LABEL: @copysign2( -; CHECK-NEXT: [[TMP1:%.*]] = fneg <2 x float> [[X:%.*]] +; CHECK-LABEL: define <2 x float> @copysign2( +; CHECK-SAME: <2 x float> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = fneg <2 x float> [[X]] ; CHECK-NEXT: [[R:%.*]] = call <2 x float> @llvm.copysign.v2f32(<2 x float> splat (float 4.200000e+01), <2 x float> [[TMP1]]) ; CHECK-NEXT: ret <2 x float> [[R]] ; @@ -1653,8 +1774,9 @@ define <2 x float> @copysign2(<2 x float> %x) { } define float @copysign3(float %x) { -; CHECK-LABEL: @copysign3( -; CHECK-NEXT: [[TMP1:%.*]] = fneg float [[X:%.*]] +; CHECK-LABEL: define float @copysign3( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = fneg float [[X]] ; CHECK-NEXT: [[R:%.*]] = call float @llvm.copysign.f32(float 4.300000e+01, float [[TMP1]]) ; CHECK-NEXT: ret float [[R]] ; @@ -1665,8 +1787,9 @@ define float @copysign3(float %x) { } define <2 x float> @copysign_vec_poison(<2 x float> %x) { -; CHECK-LABEL: @copysign_vec_poison( -; CHECK-NEXT: [[TMP1:%.*]] = fneg <2 x float> [[X:%.*]] +; CHECK-LABEL: define <2 x float> @copysign_vec_poison( +; CHECK-SAME: <2 x float> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = fneg <2 x float> [[X]] ; CHECK-NEXT: [[R:%.*]] = call <2 x float> @llvm.copysign.v2f32(<2 x float> splat (float 4.200000e+01), <2 x float> [[TMP1]]) ; CHECK-NEXT: ret <2 x float> [[R]] ; @@ -1677,8 +1800,9 @@ define <2 x float> @copysign_vec_poison(<2 x float> %x) { } define <2 x float> @copysign_vec_poison1(<2 x float> %x) { -; CHECK-LABEL: @copysign_vec_poison1( -; CHECK-NEXT: [[R:%.*]] = call <2 x float> @llvm.copysign.v2f32(<2 x float> splat (float 4.200000e+01), <2 x float> [[X:%.*]]) +; CHECK-LABEL: define <2 x float> @copysign_vec_poison1( +; CHECK-SAME: <2 x float> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = call <2 x float> @llvm.copysign.v2f32(<2 x float> splat (float 4.200000e+01), <2 x float> [[X]]) ; CHECK-NEXT: ret <2 x float> [[R]] ; %i = bitcast <2 x float> %x to <2 x i32> @@ -1688,8 +1812,9 @@ define <2 x float> @copysign_vec_poison1(<2 x float> %x) { } define <2 x float> @copysign_vec_poison3(<2 x float> %x) { -; CHECK-LABEL: @copysign_vec_poison3( -; CHECK-NEXT: [[R:%.*]] = call <2 x float> @llvm.copysign.v2f32(<2 x float> splat (float 4.200000e+01), <2 x float> [[X:%.*]]) +; CHECK-LABEL: define <2 x float> @copysign_vec_poison3( +; CHECK-SAME: <2 x float> [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = call <2 x float> @llvm.copysign.v2f32(<2 x float> splat (float 4.200000e+01), <2 x float> [[X]]) ; CHECK-NEXT: ret <2 x float> [[R]] ; %i = bitcast <2 x float> %x to <2 x i32> @@ -1703,8 +1828,9 @@ declare void @use1(i1) ; Negative test define float @copysign_extra_use(float %x) { -; CHECK-LABEL: @copysign_extra_use( -; CHECK-NEXT: [[I:%.*]] = bitcast float [[X:%.*]] to i32 +; CHECK-LABEL: define float @copysign_extra_use( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[I:%.*]] = bitcast float [[X]] to i32 ; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[I]], 0 ; CHECK-NEXT: call void @use1(i1 [[ISNEG]]) ; CHECK-NEXT: [[R:%.*]] = select i1 [[ISNEG]], float -4.400000e+01, float 4.400000e+01 @@ -1720,8 +1846,9 @@ define float @copysign_extra_use(float %x) { ; Negative test define float @copysign_type_mismatch(double %x) { -; CHECK-LABEL: @copysign_type_mismatch( -; CHECK-NEXT: [[I:%.*]] = bitcast double [[X:%.*]] to i64 +; CHECK-LABEL: define float @copysign_type_mismatch( +; CHECK-SAME: double [[X:%.*]]) { +; CHECK-NEXT: [[I:%.*]] = bitcast double [[X]] to i64 ; CHECK-NEXT: [[ISPOS:%.*]] = icmp sgt i64 [[I]], -1 ; CHECK-NEXT: [[R:%.*]] = select i1 [[ISPOS]], float 1.000000e+00, float -1.000000e+00 ; CHECK-NEXT: ret float [[R]] @@ -1735,8 +1862,9 @@ define float @copysign_type_mismatch(double %x) { ; Negative test define <2 x float> @copysign_type_mismatch2(<2 x float> %x) { -; CHECK-LABEL: @copysign_type_mismatch2( -; CHECK-NEXT: [[I:%.*]] = bitcast <2 x float> [[X:%.*]] to i64 +; CHECK-LABEL: define <2 x float> @copysign_type_mismatch2( +; CHECK-SAME: <2 x float> [[X:%.*]]) { +; CHECK-NEXT: [[I:%.*]] = bitcast <2 x float> [[X]] to i64 ; CHECK-NEXT: [[ISPOS:%.*]] = icmp sgt i64 [[I]], -1 ; CHECK-NEXT: [[R:%.*]] = select i1 [[ISPOS]], <2 x float> splat (float 1.000000e+00), <2 x float> splat (float -1.000000e+00) ; CHECK-NEXT: ret <2 x float> [[R]] @@ -1750,8 +1878,9 @@ define <2 x float> @copysign_type_mismatch2(<2 x float> %x) { ; Negative test define float @copysign_wrong_cmp(float %x) { -; CHECK-LABEL: @copysign_wrong_cmp( -; CHECK-NEXT: [[I:%.*]] = bitcast float [[X:%.*]] to i32 +; CHECK-LABEL: define float @copysign_wrong_cmp( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[I:%.*]] = bitcast float [[X]] to i32 ; CHECK-NEXT: [[ISPOS:%.*]] = icmp sgt i32 [[I]], 0 ; CHECK-NEXT: [[R:%.*]] = select i1 [[ISPOS]], float 1.000000e+00, float -1.000000e+00 ; CHECK-NEXT: ret float [[R]] @@ -1765,8 +1894,9 @@ define float @copysign_wrong_cmp(float %x) { ; Negative test define float @copysign_wrong_const(float %x) { -; CHECK-LABEL: @copysign_wrong_const( -; CHECK-NEXT: [[I:%.*]] = bitcast float [[X:%.*]] to i32 +; CHECK-LABEL: define float @copysign_wrong_const( +; CHECK-SAME: float [[X:%.*]]) { +; CHECK-NEXT: [[I:%.*]] = bitcast float [[X]] to i32 ; CHECK-NEXT: [[ISPOS:%.*]] = icmp sgt i32 [[I]], -1 ; CHECK-NEXT: [[R:%.*]] = select i1 [[ISPOS]], float 2.000000e+00, float -1.000000e+00 ; CHECK-NEXT: ret float [[R]] @@ -1779,15 +1909,16 @@ define float @copysign_wrong_const(float %x) { ; TODO: we can replace select with a Phi. define i32 @select_dominating_cond(i1 %cond, i32 %x, i32 %y) { -; CHECK-LABEL: @select_dominating_cond( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[Y:%.*]], [[IF_FALSE]] ], [ [[X:%.*]], [[IF_TRUE]] ] +; CHECK-LABEL: define i32 @select_dominating_cond( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[Y]], %[[IF_FALSE]] ], [ [[X]], %[[IF_TRUE]] ] ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -1805,15 +1936,16 @@ merge: } define i32 @select_dominating_inverted(i1 %cond, i32 %x, i32 %y) { -; CHECK-LABEL: @select_dominating_inverted( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_FALSE:%.*]], label [[IF_TRUE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X:%.*]], [[IF_FALSE]] ], [ [[Y:%.*]], [[IF_TRUE]] ] +; CHECK-LABEL: define i32 @select_dominating_inverted( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_FALSE:.*]], label %[[IF_TRUE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X]], %[[IF_FALSE]] ], [ [[Y]], %[[IF_TRUE]] ] ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -1833,23 +1965,24 @@ merge: ; More complex CFG: the block with select has multiple predecessors. define i32 @select_dominating_cond_multiple_preds(i1 %cond, i1 %cond2, i1 %cond3, i32 %x, i32 %y) { -; CHECK-LABEL: @select_dominating_cond_multiple_preds( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF_TRUE_1:%.*]], label [[IF_TRUE_2:%.*]] -; CHECK: if.true.1: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.true.2: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: if.false: -; CHECK-NEXT: br i1 [[COND3:%.*]], label [[IF_FALSE_1:%.*]], label [[EXIT:%.*]] -; CHECK: if.false.1: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[Y:%.*]], [[IF_FALSE_1]] ], [ [[X:%.*]], [[IF_TRUE_2]] ], [ [[X]], [[IF_TRUE_1]] ] +; CHECK-LABEL: define i32 @select_dominating_cond_multiple_preds( +; CHECK-SAME: i1 [[COND:%.*]], i1 [[COND2:%.*]], i1 [[COND3:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br i1 [[COND2]], label %[[IF_TRUE_1:.*]], label %[[IF_TRUE_2:.*]] +; CHECK: [[IF_TRUE_1]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_TRUE_2]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br i1 [[COND3]], label %[[IF_FALSE_1:.*]], label %[[EXIT:.*]] +; CHECK: [[IF_FALSE_1]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[Y]], %[[IF_FALSE_1]] ], [ [[X]], %[[IF_TRUE_2]] ], [ [[X]], %[[IF_TRUE_1]] ] ; CHECK-NEXT: ret i32 [[S]] -; CHECK: exit: +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 0 ; entry: @@ -1880,23 +2013,24 @@ exit: ; More complex CFG for inverted case: the block with select has multiple predecessors. define i32 @select_dominating_cond_inverted_multiple_preds(i1 %cond, i1 %cond2, i1 %cond3, i32 %x, i32 %y) { -; CHECK-LABEL: @select_dominating_cond_inverted_multiple_preds( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_FALSE:%.*]], label [[IF_TRUE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF_TRUE_1:%.*]], label [[IF_TRUE_2:%.*]] -; CHECK: if.true.1: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.true.2: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: if.false: -; CHECK-NEXT: br i1 [[COND3:%.*]], label [[IF_FALSE_1:%.*]], label [[EXIT:%.*]] -; CHECK: if.false.1: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X:%.*]], [[IF_FALSE_1]] ], [ [[Y:%.*]], [[IF_TRUE_2]] ], [ [[Y]], [[IF_TRUE_1]] ] +; CHECK-LABEL: define i32 @select_dominating_cond_inverted_multiple_preds( +; CHECK-SAME: i1 [[COND:%.*]], i1 [[COND2:%.*]], i1 [[COND3:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_FALSE:.*]], label %[[IF_TRUE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br i1 [[COND2]], label %[[IF_TRUE_1:.*]], label %[[IF_TRUE_2:.*]] +; CHECK: [[IF_TRUE_1]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_TRUE_2]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br i1 [[COND3]], label %[[IF_FALSE_1:.*]], label %[[EXIT:.*]] +; CHECK: [[IF_FALSE_1]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X]], %[[IF_FALSE_1]] ], [ [[Y]], %[[IF_TRUE_2]] ], [ [[Y]], %[[IF_TRUE_1]] ] ; CHECK-NEXT: ret i32 [[S]] -; CHECK: exit: +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 0 ; entry: @@ -1928,25 +2062,26 @@ exit: ; More complex CFG for inverted case: the block with select has multiple predecessors that can duplicate. define i32 @select_dominating_cond_inverted_multiple_duplicating_preds(i1 %cond, i32 %cond2, i1 %cond3, i32 %x, i32 %y) { -; CHECK-LABEL: @select_dominating_cond_inverted_multiple_duplicating_preds( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_FALSE:%.*]], label [[IF_TRUE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: switch i32 [[COND2:%.*]], label [[SWITCH_CASE_1:%.*]] [ -; CHECK-NEXT: i32 1, label [[MERGE:%.*]] -; CHECK-NEXT: i32 2, label [[MERGE]] -; CHECK-NEXT: i32 3, label [[MERGE]] +; CHECK-LABEL: define i32 @select_dominating_cond_inverted_multiple_duplicating_preds( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[COND2:%.*]], i1 [[COND3:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_FALSE:.*]], label %[[IF_TRUE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: switch i32 [[COND2]], label %[[SWITCH_CASE_1:.*]] [ +; CHECK-NEXT: i32 1, label %[[MERGE:.*]] +; CHECK-NEXT: i32 2, label %[[MERGE]] +; CHECK-NEXT: i32 3, label %[[MERGE]] ; CHECK-NEXT: ] -; CHECK: switch.case.1: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: if.false: -; CHECK-NEXT: br i1 [[COND3:%.*]], label [[IF_FALSE_1:%.*]], label [[EXIT:%.*]] -; CHECK: if.false.1: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X:%.*]], [[IF_FALSE_1]] ], [ [[Y:%.*]], [[SWITCH_CASE_1]] ], [ [[Y]], [[IF_TRUE]] ], [ [[Y]], [[IF_TRUE]] ], [ [[Y]], [[IF_TRUE]] ] +; CHECK: [[SWITCH_CASE_1]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br i1 [[COND3]], label %[[IF_FALSE_1:.*]], label %[[EXIT:.*]] +; CHECK: [[IF_FALSE_1]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X]], %[[IF_FALSE_1]] ], [ [[Y]], %[[SWITCH_CASE_1]] ], [ [[Y]], %[[IF_TRUE]] ], [ [[Y]], %[[IF_TRUE]] ], [ [[Y]], %[[IF_TRUE]] ] ; CHECK-NEXT: ret i32 [[S]] -; CHECK: exit: +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 0 ; entry: @@ -1979,17 +2114,18 @@ exit: ; Negative test: currently we take condition from IDom, but might be willing to expand it in the future. define i32 @select_not_imm_dominating_cond_neg(i1 %cond, i32 %x, i32 %y) { -; CHECK-LABEL: @select_not_imm_dominating_cond_neg( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: br label [[EXIT:%.*]] -; CHECK: exit: -; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], i32 [[X:%.*]], i32 [[Y:%.*]] +; CHECK-LABEL: define i32 @select_not_imm_dominating_cond_neg( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: br label %[[EXIT:.*]] +; CHECK: [[EXIT]]: +; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], i32 [[X]], i32 [[Y]] ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -2011,27 +2147,28 @@ exit: ; Shows how we can leverage dominance to eliminate duplicating selects. define i32 @select_dominance_chain(i1 %cond, i32 %x, i32 %y) { -; CHECK-LABEL: @select_dominance_chain( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE_1:%.*]], label [[IF_FALSE_1:%.*]] -; CHECK: if.true.1: -; CHECK-NEXT: br label [[MERGE_1:%.*]] -; CHECK: if.false.1: -; CHECK-NEXT: br label [[MERGE_1]] -; CHECK: merge.1: -; CHECK-NEXT: br i1 [[COND]], label [[IF_TRUE_2:%.*]], label [[IF_FALSE_2:%.*]] -; CHECK: if.true.2: -; CHECK-NEXT: br label [[MERGE_2:%.*]] -; CHECK: if.false.2: -; CHECK-NEXT: br label [[MERGE_2]] -; CHECK: merge.2: -; CHECK-NEXT: br i1 [[COND]], label [[IF_TRUE_3:%.*]], label [[IF_FALSE_3:%.*]] -; CHECK: if.true.3: -; CHECK-NEXT: br label [[MERGE_3:%.*]] -; CHECK: if.false.3: -; CHECK-NEXT: br label [[MERGE_3]] -; CHECK: merge.3: -; CHECK-NEXT: [[S_1:%.*]] = phi i32 [ [[Y:%.*]], [[IF_FALSE_3]] ], [ [[X:%.*]], [[IF_TRUE_3]] ] +; CHECK-LABEL: define i32 @select_dominance_chain( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE_1:.*]], label %[[IF_FALSE_1:.*]] +; CHECK: [[IF_TRUE_1]]: +; CHECK-NEXT: br label %[[MERGE_1:.*]] +; CHECK: [[IF_FALSE_1]]: +; CHECK-NEXT: br label %[[MERGE_1]] +; CHECK: [[MERGE_1]]: +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE_2:.*]], label %[[IF_FALSE_2:.*]] +; CHECK: [[IF_TRUE_2]]: +; CHECK-NEXT: br label %[[MERGE_2:.*]] +; CHECK: [[IF_FALSE_2]]: +; CHECK-NEXT: br label %[[MERGE_2]] +; CHECK: [[MERGE_2]]: +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE_3:.*]], label %[[IF_FALSE_3:.*]] +; CHECK: [[IF_TRUE_3]]: +; CHECK-NEXT: br label %[[MERGE_3:.*]] +; CHECK: [[IF_FALSE_3]]: +; CHECK-NEXT: br label %[[MERGE_3]] +; CHECK: [[MERGE_3]]: +; CHECK-NEXT: [[S_1:%.*]] = phi i32 [ [[Y]], %[[IF_FALSE_3]] ], [ [[X]], %[[IF_TRUE_3]] ] ; CHECK-NEXT: [[SUM_2:%.*]] = mul i32 [[S_1]], 3 ; CHECK-NEXT: ret i32 [[SUM_2]] ; @@ -2074,15 +2211,16 @@ merge.3: ; TODO: We can replace select with a Phi and then sink a and b to respective ; branches. define i32 @select_dominating_cond_and_sink(i1 %cond, i32 %x, i32 %y) { -; CHECK-LABEL: @select_dominating_cond_and_sink( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[B:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @select_dominating_cond_and_sink( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[B:%.*]] = mul i32 [[X]], [[Y]] ; CHECK-NEXT: [[A:%.*]] = add i32 [[X]], [[Y]] ; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]] ; CHECK-NEXT: ret i32 [[S]] @@ -2104,11 +2242,12 @@ merge: } define i32 @select_dominating_cond_same_labels(i1 %cond) { -; CHECK-LABEL: @select_dominating_cond_same_labels( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[EXIT]] -; CHECK: exit: -; CHECK-NEXT: [[RESULT:%.*]] = select i1 [[COND:%.*]], i32 123, i32 456 +; CHECK-LABEL: define i32 @select_dominating_cond_same_labels( +; CHECK-SAME: i1 [[COND:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[EXIT]] +; CHECK: [[EXIT]]: +; CHECK-NEXT: [[RESULT:%.*]] = select i1 [[COND]], i32 123, i32 456 ; CHECK-NEXT: ret i32 [[RESULT]] ; entry: @@ -2119,15 +2258,16 @@ exit: } define i32 @select_phi_same_condition(i1 %cond, i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @select_phi_same_condition( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X:%.*]], [[IF_TRUE]] ], [ [[Z:%.*]], [[IF_FALSE]] ] +; CHECK-LABEL: define i32 @select_phi_same_condition( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X]], %[[IF_TRUE]] ], [ [[Z]], %[[IF_FALSE]] ] ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -2148,17 +2288,18 @@ merge: ; TODO: Replace with phi[a, c] and sink them to respective branches. define i32 @select_phi_same_condition_sink(i1 %cond, i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @select_phi_same_condition_sink( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: [[B:%.*]] = mul i32 [[X:%.*]], [[Z:%.*]] -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, [[IF_TRUE]] ], [ [[B]], [[IF_FALSE]] ] -; CHECK-NEXT: [[A:%.*]] = add i32 [[X]], [[Y:%.*]] +; CHECK-LABEL: define i32 @select_phi_same_condition_sink( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: [[B:%.*]] = mul i32 [[X]], [[Z]] +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, %[[IF_TRUE]] ], [ [[B]], %[[IF_FALSE]] ] +; CHECK-NEXT: [[A:%.*]] = add i32 [[X]], [[Y]] ; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[PHI]] ; CHECK-NEXT: ret i32 [[S]] ; @@ -2183,14 +2324,15 @@ declare i32 @__gxx_personality_v0(...) declare i1 @foo() define i32 @test_invoke_neg(i32 %x, i32 %y) nounwind uwtable ssp personality ptr @__gxx_personality_v0 { -; CHECK-LABEL: @test_invoke_neg( -; CHECK-NEXT: entry: +; CHECK-LABEL: define i32 @test_invoke_neg( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR4:[0-9]+]] personality ptr @__gxx_personality_v0 { +; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: [[COND:%.*]] = invoke i1 @foo() -; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] -; CHECK: invoke.cont: -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[X:%.*]], i32 [[Y:%.*]] +; CHECK-NEXT: to label %[[INVOKE_CONT:.*]] unwind label %[[LPAD:.*]] +; CHECK: [[INVOKE_CONT]]: +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[X]], i32 [[Y]] ; CHECK-NEXT: ret i32 [[SEL]] -; CHECK: lpad: +; CHECK: [[LPAD]]: ; CHECK-NEXT: [[LP:%.*]] = landingpad { i1, i32 } ; CHECK-NEXT: filter [0 x i1] zeroinitializer ; CHECK-NEXT: unreachable @@ -2212,19 +2354,20 @@ lpad: declare i32 @bar() define i32 @test_invoke_2_neg(i1 %cond, i32 %x, i32 %y) nounwind uwtable ssp personality ptr @__gxx_personality_v0 { -; CHECK-LABEL: @test_invoke_2_neg( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: +; CHECK-LABEL: define i32 @test_invoke_2_neg( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR4]] personality ptr @__gxx_personality_v0 { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: ; CHECK-NEXT: [[RESULT:%.*]] = invoke i32 @bar() -; CHECK-NEXT: to label [[MERGE]] unwind label [[LPAD:%.*]] -; CHECK: merge: -; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, [[IF_TRUE]] ], [ [[RESULT]], [[IF_FALSE]] ] +; CHECK-NEXT: to label %[[MERGE]] unwind label %[[LPAD:.*]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 0, %[[IF_TRUE]] ], [ [[RESULT]], %[[IF_FALSE]] ] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 1, i32 [[PHI]] ; CHECK-NEXT: ret i32 [[SEL]] -; CHECK: lpad: +; CHECK: [[LPAD]]: ; CHECK-NEXT: [[LP:%.*]] = landingpad { i1, i32 } ; CHECK-NEXT: filter [0 x i1] zeroinitializer ; CHECK-NEXT: unreachable @@ -2251,20 +2394,21 @@ lpad: } define i32 @select_phi_same_condition_switch(i1 %cond, i32 %x, i32 %y) { -; CHECK-LABEL: @select_phi_same_condition_switch( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: switch i32 [[X:%.*]], label [[EXIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[MERGE:%.*]] -; CHECK-NEXT: i32 2, label [[MERGE]] +; CHECK-LABEL: define i32 @select_phi_same_condition_switch( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: switch i32 [[X]], label %[[EXIT:.*]] [ +; CHECK-NEXT: i32 1, label %[[MERGE:.*]] +; CHECK-NEXT: i32 2, label %[[MERGE]] ; CHECK-NEXT: ] -; CHECK: exit: +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 0 -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X]], [[IF_TRUE]] ], [ [[X]], [[IF_TRUE]] ], [ [[Y:%.*]], [[IF_FALSE]] ] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ [[X]], %[[IF_TRUE]] ], [ [[X]], %[[IF_TRUE]] ], [ [[Y]], %[[IF_FALSE]] ] ; CHECK-NEXT: ret i32 [[S]] ; entry: @@ -2289,21 +2433,22 @@ merge: } define i32 @transit_different_values_through_phi(i1 %cond, i1 %cond2) { -; CHECK-LABEL: @transit_different_values_through_phi( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF_TRUE_1:%.*]], label [[IF_TRUE_2:%.*]] -; CHECK: if.true.1: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.true.2: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[S:%.*]] = phi i32 [ 1, [[IF_TRUE_1]] ], [ 2, [[IF_TRUE_2]] ], [ 3, [[IF_FALSE]] ] +; CHECK-LABEL: define i32 @transit_different_values_through_phi( +; CHECK-SAME: i1 [[COND:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br i1 [[COND2]], label %[[IF_TRUE_1:.*]], label %[[IF_TRUE_2:.*]] +; CHECK: [[IF_TRUE_1]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_TRUE_2]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[S:%.*]] = phi i32 [ 1, %[[IF_TRUE_1]] ], [ 2, %[[IF_TRUE_2]] ], [ 3, %[[IF_FALSE]] ] ; CHECK-NEXT: ret i32 [[S]] -; CHECK: exit: +; CHECK: [[EXIT:.*:]] ; CHECK-NEXT: ret i32 0 ; entry: @@ -2331,16 +2476,17 @@ exit: } define i32 @select_phi_degenerate(i1 %cond, i1 %cond2) { -; CHECK-LABEL: @select_phi_degenerate( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[SELECT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[IV_INC]] = add i32 [[SELECT]], 1 -; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP]], label [[EXIT2:%.*]] -; CHECK: exit: +; CHECK-LABEL: define i32 @select_phi_degenerate( +; CHECK-SAME: i1 [[COND:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br i1 [[COND]], label %[[LOOP:.*]], label %[[EXIT:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_INC:%.*]], %[[LOOP]] ] +; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1 +; CHECK-NEXT: br i1 [[COND2]], label %[[LOOP]], label %[[EXIT2:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 0 -; CHECK: exit2: +; CHECK: [[EXIT2]]: ; CHECK-NEXT: ret i32 [[IV_INC]] ; entry: @@ -2360,17 +2506,18 @@ exit2: } define i32 @test_select_into_phi_not_idom(i1 %cond, i32 %A, i32 %B) { -; CHECK-LABEL: @test_select_into_phi_not_idom( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: br label [[EXIT:%.*]] -; CHECK: exit: -; CHECK-NEXT: ret i32 [[A:%.*]] +; CHECK-LABEL: define i32 @test_select_into_phi_not_idom( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: br label %[[EXIT:.*]] +; CHECK: [[EXIT]]: +; CHECK-NEXT: ret i32 [[A]] ; entry: br i1 %cond, label %if.true, label %if.false @@ -2391,17 +2538,18 @@ exit: } define i32 @test_select_into_phi_not_idom_2(i1 %cond, i32 %A, i32 %B) { -; CHECK-LABEL: @test_select_into_phi_not_idom_2( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: br label [[EXIT:%.*]] -; CHECK: exit: -; CHECK-NEXT: ret i32 [[B:%.*]] +; CHECK-LABEL: define i32 @test_select_into_phi_not_idom_2( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: br label %[[EXIT:.*]] +; CHECK: [[EXIT]]: +; CHECK-NEXT: ret i32 [[B]] ; entry: br i1 %cond, label %if.true, label %if.false @@ -2422,17 +2570,18 @@ exit: } define i32 @test_select_into_phi_not_idom_inverted(i1 %cond, i32 %A, i32 %B) { -; CHECK-LABEL: @test_select_into_phi_not_idom_inverted( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_FALSE:%.*]], label [[IF_TRUE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[A:%.*]], [[IF_TRUE]] ], [ [[B:%.*]], [[IF_FALSE]] ] -; CHECK-NEXT: br label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-LABEL: define i32 @test_select_into_phi_not_idom_inverted( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_FALSE:.*]], label %[[IF_TRUE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[A]], %[[IF_TRUE]] ], [ [[B]], %[[IF_FALSE]] ] +; CHECK-NEXT: br label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 [[SEL]] ; entry: @@ -2455,17 +2604,18 @@ exit: } define i32 @test_select_into_phi_not_idom_inverted_2(i1 %cond, i32 %A, i32 %B) { -; CHECK-LABEL: @test_select_into_phi_not_idom_inverted_2( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_FALSE:%.*]], label [[IF_TRUE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[A:%.*]], [[IF_TRUE]] ], [ [[B:%.*]], [[IF_FALSE]] ] -; CHECK-NEXT: br label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-LABEL: define i32 @test_select_into_phi_not_idom_inverted_2( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_FALSE:.*]], label %[[IF_TRUE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[A]], %[[IF_TRUE]] ], [ [[B]], %[[IF_FALSE]] ] +; CHECK-NEXT: br label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 [[SEL]] ; entry: @@ -2488,18 +2638,19 @@ exit: } define i32 @test_select_into_phi_not_idom_no_dom_input_1(i1 %cond, i32 %A, i32 %B, ptr %p) { -; CHECK-LABEL: @test_select_into_phi_not_idom_no_dom_input_1( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[P:%.*]], align 4 -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[C]], [[IF_TRUE]] ], [ [[A:%.*]], [[IF_FALSE]] ] -; CHECK-NEXT: br label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-LABEL: define i32 @test_select_into_phi_not_idom_no_dom_input_1( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[P]], align 4 +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[C]], %[[IF_TRUE]] ], [ [[A]], %[[IF_FALSE]] ] +; CHECK-NEXT: br label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 [[SEL]] ; entry: @@ -2522,18 +2673,19 @@ exit: } define i32 @test_select_into_phi_not_idom_no_dom_input_2(i1 %cond, i32 %A, i32 %B, ptr %p) { -; CHECK-LABEL: @test_select_into_phi_not_idom_no_dom_input_2( -; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] -; CHECK: if.true: -; CHECK-NEXT: br label [[MERGE:%.*]] -; CHECK: if.false: -; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[P:%.*]], align 4 -; CHECK-NEXT: br label [[MERGE]] -; CHECK: merge: -; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[B:%.*]], [[IF_TRUE]] ], [ [[C]], [[IF_FALSE]] ] -; CHECK-NEXT: br label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-LABEL: define i32 @test_select_into_phi_not_idom_no_dom_input_2( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[A:%.*]], i32 [[B:%.*]], ptr [[P:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br i1 [[COND]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] +; CHECK: [[IF_TRUE]]: +; CHECK-NEXT: br label %[[MERGE:.*]] +; CHECK: [[IF_FALSE]]: +; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[P]], align 4 +; CHECK-NEXT: br label %[[MERGE]] +; CHECK: [[MERGE]]: +; CHECK-NEXT: [[SEL:%.*]] = phi i32 [ [[B]], %[[IF_TRUE]] ], [ [[C]], %[[IF_FALSE]] ] +; CHECK-NEXT: br label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 [[SEL]] ; entry: @@ -2560,8 +2712,9 @@ exit: ; https://lists.llvm.org/pipermail/llvm-dev/2016-October/106182.html ; https://reviews.llvm.org/D83360 define i32 @false_undef(i1 %cond, i32 %x) { -; CHECK-LABEL: @false_undef( -; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], i32 [[X:%.*]], i32 undef +; CHECK-LABEL: define i32 @false_undef( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], i32 [[X]], i32 undef ; CHECK-NEXT: ret i32 [[S]] ; %s = select i1 %cond, i32 %x, i32 undef @@ -2569,8 +2722,9 @@ define i32 @false_undef(i1 %cond, i32 %x) { } define i32 @true_undef(i1 %cond, i32 %x) { -; CHECK-LABEL: @true_undef( -; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], i32 undef, i32 [[X:%.*]] +; CHECK-LABEL: define i32 @true_undef( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], i32 undef, i32 [[X]] ; CHECK-NEXT: ret i32 [[S]] ; %s = select i1 %cond, i32 undef, i32 %x @@ -2578,8 +2732,9 @@ define i32 @true_undef(i1 %cond, i32 %x) { } define <2 x i32> @false_undef_vec(i1 %cond, <2 x i32> %x) { -; CHECK-LABEL: @false_undef_vec( -; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], <2 x i32> [[X:%.*]], <2 x i32> undef +; CHECK-LABEL: define <2 x i32> @false_undef_vec( +; CHECK-SAME: i1 [[COND:%.*]], <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], <2 x i32> [[X]], <2 x i32> undef ; CHECK-NEXT: ret <2 x i32> [[S]] ; %s = select i1 %cond, <2 x i32> %x, <2 x i32> undef @@ -2587,8 +2742,9 @@ define <2 x i32> @false_undef_vec(i1 %cond, <2 x i32> %x) { } define <2 x i32> @true_undef_vec(i1 %cond, <2 x i32> %x) { -; CHECK-LABEL: @true_undef_vec( -; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], <2 x i32> undef, <2 x i32> [[X:%.*]] +; CHECK-LABEL: define <2 x i32> @true_undef_vec( +; CHECK-SAME: i1 [[COND:%.*]], <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = select i1 [[COND]], <2 x i32> undef, <2 x i32> [[X]] ; CHECK-NEXT: ret <2 x i32> [[S]] ; %s = select i1 %cond, <2 x i32> undef, <2 x i32> %x @@ -2596,8 +2752,9 @@ define <2 x i32> @true_undef_vec(i1 %cond, <2 x i32> %x) { } define i8 @cond_freeze(i8 %x, i8 %y) { -; CHECK-LABEL: @cond_freeze( -; CHECK-NEXT: ret i8 [[Y:%.*]] +; CHECK-LABEL: define i8 @cond_freeze( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: ret i8 [[Y]] ; %cond.fr = freeze i1 undef %s = select i1 %cond.fr, i8 %x, i8 %y @@ -2605,7 +2762,8 @@ define i8 @cond_freeze(i8 %x, i8 %y) { } define i8 @cond_freeze_constant_false_val(i8 %x) { -; CHECK-LABEL: @cond_freeze_constant_false_val( +; CHECK-LABEL: define i8 @cond_freeze_constant_false_val( +; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: ret i8 1 ; %cond.fr = freeze i1 undef @@ -2614,7 +2772,8 @@ define i8 @cond_freeze_constant_false_val(i8 %x) { } define i8 @cond_freeze_constant_true_val(i8 %x) { -; CHECK-LABEL: @cond_freeze_constant_true_val( +; CHECK-LABEL: define i8 @cond_freeze_constant_true_val( +; CHECK-SAME: i8 [[X:%.*]]) { ; CHECK-NEXT: ret i8 1 ; %cond.fr = freeze i1 undef @@ -2623,7 +2782,7 @@ define i8 @cond_freeze_constant_true_val(i8 %x) { } define i8 @cond_freeze_both_arms_constant() { -; CHECK-LABEL: @cond_freeze_both_arms_constant( +; CHECK-LABEL: define i8 @cond_freeze_both_arms_constant() { ; CHECK-NEXT: ret i8 42 ; %cond.fr = freeze i1 undef @@ -2632,7 +2791,8 @@ define i8 @cond_freeze_both_arms_constant() { } define <2 x i8> @cond_freeze_constant_true_val_vec(<2 x i8> %x) { -; CHECK-LABEL: @cond_freeze_constant_true_val_vec( +; CHECK-LABEL: define <2 x i8> @cond_freeze_constant_true_val_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i8> <i8 1, i8 2> ; %cond.fr = freeze <2 x i1> <i1 undef, i1 undef> @@ -2641,7 +2801,8 @@ define <2 x i8> @cond_freeze_constant_true_val_vec(<2 x i8> %x) { } define <2 x i8> @partial_cond_freeze_constant_true_val_vec(<2 x i8> %x) { -; CHECK-LABEL: @partial_cond_freeze_constant_true_val_vec( +; CHECK-LABEL: define <2 x i8> @partial_cond_freeze_constant_true_val_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i8> <i8 1, i8 2> ; %cond.fr = freeze <2 x i1> <i1 true, i1 undef> @@ -2650,8 +2811,9 @@ define <2 x i8> @partial_cond_freeze_constant_true_val_vec(<2 x i8> %x) { } define <2 x i8> @partial_cond_freeze_constant_false_val_vec(<2 x i8> %x) { -; CHECK-LABEL: @partial_cond_freeze_constant_false_val_vec( -; CHECK-NEXT: ret <2 x i8> [[X:%.*]] +; CHECK-LABEL: define <2 x i8> @partial_cond_freeze_constant_false_val_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: ret <2 x i8> [[X]] ; %cond.fr = freeze <2 x i1> <i1 true, i1 undef> %s = select <2 x i1> %cond.fr, <2 x i8> %x, <2 x i8> <i8 1, i8 2> @@ -2659,7 +2821,7 @@ define <2 x i8> @partial_cond_freeze_constant_false_val_vec(<2 x i8> %x) { } define <2 x i8> @partial_cond_freeze_both_arms_constant_vec() { -; CHECK-LABEL: @partial_cond_freeze_both_arms_constant_vec( +; CHECK-LABEL: define <2 x i8> @partial_cond_freeze_both_arms_constant_vec() { ; CHECK-NEXT: ret <2 x i8> <i8 42, i8 43> ; %cond.fr = freeze <2 x i1> <i1 false, i1 undef> @@ -2670,8 +2832,9 @@ define <2 x i8> @partial_cond_freeze_both_arms_constant_vec() { declare void @foo2(i8, i8) define void @cond_freeze_multipleuses(i8 %x, i8 %y) { -; CHECK-LABEL: @cond_freeze_multipleuses( -; CHECK-NEXT: call void @foo2(i8 [[Y:%.*]], i8 [[X:%.*]]) +; CHECK-LABEL: define void @cond_freeze_multipleuses( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: call void @foo2(i8 [[Y]], i8 [[X]]) ; CHECK-NEXT: ret void ; %cond.fr = freeze i1 undef @@ -2682,8 +2845,10 @@ define void @cond_freeze_multipleuses(i8 %x, i8 %y) { } define i32 @select_freeze_icmp_eq(i32 %x, i32 %y) { -; CHECK-LABEL: @select_freeze_icmp_eq( -; CHECK-NEXT: ret i32 [[Y:%.*]] +; CHECK-LABEL: define i32 @select_freeze_icmp_eq( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: ret i32 [[Y_FR]] ; %c = icmp eq i32 %x, %y %c.fr = freeze i1 %c @@ -2692,8 +2857,10 @@ define i32 @select_freeze_icmp_eq(i32 %x, i32 %y) { } define i32 @select_freeze_icmp_ne(i32 %x, i32 %y) { -; CHECK-LABEL: @select_freeze_icmp_ne( -; CHECK-NEXT: ret i32 [[X:%.*]] +; CHECK-LABEL: define i32 @select_freeze_icmp_ne( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X]] +; CHECK-NEXT: ret i32 [[X_FR]] ; %c = icmp ne i32 %x, %y %c.fr = freeze i1 %c @@ -2702,10 +2869,11 @@ define i32 @select_freeze_icmp_ne(i32 %x, i32 %y) { } define i32 @select_freeze_icmp_else(i32 %x, i32 %y) { -; CHECK-LABEL: @select_freeze_icmp_else( -; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[C_FR:%.*]] = freeze i1 [[C]] -; CHECK-NEXT: [[V:%.*]] = select i1 [[C_FR]], i32 [[X]], i32 [[Y]] +; CHECK-LABEL: define i32 @select_freeze_icmp_else( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X]] +; CHECK-NEXT: [[V:%.*]] = call i32 @llvm.umin.i32(i32 [[X_FR]], i32 [[Y_FR]]) ; CHECK-NEXT: ret i32 [[V]] ; %c = icmp ult i32 %x, %y @@ -2717,10 +2885,11 @@ define i32 @select_freeze_icmp_else(i32 %x, i32 %y) { declare void @use_i1_i32(i1, i32) define void @select_freeze_icmp_multuses(i32 %x, i32 %y) { -; CHECK-LABEL: @select_freeze_icmp_multuses( -; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[C_FR:%.*]] = freeze i1 [[C]] -; CHECK-NEXT: [[V:%.*]] = select i1 [[C_FR]], i32 [[X]], i32 [[Y]] +; CHECK-LABEL: define void @select_freeze_icmp_multuses( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[V:%.*]] = freeze i32 [[X]] +; CHECK-NEXT: [[C_FR:%.*]] = icmp ne i32 [[V]], [[Y_FR]] ; CHECK-NEXT: call void @use_i1_i32(i1 [[C_FR]], i32 [[V]]) ; CHECK-NEXT: ret void ; @@ -2732,8 +2901,9 @@ define void @select_freeze_icmp_multuses(i32 %x, i32 %y) { } define i32 @pr47322_more_poisonous_replacement(i32 %arg) { -; CHECK-LABEL: @pr47322_more_poisonous_replacement( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ARG:%.*]], 0 +; CHECK-LABEL: define i32 @pr47322_more_poisonous_replacement( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ARG]], 0 ; CHECK-NEXT: [[TRAILING:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[ARG]], i1 true) ; CHECK-NEXT: [[SHIFTED:%.*]] = lshr exact i32 [[ARG]], [[TRAILING]] ; CHECK-NEXT: [[R1_SROA_0_1:%.*]] = select i1 [[CMP]], i32 0, i32 [[SHIFTED]] @@ -2747,9 +2917,10 @@ define i32 @pr47322_more_poisonous_replacement(i32 %arg) { } define i8 @select_replacement_add_eq(i8 %x, i8 %y) { -; CHECK-LABEL: @select_replacement_add_eq( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], 1 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 2, i8 [[Y:%.*]] +; CHECK-LABEL: define i8 @select_replacement_add_eq( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 1 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 2, i8 [[Y]] ; CHECK-NEXT: ret i8 [[SEL]] ; %cmp = icmp eq i8 %x, 1 @@ -2759,9 +2930,10 @@ define i8 @select_replacement_add_eq(i8 %x, i8 %y) { } define <2 x i8> @select_replacement_add_eq_vec(<2 x i8> %x, <2 x i8> %y) { -; CHECK-LABEL: @select_replacement_add_eq_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X:%.*]], splat (i8 1) -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> splat (i8 2), <2 x i8> [[Y:%.*]] +; CHECK-LABEL: define <2 x i8> @select_replacement_add_eq_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X]], splat (i8 1) +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> splat (i8 2), <2 x i8> [[Y]] ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 1, i8 1> @@ -2771,9 +2943,10 @@ define <2 x i8> @select_replacement_add_eq_vec(<2 x i8> %x, <2 x i8> %y) { } define <2 x i8> @select_replacement_add_eq_vec_nonuniform(<2 x i8> %x, <2 x i8> %y) { -; CHECK-LABEL: @select_replacement_add_eq_vec_nonuniform( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 1, i8 2> -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 4, i8 6>, <2 x i8> [[Y:%.*]] +; CHECK-LABEL: define <2 x i8> @select_replacement_add_eq_vec_nonuniform( +; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X]], <i8 1, i8 2> +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 4, i8 6>, <2 x i8> [[Y]] ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 1, i8 2> @@ -2783,9 +2956,10 @@ define <2 x i8> @select_replacement_add_eq_vec_nonuniform(<2 x i8> %x, <2 x i8> } define <2 x i8> @select_replacement_add_eq_vec_poison(<2 x i8> %x, <2 x i8> %y) { -; CHECK-LABEL: @select_replacement_add_eq_vec_poison( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 1, i8 poison> -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 poison>, <2 x i8> [[Y:%.*]] +; CHECK-LABEL: define <2 x i8> @select_replacement_add_eq_vec_poison( +; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X]], <i8 1, i8 poison> +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 poison>, <2 x i8> [[Y]] ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 1, i8 poison> @@ -2795,10 +2969,11 @@ define <2 x i8> @select_replacement_add_eq_vec_poison(<2 x i8> %x, <2 x i8> %y) } define <2 x i8> @select_replacement_add_eq_vec_undef(<2 x i8> %x, <2 x i8> %y) { -; CHECK-LABEL: @select_replacement_add_eq_vec_undef( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 1, i8 undef> +; CHECK-LABEL: define <2 x i8> @select_replacement_add_eq_vec_undef( +; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X]], <i8 1, i8 undef> ; CHECK-NEXT: [[ADD:%.*]] = add <2 x i8> [[X]], splat (i8 1) -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[ADD]], <2 x i8> [[Y:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[ADD]], <2 x i8> [[Y]] ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 1, i8 undef> @@ -2808,9 +2983,10 @@ define <2 x i8> @select_replacement_add_eq_vec_undef(<2 x i8> %x, <2 x i8> %y) { } define <2 x i8> @select_replacement_add_eq_vec_undef_okay(<2 x i8> %x, <2 x i8> %y) { -; CHECK-LABEL: @select_replacement_add_eq_vec_undef_okay( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X:%.*]], splat (i8 1) -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 undef>, <2 x i8> [[Y:%.*]] +; CHECK-LABEL: define <2 x i8> @select_replacement_add_eq_vec_undef_okay( +; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X]], splat (i8 1) +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 undef>, <2 x i8> [[Y]] ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 1, i8 1> @@ -2821,10 +2997,11 @@ define <2 x i8> @select_replacement_add_eq_vec_undef_okay(<2 x i8> %x, <2 x i8> define <2 x i8> @select_replacement_add_eq_vec_undef_okay_todo(<2 x i8> %x, <2 x i8> %y) { -; CHECK-LABEL: @select_replacement_add_eq_vec_undef_okay_todo( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 1, i8 undef> +; CHECK-LABEL: define <2 x i8> @select_replacement_add_eq_vec_undef_okay_todo( +; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X]], <i8 1, i8 undef> ; CHECK-NEXT: [[ADD:%.*]] = add <2 x i8> [[X]], <i8 1, i8 undef> -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[ADD]], <2 x i8> [[Y:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[ADD]], <2 x i8> [[Y]] ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 1, i8 undef> @@ -2834,9 +3011,10 @@ define <2 x i8> @select_replacement_add_eq_vec_undef_okay_todo(<2 x i8> %x, <2 x } define <2 x i8> @select_replacement_xor_eq_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) { -; CHECK-LABEL: @select_replacement_xor_eq_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> zeroinitializer, <2 x i8> [[Z:%.*]] +; CHECK-LABEL: define <2 x i8> @select_replacement_xor_eq_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]], <2 x i8> [[Z:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[X]], [[Y]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> zeroinitializer, <2 x i8> [[Z]] ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, %y @@ -2847,10 +3025,11 @@ define <2 x i8> @select_replacement_xor_eq_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8 define i8 @select_replacement_add_ne(i8 %x, i8 %y) { -; CHECK-LABEL: @select_replacement_add_ne( -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[X:%.*]], 1 +; CHECK-LABEL: define i8 @select_replacement_add_ne( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[X]], 1 ; CHECK-NEXT: call void @use(i1 [[CMP]]) -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[Y:%.*]], i8 2 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[Y]], i8 2 ; CHECK-NEXT: ret i8 [[SEL]] ; %cmp = icmp ne i8 %x, 1 @@ -2861,9 +3040,10 @@ define i8 @select_replacement_add_ne(i8 %x, i8 %y) { } define i8 @select_replacement_add_nuw(i8 %x, i8 %y) { -; CHECK-LABEL: @select_replacement_add_nuw( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], 1 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 2, i8 [[Y:%.*]] +; CHECK-LABEL: define i8 @select_replacement_add_nuw( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 1 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 2, i8 [[Y]] ; CHECK-NEXT: ret i8 [[SEL]] ; %cmp = icmp eq i8 %x, 1 @@ -2873,9 +3053,10 @@ define i8 @select_replacement_add_nuw(i8 %x, i8 %y) { } define i8 @select_replacement_sub_noundef(i8 %x, i8 noundef %y, i8 %z) { -; CHECK-LABEL: @select_replacement_sub_noundef( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 0, i8 [[Z:%.*]] +; CHECK-LABEL: define i8 @select_replacement_sub_noundef( +; CHECK-SAME: i8 [[X:%.*]], i8 noundef [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], [[Y]] +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 0, i8 [[Z]] ; CHECK-NEXT: ret i8 [[SEL]] ; %cmp = icmp eq i8 %x, %y @@ -2885,10 +3066,11 @@ define i8 @select_replacement_sub_noundef(i8 %x, i8 noundef %y, i8 %z) { } define i8 @select_replacement_sub_noundef_but_may_be_poison(i8 %x, i8 noundef %yy, i8 %z) { -; CHECK-LABEL: @select_replacement_sub_noundef_but_may_be_poison( -; CHECK-NEXT: [[Y:%.*]] = shl nuw i8 [[YY:%.*]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], [[Y]] -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 0, i8 [[Z:%.*]] +; CHECK-LABEL: define i8 @select_replacement_sub_noundef_but_may_be_poison( +; CHECK-SAME: i8 [[X:%.*]], i8 noundef [[YY:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[Y:%.*]] = shl nuw i8 [[YY]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], [[Y]] +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 0, i8 [[Z]] ; CHECK-NEXT: ret i8 [[SEL]] ; %y = shl nuw i8 %yy, 1 @@ -2900,9 +3082,10 @@ define i8 @select_replacement_sub_noundef_but_may_be_poison(i8 %x, i8 noundef %y ; TODO: The transform is also safe without noundef. define i8 @select_replacement_sub(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @select_replacement_sub( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 0, i8 [[Z:%.*]] +; CHECK-LABEL: define i8 @select_replacement_sub( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], [[Y]] +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 0, i8 [[Z]] ; CHECK-NEXT: ret i8 [[SEL]] ; %cmp = icmp eq i8 %x, %y @@ -2913,12 +3096,13 @@ define i8 @select_replacement_sub(i8 %x, i8 %y, i8 %z) { ; FIXME: This is safe to fold. define i8 @select_replacement_shift_noundef(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @select_replacement_shift_noundef( -; CHECK-NEXT: [[SHR:%.*]] = lshr exact i8 [[X:%.*]], 1 +; CHECK-LABEL: define i8 @select_replacement_shift_noundef( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[SHR:%.*]] = lshr exact i8 [[X]], 1 ; CHECK-NEXT: call void @use_i8(i8 noundef [[SHR]]) -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[SHR]], [[Y:%.*]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[SHR]], [[Y]] ; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[Y]], 1 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[SHL]], i8 [[Z:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[SHL]], i8 [[Z]] ; CHECK-NEXT: ret i8 [[SEL]] ; %shr = lshr exact i8 %x, 1 @@ -2931,11 +3115,12 @@ define i8 @select_replacement_shift_noundef(i8 %x, i8 %y, i8 %z) { ; TODO: The transform is also safe without noundef. define i8 @select_replacement_shift(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @select_replacement_shift( -; CHECK-NEXT: [[SHR:%.*]] = lshr exact i8 [[X:%.*]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[SHR]], [[Y:%.*]] +; CHECK-LABEL: define i8 @select_replacement_shift( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[SHR:%.*]] = lshr exact i8 [[X]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[SHR]], [[Y]] ; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[Y]], 1 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[SHL]], i8 [[Z:%.*]] +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[SHL]], i8 [[Z]] ; CHECK-NEXT: ret i8 [[SEL]] ; %shr = lshr exact i8 %x, 1 @@ -2946,9 +3131,10 @@ define i8 @select_replacement_shift(i8 %x, i8 %y, i8 %z) { } define i8 @select_replacement_loop(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @select_replacement_loop( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[Z:%.*]] +; CHECK-LABEL: define i8 @select_replacement_loop( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], [[Y]] +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[Z]] ; CHECK-NEXT: ret i8 [[SEL]] ; %cmp = icmp eq i8 %x, %y @@ -2957,8 +3143,9 @@ define i8 @select_replacement_loop(i8 %x, i8 %y, i8 %z) { } define i32 @select_replacement_loop2(i32 %arg, i32 %arg2) { -; CHECK-LABEL: @select_replacement_loop2( -; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ARG:%.*]], [[ARG2:%.*]] +; CHECK-LABEL: define i32 @select_replacement_loop2( +; CHECK-SAME: i32 [[ARG:%.*]], i32 [[ARG2:%.*]]) { +; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ARG]], [[ARG2]] ; CHECK-NEXT: ret i32 [[DIV]] ; %div = udiv i32 %arg, %arg2 @@ -2969,8 +3156,9 @@ define i32 @select_replacement_loop2(i32 %arg, i32 %arg2) { } define i8 @select_replacement_loop3(i32 noundef %x) { -; CHECK-LABEL: @select_replacement_loop3( -; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[X:%.*]] to i8 +; CHECK-LABEL: define i8 @select_replacement_loop3( +; CHECK-SAME: i32 noundef [[X:%.*]]) { +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[X]] to i8 ; CHECK-NEXT: [[REV:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TRUNC]]) ; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[REV]] to i32 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], [[EXT]] @@ -2986,10 +3174,11 @@ define i8 @select_replacement_loop3(i32 noundef %x) { } define i16 @select_replacement_loop4(i16 noundef %p_12) { -; CHECK-LABEL: @select_replacement_loop4( -; CHECK-NEXT: [[P_12:%.*]] = call i16 @llvm.umin.i16(i16 [[P_13:%.*]], i16 2) -; CHECK-NEXT: [[AND1:%.*]] = and i16 [[P_12]], 1 -; CHECK-NEXT: ret i16 [[AND1]] +; CHECK-LABEL: define i16 @select_replacement_loop4( +; CHECK-SAME: i16 noundef [[P_12:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.umin.i16(i16 [[P_12]], i16 2) +; CHECK-NEXT: [[AND3:%.*]] = and i16 [[TMP1]], 1 +; CHECK-NEXT: ret i16 [[AND3]] ; %cmp1 = icmp ult i16 %p_12, 2 %and1 = and i16 %p_12, 1 @@ -3000,8 +3189,9 @@ define i16 @select_replacement_loop4(i16 noundef %p_12) { } define ptr @select_replacement_gep_inbounds(ptr %base, i64 %offset) { -; CHECK-LABEL: @select_replacement_gep_inbounds( -; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr [[BASE:%.*]], i64 [[OFFSET:%.*]] +; CHECK-LABEL: define ptr @select_replacement_gep_inbounds( +; CHECK-SAME: ptr [[BASE:%.*]], i64 [[OFFSET:%.*]]) { +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[OFFSET]] ; CHECK-NEXT: ret ptr [[GEP]] ; %cmp = icmp eq i64 %offset, 0 @@ -3011,8 +3201,9 @@ define ptr @select_replacement_gep_inbounds(ptr %base, i64 %offset) { } define i8 @replace_false_op_eq_shl_or_disjoint(i8 %x) { -; CHECK-LABEL: @replace_false_op_eq_shl_or_disjoint( -; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[X:%.*]], 3 +; CHECK-LABEL: define i8 @replace_false_op_eq_shl_or_disjoint( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[X]], 3 ; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], [[SHL]] ; CHECK-NEXT: ret i8 [[OR]] ; @@ -3024,8 +3215,9 @@ define i8 @replace_false_op_eq_shl_or_disjoint(i8 %x) { } define i8 @select_or_disjoint_eq(i8 %x, i8 %y) { -; CHECK-LABEL: @select_or_disjoint_eq( -; CHECK-NEXT: [[OR:%.*]] = or i8 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i8 @select_or_disjoint_eq( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], [[Y]] ; CHECK-NEXT: ret i8 [[OR]] ; %cmp = icmp eq i8 %x, %y @@ -3035,7 +3227,8 @@ define i8 @select_or_disjoint_eq(i8 %x, i8 %y) { } define <2 x i1> @partial_true_undef_condval(<2 x i1> %x) { -; CHECK-LABEL: @partial_true_undef_condval( +; CHECK-LABEL: define <2 x i1> @partial_true_undef_condval( +; CHECK-SAME: <2 x i1> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i1> <i1 true, i1 poison> ; %r = select <2 x i1> <i1 true, i1 poison>, <2 x i1> <i1 true, i1 poison>, <2 x i1> %x @@ -3043,7 +3236,8 @@ define <2 x i1> @partial_true_undef_condval(<2 x i1> %x) { } define <2 x i1> @partial_false_undef_condval(<2 x i1> %x) { -; CHECK-LABEL: @partial_false_undef_condval( +; CHECK-LABEL: define <2 x i1> @partial_false_undef_condval( +; CHECK-SAME: <2 x i1> [[X:%.*]]) { ; CHECK-NEXT: ret <2 x i1> <i1 false, i1 poison> ; %r = select <2 x i1> <i1 false, i1 poison>, <2 x i1> %x, <2 x i1> <i1 false, i1 poison> @@ -3052,9 +3246,10 @@ define <2 x i1> @partial_false_undef_condval(<2 x i1> %x) { ; select (x == 0), 0, x * y --> freeze(y) * x define i32 @mul_select_eq_zero(i32 %x, i32 %y) { -; CHECK-LABEL: @mul_select_eq_zero( -; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y:%.*]] -; CHECK-NEXT: [[M:%.*]] = mul i32 [[X:%.*]], [[Y_FR]] +; CHECK-LABEL: define i32 @mul_select_eq_zero( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[M:%.*]] = mul i32 [[X]], [[Y_FR]] ; CHECK-NEXT: ret i32 [[M]] ; %c = icmp eq i32 %x, 0 @@ -3065,9 +3260,10 @@ define i32 @mul_select_eq_zero(i32 %x, i32 %y) { ; select (y == 0), 0, x * y --> freeze(x) * y define i32 @mul_select_eq_zero_commute(i32 %x, i32 %y) { -; CHECK-LABEL: @mul_select_eq_zero_commute( -; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X:%.*]] -; CHECK-NEXT: [[M:%.*]] = mul i32 [[X_FR]], [[Y:%.*]] +; CHECK-LABEL: define i32 @mul_select_eq_zero_commute( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X]] +; CHECK-NEXT: [[M:%.*]] = mul i32 [[X_FR]], [[Y]] ; CHECK-NEXT: ret i32 [[M]] ; %c = icmp eq i32 %y, 0 @@ -3078,9 +3274,10 @@ define i32 @mul_select_eq_zero_commute(i32 %x, i32 %y) { ; Check that mul's flags preserved during the transformation. define i32 @mul_select_eq_zero_copy_flags(i32 %x, i32 %y) { -; CHECK-LABEL: @mul_select_eq_zero_copy_flags( -; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y:%.*]] -; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i32 [[X:%.*]], [[Y_FR]] +; CHECK-LABEL: define i32 @mul_select_eq_zero_copy_flags( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i32 [[X]], [[Y_FR]] ; CHECK-NEXT: ret i32 [[M]] ; %c = icmp eq i32 %x, 0 @@ -3092,9 +3289,10 @@ define i32 @mul_select_eq_zero_copy_flags(i32 %x, i32 %y) { ; Check that the transformation could be applied after condition's inversion. ; select (x != 0), x * y, 0 --> freeze(y) * x define i32 @mul_select_ne_zero(i32 %x, i32 %y) { -; CHECK-LABEL: @mul_select_ne_zero( -; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[X:%.*]], 0 -; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y:%.*]] +; CHECK-LABEL: define i32 @mul_select_ne_zero( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[X]], 0 +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] ; CHECK-NEXT: [[M:%.*]] = mul i32 [[X]], [[Y_FR]] ; CHECK-NEXT: call void @use(i1 [[C]]) ; CHECK-NEXT: ret i32 [[M]] @@ -3110,9 +3308,10 @@ define i32 @mul_select_ne_zero(i32 %x, i32 %y) { ; an expression could be folded into mul as if there was a 0 instead of undef. ; select (x == 0), undef, x * y --> freeze(y) * x define i32 @mul_select_eq_zero_sel_undef(i32 %x, i32 %y) { -; CHECK-LABEL: @mul_select_eq_zero_sel_undef( -; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y:%.*]] -; CHECK-NEXT: [[M:%.*]] = mul i32 [[X:%.*]], [[Y_FR]] +; CHECK-LABEL: define i32 @mul_select_eq_zero_sel_undef( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[M:%.*]] = mul i32 [[X]], [[Y_FR]] ; CHECK-NEXT: ret i32 [[M]] ; %c = icmp eq i32 %x, 0 @@ -3124,9 +3323,10 @@ define i32 @mul_select_eq_zero_sel_undef(i32 %x, i32 %y) { ; Check that the transformation is applied disregard to a number ; of expression's users. define i32 @mul_select_eq_zero_multiple_users(i32 %x, i32 %y) { -; CHECK-LABEL: @mul_select_eq_zero_multiple_users( -; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y:%.*]] -; CHECK-NEXT: [[M:%.*]] = mul i32 [[X:%.*]], [[Y_FR]] +; CHECK-LABEL: define i32 @mul_select_eq_zero_multiple_users( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]] +; CHECK-NEXT: [[M:%.*]] = mul i32 [[X]], [[Y_FR]] ; CHECK-NEXT: call void @use_i32(i32 [[M]]) ; CHECK-NEXT: call void @use_i32(i32 [[M]]) ; CHECK-NEXT: call void @use_i32(i32 [[M]]) @@ -3144,9 +3344,10 @@ define i32 @mul_select_eq_zero_multiple_users(i32 %x, i32 %y) { ; Negative test: select's condition is unrelated to multiplied values, ; so the transformation should not be applied. define i32 @mul_select_eq_zero_unrelated_condition(i32 %x, i32 %y, i32 %z) { -; CHECK-LABEL: @mul_select_eq_zero_unrelated_condition( -; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[Z:%.*]], 0 -; CHECK-NEXT: [[M:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @mul_select_eq_zero_unrelated_condition( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[Z]], 0 +; CHECK-NEXT: [[M:%.*]] = mul i32 [[X]], [[Y]] ; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 0, i32 [[M]] ; CHECK-NEXT: ret i32 [[R]] ; @@ -3158,9 +3359,10 @@ define i32 @mul_select_eq_zero_unrelated_condition(i32 %x, i32 %y, i32 %z) { ; select (<k x elt> x == 0), <k x elt> 0, <k x elt> x * y --> freeze(y) * x define <4 x i32> @mul_select_eq_zero_vector(<4 x i32> %x, <4 x i32> %y) { -; CHECK-LABEL: @mul_select_eq_zero_vector( -; CHECK-NEXT: [[Y_FR:%.*]] = freeze <4 x i32> [[Y:%.*]] -; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[X:%.*]], [[Y_FR]] +; CHECK-LABEL: define <4 x i32> @mul_select_eq_zero_vector( +; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze <4 x i32> [[Y]] +; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[X]], [[Y_FR]] ; CHECK-NEXT: ret <4 x i32> [[M]] ; %c = icmp eq <4 x i32> %x, zeroinitializer @@ -3173,9 +3375,10 @@ define <4 x i32> @mul_select_eq_zero_vector(<4 x i32> %x, <4 x i32> %y) { ; is a vector consisting of zeros and poisons. ; select (<k x elt> x == {0, poison, ...}), <k x elt> 0, <k x elt> x * y --> freeze(y) * x define <2 x i32> @mul_select_eq_poison_vector(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @mul_select_eq_poison_vector( -; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 0, i32 poison> -; CHECK-NEXT: [[M:%.*]] = mul <2 x i32> [[X]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i32> @mul_select_eq_poison_vector( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i32> [[X]], <i32 0, i32 poison> +; CHECK-NEXT: [[M:%.*]] = mul <2 x i32> [[X]], [[Y]] ; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C]], <2 x i32> <i32 0, i32 42>, <2 x i32> [[M]] ; CHECK-NEXT: ret <2 x i32> [[R]] ; @@ -3189,9 +3392,10 @@ define <2 x i32> @mul_select_eq_poison_vector(<2 x i32> %x, <2 x i32> %y) { ; is a vector consisting of zeros and poisons. ; select (<k x elt> x == 0), <k x elt> {0, poison, ...}, <k x elt> x * y --> freeze(y) * x define <2 x i32> @mul_select_eq_zero_sel_poison_vector(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @mul_select_eq_zero_sel_poison_vector( -; CHECK-NEXT: [[Y_FR:%.*]] = freeze <2 x i32> [[Y:%.*]] -; CHECK-NEXT: [[M:%.*]] = mul <2 x i32> [[X:%.*]], [[Y_FR]] +; CHECK-LABEL: define <2 x i32> @mul_select_eq_zero_sel_poison_vector( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[Y_FR:%.*]] = freeze <2 x i32> [[Y]] +; CHECK-NEXT: [[M:%.*]] = mul <2 x i32> [[X]], [[Y_FR]] ; CHECK-NEXT: ret <2 x i32> [[M]] ; %c = icmp eq <2 x i32> %x, zeroinitializer @@ -3203,9 +3407,10 @@ define <2 x i32> @mul_select_eq_zero_sel_poison_vector(<2 x i32> %x, <2 x i32> % ; Negative test: select should not be folded into mul because ; condition's operand and select's operand do not merge into zero vector. define <2 x i32> @mul_select_eq_poison_vector_not_merging_to_zero(<2 x i32> %x, <2 x i32> %y) { -; CHECK-LABEL: @mul_select_eq_poison_vector_not_merging_to_zero( -; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 0, i32 poison> -; CHECK-NEXT: [[M:%.*]] = mul <2 x i32> [[X]], [[Y:%.*]] +; CHECK-LABEL: define <2 x i32> @mul_select_eq_poison_vector_not_merging_to_zero( +; CHECK-SAME: <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]]) { +; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i32> [[X]], <i32 0, i32 poison> +; CHECK-NEXT: [[M:%.*]] = mul <2 x i32> [[X]], [[Y]] ; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C]], <2 x i32> <i32 1, i32 0>, <2 x i32> [[M]] ; CHECK-NEXT: ret <2 x i32> [[R]] ; @@ -3216,8 +3421,9 @@ define <2 x i32> @mul_select_eq_poison_vector_not_merging_to_zero(<2 x i32> %x, } define i8 @ne0_is_all_ones(i8 %x) { -; CHECK-LABEL: @ne0_is_all_ones( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0 +; CHECK-LABEL: define i8 @ne0_is_all_ones( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X]], 0 ; CHECK-NEXT: [[R:%.*]] = sext i1 [[TMP1]] to i8 ; CHECK-NEXT: ret i8 [[R]] ; @@ -3228,8 +3434,9 @@ define i8 @ne0_is_all_ones(i8 %x) { } define i8 @ne0_is_all_ones_use1(i8 %x) { -; CHECK-LABEL: @ne0_is_all_ones_use1( -; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @ne0_is_all_ones_use1( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: call void @use_i8(i8 [[NEGX]]) ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X]], 0 ; CHECK-NEXT: [[R:%.*]] = sext i1 [[TMP1]] to i8 @@ -3245,8 +3452,9 @@ define i8 @ne0_is_all_ones_use1(i8 %x) { ; negative test define i8 @ne0_is_all_ones_use2(i8 %x) { -; CHECK-LABEL: @ne0_is_all_ones_use2( -; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @ne0_is_all_ones_use2( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 1 ; CHECK-NEXT: call void @use(i1 [[UGT1]]) ; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] @@ -3262,8 +3470,9 @@ define i8 @ne0_is_all_ones_use2(i8 %x) { ; negative test define i8 @ne0_is_all_ones_wrong_pred(i8 %x) { -; CHECK-LABEL: @ne0_is_all_ones_wrong_pred( -; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @ne0_is_all_ones_wrong_pred( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[UGT1:%.*]] = icmp sgt i8 [[X]], 2 ; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] ; CHECK-NEXT: ret i8 [[R]] @@ -3277,8 +3486,9 @@ define i8 @ne0_is_all_ones_wrong_pred(i8 %x) { ; negative test define i8 @ne0_is_all_ones_wrong_cmp(i8 %x) { -; CHECK-LABEL: @ne0_is_all_ones_wrong_cmp( -; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @ne0_is_all_ones_wrong_cmp( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 2 ; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] ; CHECK-NEXT: ret i8 [[R]] @@ -3292,8 +3502,9 @@ define i8 @ne0_is_all_ones_wrong_cmp(i8 %x) { ; negative test define i8 @ne0_is_all_ones_wrong_sel(i8 %x) { -; CHECK-LABEL: @ne0_is_all_ones_wrong_sel( -; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @ne0_is_all_ones_wrong_sel( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 2 ; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 1, i8 [[NEGX]] ; CHECK-NEXT: ret i8 [[R]] @@ -3305,8 +3516,9 @@ define i8 @ne0_is_all_ones_wrong_sel(i8 %x) { } define <2 x i8> @ne0_is_all_ones_swap_vec(<2 x i8> %x) { -; CHECK-LABEL: @ne0_is_all_ones_swap_vec( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i8> @ne0_is_all_ones_swap_vec( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[X]], zeroinitializer ; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i8> ; CHECK-NEXT: ret <2 x i8> [[R]] ; @@ -3317,8 +3529,9 @@ define <2 x i8> @ne0_is_all_ones_swap_vec(<2 x i8> %x) { } define <2 x i8> @ne0_is_all_ones_swap_vec_poison(<2 x i8> %x) { -; CHECK-LABEL: @ne0_is_all_ones_swap_vec_poison( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer +; CHECK-LABEL: define <2 x i8> @ne0_is_all_ones_swap_vec_poison( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[X]], zeroinitializer ; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i8> ; CHECK-NEXT: ret <2 x i8> [[R]] ; @@ -3329,8 +3542,9 @@ define <2 x i8> @ne0_is_all_ones_swap_vec_poison(<2 x i8> %x) { } define i64 @udiv_of_select_constexpr(i1 %c, i64 %x) { -; CHECK-LABEL: @udiv_of_select_constexpr( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], i64 [[X:%.*]], i64 ptrtoint (ptr @glbl to i64) +; CHECK-LABEL: define i64 @udiv_of_select_constexpr( +; CHECK-SAME: i1 [[C:%.*]], i64 [[X:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C]], i64 [[X]], i64 ptrtoint (ptr @glbl to i64) ; CHECK-NEXT: [[OP:%.*]] = udiv i64 [[SEL]], 3 ; CHECK-NEXT: ret i64 [[OP]] ; @@ -3340,8 +3554,9 @@ define i64 @udiv_of_select_constexpr(i1 %c, i64 %x) { } define i64 @udiv_of_select_constexpr_commuted(i1 %c, i64 %x) { -; CHECK-LABEL: @udiv_of_select_constexpr_commuted( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], i64 ptrtoint (ptr @glbl to i64), i64 [[X:%.*]] +; CHECK-LABEL: define i64 @udiv_of_select_constexpr_commuted( +; CHECK-SAME: i1 [[C:%.*]], i64 [[X:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C]], i64 ptrtoint (ptr @glbl to i64), i64 [[X]] ; CHECK-NEXT: [[OP:%.*]] = udiv i64 [[SEL]], 3 ; CHECK-NEXT: ret i64 [[OP]] ; @@ -3356,8 +3571,9 @@ declare void @use_i32(i32) declare i32 @llvm.cttz.i32(i32, i1 immarg) define i32 @select_cond_zext_cond(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_zext_cond( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 1, i32 [[B:%.*]] +; CHECK-LABEL: define i32 @select_cond_zext_cond( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 1, i32 [[B]] ; CHECK-NEXT: ret i32 [[SEL]] ; %zext = zext i1 %cond to i32 @@ -3366,8 +3582,9 @@ define i32 @select_cond_zext_cond(i1 %cond, i32 %b) { } define <2 x i32> @select_cond_zext_cond_vec(<2 x i1> %cond, <2 x i32> %b) { -; CHECK-LABEL: @select_cond_zext_cond_vec( -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i32> splat (i32 1), <2 x i32> [[B:%.*]] +; CHECK-LABEL: define <2 x i32> @select_cond_zext_cond_vec( +; CHECK-SAME: <2 x i1> [[COND:%.*]], <2 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND]], <2 x i32> splat (i32 1), <2 x i32> [[B]] ; CHECK-NEXT: ret <2 x i32> [[SEL]] ; %zext = zext <2 x i1> %cond to <2 x i32> @@ -3376,8 +3593,9 @@ define <2 x i32> @select_cond_zext_cond_vec(<2 x i1> %cond, <2 x i32> %b) { } define i32 @select_cond_sext_cond(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_sext_cond( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 -1, i32 [[B:%.*]] +; CHECK-LABEL: define i32 @select_cond_sext_cond( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 -1, i32 [[B]] ; CHECK-NEXT: ret i32 [[SEL]] ; %sext = sext i1 %cond to i32 @@ -3386,8 +3604,9 @@ define i32 @select_cond_sext_cond(i1 %cond, i32 %b) { } define <2 x i32> @select_cond_sext_cond_vec(<2 x i1> %cond, <2 x i32> %b) { -; CHECK-LABEL: @select_cond_sext_cond_vec( -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i32> splat (i32 -1), <2 x i32> [[B:%.*]] +; CHECK-LABEL: define <2 x i32> @select_cond_sext_cond_vec( +; CHECK-SAME: <2 x i1> [[COND:%.*]], <2 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND]], <2 x i32> splat (i32 -1), <2 x i32> [[B]] ; CHECK-NEXT: ret <2 x i32> [[SEL]] ; %sext = sext <2 x i1> %cond to <2 x i32> @@ -3396,8 +3615,9 @@ define <2 x i32> @select_cond_sext_cond_vec(<2 x i1> %cond, <2 x i32> %b) { } define i32 @select_cond_val_zext_cond(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_val_zext_cond( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 [[B:%.*]], i32 0 +; CHECK-LABEL: define i32 @select_cond_val_zext_cond( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[B]], i32 0 ; CHECK-NEXT: ret i32 [[SEL]] ; %zext = zext i1 %cond to i32 @@ -3406,8 +3626,9 @@ define i32 @select_cond_val_zext_cond(i1 %cond, i32 %b) { } define <2 x i32> @select_cond_val_zext_cond_vec(<2 x i1> %cond, <2 x i32> %b) { -; CHECK-LABEL: @select_cond_val_zext_cond_vec( -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i32> [[B:%.*]], <2 x i32> zeroinitializer +; CHECK-LABEL: define <2 x i32> @select_cond_val_zext_cond_vec( +; CHECK-SAME: <2 x i1> [[COND:%.*]], <2 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND]], <2 x i32> [[B]], <2 x i32> zeroinitializer ; CHECK-NEXT: ret <2 x i32> [[SEL]] ; %zext = zext <2 x i1> %cond to <2 x i32> @@ -3416,8 +3637,9 @@ define <2 x i32> @select_cond_val_zext_cond_vec(<2 x i1> %cond, <2 x i32> %b) { } define i32 @select_cond_val_sext_cond(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_val_sext_cond( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 [[B:%.*]], i32 0 +; CHECK-LABEL: define i32 @select_cond_val_sext_cond( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[B]], i32 0 ; CHECK-NEXT: ret i32 [[SEL]] ; %sext = sext i1 %cond to i32 @@ -3426,8 +3648,9 @@ define i32 @select_cond_val_sext_cond(i1 %cond, i32 %b) { } define i32 @select_cond_zext_not_cond_val(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_zext_not_cond_val( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 0, i32 [[B:%.*]] +; CHECK-LABEL: define i32 @select_cond_zext_not_cond_val( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 0, i32 [[B]] ; CHECK-NEXT: ret i32 [[SEL]] ; %not_cond = xor i1 %cond, true @@ -3437,8 +3660,9 @@ define i32 @select_cond_zext_not_cond_val(i1 %cond, i32 %b) { } define i32 @select_cond_sext_not_cond_val(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_sext_not_cond_val( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 0, i32 [[B:%.*]] +; CHECK-LABEL: define i32 @select_cond_sext_not_cond_val( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 0, i32 [[B]] ; CHECK-NEXT: ret i32 [[SEL]] ; %not_cond = xor i1 %cond, true @@ -3449,8 +3673,9 @@ define i32 @select_cond_sext_not_cond_val(i1 %cond, i32 %b) { define i32 @select_cond_val_zext_not_cond(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_val_zext_not_cond( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 [[B:%.*]], i32 1 +; CHECK-LABEL: define i32 @select_cond_val_zext_not_cond( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[B]], i32 1 ; CHECK-NEXT: ret i32 [[SEL]] ; %not_cond = xor i1 %cond, true @@ -3460,8 +3685,9 @@ define i32 @select_cond_val_zext_not_cond(i1 %cond, i32 %b) { } define i32 @select_cond_val_sext_not_cond(i1 %cond, i32 %b) { -; CHECK-LABEL: @select_cond_val_sext_not_cond( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 [[B:%.*]], i32 -1 +; CHECK-LABEL: define i32 @select_cond_val_sext_not_cond( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[B]], i32 -1 ; CHECK-NEXT: ret i32 [[SEL]] ; %not_cond = xor i1 %cond, true @@ -3471,7 +3697,8 @@ define i32 @select_cond_val_sext_not_cond(i1 %cond, i32 %b) { } define i32 @select_cond_not_cond_cond1(i1 %cond) { -; CHECK-LABEL: @select_cond_not_cond_cond1( +; CHECK-LABEL: define i32 @select_cond_not_cond_cond1( +; CHECK-SAME: i1 [[COND:%.*]]) { ; CHECK-NEXT: ret i32 0 ; %z = zext i1 %cond to i32 @@ -3482,7 +3709,8 @@ define i32 @select_cond_not_cond_cond1(i1 %cond) { } define i32 @select_cond_not_cond_cond2(i1 %cond) { -; CHECK-LABEL: @select_cond_not_cond_cond2( +; CHECK-LABEL: define i32 @select_cond_not_cond_cond2( +; CHECK-SAME: i1 [[COND:%.*]]) { ; CHECK-NEXT: ret i32 0 ; %z = sext i1 %cond to i32 @@ -3495,9 +3723,10 @@ define i32 @select_cond_not_cond_cond2(i1 %cond) { ; This previously crashed due to Constant::getUniqueInteger not handling ; scalable vector splat ConstantExprs. define <vscale x 2 x i32> @and_constant_select_svec(<vscale x 2 x i32> %x, <vscale x 2 x i1> %cond) { -; CHECK-LABEL: @and_constant_select_svec( -; CHECK-NEXT: [[A:%.*]] = and <vscale x 2 x i32> [[X:%.*]], splat (i32 1) -; CHECK-NEXT: [[B:%.*]] = select <vscale x 2 x i1> [[COND:%.*]], <vscale x 2 x i32> [[A]], <vscale x 2 x i32> [[X]] +; CHECK-LABEL: define <vscale x 2 x i32> @and_constant_select_svec( +; CHECK-SAME: <vscale x 2 x i32> [[X:%.*]], <vscale x 2 x i1> [[COND:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = and <vscale x 2 x i32> [[X]], splat (i32 1) +; CHECK-NEXT: [[B:%.*]] = select <vscale x 2 x i1> [[COND]], <vscale x 2 x i32> [[A]], <vscale x 2 x i32> [[X]] ; CHECK-NEXT: ret <vscale x 2 x i32> [[B]] ; %a = and <vscale x 2 x i32> %x, splat (i32 1) @@ -3506,8 +3735,9 @@ define <vscale x 2 x i32> @and_constant_select_svec(<vscale x 2 x i32> %x, <vsca } define <vscale x 2 x i32> @scalable_sign_bits(<vscale x 2 x i8> %x) { -; CHECK-LABEL: @scalable_sign_bits( -; CHECK-NEXT: [[A:%.*]] = sext <vscale x 2 x i8> [[X:%.*]] to <vscale x 2 x i32> +; CHECK-LABEL: define <vscale x 2 x i32> @scalable_sign_bits( +; CHECK-SAME: <vscale x 2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[A:%.*]] = sext <vscale x 2 x i8> [[X]] to <vscale x 2 x i32> ; CHECK-NEXT: [[B:%.*]] = shl nsw <vscale x 2 x i32> [[A]], splat (i32 16) ; CHECK-NEXT: ret <vscale x 2 x i32> [[B]] ; @@ -3517,8 +3747,9 @@ define <vscale x 2 x i32> @scalable_sign_bits(<vscale x 2 x i8> %x) { } define <vscale x 2 x i1> @scalable_non_zero(<vscale x 2 x i32> %x) { -; CHECK-LABEL: @scalable_non_zero( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <vscale x 2 x i32> [[X:%.*]], splat (i32 56) +; CHECK-LABEL: define <vscale x 2 x i1> @scalable_non_zero( +; CHECK-SAME: <vscale x 2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <vscale x 2 x i32> [[X]], splat (i32 56) ; CHECK-NEXT: ret <vscale x 2 x i1> [[CMP]] ; %a = or <vscale x 2 x i32> %x, splat (i32 1) @@ -3528,8 +3759,9 @@ define <vscale x 2 x i1> @scalable_non_zero(<vscale x 2 x i32> %x) { } define i32 @clamp_umin(i32 %x) { -; CHECK-LABEL: @clamp_umin( -; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 1) +; CHECK-LABEL: define i32 @clamp_umin( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X]], i32 1) ; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp eq i32 %x, 0 @@ -3538,8 +3770,9 @@ define i32 @clamp_umin(i32 %x) { } define i32 @clamp_umin_use(i32 %x) { -; CHECK-LABEL: @clamp_umin_use( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0 +; CHECK-LABEL: define i32 @clamp_umin_use( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], 0 ; CHECK-NEXT: call void @use1(i1 [[CMP]]) ; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X]], i32 1) ; CHECK-NEXT: ret i32 [[SEL]] @@ -3553,8 +3786,9 @@ define i32 @clamp_umin_use(i32 %x) { ; negative test - wrong cmp constant define i32 @not_clamp_umin1(i32 %x) { -; CHECK-LABEL: @not_clamp_umin1( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2 +; CHECK-LABEL: define i32 @not_clamp_umin1( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], 2 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 1, i32 [[X]] ; CHECK-NEXT: ret i32 [[SEL]] ; @@ -3566,8 +3800,9 @@ define i32 @not_clamp_umin1(i32 %x) { ; negative test - wrong select constant define i32 @not_clamp_umin2(i32 %x) { -; CHECK-LABEL: @not_clamp_umin2( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0 +; CHECK-LABEL: define i32 @not_clamp_umin2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], 0 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 -1, i32 [[X]] ; CHECK-NEXT: ret i32 [[SEL]] ; @@ -3577,8 +3812,9 @@ define i32 @not_clamp_umin2(i32 %x) { } define <2 x i8> @clamp_umaxval(<2 x i8> %x) { -; CHECK-LABEL: @clamp_umaxval( -; CHECK-NEXT: [[SEL:%.*]] = call <2 x i8> @llvm.umin.v2i8(<2 x i8> [[X:%.*]], <2 x i8> splat (i8 -2)) +; CHECK-LABEL: define <2 x i8> @clamp_umaxval( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = call <2 x i8> @llvm.umin.v2i8(<2 x i8> [[X]], <2 x i8> splat (i8 -2)) ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 255, i8 255> @@ -3589,8 +3825,9 @@ define <2 x i8> @clamp_umaxval(<2 x i8> %x) { ; negative test - wrong cmp constant define i8 @not_clamp_umax1(i8 %x) { -; CHECK-LABEL: @not_clamp_umax1( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], -3 +; CHECK-LABEL: define i8 @not_clamp_umax1( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], -3 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 -2, i8 [[X]] ; CHECK-NEXT: ret i8 [[SEL]] ; @@ -3602,8 +3839,9 @@ define i8 @not_clamp_umax1(i8 %x) { ; negative test - wrong select constant define i8 @not_clamp_umax2(i8 %x) { -; CHECK-LABEL: @not_clamp_umax2( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], -1 +; CHECK-LABEL: define i8 @not_clamp_umax2( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], -1 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 1, i8 [[X]] ; CHECK-NEXT: ret i8 [[SEL]] ; @@ -3613,8 +3851,9 @@ define i8 @not_clamp_umax2(i8 %x) { } define i8 @clamp_smin(i8 %x) { -; CHECK-LABEL: @clamp_smin( -; CHECK-NEXT: [[SEL:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 -127) +; CHECK-LABEL: define i8 @clamp_smin( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = call i8 @llvm.smax.i8(i8 [[X]], i8 -127) ; CHECK-NEXT: ret i8 [[SEL]] ; %cmp = icmp eq i8 %x, -128 @@ -3623,8 +3862,9 @@ define i8 @clamp_smin(i8 %x) { } define i8 @clamp_smin_use(i8 %x) { -; CHECK-LABEL: @clamp_smin_use( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], -128 +; CHECK-LABEL: define i8 @clamp_smin_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], -128 ; CHECK-NEXT: call void @use1(i1 [[CMP]]) ; CHECK-NEXT: [[SEL:%.*]] = call i8 @llvm.smax.i8(i8 [[X]], i8 -127) ; CHECK-NEXT: ret i8 [[SEL]] @@ -3638,8 +3878,9 @@ define i8 @clamp_smin_use(i8 %x) { ; negative test - wrong cmp constant define i8 @not_clamp_smin1(i8 %x) { -; CHECK-LABEL: @not_clamp_smin1( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], 127 +; CHECK-LABEL: define i8 @not_clamp_smin1( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 127 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 -127, i8 [[X]] ; CHECK-NEXT: ret i8 [[SEL]] ; @@ -3651,8 +3892,9 @@ define i8 @not_clamp_smin1(i8 %x) { ; negative test - wrong select constant define i8 @not_clamp_smin2(i8 %x) { -; CHECK-LABEL: @not_clamp_smin2( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], -128 +; CHECK-LABEL: define i8 @not_clamp_smin2( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], -128 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 -1, i8 [[X]] ; CHECK-NEXT: ret i8 [[SEL]] ; @@ -3662,8 +3904,9 @@ define i8 @not_clamp_smin2(i8 %x) { } define <2 x i8> @clamp_smaxval(<2 x i8> %x) { -; CHECK-LABEL: @clamp_smaxval( -; CHECK-NEXT: [[SEL:%.*]] = call <2 x i8> @llvm.smin.v2i8(<2 x i8> [[X:%.*]], <2 x i8> splat (i8 126)) +; CHECK-LABEL: define <2 x i8> @clamp_smaxval( +; CHECK-SAME: <2 x i8> [[X:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = call <2 x i8> @llvm.smin.v2i8(<2 x i8> [[X]], <2 x i8> splat (i8 126)) ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %cmp = icmp eq <2 x i8> %x, <i8 127, i8 127> @@ -3674,8 +3917,9 @@ define <2 x i8> @clamp_smaxval(<2 x i8> %x) { ; negative test - wrong cmp constant define i8 @not_clamp_smax1(i8 %x) { -; CHECK-LABEL: @not_clamp_smax1( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], -128 +; CHECK-LABEL: define i8 @not_clamp_smax1( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], -128 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 126, i8 [[X]] ; CHECK-NEXT: ret i8 [[SEL]] ; @@ -3687,8 +3931,9 @@ define i8 @not_clamp_smax1(i8 %x) { ; negative test - wrong select constant define i8 @not_clamp_smax2(i8 %x) { -; CHECK-LABEL: @not_clamp_smax2( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], 127 +; CHECK-LABEL: define i8 @not_clamp_smax2( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 127 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 125, i8 [[X]] ; CHECK-NEXT: ret i8 [[SEL]] ; @@ -3699,8 +3944,9 @@ define i8 @not_clamp_smax2(i8 %x) { ; Used to infinite loop. define i32 @pr61361(i32 %arg) { -; CHECK-LABEL: @pr61361( -; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[ARG:%.*]], 0 +; CHECK-LABEL: define i32 @pr61361( +; CHECK-SAME: i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[ARG]], 0 ; CHECK-NEXT: [[SEL2:%.*]] = select i1 [[CMP2]], i32 16777215, i32 0 ; CHECK-NEXT: ret i32 [[SEL2]] ; @@ -3713,18 +3959,18 @@ define i32 @pr61361(i32 %arg) { } define i32 @pr62088() { -; CHECK-LABEL: @pr62088( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[NOT2:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ -2, [[LOOP]] ] -; CHECK-NEXT: [[H_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ 1, [[LOOP]] ] +; CHECK-LABEL: define i32 @pr62088() { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[NOT2:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ -2, %[[LOOP]] ] +; CHECK-NEXT: [[H_0:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ 1, %[[LOOP]] ] ; CHECK-NEXT: [[XOR:%.*]] = or disjoint i32 [[H_0]], [[NOT2]] ; CHECK-NEXT: [[SUB5:%.*]] = sub i32 -1824888657, [[XOR]] ; CHECK-NEXT: [[XOR6:%.*]] = xor i32 [[SUB5]], -1260914025 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[XOR6]], 824855120 -; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]] -; CHECK: exit: +; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]] +; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 [[H_0]] ; entry: @@ -3759,9 +4005,10 @@ exit: ; X&Y==C?X|Y:X^Y, X&Y==C?X^Y:X|Y ; TODO: X&Y==0 could imply no_common_bit to TrueValue define i32 @src_and_eq_0_or_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_and_eq_0_or_xor( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_0_or_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] @@ -3779,9 +4026,10 @@ entry: ; TODO: X&Y==0 could imply no_common_bit to TrueValue define i32 @src_and_eq_0_xor_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_and_eq_0_xor_or( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_0_xor_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] @@ -3799,9 +4047,10 @@ entry: ; TODO: X&Y==-1 could imply all_common_bit to TrueValue define i32 @src_and_eq_neg1_or_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_and_eq_neg1_or_xor( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_neg1_or_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], -1 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 -1, i32 [[XOR]] @@ -3818,9 +4067,10 @@ entry: ; TODO: X&Y==-1 could imply all_common_bit to TrueValue define i32 @src_and_eq_neg1_xor_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_and_eq_neg1_xor_or( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_neg1_xor_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], -1 ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 0, i32 [[OR]] @@ -3836,10 +4086,11 @@ entry: } define i32 @src_and_eq_C_or_xororC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_and_eq_C_or_xororC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_C_or_xororC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR1:%.*]] = or i32 [[XOR]], [[C]] @@ -3857,10 +4108,11 @@ entry: } define i32 @src_and_eq_C_or_xorxorC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_and_eq_C_or_xorxorC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_C_or_xorxorC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C]] @@ -3878,10 +4130,11 @@ entry: } define i32 @src_and_eq_C_xor_OrAndNotC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_and_eq_C_xor_OrAndNotC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_C_xor_OrAndNotC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C]], -1 @@ -3901,10 +4154,11 @@ entry: } define <2 x i32> @src_and_eq_C_xor_OrAndNotC_vec_poison(<2 x i32> %0, <2 x i32> %1, <2 x i32> %2) { -; CHECK-LABEL: @src_and_eq_C_xor_OrAndNotC_vec_poison( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[TMP1:%.*]], [[TMP0:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[AND]], [[TMP2:%.*]] +; CHECK-LABEL: define <2 x i32> @src_and_eq_C_xor_OrAndNotC_vec_poison( +; CHECK-SAME: <2 x i32> [[TMP0:%.*]], <2 x i32> [[TMP1:%.*]], <2 x i32> [[TMP2:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[TMP1]], [[TMP0]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[AND]], [[TMP2]] ; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[TMP1]], [[TMP0]] ; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[TMP1]], [[TMP0]] ; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i32> [[TMP2]], <i32 -1, i32 poison> @@ -3924,10 +4178,11 @@ entry: } define i32 @src_and_eq_C_xor_orxorC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_and_eq_C_xor_orxorC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_and_eq_C_xor_orxorC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[C]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C]] @@ -3948,9 +4203,10 @@ entry: ; X|Y==C?X&Y:X^Y, X|Y==C?X^Y:X&Y ; TODO: X|Y==0 could imply no_common_bit to TrueValue define i32 @src_or_eq_0_and_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_or_eq_0_and_xor( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_0_and_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: ret i32 [[XOR]] ; entry: @@ -3964,9 +4220,10 @@ entry: ; TODO: X|Y==0 could imply no_common_bit to TrueValue define i32 @src_or_eq_0_xor_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_or_eq_0_xor_and( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_0_xor_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: ret i32 [[AND]] ; entry: @@ -3979,9 +4236,10 @@ entry: } define i32 @src_or_eq_neg1_and_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_or_eq_neg1_and_xor( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_neg1_and_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], -1 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X]], [[Y]] @@ -4000,9 +4258,10 @@ entry: } define i32 @src_or_eq_neg1_xor_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_or_eq_neg1_xor_and( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_neg1_xor_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], -1 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] @@ -4021,10 +4280,11 @@ entry: } define i32 @src_or_eq_C_and_xorC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_or_eq_C_and_xorC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_C_and_xorC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[XOR]], [[C]] @@ -4042,10 +4302,11 @@ entry: } define i32 @src_or_eq_C_and_andnotxorC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_or_eq_C_and_andnotxorC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_C_and_andnotxorC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[TMP0]], -1 @@ -4065,10 +4326,11 @@ entry: } define i32 @src_or_eq_C_xor_xorandC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_or_eq_C_xor_xorandC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_C_xor_xorandC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C]] @@ -4086,10 +4348,11 @@ entry: } define i32 @src_or_eq_C_xor_andnotandC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_or_eq_C_xor_andnotandC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_or_eq_C_xor_andnotandC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], [[C]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[AND]], -1 @@ -4111,9 +4374,10 @@ entry: ; https://alive2.llvm.org/ce/z/c6oXi4 ; X^Y==C?X&Y:X|Y, X^Y==C?X|Y:X&Y define i32 @src_xor_eq_neg1_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_xor_eq_neg1_and( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_xor_eq_neg1_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], -1 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] @@ -4133,9 +4397,10 @@ entry: ; TODO: X^Y==-1 could imply no_common_bit to TrueValue define i32 @src_xor_eq_neg1_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_xor_eq_neg1_or( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i32 @src_xor_eq_neg1_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], -1 ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 -1 @@ -4150,10 +4415,11 @@ entry: } define i32 @src_xor_eq_C_and_xororC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_xor_eq_C_and_xororC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_xor_eq_C_and_xororC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[OR]], [[C]] @@ -4171,10 +4437,11 @@ entry: } define i32 @src_xor_eq_C_and_andornotC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_xor_eq_C_and_andornotC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_xor_eq_C_and_andornotC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[C]], -1 @@ -4194,10 +4461,11 @@ entry: } define i32 @src_xor_eq_C_or_xorandC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_xor_eq_C_or_xorandC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_xor_eq_C_or_xorandC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[XOR1:%.*]] = xor i32 [[AND]], [[C]] @@ -4215,10 +4483,11 @@ entry: } define i32 @src_xor_eq_C_or_orandC(i32 %x, i32 %y, i32 %c) { -; CHECK-LABEL: @src_xor_eq_C_or_orandC( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C:%.*]] +; CHECK-LABEL: define i32 @src_xor_eq_C_or_orandC( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[C:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y]], [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[XOR]], [[C]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y]], [[X]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], [[X]] ; CHECK-NEXT: [[OR1:%.*]] = or i32 [[AND]], [[C]] @@ -4238,8 +4507,9 @@ entry: ; Select icmp and/or/xor ; NO TRANSFORMED - select condition is compare with not 0 define i32 @src_select_and_min_positive_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_and_min_positive_int( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_and_min_positive_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND0:%.*]] = icmp eq i32 [[AND]], 1 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] @@ -4255,8 +4525,9 @@ define i32 @src_select_and_min_positive_int(i32 %x, i32 %y) { } define i32 @src_select_and_max_positive_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_and_max_positive_int( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_and_max_positive_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND0:%.*]] = icmp eq i32 [[AND]], 2147483647 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] @@ -4272,8 +4543,9 @@ define i32 @src_select_and_max_positive_int(i32 %x, i32 %y) { } define i32 @src_select_and_min_negative_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_and_min_negative_int( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_and_min_negative_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND0:%.*]] = icmp eq i32 [[AND]], -2147483648 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] @@ -4289,8 +4561,9 @@ define i32 @src_select_and_min_negative_int(i32 %x, i32 %y) { } define i32 @src_select_or_min_positive_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_or_min_positive_int( -; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_or_min_positive_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR0:%.*]] = icmp eq i32 [[OR]], 1 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] @@ -4306,8 +4579,9 @@ define i32 @src_select_or_min_positive_int(i32 %x, i32 %y) { } define i32 @src_select_or_max_positive_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_or_max_positive_int( -; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_or_max_positive_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR0:%.*]] = icmp eq i32 [[OR]], 2147483647 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] @@ -4323,8 +4597,9 @@ define i32 @src_select_or_max_positive_int(i32 %x, i32 %y) { } define i32 @src_select_or_min_negative_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_or_min_negative_int( -; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_or_min_negative_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR0:%.*]] = icmp eq i32 [[OR]], -2147483648 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] @@ -4340,8 +4615,9 @@ define i32 @src_select_or_min_negative_int(i32 %x, i32 %y) { } define i32 @src_select_or_max_negative_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_or_max_negative_int( -; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_or_max_negative_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR0:%.*]] = icmp eq i32 [[OR]], -1 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] @@ -4357,8 +4633,9 @@ define i32 @src_select_or_max_negative_int(i32 %x, i32 %y) { } define i32 @src_select_xor_min_positive_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_xor_min_positive_int( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_xor_min_positive_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[XOR]], 1 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] @@ -4374,8 +4651,9 @@ define i32 @src_select_xor_min_positive_int(i32 %x, i32 %y) { } define i32 @src_select_xor_max_positive_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_xor_max_positive_int( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_xor_max_positive_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[XOR]], 2147483647 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] @@ -4391,8 +4669,9 @@ define i32 @src_select_xor_max_positive_int(i32 %x, i32 %y) { } define i32 @src_select_xor_min_negative_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_xor_min_negative_int( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_xor_min_negative_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[XOR]], -2147483648 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] @@ -4408,8 +4687,9 @@ define i32 @src_select_xor_min_negative_int(i32 %x, i32 %y) { } define i32 @src_select_xor_max_negative_int(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_xor_max_negative_int( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_xor_max_negative_int( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[XOR]], -1 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] @@ -4428,8 +4708,9 @@ define i32 @src_select_xor_max_negative_int(i32 %x, i32 %y) { ; https://alive2.llvm.org/ce/z/BVgrJ- ; NO TRANSFORMED - not supported define i32 @src_no_trans_select_and_eq0_and_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_and_eq0_and_or( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_and_eq0_and_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND0:%.*]] = icmp eq i32 [[AND]], 0 ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[AND0]], i32 0, i32 [[OR]] @@ -4443,8 +4724,9 @@ define i32 @src_no_trans_select_and_eq0_and_or(i32 %x, i32 %y) { } define i32 @src_no_trans_select_and_eq0_and_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_and_eq0_and_xor( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_and_eq0_and_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND0:%.*]] = icmp eq i32 [[AND]], 0 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[AND0]], i32 0, i32 [[XOR]] @@ -4458,8 +4740,9 @@ define i32 @src_no_trans_select_and_eq0_and_xor(i32 %x, i32 %y) { } define i32 @src_no_trans_select_and_eq0_or_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_and_eq0_or_and( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_and_eq0_or_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND0:%.*]] = icmp eq i32 [[AND]], 0 ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[AND0]], i32 [[OR]], i32 [[AND]] @@ -4473,8 +4756,9 @@ define i32 @src_no_trans_select_and_eq0_or_and(i32 %x, i32 %y) { } define i32 @src_no_trans_select_and_eq0_xor_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_and_eq0_xor_and( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_and_eq0_xor_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND0:%.*]] = icmp eq i32 [[AND]], 0 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[AND0]], i32 [[XOR]], i32 [[AND]] @@ -4488,8 +4772,9 @@ define i32 @src_no_trans_select_and_eq0_xor_and(i32 %x, i32 %y) { } define i32 @src_no_trans_select_or_eq0_or_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_or_eq0_or_and( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_or_eq0_or_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: ret i32 [[AND]] ; %or = or i32 %x, %y @@ -4500,8 +4785,9 @@ define i32 @src_no_trans_select_or_eq0_or_and(i32 %x, i32 %y) { } define i32 @src_no_trans_select_or_eq0_or_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_or_eq0_or_xor( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_or_eq0_or_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: ret i32 [[XOR]] ; %or = or i32 %x, %y @@ -4512,8 +4798,9 @@ define i32 @src_no_trans_select_or_eq0_or_xor(i32 %x, i32 %y) { } define i32 @src_no_trans_select_or_eq0_and_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_or_eq0_and_or( -; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_or_eq0_and_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: ret i32 [[OR]] ; %or = or i32 %x, %y @@ -4524,8 +4811,9 @@ define i32 @src_no_trans_select_or_eq0_and_or(i32 %x, i32 %y) { } define i32 @src_no_trans_select_or_eq0_xor_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_or_eq0_xor_or( -; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_or_eq0_xor_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: ret i32 [[OR]] ; %or = or i32 %x, %y @@ -4536,8 +4824,9 @@ define i32 @src_no_trans_select_or_eq0_xor_or(i32 %x, i32 %y) { } define i32 @src_no_trans_select_and_ne0_xor_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_and_ne0_xor_or( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_and_ne0_xor_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: ret i32 [[XOR]] ; %or = or i32 %x, %y @@ -4548,8 +4837,9 @@ define i32 @src_no_trans_select_and_ne0_xor_or(i32 %x, i32 %y) { } define i32 @src_no_trans_select_xor_eq0_xor_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_xor_eq0_xor_and( -; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_xor_eq0_xor_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 0, i32 [[AND]] ; CHECK-NEXT: ret i32 [[COND]] @@ -4562,8 +4852,9 @@ define i32 @src_no_trans_select_xor_eq0_xor_and(i32 %x, i32 %y) { } define i32 @src_no_trans_select_xor_eq0_xor_or(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_xor_eq0_xor_or( -; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_xor_eq0_xor_or( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 0, i32 [[OR]] ; CHECK-NEXT: ret i32 [[COND]] @@ -4576,8 +4867,9 @@ define i32 @src_no_trans_select_xor_eq0_xor_or(i32 %x, i32 %y) { } define i32 @src_no_trans_select_xor_eq0_and_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_xor_eq0_and_xor( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_xor_eq0_and_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 [[AND]], i32 [[XOR]] @@ -4592,8 +4884,9 @@ define i32 @src_no_trans_select_xor_eq0_and_xor(i32 %x, i32 %y) { ; https://alive2.llvm.org/ce/z/SBe8ei define i32 @src_no_trans_select_xor_eq0_or_xor(i32 %x, i32 %y) { -; CHECK-LABEL: @src_no_trans_select_xor_eq0_or_xor( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_no_trans_select_xor_eq0_or_xor( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: [[OR:%.*]] = or i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 [[OR]], i32 [[XOR]] @@ -4609,8 +4902,9 @@ define i32 @src_no_trans_select_xor_eq0_or_xor(i32 %x, i32 %y) { ; (X == C) ? X : Y -> (X == C) ? C : Y ; Fixed #77553 define i32 @src_select_xxory_eq0_xorxy_y(i32 %x, i32 %y) { -; CHECK-LABEL: @src_select_xxory_eq0_xorxy_y( -; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_select_xxory_eq0_xorxy_y( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR0:%.*]] = icmp eq i32 [[X]], [[Y]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[XOR0]], i32 0, i32 [[Y]] ; CHECK-NEXT: ret i32 [[COND]] ; @@ -4621,9 +4915,10 @@ define i32 @src_select_xxory_eq0_xorxy_y(i32 %x, i32 %y) { } define i32 @sequence_select_with_same_cond_false(i1 %c1, i1 %c2){ -; CHECK-LABEL: @sequence_select_with_same_cond_false( -; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2:%.*]], i32 666, i32 45 -; CHECK-NEXT: [[S3:%.*]] = select i1 [[C1:%.*]], i32 789, i32 [[S2]] +; CHECK-LABEL: define i32 @sequence_select_with_same_cond_false( +; CHECK-SAME: i1 [[C1:%.*]], i1 [[C2:%.*]]) { +; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2]], i32 666, i32 45 +; CHECK-NEXT: [[S3:%.*]] = select i1 [[C1]], i32 789, i32 [[S2]] ; CHECK-NEXT: ret i32 [[S3]] ; %s1 = select i1 %c1, i32 23, i32 45 @@ -4633,9 +4928,10 @@ define i32 @sequence_select_with_same_cond_false(i1 %c1, i1 %c2){ } define i32 @sequence_select_with_same_cond_true(i1 %c1, i1 %c2){ -; CHECK-LABEL: @sequence_select_with_same_cond_true( -; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2:%.*]], i32 45, i32 666 -; CHECK-NEXT: [[S3:%.*]] = select i1 [[C1:%.*]], i32 [[S2]], i32 789 +; CHECK-LABEL: define i32 @sequence_select_with_same_cond_true( +; CHECK-SAME: i1 [[C1:%.*]], i1 [[C2:%.*]]) { +; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2]], i32 45, i32 666 +; CHECK-NEXT: [[S3:%.*]] = select i1 [[C1]], i32 [[S2]], i32 789 ; CHECK-NEXT: ret i32 [[S3]] ; %s1 = select i1 %c1, i32 45, i32 23 @@ -4645,9 +4941,10 @@ define i32 @sequence_select_with_same_cond_true(i1 %c1, i1 %c2){ } define double @sequence_select_with_same_cond_double(double %a, i1 %c1, i1 %c2, double %r1, double %r2){ -; CHECK-LABEL: @sequence_select_with_same_cond_double( -; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1:%.*]], double 1.000000e+00, double 0.000000e+00 -; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2:%.*]], double [[S1]], double 2.000000e+00 +; CHECK-LABEL: define double @sequence_select_with_same_cond_double( +; CHECK-SAME: double [[A:%.*]], i1 [[C1:%.*]], i1 [[C2:%.*]], double [[R1:%.*]], double [[R2:%.*]]) { +; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], double 1.000000e+00, double 0.000000e+00 +; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2]], double [[S1]], double 2.000000e+00 ; CHECK-NEXT: [[S3:%.*]] = select i1 [[C1]], double [[S2]], double 3.000000e+00 ; CHECK-NEXT: ret double [[S3]] ; @@ -4660,10 +4957,11 @@ define double @sequence_select_with_same_cond_double(double %a, i1 %c1, i1 %c2, declare void @use32(i32) define i32 @sequence_select_with_same_cond_extra_use(i1 %c1, i1 %c2){ -; CHECK-LABEL: @sequence_select_with_same_cond_extra_use( -; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1:%.*]], i32 23, i32 45 +; CHECK-LABEL: define i32 @sequence_select_with_same_cond_extra_use( +; CHECK-SAME: i1 [[C1:%.*]], i1 [[C2:%.*]]) { +; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], i32 23, i32 45 ; CHECK-NEXT: call void @use32(i32 [[S1]]) -; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2:%.*]], i32 666, i32 [[S1]] +; CHECK-NEXT: [[S2:%.*]] = select i1 [[C2]], i32 666, i32 [[S1]] ; CHECK-NEXT: [[S3:%.*]] = select i1 [[C1]], i32 789, i32 [[S2]] ; CHECK-NEXT: ret i32 [[S3]] ; @@ -4675,9 +4973,10 @@ define i32 @sequence_select_with_same_cond_extra_use(i1 %c1, i1 %c2){ } define i8 @test_replace_freeze_multiuse(i1 %x, i8 %y) { -; CHECK-LABEL: @test_replace_freeze_multiuse( -; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[X:%.*]] to i8 -; CHECK-NEXT: [[SHL:%.*]] = shl nuw i8 [[EXT]], [[Y:%.*]] +; CHECK-LABEL: define i8 @test_replace_freeze_multiuse( +; CHECK-SAME: i1 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[X]] to i8 +; CHECK-NEXT: [[SHL:%.*]] = shl nuw i8 [[EXT]], [[Y]] ; CHECK-NEXT: [[SHL_FR:%.*]] = freeze i8 [[SHL]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X]], i8 0, i8 [[SHL_FR]] ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[SHL_FR]], [[SEL]] @@ -4692,9 +4991,10 @@ define i8 @test_replace_freeze_multiuse(i1 %x, i8 %y) { } define i8 @test_replace_freeze_oneuse(i1 %x, i8 %y) { -; CHECK-LABEL: @test_replace_freeze_oneuse( -; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[X:%.*]] to i8 -; CHECK-NEXT: [[SHL:%.*]] = shl nuw i8 [[EXT]], [[Y:%.*]] +; CHECK-LABEL: define i8 @test_replace_freeze_oneuse( +; CHECK-SAME: i1 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[X]] to i8 +; CHECK-NEXT: [[SHL:%.*]] = shl nuw i8 [[EXT]], [[Y]] ; CHECK-NEXT: [[SHL_FR:%.*]] = freeze i8 [[SHL]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X]], i8 0, i8 [[SHL_FR]] ; CHECK-NEXT: ret i8 [[SEL]] @@ -4707,8 +5007,9 @@ define i8 @test_replace_freeze_oneuse(i1 %x, i8 %y) { } define i8 @select_knownbits_simplify(i8 noundef %x) { -; CHECK-LABEL: @select_knownbits_simplify( -; CHECK-NEXT: [[X_LO:%.*]] = and i8 [[X:%.*]], 1 +; CHECK-LABEL: define i8 @select_knownbits_simplify( +; CHECK-SAME: i8 noundef [[X:%.*]]) { +; CHECK-NEXT: [[X_LO:%.*]] = and i8 [[X]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X_LO]], 0 ; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], -2 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i8 [[AND]], i8 0 @@ -4722,8 +5023,9 @@ define i8 @select_knownbits_simplify(i8 noundef %x) { } define i8 @select_knownbits_simplify_nested(i8 noundef %x) { -; CHECK-LABEL: @select_knownbits_simplify_nested( -; CHECK-NEXT: [[X_LO:%.*]] = and i8 [[X:%.*]], 1 +; CHECK-LABEL: define i8 @select_knownbits_simplify_nested( +; CHECK-SAME: i8 noundef [[X:%.*]]) { +; CHECK-NEXT: [[X_LO:%.*]] = and i8 [[X]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X_LO]], 0 ; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], -2 ; CHECK-NEXT: [[MUL:%.*]] = mul i8 [[AND]], [[AND]] @@ -4739,8 +5041,9 @@ define i8 @select_knownbits_simplify_nested(i8 noundef %x) { } define i8 @select_knownbits_simplify_missing_noundef(i8 %x) { -; CHECK-LABEL: @select_knownbits_simplify_missing_noundef( -; CHECK-NEXT: [[X_LO:%.*]] = and i8 [[X:%.*]], 1 +; CHECK-LABEL: define i8 @select_knownbits_simplify_missing_noundef( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[X_LO:%.*]] = and i8 [[X]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X_LO]], 0 ; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], -2 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i8 [[AND]], i8 0 @@ -4757,8 +5060,9 @@ define i8 @select_knownbits_simplify_missing_noundef(i8 %x) { ; Make sure we don't replace %ptr with @g_ext, which may cause the load to trigger UB. define i32 @pr99436(ptr align 4 dereferenceable(4) %ptr) { -; CHECK-LABEL: @pr99436( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[PTR:%.*]], @g_ext +; CHECK-LABEL: define i32 @pr99436( +; CHECK-SAME: ptr align 4 dereferenceable(4) [[PTR:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[PTR]], @g_ext ; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[PTR]], align 4 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[VAL]], i32 0 ; CHECK-NEXT: ret i32 [[RET]] @@ -4770,9 +5074,10 @@ define i32 @pr99436(ptr align 4 dereferenceable(4) %ptr) { } define i8 @sel_trunc_simplify(i1 %c, i8 %x, i16 %y) { -; CHECK-LABEL: @sel_trunc_simplify( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i16 [[Y:%.*]] to i8 -; CHECK-NEXT: [[TRUNC:%.*]] = select i1 [[C:%.*]], i8 [[X:%.*]], i8 [[TMP1]] +; CHECK-LABEL: define i8 @sel_trunc_simplify( +; CHECK-SAME: i1 [[C:%.*]], i8 [[X:%.*]], i16 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = trunc i16 [[Y]] to i8 +; CHECK-NEXT: [[TRUNC:%.*]] = select i1 [[C]], i8 [[X]], i8 [[TMP1]] ; CHECK-NEXT: ret i8 [[TRUNC]] ; %x.ext = zext i8 %x to i16 @@ -4782,10 +5087,11 @@ define i8 @sel_trunc_simplify(i1 %c, i8 %x, i16 %y) { } define i32 @sel_umin_simplify(i1 %c, i32 %x, i16 %y) { -; CHECK-LABEL: @sel_umin_simplify( -; CHECK-NEXT: [[ARG2_EXT:%.*]] = zext i16 [[ARG2:%.*]] to i32 -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 [[ARG2_EXT]]) -; CHECK-NEXT: [[RES:%.*]] = select i1 [[C:%.*]], i32 [[TMP1]], i32 0 +; CHECK-LABEL: define i32 @sel_umin_simplify( +; CHECK-SAME: i1 [[C:%.*]], i32 [[X:%.*]], i16 [[Y:%.*]]) { +; CHECK-NEXT: [[Y_EXT:%.*]] = zext i16 [[Y]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X]], i32 [[Y_EXT]]) +; CHECK-NEXT: [[RES:%.*]] = select i1 [[C]], i32 [[TMP1]], i32 0 ; CHECK-NEXT: ret i32 [[RES]] ; %sel = select i1 %c, i32 %x, i32 0 @@ -4795,9 +5101,10 @@ define i32 @sel_umin_simplify(i1 %c, i32 %x, i16 %y) { } define i32 @sel_extractvalue_simplify(i1 %c, { i32, i32 } %agg1, i32 %x, i32 %y) { -; CHECK-LABEL: @sel_extractvalue_simplify( -; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[AGG1:%.*]], 1 -; CHECK-NEXT: [[RES:%.*]] = select i1 [[C:%.*]], i32 [[TMP1]], i32 [[Y:%.*]] +; CHECK-LABEL: define i32 @sel_extractvalue_simplify( +; CHECK-SAME: i1 [[C:%.*]], { i32, i32 } [[AGG1:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[AGG1]], 1 +; CHECK-NEXT: [[RES:%.*]] = select i1 [[C]], i32 [[TMP1]], i32 [[Y]] ; CHECK-NEXT: ret i32 [[RES]] ; %agg2.0 = insertvalue { i32, i32 } poison, i32 %x, 0 @@ -4808,9 +5115,10 @@ define i32 @sel_extractvalue_simplify(i1 %c, { i32, i32 } %agg1, i32 %x, i32 %y) } define i1 @replace_select_cond_true(i1 %cond, i32 %v1, i32 %v2, i32 %v3) { -; CHECK-LABEL: @replace_select_cond_true( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[SEL:%.*]], [[V2:%.*]] -; CHECK-NEXT: [[AND:%.*]] = select i1 [[COND:%.*]], i1 [[CMP]], i1 false +; CHECK-LABEL: define i1 @replace_select_cond_true( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[V1:%.*]], i32 [[V2:%.*]], i32 [[V3:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V1]], [[V2]] +; CHECK-NEXT: [[AND:%.*]] = select i1 [[COND]], i1 [[CMP]], i1 false ; CHECK-NEXT: ret i1 [[AND]] ; %sel = select i1 %cond, i32 %v1, i32 %v3 @@ -4820,9 +5128,10 @@ define i1 @replace_select_cond_true(i1 %cond, i32 %v1, i32 %v2, i32 %v3) { } define i1 @replace_select_cond_false(i1 %cond, i32 %v1, i32 %v2, i32 %v3) { -; CHECK-LABEL: @replace_select_cond_false( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[SEL:%.*]], [[V2:%.*]] -; CHECK-NEXT: [[OR:%.*]] = select i1 [[COND:%.*]], i1 true, i1 [[CMP]] +; CHECK-LABEL: define i1 @replace_select_cond_false( +; CHECK-SAME: i1 [[COND:%.*]], i32 [[V1:%.*]], i32 [[V2:%.*]], i32 [[V3:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V3]], [[V2]] +; CHECK-NEXT: [[OR:%.*]] = select i1 [[COND]], i1 true, i1 [[CMP]] ; CHECK-NEXT: ret i1 [[OR]] ; %sel = select i1 %cond, i32 %v1, i32 %v3 @@ -4832,9 +5141,10 @@ define i1 @replace_select_cond_false(i1 %cond, i32 %v1, i32 %v2, i32 %v3) { } define i32 @replace_and_cond(i1 %cond1, i1 %cond2) { -; CHECK-LABEL: @replace_and_cond( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[AND:%.*]], i32 3, i32 2 -; CHECK-NEXT: [[MUX:%.*]] = select i1 [[COND1:%.*]], i32 [[SEL]], i32 1 +; CHECK-LABEL: define i32 @replace_and_cond( +; CHECK-SAME: i1 [[COND1:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND2]], i32 3, i32 2 +; CHECK-NEXT: [[MUX:%.*]] = select i1 [[COND1]], i32 [[SEL]], i32 1 ; CHECK-NEXT: ret i32 [[MUX]] ; %and = and i1 %cond1, %cond2 @@ -4844,9 +5154,10 @@ define i32 @replace_and_cond(i1 %cond1, i1 %cond2) { } define <2 x i32> @replace_and_cond_vec(<2 x i1> %cond1, <2 x i1> %cond2) { -; CHECK-LABEL: @replace_and_cond_vec( -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND2:%.*]], <2 x i32> splat (i32 3), <2 x i32> splat (i32 2) -; CHECK-NEXT: [[MUX:%.*]] = select <2 x i1> [[COND1:%.*]], <2 x i32> [[SEL]], <2 x i32> splat (i32 1) +; CHECK-LABEL: define <2 x i32> @replace_and_cond_vec( +; CHECK-SAME: <2 x i1> [[COND1:%.*]], <2 x i1> [[COND2:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[COND2]], <2 x i32> splat (i32 3), <2 x i32> splat (i32 2) +; CHECK-NEXT: [[MUX:%.*]] = select <2 x i1> [[COND1]], <2 x i32> [[SEL]], <2 x i32> splat (i32 1) ; CHECK-NEXT: ret <2 x i32> [[MUX]] ; %and = and <2 x i1> %cond1, %cond2 @@ -4857,8 +5168,9 @@ define <2 x i32> @replace_and_cond_vec(<2 x i1> %cond1, <2 x i1> %cond2) { ; TODO: We can still replace the use of %and with %cond2 define i32 @replace_and_cond_multiuse1(i1 %cond1, i1 %cond2) { -; CHECK-LABEL: @replace_and_cond_multiuse1( -; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND1:%.*]], [[COND2:%.*]] +; CHECK-LABEL: define i32 @replace_and_cond_multiuse1( +; CHECK-SAME: i1 [[COND1:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND1]], [[COND2]] ; CHECK-NEXT: call void @use(i1 [[AND]]) ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[AND]], i32 3, i32 2 ; CHECK-NEXT: [[MUX:%.*]] = select i1 [[COND1]], i32 [[SEL]], i32 1 @@ -4872,8 +5184,9 @@ define i32 @replace_and_cond_multiuse1(i1 %cond1, i1 %cond2) { } define i32 @replace_and_cond_multiuse2(i1 %cond1, i1 %cond2) { -; CHECK-LABEL: @replace_and_cond_multiuse2( -; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND1:%.*]], [[COND2:%.*]] +; CHECK-LABEL: define i32 @replace_and_cond_multiuse2( +; CHECK-SAME: i1 [[COND1:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND1]], [[COND2]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[AND]], i32 3, i32 2 ; CHECK-NEXT: call void @use32(i32 [[SEL]]) ; CHECK-NEXT: [[MUX:%.*]] = select i1 [[COND1]], i32 [[SEL]], i32 1 @@ -4887,8 +5200,9 @@ define i32 @replace_and_cond_multiuse2(i1 %cond1, i1 %cond2) { } define i32 @src_simplify_2x_at_once_and(i32 %x, i32 %y) { -; CHECK-LABEL: @src_simplify_2x_at_once_and( -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i32 @src_simplify_2x_at_once_and( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[X]], [[Y]] ; CHECK-NEXT: ret i32 [[XOR]] ; %and = and i32 %x, %y @@ -4900,8 +5214,9 @@ define i32 @src_simplify_2x_at_once_and(i32 %x, i32 %y) { } define void @select_freeze_poison_parameter(ptr noundef %addr.src, ptr %addr.tgt, i1 %cond) { -; CHECK-LABEL: @select_freeze_poison_parameter( -; CHECK-NEXT: store ptr [[ADDR_SRC:%.*]], ptr [[ADDR_TGT:%.*]], align 8 +; CHECK-LABEL: define void @select_freeze_poison_parameter( +; CHECK-SAME: ptr noundef [[ADDR_SRC:%.*]], ptr [[ADDR_TGT:%.*]], i1 [[COND:%.*]]) { +; CHECK-NEXT: store ptr [[ADDR_SRC]], ptr [[ADDR_TGT]], align 8 ; CHECK-NEXT: ret void ; %freeze = freeze ptr poison @@ -4911,9 +5226,10 @@ define void @select_freeze_poison_parameter(ptr noundef %addr.src, ptr %addr.tgt } define i8 @select_freeze_poison_different_parameters(i8 noundef %x, i8 noundef %y, i1 %cond1, i1 %cond2) { -; CHECK-LABEL: @select_freeze_poison_different_parameters( -; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[COND1:%.*]], i8 [[X:%.*]], i8 0 -; CHECK-NEXT: [[SEL2:%.*]] = select i1 [[COND2:%.*]], i8 [[Y:%.*]], i8 0 +; CHECK-LABEL: define i8 @select_freeze_poison_different_parameters( +; CHECK-SAME: i8 noundef [[X:%.*]], i8 noundef [[Y:%.*]], i1 [[COND1:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[COND1]], i8 [[X]], i8 0 +; CHECK-NEXT: [[SEL2:%.*]] = select i1 [[COND2]], i8 [[Y]], i8 0 ; CHECK-NEXT: [[CONJ:%.*]] = and i8 [[SEL1]], [[SEL2]] ; CHECK-NEXT: ret i8 [[CONJ]] ; @@ -4925,7 +5241,8 @@ define i8 @select_freeze_poison_different_parameters(i8 noundef %x, i8 noundef % } define i8 @select_or_freeze_poison_parameter(i8 noundef %x, i1 %cond1) { -; CHECK-LABEL: @select_or_freeze_poison_parameter( +; CHECK-LABEL: define i8 @select_or_freeze_poison_parameter( +; CHECK-SAME: i8 noundef [[X:%.*]], i1 [[COND1:%.*]]) { ; CHECK-NEXT: ret i8 -1 ; %freeze = freeze i8 poison @@ -4936,8 +5253,9 @@ define i8 @select_or_freeze_poison_parameter(i8 noundef %x, i1 %cond1) { } define i8 @selects_freeze_poison_parameter(i8 noundef %x, i1 %cond1, i1 %cond2) { -; CHECK-LABEL: @selects_freeze_poison_parameter( -; CHECK-NEXT: ret i8 [[X:%.*]] +; CHECK-LABEL: define i8 @selects_freeze_poison_parameter( +; CHECK-SAME: i8 noundef [[X:%.*]], i1 [[COND1:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: ret i8 [[X]] ; %freeze = freeze i8 poison %sel1 = select i1 %cond1, i8 %x, i8 %freeze @@ -4949,8 +5267,9 @@ define i8 @selects_freeze_poison_parameter(i8 noundef %x, i1 %cond1, i1 %cond2) @glb = global ptr null define void @select_freeze_poison_global(ptr %addr.tgt, i1 %cond) { -; CHECK-LABEL: @select_freeze_poison_global( -; CHECK-NEXT: store ptr @glb, ptr [[ADDR_TGT:%.*]], align 8 +; CHECK-LABEL: define void @select_freeze_poison_global( +; CHECK-SAME: ptr [[ADDR_TGT:%.*]], i1 [[COND:%.*]]) { +; CHECK-NEXT: store ptr @glb, ptr [[ADDR_TGT]], align 8 ; CHECK-NEXT: ret void ; %freeze = freeze ptr poison @@ -4960,8 +5279,9 @@ define void @select_freeze_poison_global(ptr %addr.tgt, i1 %cond) { } define void @select_freeze_poison_constant(ptr %addr.tgt, i1 %cond) { -; CHECK-LABEL: @select_freeze_poison_constant( -; CHECK-NEXT: store i32 72, ptr [[ADDR_TGT:%.*]], align 4 +; CHECK-LABEL: define void @select_freeze_poison_constant( +; CHECK-SAME: ptr [[ADDR_TGT:%.*]], i1 [[COND:%.*]]) { +; CHECK-NEXT: store i32 72, ptr [[ADDR_TGT]], align 4 ; CHECK-NEXT: ret void ; %freeze = freeze i32 poison @@ -4971,8 +5291,9 @@ define void @select_freeze_poison_constant(ptr %addr.tgt, i1 %cond) { } define <2 x i8> @select_freeze_poison_mask_vector(i1 %cond, <2 x i8> noundef %y) { -; CHECK-LABEL: @select_freeze_poison_mask_vector( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[Y:%.*]], <2 x i8> zeroinitializer +; CHECK-LABEL: define <2 x i8> @select_freeze_poison_mask_vector( +; CHECK-SAME: i1 [[COND:%.*]], <2 x i8> noundef [[Y:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], <2 x i8> [[Y]], <2 x i8> zeroinitializer ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %freeze = freeze <2 x i8> <i8 0, i8 poison> @@ -4981,10 +5302,11 @@ define <2 x i8> @select_freeze_poison_mask_vector(i1 %cond, <2 x i8> noundef %y) } define <2 x i8> @selects_freeze_poison_mask_vector(<2 x i8> noundef %x, i1 %cond1, i1 %cond2) { -; CHECK-LABEL: @selects_freeze_poison_mask_vector( -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[COND1:%.*]], i1 [[COND2:%.*]], i1 false -; CHECK-NEXT: [[X:%.*]] = select i1 [[TMP1]], <2 x i8> [[X1:%.*]], <2 x i8> zeroinitializer -; CHECK-NEXT: ret <2 x i8> [[X]] +; CHECK-LABEL: define <2 x i8> @selects_freeze_poison_mask_vector( +; CHECK-SAME: <2 x i8> noundef [[X:%.*]], i1 [[COND1:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[COND1]], i1 [[COND2]], i1 false +; CHECK-NEXT: [[CONJ:%.*]] = select i1 [[TMP1]], <2 x i8> [[X]], <2 x i8> zeroinitializer +; CHECK-NEXT: ret <2 x i8> [[CONJ]] ; %freeze = freeze <2 x i8> <i8 0, i8 poison> %sel1 = select i1 %cond1, <2 x i8> %x, <2 x i8> %freeze @@ -4994,8 +5316,9 @@ define <2 x i8> @selects_freeze_poison_mask_vector(<2 x i8> noundef %x, i1 %cond } define <2 x i8> @select_freeze_poison_splat_vector(i1 %cond, <2 x i8> noundef %y) { -; CHECK-LABEL: @select_freeze_poison_splat_vector( -; CHECK-NEXT: ret <2 x i8> [[Y:%.*]] +; CHECK-LABEL: define <2 x i8> @select_freeze_poison_splat_vector( +; CHECK-SAME: i1 [[COND:%.*]], <2 x i8> noundef [[Y:%.*]]) { +; CHECK-NEXT: ret <2 x i8> [[Y]] ; %freeze = freeze <2 x i8> <i8 poison, i8 poison> %sel = select i1 %cond, <2 x i8> %y, <2 x i8> %freeze @@ -5003,8 +5326,9 @@ define <2 x i8> @select_freeze_poison_splat_vector(i1 %cond, <2 x i8> noundef %y } define <2 x i8> @selects_freeze_poison_splat_vector(<2 x i8> noundef %x, i1 %cond1, i1 %cond2) { -; CHECK-LABEL: @selects_freeze_poison_splat_vector( -; CHECK-NEXT: ret <2 x i8> [[X:%.*]] +; CHECK-LABEL: define <2 x i8> @selects_freeze_poison_splat_vector( +; CHECK-SAME: <2 x i8> noundef [[X:%.*]], i1 [[COND1:%.*]], i1 [[COND2:%.*]]) { +; CHECK-NEXT: ret <2 x i8> [[X]] ; %freeze = freeze <2 x i8> <i8 poison, i8 poison> %sel1 = select i1 %cond1, <2 x i8> %x, <2 x i8> %freeze @@ -5014,8 +5338,9 @@ define <2 x i8> @selects_freeze_poison_splat_vector(<2 x i8> noundef %x, i1 %con } define <2 x i8> @select_freeze_constant_vector(i1 %cond, <2 x i8> noundef %y) { -; CHECK-LABEL: @select_freeze_constant_vector( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[Y:%.*]], <2 x i8> zeroinitializer +; CHECK-LABEL: define <2 x i8> @select_freeze_constant_vector( +; CHECK-SAME: i1 [[COND:%.*]], <2 x i8> noundef [[Y:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], <2 x i8> [[Y]], <2 x i8> zeroinitializer ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %freeze = freeze <2 x i8> <i8 0, i8 0> @@ -5024,8 +5349,9 @@ define <2 x i8> @select_freeze_constant_vector(i1 %cond, <2 x i8> noundef %y) { } define <2 x i8> @select_freeze_constant_expression_vector_add(i1 %cond, <2 x i8> noundef %y) { -; CHECK-LABEL: @select_freeze_constant_expression_vector_add( -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[Y:%.*]], <2 x i8> splat (i8 3) +; CHECK-LABEL: define <2 x i8> @select_freeze_constant_expression_vector_add( +; CHECK-SAME: i1 [[COND:%.*]], <2 x i8> noundef [[Y:%.*]]) { +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], <2 x i8> [[Y]], <2 x i8> splat (i8 3) ; CHECK-NEXT: ret <2 x i8> [[SEL]] ; %freeze = freeze <2 x i8> <i8 poison, i8 add (i8 1, i8 2)> @@ -5037,9 +5363,10 @@ define <2 x i8> @select_freeze_constant_expression_vector_add(i1 %cond, <2 x i8> @glb.struct.1 = global %struct.1 {i32 1, i32 2} define <2 x ptr> @select_freeze_constant_expression_vector_gep(i1 %cond, <2 x ptr> noundef %y) { -; CHECK-LABEL: @select_freeze_constant_expression_vector_gep( +; CHECK-LABEL: define <2 x ptr> @select_freeze_constant_expression_vector_gep( +; CHECK-SAME: i1 [[COND:%.*]], <2 x ptr> noundef [[Y:%.*]]) { ; CHECK-NEXT: [[FREEZE:%.*]] = freeze <2 x ptr> <ptr poison, ptr getelementptr inbounds nuw (i8, ptr @glb.struct.1, i64 800)> -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], <2 x ptr> [[Y:%.*]], <2 x ptr> [[FREEZE]] +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], <2 x ptr> [[Y]], <2 x ptr> [[FREEZE]] ; CHECK-NEXT: ret <2 x ptr> [[SEL]] ; %freeze = freeze <2 x ptr> <ptr poison, ptr getelementptr inbounds (%struct.1, ptr @glb.struct.1, i64 100)> @@ -5048,24 +5375,25 @@ define <2 x ptr> @select_freeze_constant_expression_vector_gep(i1 %cond, <2 x pt } define void @no_fold_masked_min_loop(ptr nocapture readonly %vals, ptr nocapture readonly %masks, ptr nocapture %out, i64 %n) { -; CHECK-LABEL: @no_fold_masked_min_loop( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[NEXT_INDEX:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[ACC:%.*]] = phi i8 [ -1, [[ENTRY]] ], [ [[RES:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[VAL_PTR:%.*]] = getelementptr inbounds i8, ptr [[VALS:%.*]], i64 [[INDEX]] -; CHECK-NEXT: [[MASK_PTR:%.*]] = getelementptr inbounds i8, ptr [[MASKS:%.*]], i64 [[INDEX]] +; CHECK-LABEL: define void @no_fold_masked_min_loop( +; CHECK-SAME: ptr readonly captures(none) [[VALS:%.*]], ptr readonly captures(none) [[MASKS:%.*]], ptr captures(none) [[OUT:%.*]], i64 [[N:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br label %[[LOOP:.*]] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[NEXT_INDEX:%.*]], %[[LOOP]] ] +; CHECK-NEXT: [[ACC:%.*]] = phi i8 [ -1, %[[ENTRY]] ], [ [[RES:%.*]], %[[LOOP]] ] +; CHECK-NEXT: [[VAL_PTR:%.*]] = getelementptr inbounds i8, ptr [[VALS]], i64 [[INDEX]] +; CHECK-NEXT: [[MASK_PTR:%.*]] = getelementptr inbounds i8, ptr [[MASKS]], i64 [[INDEX]] ; CHECK-NEXT: [[VAL:%.*]] = load i8, ptr [[VAL_PTR]], align 1 ; CHECK-NEXT: [[MASK:%.*]] = load i8, ptr [[MASK_PTR]], align 1 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i8 [[MASK]], 0 ; CHECK-NEXT: [[MASKED_VAL:%.*]] = select i1 [[COND]], i8 [[VAL]], i8 -1 ; CHECK-NEXT: [[RES]] = call i8 @llvm.umin.i8(i8 [[ACC]], i8 [[MASKED_VAL]]) ; CHECK-NEXT: [[NEXT_INDEX]] = add i64 [[INDEX]], 1 -; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXT_INDEX]], [[N:%.*]] -; CHECK-NEXT: br i1 [[DONE]], label [[EXIT:%.*]], label [[LOOP]] -; CHECK: exit: -; CHECK-NEXT: store i8 [[RES]], ptr [[OUT:%.*]], align 1 +; CHECK-NEXT: [[DONE:%.*]] = icmp eq i64 [[NEXT_INDEX]], [[N]] +; CHECK-NEXT: br i1 [[DONE]], label %[[EXIT:.*]], label %[[LOOP]] +; CHECK: [[EXIT]]: +; CHECK-NEXT: store i8 [[RES]], ptr [[OUT]], align 1 ; CHECK-NEXT: ret void ; entry: diff --git a/llvm/test/Transforms/InstCombine/sext.ll b/llvm/test/Transforms/InstCombine/sext.ll index ee3c52259f93..c72614d52603 100644 --- a/llvm/test/Transforms/InstCombine/sext.ll +++ b/llvm/test/Transforms/InstCombine/sext.ll @@ -423,3 +423,41 @@ define i64 @smear_set_bit_different_dest_type_wider_dst(i32 %x) { %s = sext i8 %a to i64 ret i64 %s } + +; Test known bits for (sext i8 x) * (sext i8 x) + +define i1 @sext_square_bit30(i8 noundef %x) { +; CHECK-LABEL: @sext_square_bit30( +; CHECK-NEXT: ret i1 false +; + %sx = sext i8 %x to i32 + %mul = mul nsw i32 %sx, %sx + %and = and i32 %mul, 1073741824 ; 1 << 30 + %cmp = icmp ne i32 %and, 0 + ret i1 %cmp +} + +define i1 @sext_square_bit15(i8 noundef %x) { +; CHECK-LABEL: @sext_square_bit15( +; CHECK-NEXT: ret i1 false +; + %sx = sext i8 %x to i32 + %mul = mul nsw i32 %sx, %sx + %and = and i32 %mul, 32768 ; 1 << 15 + %cmp = icmp ne i32 %and, 0 + ret i1 %cmp +} + +define i1 @sext_square_bit14(i8 noundef %x) { +; CHECK-LABEL: @sext_square_bit14( +; CHECK-NEXT: [[SX:%.*]] = sext i8 [[X:%.*]] to i32 +; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[SX]], [[SX]] +; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[MUL]], 16383 +; CHECK-NEXT: ret i1 [[CMP]] +; + %sx = sext i8 %x to i32 + %mul = mul nsw i32 %sx, %sx + %and = and i32 %mul, 16384 ; 1 << 14 + %cmp = icmp ne i32 %and, 0 + ret i1 %cmp +} diff --git a/llvm/test/Transforms/InstCombine/simplify-libcalls-new.ll b/llvm/test/Transforms/InstCombine/simplify-libcalls-new.ll index 83471f1d0f61..41db7f929dfd 100644 --- a/llvm/test/Transforms/InstCombine/simplify-libcalls-new.ll +++ b/llvm/test/Transforms/InstCombine/simplify-libcalls-new.ll @@ -5,15 +5,15 @@ ; OFF-NOT: hot_cold_t ; OFF-LABEL: @new_hot_cold() -;; First check with the default cold and hot hint values (255 = -2). -; RUN: opt < %s -passes=instcombine -optimize-hot-cold-new -S | FileCheck %s --check-prefix=HOTCOLD -DCOLD=1 -DHOT=-2 -DPREVHINTCOLD=7 -DPREVHINTNOTCOLD=7 -DPREVHINTHOT=7 +;; First check with the default hint values (254 = -2, 128 = -128, 222 = -34). +; RUN: opt < %s -passes=instcombine -optimize-hot-cold-new -S | FileCheck %s --check-prefix=HOTCOLD -DCOLD=1 -DHOT=-2 -DNOTCOLD=-128 -DAMBIG=-34 -DPREVHINTCOLD=7 -DPREVHINTNOTCOLD=7 -DPREVHINTHOT=7 -DPREVHINTAMBIG=7 ;; Next check with the non-default cold and hot hint values (200 =-56). -; RUN: opt < %s -passes=instcombine -optimize-hot-cold-new -cold-new-hint-value=5 -hot-new-hint-value=200 -S | FileCheck %s --check-prefix=HOTCOLD -DCOLD=5 -DHOT=-56 -DPREVHINTCOLD=7 -DPREVHINTNOTCOLD=7 -DPREVHINTHOT=7 +; RUN: opt < %s -passes=instcombine -optimize-hot-cold-new -cold-new-hint-value=5 -hot-new-hint-value=200 -notcold-new-hint-value=99 -ambiguous-new-hint-value=44 -S | FileCheck %s --check-prefix=HOTCOLD -DCOLD=5 -DHOT=-56 -DAMBIG=44 -DNOTCOLD=99 -DPREVHINTCOLD=7 -DPREVHINTNOTCOLD=7 -DPREVHINTHOT=7 -DPREVHINTAMBIG=7 ;; Try again with the non-default cold and hot hint values (200 =-56), and this ;; time specify that existing hints should be updated. -; RUN: opt < %s -passes=instcombine -optimize-hot-cold-new -cold-new-hint-value=5 -notcold-new-hint-value=100 -hot-new-hint-value=200 -optimize-existing-hot-cold-new -S | FileCheck %s --check-prefix=HOTCOLD -DCOLD=5 -DHOT=-56 -DPREVHINTCOLD=5 -DPREVHINTNOTCOLD=100 -DPREVHINTHOT=-56 +; RUN: opt < %s -passes=instcombine -optimize-hot-cold-new -cold-new-hint-value=5 -notcold-new-hint-value=100 -hot-new-hint-value=200 -ambiguous-new-hint-value=44 -optimize-existing-hot-cold-new -S | FileCheck %s --check-prefix=HOTCOLD -DCOLD=5 -DHOT=-56 -DNOTCOLD=100 -DAMBIG=44 -DPREVHINTCOLD=5 -DPREVHINTNOTCOLD=100 -DPREVHINTHOT=-56 -DPREVHINTAMBIG=44 ;; Make sure that values not in 0..255 are flagged with an error ; RUN: not opt < %s -passes=instcombine -optimize-hot-cold-new -cold-new-hint-value=256 -S 2>&1 | FileCheck %s --check-prefix=ERROR @@ -28,14 +28,22 @@ define void @new() { ; HOTCOLD: @_Znwm12__hot_cold_t(i64 10, i8 [[COLD]]) %call = call ptr @_Znwm(i64 10) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_Znwm(i64 10) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_Znwm12__hot_cold_t(i64 10, i8 [[NOTCOLD]]) %call1 = call ptr @_Znwm(i64 10) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_Znwm12__hot_cold_t(i64 10, i8 [[HOT]]) %call2 = call ptr @_Znwm(i64 10) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_Znwm12__hot_cold_t(i64 10, i8 [[AMBIG]]) + %call4 = call ptr @_Znwm(i64 10) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_Znwm(i64 10) + %call3 = call ptr @_Znwm(i64 10) #6 + call void @dummy(ptr %call3) ret void } @@ -48,14 +56,22 @@ define void @new_align() { ; HOTCOLD: @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[COLD]]) %call = call ptr @_ZnwmSt11align_val_t(i64 10, i64 8) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_ZnwmSt11align_val_t(i64 10, i64 8) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[NOTCOLD]]) %call1 = call ptr @_ZnwmSt11align_val_t(i64 10, i64 8) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[HOT]]) %call2 = call ptr @_ZnwmSt11align_val_t(i64 10, i64 8) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[AMBIG]]) + %call4 = call ptr @_ZnwmSt11align_val_t(i64 10, i64 8) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_ZnwmSt11align_val_t(i64 10, i64 8) + %call3 = call ptr @_ZnwmSt11align_val_t(i64 10, i64 8) #6 + call void @dummy(ptr %call3) ret void } @@ -69,14 +85,22 @@ define void @new_nothrow() { ; HOTCOLD: @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[COLD]]) %call = call ptr @_ZnwmRKSt9nothrow_t(i64 10, ptr %nt) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_ZnwmRKSt9nothrow_t(i64 10, ptr nonnull %nt) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[NOTCOLD]]) %call1 = call ptr @_ZnwmRKSt9nothrow_t(i64 10, ptr %nt) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[HOT]]) %call2 = call ptr @_ZnwmRKSt9nothrow_t(i64 10, ptr %nt) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[AMBIG]]) + %call4 = call ptr @_ZnwmRKSt9nothrow_t(i64 10, ptr %nt) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_ZnwmRKSt9nothrow_t(i64 10, ptr nonnull %nt) + %call3 = call ptr @_ZnwmRKSt9nothrow_t(i64 10, ptr %nt) #6 + call void @dummy(ptr %call3) ret void } @@ -91,14 +115,22 @@ define void @new_align_nothrow() { ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[COLD]]) %call = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr nonnull %nt) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[NOTCOLD]]) %call1 = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[HOT]]) %call2 = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[AMBIG]]) + %call4 = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr nonnull %nt) + %call3 = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #6 + call void @dummy(ptr %call3) ret void } @@ -110,14 +142,22 @@ define void @array_new() { ; HOTCOLD: @_Znam12__hot_cold_t(i64 10, i8 [[COLD]]) %call = call ptr @_Znam(i64 10) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_Znam(i64 10) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_Znam12__hot_cold_t(i64 10, i8 [[NOTCOLD]]) %call1 = call ptr @_Znam(i64 10) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_Znam12__hot_cold_t(i64 10, i8 [[HOT]]) %call2 = call ptr @_Znam(i64 10) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_Znam12__hot_cold_t(i64 10, i8 [[AMBIG]]) + %call4 = call ptr @_Znam(i64 10) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_Znam(i64 10) + %call3 = call ptr @_Znam(i64 10) #6 + call void @dummy(ptr %call3) ret void } @@ -130,14 +170,22 @@ define void @array_new_align() { ; HOTCOLD: @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[COLD]]) %call = call ptr @_ZnamSt11align_val_t(i64 10, i64 8) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_ZnamSt11align_val_t(i64 10, i64 8) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[NOTCOLD]]) %call1 = call ptr @_ZnamSt11align_val_t(i64 10, i64 8) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[HOT]]) %call2 = call ptr @_ZnamSt11align_val_t(i64 10, i64 8) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[AMBIG]]) + %call4 = call ptr @_ZnamSt11align_val_t(i64 10, i64 8) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_ZnamSt11align_val_t(i64 10, i64 8) + %call3 = call ptr @_ZnamSt11align_val_t(i64 10, i64 8) #6 + call void @dummy(ptr %call3) ret void } @@ -151,14 +199,22 @@ define void @array_new_nothrow() { ; HOTCOLD: @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[COLD]]) %call = call ptr @_ZnamRKSt9nothrow_t(i64 10, ptr %nt) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_ZnamRKSt9nothrow_t(i64 10, ptr nonnull %nt) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[NOTCOLD]]) %call1 = call ptr @_ZnamRKSt9nothrow_t(i64 10, ptr %nt) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[HOT]]) %call2 = call ptr @_ZnamRKSt9nothrow_t(i64 10, ptr %nt) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[AMBIG]]) + %call4 = call ptr @_ZnamRKSt9nothrow_t(i64 10, ptr %nt) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_ZnamRKSt9nothrow_t(i64 10, ptr nonnull %nt) + %call3 = call ptr @_ZnamRKSt9nothrow_t(i64 10, ptr %nt) #6 + call void @dummy(ptr %call3) ret void } @@ -173,14 +229,22 @@ define void @array_new_align_nothrow() { ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[COLD]]) %call = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #0 call void @dummy(ptr %call) - ;; Attribute notcold has no effect. - ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr nonnull %nt) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[NOTCOLD]]) %call1 = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #1 call void @dummy(ptr %call1) ;; Attribute hot converted to __hot_cold_t hot value. ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[HOT]]) %call2 = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[AMBIG]]) + %call4 = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr nonnull %nt) + %call3 = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t(i64 10, i64 8, ptr %nt) #6 + call void @dummy(ptr %call3) ret void } @@ -200,6 +264,14 @@ define void @new_hot_cold() { ; HOTCOLD: @_Znwm12__hot_cold_t(i64 10, i8 [[PREVHINTHOT]]) %call2 = call ptr @_Znwm12__hot_cold_t(i64 10, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_Znwm12__hot_cold_t(i64 10, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_Znwm12__hot_cold_t(i64 10, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_Znwm12__hot_cold_t(i64 10, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_Znwm12__hot_cold_t(i64 10, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -219,6 +291,14 @@ define void @new_align_hot_cold() { ; HOTCOLD: @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[PREVHINTHOT]]) %call2 = call ptr @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_ZnwmSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -239,6 +319,14 @@ define void @new_nothrow_hot_cold() { ; HOTCOLD: @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[PREVHINTHOT]]) %call2 = call ptr @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr %nt, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr %nt, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_ZnwmRKSt9nothrow_t12__hot_cold_t(i64 10, ptr %nt, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -259,6 +347,14 @@ define void @new_align_nothrow_hot_cold() { ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[PREVHINTHOT]]) %call2 = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr %nt, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr %nt, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr %nt, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -278,6 +374,14 @@ define void @array_new_hot_cold() { ; HOTCOLD: @_Znam12__hot_cold_t(i64 10, i8 [[PREVHINTHOT]]) %call2 = call ptr @_Znam12__hot_cold_t(i64 10, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_Znam12__hot_cold_t(i64 10, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_Znam12__hot_cold_t(i64 10, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_Znam12__hot_cold_t(i64 10, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_Znam12__hot_cold_t(i64 10, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -297,6 +401,14 @@ define void @array_new_align_hot_cold() { ; HOTCOLD: @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[PREVHINTHOT]]) %call2 = call ptr @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_ZnamSt11align_val_t12__hot_cold_t(i64 10, i64 8, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -317,6 +429,14 @@ define void @array_new_nothrow_hot_cold() { ; HOTCOLD: @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[PREVHINTHOT]]) %call2 = call ptr @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr %nt, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr %nt, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr nonnull %nt, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_ZnamRKSt9nothrow_t12__hot_cold_t(i64 10, ptr %nt, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -337,6 +457,14 @@ define void @array_new_align_nothrow_hot_cold() { ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[PREVHINTHOT]]) %call2 = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr %nt, i8 7) #2 call void @dummy(ptr %call2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[PREVHINTAMBIG]]) + %call4 = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr %nt, i8 7) #7 + call void @dummy(ptr %call4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr nonnull %nt, i8 [[PREVHINTCOLD]]) + %call3 = call ptr @_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t(i64 10, i64 8, ptr %nt, i8 7) #6 + call void @dummy(ptr %call3) ret void } @@ -349,8 +477,8 @@ define void @size_returning_test() { %call = call {ptr, i64} @__size_returning_new(i64 10) #3 %p = extractvalue {ptr, i64} %call, 0 call void @dummy(ptr %p) - ;; Attribute notcold has no effect. - ; HOTCOLD: @__size_returning_new(i64 10) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @__size_returning_new_hot_cold(i64 10, i8 [[NOTCOLD]]) %call1 = call {ptr, i64} @__size_returning_new(i64 10) #4 %p1 = extractvalue {ptr, i64} %call1, 0 call void @dummy(ptr %p1) @@ -359,6 +487,16 @@ define void @size_returning_test() { %call2 = call {ptr, i64} @__size_returning_new(i64 10) #5 %p2 = extractvalue {ptr, i64} %call2, 0 call void @dummy(ptr %p2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @__size_returning_new_hot_cold(i64 10, i8 [[AMBIG]]) + %call4 = call {ptr, i64} @__size_returning_new(i64 10) #8 + %p4 = extractvalue {ptr, i64} %call4, 0 + call void @dummy(ptr %p4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @__size_returning_new(i64 10) + %call3 = call {ptr, i64} @__size_returning_new(i64 10) #6 + %p3 = extractvalue {ptr, i64} %call3, 0 + call void @dummy(ptr %p3) ret void } @@ -371,8 +509,8 @@ define void @size_returning_aligned_test() { %call = call {ptr, i64} @__size_returning_new_aligned(i64 10, i64 8) #3 %p = extractvalue {ptr, i64} %call, 0 call void @dummy(ptr %p) - ;; Attribute notcold has no effect. - ; HOTCOLD: @__size_returning_new_aligned(i64 10, i64 8) + ;; Attribute notcold converted to __hot_cold_t notcold value. + ; HOTCOLD: @__size_returning_new_aligned_hot_cold(i64 10, i64 8, i8 [[NOTCOLD]]) %call1 = call {ptr, i64} @__size_returning_new_aligned(i64 10, i64 8) #4 %p1 = extractvalue {ptr, i64} %call1, 0 call void @dummy(ptr %p1) @@ -381,6 +519,16 @@ define void @size_returning_aligned_test() { %call2 = call {ptr, i64} @__size_returning_new_aligned(i64 10, i64 8) #5 %p2 = extractvalue {ptr, i64} %call2, 0 call void @dummy(ptr %p2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @__size_returning_new_aligned_hot_cold(i64 10, i64 8, i8 [[AMBIG]]) + %call4 = call {ptr, i64} @__size_returning_new_aligned(i64 10, i64 8) #8 + %p4 = extractvalue {ptr, i64} %call4, 0 + call void @dummy(ptr %p4) + ;; Attribute cold on a nobuiltin call has no effect. + ; HOTCOLD: @__size_returning_new_aligned(i64 10, i64 8) + %call3 = call {ptr, i64} @__size_returning_new_aligned(i64 10, i64 8) #6 + %p3 = extractvalue {ptr, i64} %call3, 0 + call void @dummy(ptr %p3) ret void } @@ -403,6 +551,16 @@ define void @size_returning_update_test() { %call2 = call {ptr, i64} @__size_returning_new_hot_cold(i64 10, i8 7) #5 %p2 = extractvalue {ptr, i64} %call2, 0 call void @dummy(ptr %p2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @__size_returning_new_hot_cold(i64 10, i8 [[PREVHINTAMBIG]]) + %call4 = call {ptr, i64} @__size_returning_new_hot_cold(i64 10, i8 7) #8 + %p4 = extractvalue {ptr, i64} %call4, 0 + call void @dummy(ptr %p4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @__size_returning_new_hot_cold(i64 10, i8 [[PREVHINTCOLD]]) + %call3 = call {ptr, i64} @__size_returning_new_hot_cold(i64 10, i8 7) #6 + %p3 = extractvalue {ptr, i64} %call3, 0 + call void @dummy(ptr %p3) ret void } @@ -425,6 +583,16 @@ define void @size_returning_aligned_update_test() { %call2 = call {ptr, i64} @__size_returning_new_aligned_hot_cold(i64 10, i64 8, i8 7) #5 %p2 = extractvalue {ptr, i64} %call2, 0 call void @dummy(ptr %p2) + ;; Attribute ambiguous converted to __hot_cold_t ambiguous value. + ; HOTCOLD: @__size_returning_new_aligned_hot_cold(i64 10, i64 8, i8 [[PREVHINTAMBIG]]) + %call4 = call {ptr, i64} @__size_returning_new_aligned_hot_cold(i64 10, i64 8, i8 7) #8 + %p4 = extractvalue {ptr, i64} %call4, 0 + call void @dummy(ptr %p4) + ;; Attribute cold on a nobuiltin existing hot/cold call updates the hint. + ; HOTCOLD: @__size_returning_new_aligned_hot_cold(i64 10, i64 8, i8 [[PREVHINTCOLD]]) + %call3 = call {ptr, i64} @__size_returning_new_aligned_hot_cold(i64 10, i64 8, i8 7) #6 + %p3 = extractvalue {ptr, i64} %call3, 0 + call void @dummy(ptr %p3) ret void } @@ -457,9 +625,13 @@ declare {ptr, i64} @__size_returning_new_aligned_hot_cold(i64, i64, i8) attributes #0 = { builtin allocsize(0) "memprof"="cold" } attributes #1 = { builtin allocsize(0) "memprof"="notcold" } attributes #2 = { builtin allocsize(0) "memprof"="hot" } +attributes #7 = { builtin allocsize(0) "memprof"="ambiguous" } ;; Use separate attributes for __size_returning_new variants since they are not ;; treated as builtins. attributes #3 = { "memprof" = "cold" } attributes #4 = { "memprof" = "notcold" } attributes #5 = { "memprof" = "hot" } +attributes #8 = { "memprof" = "ambiguous" } + +attributes #6 = { nobuiltin allocsize(0) "memprof"="cold" } diff --git a/llvm/test/Transforms/InstCombine/strcmp-3.ll b/llvm/test/Transforms/InstCombine/strcmp-3.ll index 2c4012b96e18..72da736a0a9f 100644 --- a/llvm/test/Transforms/InstCombine/strcmp-3.ll +++ b/llvm/test/Transforms/InstCombine/strcmp-3.ll @@ -25,7 +25,7 @@ define i32 @fold_strcmp_a5i0_a5i1_to_0() { define i32 @call_strcmp_a5i0_a5iI(i64 %I) { ; CHECK-LABEL: @call_strcmp_a5i0_a5iI( -; CHECK-NEXT: [[Q:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[Q:%.*]] = getelementptr [4 x i8], ptr @a5, i64 [[I:%.*]] ; CHECK-NEXT: [[CMP:%.*]] = call i32 @strcmp(ptr noundef nonnull dereferenceable(4) @a5, ptr noundef nonnull dereferenceable(1) [[Q]]) ; CHECK-NEXT: ret i32 [[CMP]] ; @@ -40,7 +40,7 @@ define i32 @call_strcmp_a5i0_a5iI(i64 %I) { define i32 @call_strcmp_a5iI_a5i0(i64 %I) { ; CHECK-LABEL: @call_strcmp_a5iI_a5i0( -; CHECK-NEXT: [[P:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[P:%.*]] = getelementptr [4 x i8], ptr @a5, i64 [[I:%.*]] ; CHECK-NEXT: [[CMP:%.*]] = call i32 @strcmp(ptr noundef nonnull dereferenceable(1) [[P]], ptr noundef nonnull dereferenceable(4) @a5) ; CHECK-NEXT: ret i32 [[CMP]] ; @@ -68,7 +68,7 @@ define i32 @fold_strcmp_a5i0_a5i1_p1_to_0() { define i32 @call_strcmp_a5i0_a5i1_pI(i64 %I) { ; CHECK-LABEL: @call_strcmp_a5i0_a5i1_pI( -; CHECK-NEXT: [[Q:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5, i64 0, i64 1, i64 [[I:%.*]] +; CHECK-NEXT: [[Q:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a5, i64 4), i64 [[I:%.*]] ; CHECK-NEXT: [[CMP:%.*]] = call i32 @strcmp(ptr noundef nonnull dereferenceable(4) @a5, ptr noundef nonnull dereferenceable(1) [[Q]]) ; CHECK-NEXT: ret i32 [[CMP]] ; diff --git a/llvm/test/Transforms/InstCombine/strlen-1.ll b/llvm/test/Transforms/InstCombine/strlen-1.ll index 27f9e4ace3a7..2063df4f145c 100644 --- a/llvm/test/Transforms/InstCombine/strlen-1.ll +++ b/llvm/test/Transforms/InstCombine/strlen-1.ll @@ -184,7 +184,7 @@ define i32 @test_no_simplify1() { define i32 @test_no_simplify2(i32 %x) { ; CHECK-LABEL: @test_no_simplify2( -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds i8, ptr @null_hello, i32 [[X:%.*]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) ; CHECK-NEXT: ret i32 [[HELLO_L]] ; @@ -195,7 +195,7 @@ define i32 @test_no_simplify2(i32 %x) { define i32 @test_no_simplify2_no_null_opt(i32 %x) #0 { ; CHECK-LABEL: @test_no_simplify2_no_null_opt( -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds i8, ptr @null_hello, i32 [[X:%.*]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef [[HELLO_P]]) ; CHECK-NEXT: ret i32 [[HELLO_L]] ; @@ -209,7 +209,7 @@ define i32 @test_no_simplify2_no_null_opt(i32 %x) #0 { define i32 @test_no_simplify3(i32 %x) { ; CHECK-LABEL: @test_no_simplify3( ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 15 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [13 x i8], ptr @null_hello_mid, i32 0, i32 [[AND]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw i8, ptr @null_hello_mid, i32 [[AND]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) ; CHECK-NEXT: ret i32 [[HELLO_L]] ; @@ -222,7 +222,7 @@ define i32 @test_no_simplify3(i32 %x) { define i32 @test_no_simplify3_on_null_opt(i32 %x) #0 { ; CHECK-LABEL: @test_no_simplify3_on_null_opt( ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 15 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [13 x i8], ptr @null_hello_mid, i32 0, i32 [[AND]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw i8, ptr @null_hello_mid, i32 [[AND]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) ; CHECK-NEXT: ret i32 [[HELLO_L]] ; diff --git a/llvm/test/Transforms/InstCombine/strlen-4.ll b/llvm/test/Transforms/InstCombine/strlen-4.ll index 58d04e8a0d4b..c8d2563b344a 100644 --- a/llvm/test/Transforms/InstCombine/strlen-4.ll +++ b/llvm/test/Transforms/InstCombine/strlen-4.ll @@ -18,7 +18,7 @@ declare i64 @strlen(ptr) define i64 @fold_strlen_s3_pi_s5(i1 %X, i64 %I) { ; CHECK-LABEL: @fold_strlen_s3_pi_s5( -; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[I:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr @s5 ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -40,7 +40,7 @@ define i64 @fold_strlen_s3_pi_p1_s5(i1 %0, i64 %1) { ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] ; CHECK-LABEL: @fold_strlen_s3_pi_p1_s5( -; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr i8, ptr [[PS3_PI]], i64 1 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @s5 ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) @@ -61,7 +61,7 @@ define i64 @fold_strlen_s3_pi_p1_s5(i1 %0, i64 %1) { define i64 @call_strlen_s5_3_pi_s5(i1 %0, i64 %1) { ; CHECK-LABEL: @call_strlen_s5_3_pi_s5( -; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds i8, ptr @s5_3, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @s5 ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -78,7 +78,7 @@ define i64 @call_strlen_s5_3_pi_s5(i1 %0, i64 %1) { define i64 @call_strlen_s5_3_s5_pj(i1 %X, i64 %J) { ; CHECK-LABEL: @call_strlen_s5_3_s5_pj( -; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] +; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds i8, ptr @s5, i64 [[J:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s5_3, ptr [[PS5]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -95,7 +95,7 @@ define i64 @call_strlen_s5_3_s5_pj(i1 %X, i64 %J) { define i64 @fold_strlen_s3_s5_pj(i1 %X, i64 %J) { ; CHECK-LABEL: @fold_strlen_s3_s5_pj( -; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] +; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds i8, ptr @s5, i64 [[J:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s3, ptr [[PS5_PJ]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -114,7 +114,7 @@ define i64 @fold_strlen_s3_s5_pj(i1 %X, i64 %J) { define i64 @call_strlen_s3_s5_3_pj(i1 %0, i64 %1) { ; CHECK-LABEL: @call_strlen_s3_s5_3_pj( -; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds i8, ptr @s5_3, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @s3, ptr [[PS5_3_PJ]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -131,8 +131,8 @@ define i64 @call_strlen_s3_s5_3_pj(i1 %0, i64 %1) { define i64 @fold_strlen_s3_pi_s5_pj(i1 %X, i64 %I, i64 %J) { ; CHECK-LABEL: @fold_strlen_s3_pi_s5_pj( -; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] -; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] +; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[I:%.*]] +; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds i8, ptr @s5, i64 [[J:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] diff --git a/llvm/test/Transforms/InstCombine/strlen-7.ll b/llvm/test/Transforms/InstCombine/strlen-7.ll index 6eb7885abd04..a878ece075c5 100644 --- a/llvm/test/Transforms/InstCombine/strlen-7.ll +++ b/llvm/test/Transforms/InstCombine/strlen-7.ll @@ -167,18 +167,19 @@ define void @fold_strlen_A(ptr %plen) { define void @fold_strlen_A_pI(ptr %plen, i64 %I) { ; CHECK-LABEL: @fold_strlen_A_pI( -; CHECK-NEXT: [[PA0A:%.*]] = getelementptr [2 x %struct.A], ptr @a, i64 0, i64 0, i32 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PA0A:%.*]] = getelementptr [[STRUCT_A:%.*]], ptr @a, i64 0, i32 0, i64 [[I:%.*]] ; CHECK-NEXT: [[LENA0A:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PA0A]]) ; CHECK-NEXT: store i64 [[LENA0A]], ptr [[PLEN:%.*]], align 4 -; CHECK-NEXT: [[PA0B:%.*]] = getelementptr [2 x %struct.A], ptr @a, i64 0, i64 0, i32 1, i64 [[I]] +; CHECK-NEXT: [[PA0B:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a, i64 4), i64 [[I]] ; CHECK-NEXT: [[LENA0B:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PA0B]]) ; CHECK-NEXT: [[PLEN1:%.*]] = getelementptr i8, ptr [[PLEN]], i64 8 ; CHECK-NEXT: store i64 [[LENA0B]], ptr [[PLEN1]], align 4 -; CHECK-NEXT: [[PA1A:%.*]] = getelementptr [2 x %struct.A], ptr @a, i64 0, i64 1, i32 0, i64 [[I]] +; CHECK-NEXT: [[PA1A:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a, i64 9), i64 [[I]] ; CHECK-NEXT: [[LENA1A:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PA1A]]) ; CHECK-NEXT: [[PLEN2:%.*]] = getelementptr i8, ptr [[PLEN]], i64 16 ; CHECK-NEXT: store i64 [[LENA1A]], ptr [[PLEN2]], align 4 -; CHECK-NEXT: [[PA1B:%.*]] = getelementptr [2 x %struct.A], ptr @a, i64 0, i64 1, i32 1, i64 [[I]] +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a, i64 9), i64 [[I]] +; CHECK-NEXT: [[PA1B:%.*]] = getelementptr i8, ptr [[TMP1]], i64 4 ; CHECK-NEXT: [[LENA1B:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PA1B]]) ; CHECK-NEXT: [[PLEN3:%.*]] = getelementptr i8, ptr [[PLEN]], i64 24 ; CHECK-NEXT: store i64 [[LENA1B]], ptr [[PLEN3]], align 4 diff --git a/llvm/test/Transforms/InstCombine/strlen-8.ll b/llvm/test/Transforms/InstCombine/strlen-8.ll index b4334ddd8f1a..af1219806980 100644 --- a/llvm/test/Transforms/InstCombine/strlen-8.ll +++ b/llvm/test/Transforms/InstCombine/strlen-8.ll @@ -16,7 +16,7 @@ declare i64 @strlen(ptr) define i64 @fold_a5_4_i0_pI(i64 %I) { ; CHECK-LABEL: @fold_a5_4_i0_pI( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5_4, i64 0, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr i8, ptr @a5_4, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PTR]]) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -30,7 +30,7 @@ define i64 @fold_a5_4_i0_pI(i64 %I) { define i64 @fold_a5_4_i1_pI(i64 %I) { ; CHECK-LABEL: @fold_a5_4_i1_pI( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5_4, i64 0, i64 1, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a5_4, i64 4), i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PTR]]) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -44,7 +44,7 @@ define i64 @fold_a5_4_i1_pI(i64 %I) { define i64 @fold_a5_4_i2_pI(i64 %I) { ; CHECK-LABEL: @fold_a5_4_i2_pI( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5_4, i64 0, i64 2, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a5_4, i64 8), i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PTR]]) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -58,7 +58,7 @@ define i64 @fold_a5_4_i2_pI(i64 %I) { define i64 @fold_a5_4_i3_pI_to_0(i64 %I) { ; CHECK-LABEL: @fold_a5_4_i3_pI_to_0( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5_4, i64 0, i64 3, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a5_4, i64 12), i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PTR]]) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -72,7 +72,7 @@ define i64 @fold_a5_4_i3_pI_to_0(i64 %I) { define i64 @fold_a5_4_i4_pI_to_0(i64 %I) { ; CHECK-LABEL: @fold_a5_4_i4_pI_to_0( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr [5 x [4 x i8]], ptr @a5_4, i64 0, i64 4, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr i8, ptr getelementptr inbounds nuw (i8, ptr @a5_4, i64 16), i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PTR]]) ; CHECK-NEXT: ret i64 [[LEN]] ; diff --git a/llvm/test/Transforms/InstCombine/strlen-9.ll b/llvm/test/Transforms/InstCombine/strlen-9.ll index e29e426c6a6a..189b0d8a2eb0 100644 --- a/llvm/test/Transforms/InstCombine/strlen-9.ll +++ b/llvm/test/Transforms/InstCombine/strlen-9.ll @@ -25,14 +25,14 @@ define void @fold_strlen_no_nul(ptr %plen, i32 %i) { ; CHECK-NEXT: [[PNS5_P6:%.*]] = getelementptr i8, ptr [[PLEN]], i64 16 ; CHECK-NEXT: store i64 0, ptr [[PNS5_P6]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64 -; CHECK-NEXT: [[PA5_PI:%.*]] = getelementptr [5 x i8], ptr @a5, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[PA5_PI:%.*]] = getelementptr i8, ptr @a5, i64 [[TMP1]] ; CHECK-NEXT: [[NA5_PI:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PA5_PI]]) ; CHECK-NEXT: [[PNA5_PI:%.*]] = getelementptr i8, ptr [[PLEN]], i64 24 ; CHECK-NEXT: store i64 [[NA5_PI]], ptr [[PNA5_PI]], align 4 ; CHECK-NEXT: [[PNZ0_P0:%.*]] = getelementptr i8, ptr [[PLEN]], i64 32 ; CHECK-NEXT: store i64 0, ptr [[PNZ0_P0]], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[I]] to i64 -; CHECK-NEXT: [[PZ0_PI:%.*]] = getelementptr [0 x i8], ptr @z0, i64 0, i64 [[TMP2]] +; CHECK-NEXT: [[PZ0_PI:%.*]] = getelementptr i8, ptr @z0, i64 [[TMP2]] ; CHECK-NEXT: [[NZ0_PI:%.*]] = call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[PZ0_PI]]) ; CHECK-NEXT: [[PNZ0_PI:%.*]] = getelementptr i8, ptr [[PLEN]], i64 40 ; CHECK-NEXT: store i64 [[NZ0_PI]], ptr [[PNZ0_PI]], align 4 diff --git a/llvm/test/Transforms/InstCombine/strnlen-3.ll b/llvm/test/Transforms/InstCombine/strnlen-3.ll index f988f86fc15b..65d360192851 100644 --- a/llvm/test/Transforms/InstCombine/strnlen-3.ll +++ b/llvm/test/Transforms/InstCombine/strnlen-3.ll @@ -31,7 +31,7 @@ define i64 @fold_strnlen_sx_pi_0(i64 %i) { define i64 @call_strnlen_sx_pi_n(i64 %i, i64 %n) { ; CHECK-LABEL: @call_strnlen_sx_pi_n( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [0 x i8], ptr @sx, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @sx, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -46,7 +46,7 @@ define i64 @call_strnlen_sx_pi_n(i64 %i, i64 %n) { define i64 @call_strnlen_a3_pi_2(i64 %i) { ; CHECK-LABEL: @call_strnlen_a3_pi_2( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @a3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -61,7 +61,7 @@ define i64 @call_strnlen_a3_pi_2(i64 %i) { define i64 @call_strnlen_a3_pi_3(i64 %i) { ; CHECK-LABEL: @call_strnlen_a3_pi_3( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @a3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -111,7 +111,7 @@ define i64 @fold_strnlen_s5_3_pi_0(i64 zeroext %i) { define i64 @call_strnlen_s5_3_pi_n(i64 zeroext %i, i64 %n) { ; CHECK-LABEL: @call_strnlen_s5_3_pi_n( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s5_3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -151,7 +151,7 @@ define i64 @fold_strnlen_s3_n(i64 %n) { define i64 @fold_strnlen_a3_pi_2(i64 %i) { ; CHECK-LABEL: @fold_strnlen_a3_pi_2( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @a3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -166,7 +166,7 @@ define i64 @fold_strnlen_a3_pi_2(i64 %i) { define i64 @fold_strnlen_s3_pi_2(i64 %i) { ; CHECK-LABEL: @fold_strnlen_s3_pi_2( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -181,7 +181,7 @@ define i64 @fold_strnlen_s3_pi_2(i64 %i) { define i64 @fold_strnlen_s3_pi_3(i64 %i) { ; CHECK-LABEL: @fold_strnlen_s3_pi_3( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -196,7 +196,7 @@ define i64 @fold_strnlen_s3_pi_3(i64 %i) { define i64 @fold_strnlen_s3_pi_n(i64 %i, i64 %n) { ; CHECK-LABEL: @fold_strnlen_s3_pi_n( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ; CHECK-NEXT: ret i64 [[LEN]] ; @@ -212,7 +212,7 @@ define i64 @fold_strnlen_s3_pi_n(i64 %i, i64 %n) { define i64 @call_strnlen_s5_3_pi_2(i64 %i) { ; CHECK-LABEL: @call_strnlen_s5_3_pi_2( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s5_3, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ; CHECK-NEXT: ret i64 [[LEN]] ; diff --git a/llvm/test/Transforms/InstCombine/strnlen-4.ll b/llvm/test/Transforms/InstCombine/strnlen-4.ll index 7a222f0993be..263f9ee3f658 100644 --- a/llvm/test/Transforms/InstCombine/strnlen-4.ll +++ b/llvm/test/Transforms/InstCombine/strnlen-4.ll @@ -17,7 +17,7 @@ declare i64 @strnlen(ptr, i64) define i64 @fold_strnlen_s3_pi_s5_n(i1 %C, i64 %i, i64 %n) { ; CHECK-LABEL: @fold_strnlen_s3_pi_s5_n( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[I:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @s5 ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -37,7 +37,7 @@ define i64 @fold_strnlen_s3_pi_s5_n(i1 %C, i64 %i, i64 %n) { define i64 @call_strnlen_s3_pi_xbounds_s5_n(i1 %C, i64 %i, i64 %n) { ; CHECK-LABEL: @call_strnlen_s3_pi_xbounds_s5_n( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr i8, ptr @s3, i64 [[I:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @s5 ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr [[SEL]], i64 [[N:%.*]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -57,7 +57,7 @@ define i64 @call_strnlen_s3_pi_xbounds_s5_n(i1 %C, i64 %i, i64 %n) { define i64 @call_strnlen_s3_pi_sx_n(i1 %C, i64 %i, i64 %n) { ; CHECK-LABEL: @call_strnlen_s3_pi_sx_n( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s3, i64 [[I:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @sx ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) ; CHECK-NEXT: ret i64 [[LEN]] diff --git a/llvm/test/Transforms/InstCombine/strnlen-5.ll b/llvm/test/Transforms/InstCombine/strnlen-5.ll index 3866b92ab8b4..de422017c4e6 100644 --- a/llvm/test/Transforms/InstCombine/strnlen-5.ll +++ b/llvm/test/Transforms/InstCombine/strnlen-5.ll @@ -164,7 +164,7 @@ define i1 @fold_strnlen_ax_nz_gtz(i64 %n) { define i1 @fold_strnlen_a5_pi_nz_eqz(i64 %i, i64 %n) { ; CHECK-LABEL: @fold_strnlen_a5_pi_nz_eqz( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @a5, i64 [[I:%.*]] ; CHECK-NEXT: [[CHAR0:%.*]] = load i8, ptr [[PTR]], align 1 ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i8 [[CHAR0]], 0 ; CHECK-NEXT: ret i1 [[EQZ]] @@ -200,7 +200,7 @@ define i1 @fold_strnlen_s5_pi_nz_eqz(i64 %i, i64 %n) { define i1 @call_strnlen_s5_pi_n_eqz(i64 %i, i64 %n) { ; CHECK-LABEL: @call_strnlen_s5_pi_n_eqz( -; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[I:%.*]] +; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr @s5, i64 [[I:%.*]] ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i64 [[LEN]], 0 ; CHECK-NEXT: ret i1 [[EQZ]] diff --git a/llvm/test/Transforms/InstCombine/sub-gep.ll b/llvm/test/Transforms/InstCombine/sub-gep.ll index 0db5cbee3300..8eeaea1533bc 100644 --- a/llvm/test/Transforms/InstCombine/sub-gep.ll +++ b/llvm/test/Transforms/InstCombine/sub-gep.ll @@ -214,10 +214,10 @@ define i64 @test_nuw_two_gep_missing_nuw_on_one_gep(ptr %base, i64 %idx, i64 %id define i64 @test_inbounds_nuw_multi_index(ptr %base, i64 %idx, i64 %idx2) { ; CHECK-LABEL: @test_inbounds_nuw_multi_index( -; CHECK-NEXT: [[P2_IDX:%.*]] = shl nsw i64 [[IDX:%.*]], 3 -; CHECK-NEXT: [[P2_IDX1:%.*]] = shl nsw i64 [[IDX2:%.*]], 2 -; CHECK-NEXT: [[P2_OFFS:%.*]] = add nsw i64 [[P2_IDX]], [[P2_IDX1]] -; CHECK-NEXT: ret i64 [[P2_OFFS]] +; CHECK-NEXT: [[P2_SPLIT_IDX:%.*]] = shl nsw i64 [[IDX:%.*]], 3 +; CHECK-NEXT: [[P2_IDX:%.*]] = shl nsw i64 [[IDX2:%.*]], 2 +; CHECK-NEXT: [[D:%.*]] = add nsw i64 [[P2_SPLIT_IDX]], [[P2_IDX]] +; CHECK-NEXT: ret i64 [[D]] ; %p2 = getelementptr inbounds [0 x [2 x i32]], ptr %base, i64 0, i64 %idx, i64 %idx2 %i1 = ptrtoint ptr %base to i64 diff --git a/llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll b/llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll index 3bbb9b931e43..109669e91d22 100644 --- a/llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/sub-of-negatible-inseltpoison.ll @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s declare void @use4(i4) @@ -8,8 +8,9 @@ declare i1 @use32gen1(i32) ; Constant can be freely negated. define i8 @t0(i8 %x) { -; CHECK-LABEL: @t0( -; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @t0( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: ret i8 [[T0]] ; %t0 = sub i8 %x, -42 @@ -18,10 +19,11 @@ define i8 @t0(i8 %x) { ; Negation can be negated for free define i8 @t1(i8 %x, i8 %y) { -; CHECK-LABEL: @t1( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @t1( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = add i8 [[X:%.*]], [[Y]] +; CHECK-NEXT: [[T1:%.*]] = add i8 [[X]], [[Y]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sub i8 0, %y @@ -32,9 +34,10 @@ define i8 @t1(i8 %x, i8 %y) { ; Shift-left can be negated if all uses can be updated define i8 @t2(i8 %x, i8 %y) { -; CHECK-LABEL: @t2( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl i8 42, [[Y:%.*]] -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @t2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl i8 42, [[Y]] +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = shl i8 -42, %y @@ -42,10 +45,11 @@ define i8 @t2(i8 %x, i8 %y) { ret i8 %t1 } define i8 @n2(i8 %x, i8 %y) { -; CHECK-LABEL: @n2( -; CHECK-NEXT: [[T0:%.*]] = shl i8 -42, [[Y:%.*]] +; CHECK-LABEL: define i8 @n2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 -42, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = shl i8 -42, %y @@ -54,11 +58,12 @@ define i8 @n2(i8 %x, i8 %y) { ret i8 %t1 } define i8 @t3(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @t3( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @t3( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Z]], [[Y:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Z]], [[Y]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -68,12 +73,13 @@ define i8 @t3(i8 %x, i8 %y, i8 %z) { ret i8 %t2 } define i8 @n3(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n3( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @n3( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], [[Y:%.*]] +; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -86,9 +92,10 @@ define i8 @n3(i8 %x, i8 %y, i8 %z) { ; Select can be negated if all it's operands can be negated and all the users of select can be updated define i8 @t4(i8 %x, i1 %y) { -; CHECK-LABEL: @t4( -; CHECK-NEXT: [[T0_NEG:%.*]] = select i1 [[Y:%.*]], i8 42, i8 -44 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @t4( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = select i1 [[Y]], i8 42, i8 -44 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %y, i8 -42, i8 44 @@ -96,10 +103,11 @@ define i8 @t4(i8 %x, i1 %y) { ret i8 %t1 } define i8 @n4(i8 %x, i1 %y) { -; CHECK-LABEL: @n4( -; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y:%.*]], i8 -42, i8 44 +; CHECK-LABEL: define i8 @n4( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y]], i8 -42, i8 44 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %y, i8 -42, i8 44 @@ -108,9 +116,10 @@ define i8 @n4(i8 %x, i1 %y) { ret i8 %t1 } define i8 @n5(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @n5( -; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y:%.*]], i8 -42, i8 [[Z:%.*]] -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @n5( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y]], i8 -42, i8 [[Z]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %y, i8 -42, i8 %z @@ -118,11 +127,12 @@ define i8 @n5(i8 %x, i1 %y, i8 %z) { ret i8 %t1 } define i8 @t6(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @t6( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @t6( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y:%.*]], i8 42, i8 [[Z]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y]], i8 42, i8 [[Z]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -132,10 +142,11 @@ define i8 @t6(i8 %x, i1 %y, i8 %z) { ret i8 %t2 } define i8 @t7(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @t7( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl nsw i8 -1, [[Z:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y:%.*]], i8 0, i8 [[T0_NEG]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @t7( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl nsw i8 -1, [[Z]] +; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y]], i8 0, i8 [[T0_NEG]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 1, %z @@ -144,11 +155,12 @@ define i8 @t7(i8 %x, i1 %y, i8 %z) { ret i8 %t2 } define i8 @n8(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @n8( -; CHECK-NEXT: [[T0:%.*]] = shl nuw i8 1, [[Z:%.*]] +; CHECK-LABEL: define i8 @n8( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl nuw i8 1, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = select i1 [[Y:%.*]], i8 0, i8 [[T0]] -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T1:%.*]] = select i1 [[Y]], i8 0, i8 [[T0]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 1, %z @@ -161,8 +173,9 @@ define i8 @n8(i8 %x, i1 %y, i8 %z) { ; Subtraction can be negated by swapping its operands. ; x - (y - z) -> x - y + z -> x + (z - y) define i8 @t9(i8 %x, i8 %y) { -; CHECK-LABEL: @t9( -; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i8 @t9( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 [[X]], [[Y]] ; CHECK-NEXT: ret i8 [[T0_NEG]] ; %t0 = sub i8 %y, %x @@ -171,8 +184,9 @@ define i8 @t9(i8 %x, i8 %y) { } define i8 @n10(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n10( -; CHECK-NEXT: [[T0:%.*]] = sub i8 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i8 @n10( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 [[Y]], [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[T0]] ; CHECK-NEXT: ret i8 [[T1]] @@ -184,8 +198,9 @@ define i8 @n10(i8 %x, i8 %y, i8 %z) { } define i8 @neg_of_sub_from_constant(i8 %x) { -; CHECK-LABEL: @neg_of_sub_from_constant( -; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X:%.*]], -42 +; CHECK-LABEL: define i8 @neg_of_sub_from_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X]], -42 ; CHECK-NEXT: ret i8 [[S_NEG]] ; %s = sub i8 42, %x @@ -194,8 +209,9 @@ define i8 @neg_of_sub_from_constant(i8 %x) { } define i8 @neg_of_sub_from_constant_multi_use(i8 %x) { -; CHECK-LABEL: @neg_of_sub_from_constant_multi_use( -; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X:%.*]], -42 +; CHECK-LABEL: define i8 @neg_of_sub_from_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X]], -42 ; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X]] ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: ret i8 [[S_NEG]] @@ -207,8 +223,9 @@ define i8 @neg_of_sub_from_constant_multi_use(i8 %x) { } define i8 @sub_from_constant_of_sub_from_constant(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_sub_from_constant( -; CHECK-NEXT: [[R:%.*]] = add i8 [[X:%.*]], -31 +; CHECK-LABEL: define i8 @sub_from_constant_of_sub_from_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = add i8 [[X]], -31 ; CHECK-NEXT: ret i8 [[R]] ; %s = sub i8 42, %x @@ -217,8 +234,9 @@ define i8 @sub_from_constant_of_sub_from_constant(i8 %x) { } define i8 @sub_from_constant_of_sub_from_constant_multi_use(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_sub_from_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X:%.*]] +; CHECK-LABEL: define i8 @sub_from_constant_of_sub_from_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X]] ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: [[R:%.*]] = add i8 [[X]], -31 ; CHECK-NEXT: ret i8 [[R]] @@ -230,9 +248,10 @@ define i8 @sub_from_constant_of_sub_from_constant_multi_use(i8 %x) { } define i8 @sub_from_variable_of_sub_from_constant(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_sub_from_constant( -; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X:%.*]], -42 -; CHECK-NEXT: [[R:%.*]] = add i8 [[S_NEG]], [[Y:%.*]] +; CHECK-LABEL: define i8 @sub_from_variable_of_sub_from_constant( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X]], -42 +; CHECK-NEXT: [[R:%.*]] = add i8 [[S_NEG]], [[Y]] ; CHECK-NEXT: ret i8 [[R]] ; %s = sub i8 42, %x @@ -241,10 +260,11 @@ define i8 @sub_from_variable_of_sub_from_constant(i8 %x, i8 %y) { } define i8 @sub_from_variable_of_sub_from_constant_multi_use(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_sub_from_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X:%.*]] +; CHECK-LABEL: define i8 @sub_from_variable_of_sub_from_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X]] ; CHECK-NEXT: call void @use8(i8 [[S]]) -; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y:%.*]], [[S]] +; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y]], [[S]] ; CHECK-NEXT: ret i8 [[R]] ; %s = sub i8 42, %x @@ -256,13 +276,14 @@ define i8 @sub_from_variable_of_sub_from_constant_multi_use(i8 %x, i8 %y) { ; Addition can be negated if both operands can be negated ; x - (y + z) -> x - y - z -> x + ((-y) + (-z))) define i8 @t12(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @t12( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @t12( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[Y]], [[Z]] -; CHECK-NEXT: [[T3:%.*]] = add i8 [[X:%.*]], [[TMP1]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[X]], [[TMP1]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -274,11 +295,12 @@ define i8 @t12(i8 %x, i8 %y, i8 %z) { ret i8 %t3 } define i8 @n13(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n13( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @n13( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = sub i8 [[Y]], [[Z:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = sub i8 [[Y]], [[Z]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %y @@ -288,15 +310,16 @@ define i8 @n13(i8 %x, i8 %y, i8 %z) { ret i8 %t2 } define i8 @n14(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n14( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @n14( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[Y]], [[Z]] ; CHECK-NEXT: [[T2:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: call void @use8(i8 [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = add i8 [[X:%.*]], [[TMP1]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[X]], [[TMP1]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -310,8 +333,9 @@ define i8 @n14(i8 %x, i8 %y, i8 %z) { } define i8 @neg_of_add_with_constant(i8 %x) { -; CHECK-LABEL: @neg_of_add_with_constant( -; CHECK-NEXT: [[R:%.*]] = sub i8 -42, [[X:%.*]] +; CHECK-LABEL: define i8 @neg_of_add_with_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -320,8 +344,9 @@ define i8 @neg_of_add_with_constant(i8 %x) { } define i8 @neg_of_add_with_constant_multi_use(i8 %x) { -; CHECK-LABEL: @neg_of_add_with_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @neg_of_add_with_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: [[R:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[R]] @@ -333,8 +358,9 @@ define i8 @neg_of_add_with_constant_multi_use(i8 %x) { } define i8 @sub_from_constant_of_add_with_constant(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_add_with_constant( -; CHECK-NEXT: [[R:%.*]] = sub i8 -31, [[X:%.*]] +; CHECK-LABEL: define i8 @sub_from_constant_of_add_with_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = sub i8 -31, [[X]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -343,8 +369,9 @@ define i8 @sub_from_constant_of_add_with_constant(i8 %x) { } define i8 @sub_from_constant_of_add_with_constant_multi_use(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_add_with_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @sub_from_constant_of_add_with_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: [[R:%.*]] = sub i8 -31, [[X]] ; CHECK-NEXT: ret i8 [[R]] @@ -356,9 +383,10 @@ define i8 @sub_from_constant_of_add_with_constant_multi_use(i8 %x) { } define i8 @sub_from_variable_of_add_with_constant(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_add_with_constant( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 -; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y:%.*]], [[S]] +; CHECK-LABEL: define i8 @sub_from_variable_of_add_with_constant( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 +; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y]], [[S]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -367,10 +395,11 @@ define i8 @sub_from_variable_of_add_with_constant(i8 %x, i8 %y) { } define i8 @sub_from_variable_of_add_with_constant_multi_use(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_add_with_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @sub_from_variable_of_add_with_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[S]]) -; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y:%.*]], [[S]] +; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y]], [[S]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -382,11 +411,12 @@ define i8 @sub_from_variable_of_add_with_constant_multi_use(i8 %x, i8 %y) { ; Multiplication can be negated if either one of operands can be negated ; x - (y * z) -> x + ((-y) * z) or x + ((-z) * y) define i8 @t15(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @t15( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @t15( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[Y]], [[Z:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[Y]], [[Z]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %y @@ -396,12 +426,13 @@ define i8 @t15(i8 %x, i8 %y, i8 %z) { ret i8 %t2 } define i8 @n16(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n16( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @n16( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = mul i8 [[Z:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = mul i8 [[Z]], [[T0]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %y @@ -414,15 +445,16 @@ define i8 @n16(i8 %x, i8 %y, i8 %z) { ; Phi can be negated if all incoming values can be negated define i8 @t16(i1 %c, i8 %x) { -; CHECK-LABEL: @t16( -; CHECK-NEXT: begin: -; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]] -; CHECK: then: -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: else: -; CHECK-NEXT: br label [[END]] -; CHECK: end: -; CHECK-NEXT: [[Z_NEG:%.*]] = phi i8 [ [[X:%.*]], [[THEN]] ], [ 42, [[ELSE]] ] +; CHECK-LABEL: define i8 @t16( +; CHECK-SAME: i1 [[C:%.*]], i8 [[X:%.*]]) { +; CHECK-NEXT: [[BEGIN:.*:]] +; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[ELSE]]: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: [[Z_NEG:%.*]] = phi i8 [ [[X]], %[[THEN]] ], [ 42, %[[ELSE]] ] ; CHECK-NEXT: ret i8 [[Z_NEG]] ; begin: @@ -438,16 +470,17 @@ end: ret i8 %n } define i8 @n17(i1 %c, i8 %x) { -; CHECK-LABEL: @n17( -; CHECK-NEXT: begin: -; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]] -; CHECK: then: -; CHECK-NEXT: [[Y:%.*]] = sub i8 0, [[X:%.*]] -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: else: -; CHECK-NEXT: br label [[END]] -; CHECK: end: -; CHECK-NEXT: [[Z:%.*]] = phi i8 [ [[Y]], [[THEN]] ], [ -42, [[ELSE]] ] +; CHECK-LABEL: define i8 @n17( +; CHECK-SAME: i1 [[C:%.*]], i8 [[X:%.*]]) { +; CHECK-NEXT: [[BEGIN:.*:]] +; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: [[Y:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[ELSE]]: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: [[Z:%.*]] = phi i8 [ [[Y]], %[[THEN]] ], [ -42, %[[ELSE]] ] ; CHECK-NEXT: call void @use8(i8 [[Z]]) ; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: ret i8 [[N]] @@ -466,16 +499,17 @@ end: ret i8 %n } define i8 @n19(i1 %c, i8 %x, i8 %y) { -; CHECK-LABEL: @n19( -; CHECK-NEXT: begin: -; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]] -; CHECK: then: -; CHECK-NEXT: [[Z:%.*]] = sub i8 0, [[X:%.*]] -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: else: -; CHECK-NEXT: br label [[END]] -; CHECK: end: -; CHECK-NEXT: [[R:%.*]] = phi i8 [ [[Z]], [[THEN]] ], [ [[Y:%.*]], [[ELSE]] ] +; CHECK-LABEL: define i8 @n19( +; CHECK-SAME: i1 [[C:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[BEGIN:.*:]] +; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: [[Z:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[ELSE]]: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: [[R:%.*]] = phi i8 [ [[Z]], %[[THEN]] ], [ [[Y]], %[[ELSE]] ] ; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[R]] ; CHECK-NEXT: ret i8 [[N]] ; @@ -492,21 +526,22 @@ end: ret i8 %n } define void @phi_with_duplicate_incoming_basic_blocks(i32 %x, i32 %y, i1 %should_lookup, i32 %z) { -; CHECK-LABEL: @phi_with_duplicate_incoming_basic_blocks( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[X_INC_NEG:%.*]] = xor i32 [[X:%.*]], -1 -; CHECK-NEXT: br i1 [[SHOULD_LOOKUP:%.*]], label [[LOOKUP:%.*]], label [[LOOP:%.*]] -; CHECK: lookup: -; CHECK-NEXT: [[TO_LOOKUP:%.*]] = phi i32 [ [[Y:%.*]], [[ENTRY:%.*]] ], [ [[METAVAL_NEG:%.*]], [[LOOP]] ] -; CHECK-NEXT: switch i32 [[TO_LOOKUP]], label [[END:%.*]] [ -; CHECK-NEXT: i32 0, label [[LOOP]] -; CHECK-NEXT: i32 42, label [[LOOP]] +; CHECK-LABEL: define void @phi_with_duplicate_incoming_basic_blocks( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i1 [[SHOULD_LOOKUP:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[X_INC_NEG:%.*]] = xor i32 [[X]], -1 +; CHECK-NEXT: br i1 [[SHOULD_LOOKUP]], label %[[LOOKUP:.*]], label %[[LOOP:.*]] +; CHECK: [[LOOKUP]]: +; CHECK-NEXT: [[TO_LOOKUP:%.*]] = phi i32 [ [[Y]], %[[ENTRY]] ], [ [[METAVAL_NEG:%.*]], %[[LOOP]] ] +; CHECK-NEXT: switch i32 [[TO_LOOKUP]], label %[[END:.*]] [ +; CHECK-NEXT: i32 0, label %[[LOOP]] +; CHECK-NEXT: i32 42, label %[[LOOP]] ; CHECK-NEXT: ] -; CHECK: loop: -; CHECK-NEXT: [[METAVAL_NEG]] = phi i32 [ [[X_INC_NEG]], [[LOOKUP]] ], [ [[X_INC_NEG]], [[LOOKUP]] ], [ -84, [[ENTRY]] ] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[METAVAL_NEG]] = phi i32 [ [[X_INC_NEG]], %[[LOOKUP]] ], [ [[X_INC_NEG]], %[[LOOKUP]] ], [ -84, %[[ENTRY]] ] ; CHECK-NEXT: [[REPEAT:%.*]] = call i1 @use32gen1(i32 [[METAVAL_NEG]]) -; CHECK-NEXT: br i1 [[REPEAT]], label [[LOOKUP]], label [[END]] -; CHECK: end: +; CHECK-NEXT: br i1 [[REPEAT]], label %[[LOOKUP]], label %[[END]] +; CHECK: [[END]]: ; CHECK-NEXT: ret void ; entry: @@ -532,10 +567,11 @@ end: ; truncation can be negated if it's operand can be negated define i8 @t20(i8 %x, i16 %y) { -; CHECK-LABEL: @t20( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl i16 42, [[Y:%.*]] +; CHECK-LABEL: define i8 @t20( +; CHECK-SAME: i8 [[X:%.*]], i16 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl i16 42, [[Y]] ; CHECK-NEXT: [[T1_NEG:%.*]] = trunc i16 [[T0_NEG]] to i8 -; CHECK-NEXT: [[T2:%.*]] = add i8 [[X:%.*]], [[T1_NEG]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[X]], [[T1_NEG]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i16 -42, %y @@ -544,11 +580,12 @@ define i8 @t20(i8 %x, i16 %y) { ret i8 %t2 } define i8 @n21(i8 %x, i16 %y) { -; CHECK-LABEL: @n21( -; CHECK-NEXT: [[T0:%.*]] = shl i16 -42, [[Y:%.*]] +; CHECK-LABEL: define i8 @n21( +; CHECK-SAME: i8 [[X:%.*]], i16 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i16 -42, [[Y]] ; CHECK-NEXT: [[T1:%.*]] = trunc i16 [[T0]] to i8 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i16 -42, %y @@ -559,8 +596,9 @@ define i8 @n21(i8 %x, i16 %y) { } define i4 @negate_xor(i4 %x) { -; CHECK-LABEL: @negate_xor( -; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X:%.*]], -6 +; CHECK-LABEL: define i4 @negate_xor( +; CHECK-SAME: i4 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X]], -6 ; CHECK-NEXT: [[O_NEG:%.*]] = add i4 [[TMP1]], 1 ; CHECK-NEXT: ret i4 [[O_NEG]] ; @@ -570,8 +608,9 @@ define i4 @negate_xor(i4 %x) { } define <2 x i4> @negate_xor_vec(<2 x i4> %x) { -; CHECK-LABEL: @negate_xor_vec( -; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i4> [[X:%.*]], <i4 -6, i4 5> +; CHECK-LABEL: define <2 x i4> @negate_xor_vec( +; CHECK-SAME: <2 x i4> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i4> [[X]], <i4 -6, i4 5> ; CHECK-NEXT: [[O_NEG:%.*]] = add <2 x i4> [[TMP1]], splat (i4 1) ; CHECK-NEXT: ret <2 x i4> [[O_NEG]] ; @@ -581,8 +620,9 @@ define <2 x i4> @negate_xor_vec(<2 x i4> %x) { } define i8 @negate_xor_use(i8 %x) { -; CHECK-LABEL: @negate_xor_use( -; CHECK-NEXT: [[O:%.*]] = xor i8 [[X:%.*]], 5 +; CHECK-LABEL: define i8 @negate_xor_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[O:%.*]] = xor i8 [[X]], 5 ; CHECK-NEXT: call void @use8(i8 [[O]]) ; CHECK-NEXT: [[R:%.*]] = sub i8 0, [[O]] ; CHECK-NEXT: ret i8 [[R]] @@ -594,10 +634,11 @@ define i8 @negate_xor_use(i8 %x) { } define i4 @negate_shl_xor(i4 %x, i4 %y) { -; CHECK-LABEL: @negate_shl_xor( -; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X:%.*]], -6 +; CHECK-LABEL: define i4 @negate_shl_xor( +; CHECK-SAME: i4 [[X:%.*]], i4 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X]], -6 ; CHECK-NEXT: [[O_NEG:%.*]] = add i4 [[TMP1]], 1 -; CHECK-NEXT: [[S_NEG:%.*]] = shl i4 [[O_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[S_NEG:%.*]] = shl i4 [[O_NEG]], [[Y]] ; CHECK-NEXT: ret i4 [[S_NEG]] ; %o = xor i4 %x, 5 @@ -607,11 +648,12 @@ define i4 @negate_shl_xor(i4 %x, i4 %y) { } define i8 @negate_shl_not_uses(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_shl_not_uses( -; CHECK-NEXT: [[O_NEG:%.*]] = add i8 [[X:%.*]], 1 +; CHECK-LABEL: define i8 @negate_shl_not_uses( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[O_NEG:%.*]] = add i8 [[X]], 1 ; CHECK-NEXT: [[O:%.*]] = xor i8 [[X]], -1 ; CHECK-NEXT: call void @use8(i8 [[O]]) -; CHECK-NEXT: [[S_NEG:%.*]] = shl i8 [[O_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[S_NEG:%.*]] = shl i8 [[O_NEG]], [[Y]] ; CHECK-NEXT: ret i8 [[S_NEG]] ; %o = xor i8 %x, -1 @@ -622,11 +664,12 @@ define i8 @negate_shl_not_uses(i8 %x, i8 %y) { } define <2 x i4> @negate_mul_not_uses_vec(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_mul_not_uses_vec( -; CHECK-NEXT: [[O_NEG:%.*]] = add <2 x i4> [[X:%.*]], splat (i4 1) +; CHECK-LABEL: define <2 x i4> @negate_mul_not_uses_vec( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[O_NEG:%.*]] = add <2 x i4> [[X]], splat (i4 1) ; CHECK-NEXT: [[O:%.*]] = xor <2 x i4> [[X]], splat (i4 -1) ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[O]]) -; CHECK-NEXT: [[S_NEG:%.*]] = mul <2 x i4> [[O_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[S_NEG:%.*]] = mul <2 x i4> [[O_NEG]], [[Y]] ; CHECK-NEXT: ret <2 x i4> [[S_NEG]] ; %o = xor <2 x i4> %x, <i4 -1, i4 -1> @@ -638,9 +681,10 @@ define <2 x i4> @negate_mul_not_uses_vec(<2 x i4> %x, <2 x i4> %y) { ; signed division can be negated if divisor can be negated and is not 1/-1 define i8 @negate_sdiv(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_sdiv( -; CHECK-NEXT: [[T0_NEG:%.*]] = sdiv i8 [[Y:%.*]], -42 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @negate_sdiv( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sdiv i8 [[Y]], -42 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sdiv i8 %y, 42 @@ -648,10 +692,11 @@ define i8 @negate_sdiv(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_sdiv_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_sdiv_extrause( -; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y:%.*]], 42 +; CHECK-LABEL: define i8 @negate_sdiv_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y]], 42 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sdiv i8 %y, 42 @@ -660,8 +705,9 @@ define i8 @negate_sdiv_extrause(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_sdiv_extrause2(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_sdiv_extrause2( -; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y:%.*]], 42 +; CHECK-LABEL: define i8 @negate_sdiv_extrause2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y]], 42 ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = sub nsw i8 0, [[T0]] ; CHECK-NEXT: ret i8 [[T1]] @@ -674,9 +720,10 @@ define i8 @negate_sdiv_extrause2(i8 %x, i8 %y) { ; Right-shift sign bit smear is negatible. define i8 @negate_ashr(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_ashr( -; CHECK-NEXT: [[T0_NEG:%.*]] = lshr i8 [[Y:%.*]], 7 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @negate_ashr( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = lshr i8 [[Y]], 7 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = ashr i8 %y, 7 @@ -684,9 +731,10 @@ define i8 @negate_ashr(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_lshr(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_lshr( -; CHECK-NEXT: [[T0_NEG:%.*]] = ashr i8 [[Y:%.*]], 7 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @negate_lshr( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = ashr i8 [[Y]], 7 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = lshr i8 %y, 7 @@ -694,10 +742,11 @@ define i8 @negate_lshr(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_ashr_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_ashr_extrause( -; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y:%.*]], 7 +; CHECK-LABEL: define i8 @negate_ashr_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y]], 7 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = ashr i8 %y, 7 @@ -706,10 +755,11 @@ define i8 @negate_ashr_extrause(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_lshr_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_lshr_extrause( -; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y:%.*]], 7 +; CHECK-LABEL: define i8 @negate_lshr_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y]], 7 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = lshr i8 %y, 7 @@ -718,9 +768,10 @@ define i8 @negate_lshr_extrause(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_ashr_wrongshift(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_ashr_wrongshift( -; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y:%.*]], 6 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_ashr_wrongshift( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y]], 6 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = ashr i8 %y, 6 @@ -728,9 +779,10 @@ define i8 @negate_ashr_wrongshift(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_lshr_wrongshift(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_lshr_wrongshift( -; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y:%.*]], 6 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_lshr_wrongshift( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y]], 6 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = lshr i8 %y, 6 @@ -740,9 +792,10 @@ define i8 @negate_lshr_wrongshift(i8 %x, i8 %y) { ; *ext of i1 is always negatible define i8 @negate_sext(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_sext( -; CHECK-NEXT: [[T0_NEG:%.*]] = zext i1 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[X:%.*]], [[T0_NEG]] +; CHECK-LABEL: define i8 @negate_sext( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = zext i1 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[X]], [[T0_NEG]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sext i1 %y to i8 @@ -750,9 +803,10 @@ define i8 @negate_sext(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_zext(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_zext( -; CHECK-NEXT: [[T0_NEG:%.*]] = sext i1 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[X:%.*]], [[T0_NEG]] +; CHECK-LABEL: define i8 @negate_zext( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sext i1 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[X]], [[T0_NEG]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = zext i1 %y to i8 @@ -760,10 +814,11 @@ define i8 @negate_zext(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_sext_extrause(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_sext_extrause( -; CHECK-NEXT: [[T0:%.*]] = sext i1 [[Y:%.*]] to i8 +; CHECK-LABEL: define i8 @negate_sext_extrause( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sext i1 [[Y]] to i8 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sext i1 %y to i8 @@ -772,10 +827,11 @@ define i8 @negate_sext_extrause(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_zext_extrause(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_zext_extrause( -; CHECK-NEXT: [[T0:%.*]] = zext i1 [[Y:%.*]] to i8 +; CHECK-LABEL: define i8 @negate_zext_extrause( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = zext i1 [[Y]] to i8 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = zext i1 %y to i8 @@ -784,9 +840,10 @@ define i8 @negate_zext_extrause(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_sext_wrongwidth(i8 %x, i2 %y) { -; CHECK-LABEL: @negate_sext_wrongwidth( -; CHECK-NEXT: [[T0:%.*]] = sext i2 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_sext_wrongwidth( +; CHECK-SAME: i8 [[X:%.*]], i2 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sext i2 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sext i2 %y to i8 @@ -794,9 +851,10 @@ define i8 @negate_sext_wrongwidth(i8 %x, i2 %y) { ret i8 %t1 } define i8 @negate_zext_wrongwidth(i8 %x, i2 %y) { -; CHECK-LABEL: @negate_zext_wrongwidth( -; CHECK-NEXT: [[T0:%.*]] = zext i2 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_zext_wrongwidth( +; CHECK-SAME: i8 [[X:%.*]], i2 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = zext i2 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = zext i2 %y to i8 @@ -805,10 +863,11 @@ define i8 @negate_zext_wrongwidth(i8 %x, i2 %y) { } define <2 x i4> @negate_shufflevector_oneinput_reverse(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_shufflevector_oneinput_reverse( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_oneinput_reverse( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X]] ; CHECK-NEXT: [[T1_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> poison, <2 x i32> <i32 1, i32 0> -; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y]] ; CHECK-NEXT: ret <2 x i4> [[T2]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -817,10 +876,11 @@ define <2 x i4> @negate_shufflevector_oneinput_reverse(<2 x i4> %x, <2 x i4> %y) ret <2 x i4> %t2 } define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_shufflevector_oneinput_second_lane_is_undef( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X]] ; CHECK-NEXT: [[T1_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> poison, <2 x i32> <i32 0, i32 poison> -; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y]] ; CHECK-NEXT: ret <2 x i4> [[T2]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -829,11 +889,12 @@ define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef(<2 x i4> %x, ret <2 x i4> %t2 } define <2 x i4> @negate_shufflevector_twoinputs(<2 x i4> %x, <2 x i4> %y, <2 x i4> %z) { -; CHECK-LABEL: @negate_shufflevector_twoinputs( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = add <2 x i4> [[Y:%.*]], <i4 poison, i4 1> +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_twoinputs( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]], <2 x i4> [[Z:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X]] +; CHECK-NEXT: [[T1_NEG:%.*]] = add <2 x i4> [[Y]], <i4 poison, i4 1> ; CHECK-NEXT: [[T2_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> [[T1_NEG]], <2 x i32> <i32 0, i32 3> -; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[Z:%.*]] +; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[Z]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -843,11 +904,12 @@ define <2 x i4> @negate_shufflevector_twoinputs(<2 x i4> %x, <2 x i4> %y, <2 x i ret <2 x i4> %t3 } define <2 x i4> @negate_shufflevector_oneinput_extrause(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_shufflevector_oneinput_extrause( -; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> <i4 -6, i4 5>, [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_oneinput_extrause( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> <i4 -6, i4 5>, [[X]] ; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> poison, <2 x i32> <i32 1, i32 0> ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub <2 x i4> [[Y:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub <2 x i4> [[Y]], [[T1]] ; CHECK-NEXT: ret <2 x i4> [[T2]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -860,15 +922,16 @@ define <2 x i4> @negate_shufflevector_oneinput_extrause(<2 x i4> %x, <2 x i4> %y ; zext of non-negative can be negated ; sext of non-positive can be negated define i16 @negation_of_zeroext_of_nonnegative(i8 %x) { -; CHECK-LABEL: @negation_of_zeroext_of_nonnegative( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_zeroext_of_nonnegative( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1 -; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] -; CHECK: nonneg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NONNEG_BB:.*]], label %[[NEG_BB:.*]] +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext nneg i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: neg_bb: +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -884,15 +947,16 @@ neg_bb: ret i16 0 } define i16 @negation_of_zeroext_of_positive(i8 %x) { -; CHECK-LABEL: @negation_of_zeroext_of_positive( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_zeroext_of_positive( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], 0 -; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] -; CHECK: nonneg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NONNEG_BB:.*]], label %[[NEG_BB:.*]] +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext nneg i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: neg_bb: +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -908,15 +972,16 @@ neg_bb: ret i16 0 } define i16 @negation_of_signext_of_negative(i8 %x) { -; CHECK-LABEL: @negation_of_signext_of_negative( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_signext_of_negative( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0 -; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] -; CHECK: neg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NEG_BB:.*]], label %[[NONNEG_BB:.*]] +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: nonneg_bb: +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -932,15 +997,16 @@ nonneg_bb: ret i16 0 } define i16 @negation_of_signext_of_nonpositive(i8 %x) { -; CHECK-LABEL: @negation_of_signext_of_nonpositive( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_signext_of_nonpositive( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 1 -; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] -; CHECK: neg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NEG_BB:.*]], label %[[NONNEG_BB:.*]] +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: nonneg_bb: +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -956,15 +1022,16 @@ nonneg_bb: ret i16 0 } define i16 @negation_of_signext_of_nonnegative__wrong_cast(i8 %x) { -; CHECK-LABEL: @negation_of_signext_of_nonnegative__wrong_cast( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_signext_of_nonnegative__wrong_cast( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1 -; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] -; CHECK: nonneg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NONNEG_BB:.*]], label %[[NEG_BB:.*]] +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext nneg i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: neg_bb: +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -980,15 +1047,16 @@ neg_bb: ret i16 0 } define i16 @negation_of_zeroext_of_negative_wrongcast(i8 %x) { -; CHECK-LABEL: @negation_of_zeroext_of_negative_wrongcast( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_zeroext_of_negative_wrongcast( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0 -; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] -; CHECK: neg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NEG_BB:.*]], label %[[NONNEG_BB:.*]] +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: nonneg_bb: +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -1006,10 +1074,11 @@ nonneg_bb: ; 'or' of 1 and operand with no lowest bit set is 'inc' define i8 @negation_of_increment_via_or_with_no_common_bits_set(i8 %x, i8 %y) { -; CHECK-LABEL: @negation_of_increment_via_or_with_no_common_bits_set( -; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i8 @negation_of_increment_via_or_with_no_common_bits_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y]], 1 ; CHECK-NEXT: [[T1_NEG:%.*]] = xor i8 [[T0]], -1 -; CHECK-NEXT: [[T2:%.*]] = add i8 [[X:%.*]], [[T1_NEG]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[X]], [[T1_NEG]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 %y, 1 @@ -1018,11 +1087,12 @@ define i8 @negation_of_increment_via_or_with_no_common_bits_set(i8 %x, i8 %y) { ret i8 %t2 } define i8 @negation_of_increment_via_or_with_no_common_bits_set_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negation_of_increment_via_or_with_no_common_bits_set_extrause( -; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i8 @negation_of_increment_via_or_with_no_common_bits_set_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y]], 1 ; CHECK-NEXT: [[T1:%.*]] = or disjoint i8 [[T0]], 1 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 %y, 1 @@ -1032,10 +1102,11 @@ define i8 @negation_of_increment_via_or_with_no_common_bits_set_extrause(i8 %x, ret i8 %t2 } define i8 @negation_of_increment_via_or_common_bits_set(i8 %x, i8 %y) { -; CHECK-LABEL: @negation_of_increment_via_or_common_bits_set( -; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i8 @negation_of_increment_via_or_common_bits_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y]], 1 ; CHECK-NEXT: [[T1:%.*]] = or i8 [[T0]], 3 -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 %y, 1 @@ -1046,12 +1117,13 @@ define i8 @negation_of_increment_via_or_common_bits_set(i8 %x, i8 %y) { ; 'or' of operands with no common bits set is 'add' define i8 @add_via_or_with_no_common_bits_set(i8 %x, i8 %y) { -; CHECK-LABEL: @add_via_or_with_no_common_bits_set( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @add_via_or_with_no_common_bits_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Y]], 2 ; CHECK-NEXT: [[T2_NEG:%.*]] = add i8 [[T1_NEG]], -3 -; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -1062,12 +1134,13 @@ define i8 @add_via_or_with_no_common_bits_set(i8 %x, i8 %y) { ret i8 %t3 } define i8 @add_via_or_with_common_bit_maybe_set(i8 %x, i8 %y) { -; CHECK-LABEL: @add_via_or_with_common_bit_maybe_set( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @add_via_or_with_common_bit_maybe_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 2 ; CHECK-NEXT: [[T2:%.*]] = or i8 [[T1]], 4 -; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X]], [[T2]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -1078,13 +1151,14 @@ define i8 @add_via_or_with_common_bit_maybe_set(i8 %x, i8 %y) { ret i8 %t3 } define i8 @add_via_or_with_no_common_bits_set_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @add_via_or_with_no_common_bits_set_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @add_via_or_with_no_common_bits_set_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 2 ; CHECK-NEXT: [[T2:%.*]] = or disjoint i8 [[T1]], 3 ; CHECK-NEXT: call void @use8(i8 [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X]], [[T2]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -1098,11 +1172,12 @@ define i8 @add_via_or_with_no_common_bits_set_extrause(i8 %x, i8 %y) { ; `extractelement` is negatible if source operand is negatible. define i4 @negate_extractelement(<2 x i4> %x, i32 %y, i4 %z) { -; CHECK-LABEL: @negate_extractelement( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X:%.*]] +; CHECK-LABEL: define i4 @negate_extractelement( +; CHECK-SAME: <2 x i4> [[X:%.*]], i32 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X]] ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = extractelement <2 x i4> [[X]], i32 [[Y:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = extractelement <2 x i4> [[X]], i32 [[Y]] +; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub <2 x i4> zeroinitializer, %x @@ -1112,12 +1187,13 @@ define i4 @negate_extractelement(<2 x i4> %x, i32 %y, i4 %z) { ret i4 %t2 } define i4 @negate_extractelement_extrause(<2 x i4> %x, i32 %y, i4 %z) { -; CHECK-LABEL: @negate_extractelement_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X:%.*]] +; CHECK-LABEL: define i4 @negate_extractelement_extrause( +; CHECK-SAME: <2 x i4> [[X:%.*]], i32 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X]] ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = extractelement <2 x i4> [[T0]], i32 [[Y:%.*]] +; CHECK-NEXT: [[T1:%.*]] = extractelement <2 x i4> [[T0]], i32 [[Y]] ; CHECK-NEXT: call void @use4(i4 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z]], [[T1]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub <2 x i4> zeroinitializer, %x @@ -1130,9 +1206,10 @@ define i4 @negate_extractelement_extrause(<2 x i4> %x, i32 %y, i4 %z) { ; `insertelement` is negatible if both source vector and element-to-be-inserted are negatible. define <2 x i4> @negate_insertelement(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement( -; CHECK-NEXT: [[T2_NEG:%.*]] = insertelement <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]] -; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[B:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T2_NEG:%.*]] = insertelement <2 x i4> [[SRC]], i4 [[A]], i32 [[X]] +; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[B]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = sub <2 x i4> zeroinitializer, %src @@ -1142,12 +1219,13 @@ define <2 x i4> @negate_insertelement(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) ret <2 x i4> %t3 } define <2 x i4> @negate_insertelement_extrause(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC:%.*]] -; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A:%.*]] -; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[T1]], i32 [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement_extrause( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC]] +; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A]] +; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[T1]], i32 [[X]] ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B]], [[T2]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = sub <2 x i4> zeroinitializer, %src @@ -1158,10 +1236,11 @@ define <2 x i4> @negate_insertelement_extrause(<2 x i4> %src, i4 %a, i32 %x, <2 ret <2 x i4> %t3 } define <2 x i4> @negate_insertelement_nonnegatible_base(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement_nonnegatible_base( -; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A:%.*]] -; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[SRC:%.*]], i4 [[T1]], i32 [[X:%.*]] -; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B:%.*]], [[T2]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement_nonnegatible_base( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A]] +; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[SRC]], i4 [[T1]], i32 [[X]] +; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B]], [[T2]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t1 = sub i4 zeroinitializer, %a @@ -1170,10 +1249,11 @@ define <2 x i4> @negate_insertelement_nonnegatible_base(<2 x i4> %src, i4 %a, i3 ret <2 x i4> %t3 } define <2 x i4> @negate_insertelement_nonnegatible_insert(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement_nonnegatible_insert( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC:%.*]] -; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[A:%.*]], i32 [[X:%.*]] -; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B:%.*]], [[T2]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement_nonnegatible_insert( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC]] +; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[A]], i32 [[X]] +; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B]], [[T2]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = sub <2 x i4> zeroinitializer, %src @@ -1184,11 +1264,12 @@ define <2 x i4> @negate_insertelement_nonnegatible_insert(<2 x i4> %src, i4 %a, ; left-shift by constant can always be negated define i8 @negate_left_shift_by_constant_prefer_keeping_shl(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @negate_left_shift_by_constant_prefer_keeping_shl( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant_prefer_keeping_shl( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Z]], 4 -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -1198,12 +1279,13 @@ define i8 @negate_left_shift_by_constant_prefer_keeping_shl(i8 %x, i8 %y, i8 %z) ret i8 %t2 } define i8 @negate_left_shift_by_constant_prefer_keeping_shl_extrause(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @negate_left_shift_by_constant_prefer_keeping_shl_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant_prefer_keeping_shl_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 4 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -1214,11 +1296,12 @@ define i8 @negate_left_shift_by_constant_prefer_keeping_shl_extrause(i8 %x, i8 % ret i8 %t2 } define i8 @negate_left_shift_by_constant(i8 %x, i8 %y, i8 %z, i8 %k) { -; CHECK-LABEL: @negate_left_shift_by_constant( -; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]], i8 [[K:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K]], [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 4 -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 %k, %z @@ -1228,12 +1311,13 @@ define i8 @negate_left_shift_by_constant(i8 %x, i8 %y, i8 %z, i8 %k) { ret i8 %t2 } define i8 @negate_left_shift_by_constant_extrause(i8 %x, i8 %y, i8 %z, i8 %k) { -; CHECK-LABEL: @negate_left_shift_by_constant_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]], i8 [[K:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K]], [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 4 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 %k, %z @@ -1246,8 +1330,9 @@ define i8 @negate_left_shift_by_constant_extrause(i8 %x, i8 %y, i8 %z, i8 %k) { ; `add` with single negatible operand is still negatible define i8 @negate_add_with_single_negatible_operand(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand( -; CHECK-NEXT: [[T1:%.*]] = sub i8 -42, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = add i8 %x, 42 @@ -1256,9 +1341,10 @@ define i8 @negate_add_with_single_negatible_operand(i8 %x, i8 %y) { } ; do so even if we are two levels deep define i8 @negate_add_with_single_negatible_operand_depth2(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand_depth2( -; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 -21, [[X:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[T0_NEG]], [[Y:%.*]] +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand_depth2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 -21, [[X]] +; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[T0_NEG]], [[Y]] ; CHECK-NEXT: ret i8 [[T1_NEG]] ; %t0 = add i8 %x, 21 @@ -1268,8 +1354,9 @@ define i8 @negate_add_with_single_negatible_operand_depth2(i8 %x, i8 %y) { } define i8 @negate_add_with_single_negatible_operand_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand_extrause( -; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[T1]] @@ -1281,9 +1368,10 @@ define i8 @negate_add_with_single_negatible_operand_extrause(i8 %x, i8 %y) { } ; But don't do this if that means just sinking the negation. define i8 @negate_add_with_single_negatible_operand_non_negation(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand_non_negation( -; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], 42 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Y:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand_non_negation( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = add i8 [[X]], 42 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Y]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = add i8 %x, 42 @@ -1293,11 +1381,12 @@ define i8 @negate_add_with_single_negatible_operand_non_negation(i8 %x, i8 %y) { ; abs/nabs can be negated define i8 @negate_abs(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_abs( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_abs( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T2:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) -; CHECK-NEXT: [[T3:%.*]] = sub i8 [[Y:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub i8 [[Y]], [[T2]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %x @@ -1308,11 +1397,12 @@ define i8 @negate_abs(i8 %x, i8 %y) { ret i8 %t3 } define i8 @negate_nabs(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_nabs( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_nabs( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) -; CHECK-NEXT: [[T3:%.*]] = add i8 [[Y:%.*]], [[TMP1]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[Y]], [[TMP1]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %x @@ -1326,11 +1416,12 @@ define i8 @negate_nabs(i8 %x, i8 %y) { ; And in general, if hands of select are known to be negation of each other, ; we can negate the select define i8 @negate_select_of_op_vs_negated_op(i8 %x, i8 %y, i1 %c) { -; CHECK-LABEL: @negate_select_of_op_vs_negated_op( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_select_of_op_vs_negated_op( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i8 [[X]], i8 [[T0]], !prof [[PROF0:![0-9]+]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i8 [[X]], i8 [[T0]], !prof [[PROF0:![0-9]+]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %x @@ -1340,9 +1431,10 @@ define i8 @negate_select_of_op_vs_negated_op(i8 %x, i8 %y, i1 %c) { ret i8 %t2 } define i8 @dont_negate_ordinary_select(i8 %x, i8 %y, i8 %z, i1 %c) { -; CHECK-LABEL: @dont_negate_ordinary_select( -; CHECK-NEXT: [[T0:%.*]] = select i1 [[C:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]] -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Z:%.*]], [[T0]] +; CHECK-LABEL: define i8 @dont_negate_ordinary_select( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = select i1 [[C]], i8 [[X]], i8 [[Y]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Z]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %c, i8 %x, i8 %y @@ -1352,10 +1444,12 @@ define i8 @dont_negate_ordinary_select(i8 %x, i8 %y, i8 %z, i1 %c) { ; Freeze is transparent as far as negation is concerned define i4 @negate_freeze(i4 %x, i4 %y, i4 %z) { -; CHECK-LABEL: @negate_freeze( -; CHECK-NEXT: [[T0_NEG:%.*]] = sub i4 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = freeze i4 [[T0_NEG]] -; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z:%.*]] +; CHECK-LABEL: define i4 @negate_freeze( +; CHECK-SAME: i4 [[X:%.*]], i4 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i4 [[X]] +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i4 [[Y]] +; CHECK-NEXT: [[T1_NEG:%.*]] = sub i4 [[Y_FR]], [[X_FR]] +; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub i4 %x, %y @@ -1364,11 +1458,13 @@ define i4 @negate_freeze(i4 %x, i4 %y, i4 %z) { ret i4 %t2 } define i4 @negate_freeze_extrause(i4 %x, i4 %y, i4 %z) { -; CHECK-LABEL: @negate_freeze_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i4 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[T1:%.*]] = freeze i4 [[T0]] +; CHECK-LABEL: define i4 @negate_freeze_extrause( +; CHECK-SAME: i4 [[X:%.*]], i4 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i4 [[X]] +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i4 [[Y]] +; CHECK-NEXT: [[T1:%.*]] = sub i4 [[X_FR]], [[Y_FR]] ; CHECK-NEXT: call void @use4(i4 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z]], [[T1]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub i4 %x, %y @@ -1384,11 +1480,11 @@ define i4 @negate_freeze_extrause(i4 %x, i4 %y, i4 %z) { ; constants to RHS ourselves, since that is helpful sometimes. ; This used to cause an endless combine loop. define void @noncanonical_mul_with_constant_as_first_operand() { -; CHECK-LABEL: @noncanonical_mul_with_constant_as_first_operand( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[IF_END:%.*]] -; CHECK: if.end: -; CHECK-NEXT: br label [[IF_END]] +; CHECK-LABEL: define void @noncanonical_mul_with_constant_as_first_operand() { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br label %[[IF_END:.*]] +; CHECK: [[IF_END]]: +; CHECK-NEXT: br label %[[IF_END]] ; entry: br label %if.end @@ -1402,5 +1498,7 @@ if.end: br label %if.end } -; CHECK: !0 = !{!"branch_weights", i32 40, i32 1} !0 = !{!"branch_weights", i32 40, i32 1} +;. +; CHECK: [[PROF0]] = !{!"branch_weights", i32 40, i32 1} +;. diff --git a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll index 871cf37976d8..aad006de0e36 100644 --- a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll +++ b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s declare void @use4(i4) @@ -8,8 +8,9 @@ declare i1 @use32gen1(i32) ; Constant can be freely negated. define i8 @t0(i8 %x) { -; CHECK-LABEL: @t0( -; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @t0( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: ret i8 [[T0]] ; %t0 = sub i8 %x, -42 @@ -18,10 +19,11 @@ define i8 @t0(i8 %x) { ; Negation can be negated for free define i8 @t1(i8 %x, i8 %y) { -; CHECK-LABEL: @t1( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @t1( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = add i8 [[X:%.*]], [[Y]] +; CHECK-NEXT: [[T1:%.*]] = add i8 [[X]], [[Y]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sub i8 0, %y @@ -32,9 +34,10 @@ define i8 @t1(i8 %x, i8 %y) { ; Shift-left can be negated if all uses can be updated define i8 @t2(i8 %x, i8 %y) { -; CHECK-LABEL: @t2( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl i8 42, [[Y:%.*]] -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @t2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl i8 42, [[Y]] +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = shl i8 -42, %y @@ -42,10 +45,11 @@ define i8 @t2(i8 %x, i8 %y) { ret i8 %t1 } define i8 @n2(i8 %x, i8 %y) { -; CHECK-LABEL: @n2( -; CHECK-NEXT: [[T0:%.*]] = shl i8 -42, [[Y:%.*]] +; CHECK-LABEL: define i8 @n2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 -42, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = shl i8 -42, %y @@ -54,11 +58,12 @@ define i8 @n2(i8 %x, i8 %y) { ret i8 %t1 } define i8 @t3(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @t3( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @t3( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Z]], [[Y:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Z]], [[Y]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -68,12 +73,13 @@ define i8 @t3(i8 %x, i8 %y, i8 %z) { ret i8 %t2 } define i8 @n3(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n3( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @n3( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], [[Y:%.*]] +; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -86,9 +92,10 @@ define i8 @n3(i8 %x, i8 %y, i8 %z) { ; Select can be negated if all it's operands can be negated and all the users of select can be updated define i8 @t4(i8 %x, i1 %y) { -; CHECK-LABEL: @t4( -; CHECK-NEXT: [[T0_NEG:%.*]] = select i1 [[Y:%.*]], i8 42, i8 -44 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @t4( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = select i1 [[Y]], i8 42, i8 -44 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %y, i8 -42, i8 44 @@ -97,8 +104,9 @@ define i8 @t4(i8 %x, i1 %y) { } define i8 @select_of_constants_multi_use(i1 %b) { -; CHECK-LABEL: @select_of_constants_multi_use( -; CHECK-NEXT: [[S_NEG:%.*]] = select i1 [[B:%.*]], i8 -42, i8 2 +; CHECK-LABEL: define i8 @select_of_constants_multi_use( +; CHECK-SAME: i1 [[B:%.*]]) { +; CHECK-NEXT: [[S_NEG:%.*]] = select i1 [[B]], i8 -42, i8 2 ; CHECK-NEXT: [[S:%.*]] = select i1 [[B]], i8 42, i8 -2 ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: ret i8 [[S_NEG]] @@ -110,7 +118,8 @@ define i8 @select_of_constants_multi_use(i1 %b) { } define i32 @PR52261(i1 %b) { -; CHECK-LABEL: @PR52261( +; CHECK-LABEL: define i32 @PR52261( +; CHECK-SAME: i1 [[B:%.*]]) { ; CHECK-NEXT: ret i32 2 ; %s = select i1 %b, i32 2, i32 -2 @@ -120,10 +129,11 @@ define i32 @PR52261(i1 %b) { } define i8 @n4(i8 %x, i1 %y) { -; CHECK-LABEL: @n4( -; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y:%.*]], i8 -42, i8 44 +; CHECK-LABEL: define i8 @n4( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y]], i8 -42, i8 44 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %y, i8 -42, i8 44 @@ -132,9 +142,10 @@ define i8 @n4(i8 %x, i1 %y) { ret i8 %t1 } define i8 @n5(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @n5( -; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y:%.*]], i8 -42, i8 [[Z:%.*]] -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @n5( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = select i1 [[Y]], i8 -42, i8 [[Z]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %y, i8 -42, i8 %z @@ -142,11 +153,12 @@ define i8 @n5(i8 %x, i1 %y, i8 %z) { ret i8 %t1 } define i8 @t6(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @t6( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @t6( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y:%.*]], i8 42, i8 [[Z]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y]], i8 42, i8 [[Z]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -156,10 +168,11 @@ define i8 @t6(i8 %x, i1 %y, i8 %z) { ret i8 %t2 } define i8 @t7(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @t7( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl nsw i8 -1, [[Z:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y:%.*]], i8 0, i8 [[T0_NEG]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @t7( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl nsw i8 -1, [[Z]] +; CHECK-NEXT: [[T1_NEG:%.*]] = select i1 [[Y]], i8 0, i8 [[T0_NEG]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 1, %z @@ -168,11 +181,12 @@ define i8 @t7(i8 %x, i1 %y, i8 %z) { ret i8 %t2 } define i8 @n8(i8 %x, i1 %y, i8 %z) { -; CHECK-LABEL: @n8( -; CHECK-NEXT: [[T0:%.*]] = shl nuw i8 1, [[Z:%.*]] +; CHECK-LABEL: define i8 @n8( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl nuw i8 1, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = select i1 [[Y:%.*]], i8 0, i8 [[T0]] -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T1:%.*]] = select i1 [[Y]], i8 0, i8 [[T0]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 1, %z @@ -185,8 +199,9 @@ define i8 @n8(i8 %x, i1 %y, i8 %z) { ; Subtraction can be negated by swapping its operands. ; x - (y - z) -> x - y + z -> x + (z - y) define i8 @t9(i8 %x, i8 %y) { -; CHECK-LABEL: @t9( -; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i8 @t9( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 [[X]], [[Y]] ; CHECK-NEXT: ret i8 [[T0_NEG]] ; %t0 = sub i8 %y, %x @@ -195,8 +210,9 @@ define i8 @t9(i8 %x, i8 %y) { } define i8 @n10(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n10( -; CHECK-NEXT: [[T0:%.*]] = sub i8 [[Y:%.*]], [[X:%.*]] +; CHECK-LABEL: define i8 @n10( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 [[Y]], [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[T0]] ; CHECK-NEXT: ret i8 [[T1]] @@ -208,8 +224,9 @@ define i8 @n10(i8 %x, i8 %y, i8 %z) { } define i8 @neg_of_sub_from_constant(i8 %x) { -; CHECK-LABEL: @neg_of_sub_from_constant( -; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X:%.*]], -42 +; CHECK-LABEL: define i8 @neg_of_sub_from_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X]], -42 ; CHECK-NEXT: ret i8 [[S_NEG]] ; %s = sub i8 42, %x @@ -218,8 +235,9 @@ define i8 @neg_of_sub_from_constant(i8 %x) { } define i8 @neg_of_sub_from_constant_multi_use(i8 %x) { -; CHECK-LABEL: @neg_of_sub_from_constant_multi_use( -; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X:%.*]], -42 +; CHECK-LABEL: define i8 @neg_of_sub_from_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X]], -42 ; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X]] ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: ret i8 [[S_NEG]] @@ -231,8 +249,9 @@ define i8 @neg_of_sub_from_constant_multi_use(i8 %x) { } define i8 @sub_from_constant_of_sub_from_constant(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_sub_from_constant( -; CHECK-NEXT: [[R:%.*]] = add i8 [[X:%.*]], -31 +; CHECK-LABEL: define i8 @sub_from_constant_of_sub_from_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = add i8 [[X]], -31 ; CHECK-NEXT: ret i8 [[R]] ; %s = sub i8 42, %x @@ -241,8 +260,9 @@ define i8 @sub_from_constant_of_sub_from_constant(i8 %x) { } define i8 @sub_from_constant_of_sub_from_constant_multi_use(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_sub_from_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X:%.*]] +; CHECK-LABEL: define i8 @sub_from_constant_of_sub_from_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X]] ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: [[R:%.*]] = add i8 [[X]], -31 ; CHECK-NEXT: ret i8 [[R]] @@ -254,9 +274,10 @@ define i8 @sub_from_constant_of_sub_from_constant_multi_use(i8 %x) { } define i8 @sub_from_variable_of_sub_from_constant(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_sub_from_constant( -; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X:%.*]], -42 -; CHECK-NEXT: [[R:%.*]] = add i8 [[S_NEG]], [[Y:%.*]] +; CHECK-LABEL: define i8 @sub_from_variable_of_sub_from_constant( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S_NEG:%.*]] = add i8 [[X]], -42 +; CHECK-NEXT: [[R:%.*]] = add i8 [[S_NEG]], [[Y]] ; CHECK-NEXT: ret i8 [[R]] ; %s = sub i8 42, %x @@ -265,10 +286,11 @@ define i8 @sub_from_variable_of_sub_from_constant(i8 %x, i8 %y) { } define i8 @sub_from_variable_of_sub_from_constant_multi_use(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_sub_from_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X:%.*]] +; CHECK-LABEL: define i8 @sub_from_variable_of_sub_from_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = sub i8 42, [[X]] ; CHECK-NEXT: call void @use8(i8 [[S]]) -; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y:%.*]], [[S]] +; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y]], [[S]] ; CHECK-NEXT: ret i8 [[R]] ; %s = sub i8 42, %x @@ -280,13 +302,14 @@ define i8 @sub_from_variable_of_sub_from_constant_multi_use(i8 %x, i8 %y) { ; Addition can be negated if both operands can be negated ; x - (y + z) -> x - y - z -> x + ((-y) + (-z))) define i8 @t12(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @t12( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @t12( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[Y]], [[Z]] -; CHECK-NEXT: [[T3:%.*]] = add i8 [[X:%.*]], [[TMP1]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[X]], [[TMP1]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -298,11 +321,12 @@ define i8 @t12(i8 %x, i8 %y, i8 %z) { ret i8 %t3 } define i8 @n13(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n13( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @n13( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = sub i8 [[Y]], [[Z:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = sub i8 [[Y]], [[Z]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %y @@ -312,15 +336,16 @@ define i8 @n13(i8 %x, i8 %y, i8 %z) { ret i8 %t2 } define i8 @n14(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n14( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @n14( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) ; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[Y]], [[Z]] ; CHECK-NEXT: [[T2:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: call void @use8(i8 [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = add i8 [[X:%.*]], [[TMP1]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[X]], [[TMP1]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -334,8 +359,9 @@ define i8 @n14(i8 %x, i8 %y, i8 %z) { } define i8 @neg_of_add_with_constant(i8 %x) { -; CHECK-LABEL: @neg_of_add_with_constant( -; CHECK-NEXT: [[R:%.*]] = sub i8 -42, [[X:%.*]] +; CHECK-LABEL: define i8 @neg_of_add_with_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -344,8 +370,9 @@ define i8 @neg_of_add_with_constant(i8 %x) { } define i8 @neg_of_add_with_constant_multi_use(i8 %x) { -; CHECK-LABEL: @neg_of_add_with_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @neg_of_add_with_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: [[R:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[R]] @@ -357,8 +384,9 @@ define i8 @neg_of_add_with_constant_multi_use(i8 %x) { } define i8 @sub_from_constant_of_add_with_constant(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_add_with_constant( -; CHECK-NEXT: [[R:%.*]] = sub i8 -31, [[X:%.*]] +; CHECK-LABEL: define i8 @sub_from_constant_of_add_with_constant( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = sub i8 -31, [[X]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -367,8 +395,9 @@ define i8 @sub_from_constant_of_add_with_constant(i8 %x) { } define i8 @sub_from_constant_of_add_with_constant_multi_use(i8 %x) { -; CHECK-LABEL: @sub_from_constant_of_add_with_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @sub_from_constant_of_add_with_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[S]]) ; CHECK-NEXT: [[R:%.*]] = sub i8 -31, [[X]] ; CHECK-NEXT: ret i8 [[R]] @@ -380,9 +409,10 @@ define i8 @sub_from_constant_of_add_with_constant_multi_use(i8 %x) { } define i8 @sub_from_variable_of_add_with_constant(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_add_with_constant( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 -; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y:%.*]], [[S]] +; CHECK-LABEL: define i8 @sub_from_variable_of_add_with_constant( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 +; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y]], [[S]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -391,10 +421,11 @@ define i8 @sub_from_variable_of_add_with_constant(i8 %x, i8 %y) { } define i8 @sub_from_variable_of_add_with_constant_multi_use(i8 %x, i8 %y) { -; CHECK-LABEL: @sub_from_variable_of_add_with_constant_multi_use( -; CHECK-NEXT: [[S:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @sub_from_variable_of_add_with_constant_multi_use( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[S:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[S]]) -; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y:%.*]], [[S]] +; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y]], [[S]] ; CHECK-NEXT: ret i8 [[R]] ; %s = add i8 %x, 42 @@ -406,11 +437,12 @@ define i8 @sub_from_variable_of_add_with_constant_multi_use(i8 %x, i8 %y) { ; Multiplication can be negated if either one of operands can be negated ; x - (y * z) -> x + ((-y) * z) or x + ((-z) * y) define i8 @t15(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @t15( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @t15( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[Y]], [[Z:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[Y]], [[Z]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %y @@ -420,12 +452,13 @@ define i8 @t15(i8 %x, i8 %y, i8 %z) { ret i8 %t2 } define i8 @n16(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @n16( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @n16( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = mul i8 [[Z:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = mul i8 [[Z]], [[T0]] ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %y @@ -438,15 +471,16 @@ define i8 @n16(i8 %x, i8 %y, i8 %z) { ; Phi can be negated if all incoming values can be negated define i8 @t16(i1 %c, i8 %x) { -; CHECK-LABEL: @t16( -; CHECK-NEXT: begin: -; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]] -; CHECK: then: -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: else: -; CHECK-NEXT: br label [[END]] -; CHECK: end: -; CHECK-NEXT: [[Z_NEG:%.*]] = phi i8 [ [[X:%.*]], [[THEN]] ], [ 42, [[ELSE]] ] +; CHECK-LABEL: define i8 @t16( +; CHECK-SAME: i1 [[C:%.*]], i8 [[X:%.*]]) { +; CHECK-NEXT: [[BEGIN:.*:]] +; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[ELSE]]: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: [[Z_NEG:%.*]] = phi i8 [ [[X]], %[[THEN]] ], [ 42, %[[ELSE]] ] ; CHECK-NEXT: ret i8 [[Z_NEG]] ; begin: @@ -462,16 +496,17 @@ end: ret i8 %n } define i8 @n17(i1 %c, i8 %x) { -; CHECK-LABEL: @n17( -; CHECK-NEXT: begin: -; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]] -; CHECK: then: -; CHECK-NEXT: [[Y:%.*]] = sub i8 0, [[X:%.*]] -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: else: -; CHECK-NEXT: br label [[END]] -; CHECK: end: -; CHECK-NEXT: [[Z:%.*]] = phi i8 [ [[Y]], [[THEN]] ], [ -42, [[ELSE]] ] +; CHECK-LABEL: define i8 @n17( +; CHECK-SAME: i1 [[C:%.*]], i8 [[X:%.*]]) { +; CHECK-NEXT: [[BEGIN:.*:]] +; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: [[Y:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[ELSE]]: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: [[Z:%.*]] = phi i8 [ [[Y]], %[[THEN]] ], [ -42, %[[ELSE]] ] ; CHECK-NEXT: call void @use8(i8 [[Z]]) ; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: ret i8 [[N]] @@ -490,16 +525,17 @@ end: ret i8 %n } define i8 @n19(i1 %c, i8 %x, i8 %y) { -; CHECK-LABEL: @n19( -; CHECK-NEXT: begin: -; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]] -; CHECK: then: -; CHECK-NEXT: [[Z:%.*]] = sub i8 0, [[X:%.*]] -; CHECK-NEXT: br label [[END:%.*]] -; CHECK: else: -; CHECK-NEXT: br label [[END]] -; CHECK: end: -; CHECK-NEXT: [[R:%.*]] = phi i8 [ [[Z]], [[THEN]] ], [ [[Y:%.*]], [[ELSE]] ] +; CHECK-LABEL: define i8 @n19( +; CHECK-SAME: i1 [[C:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[BEGIN:.*:]] +; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: [[Z:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[ELSE]]: +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: [[R:%.*]] = phi i8 [ [[Z]], %[[THEN]] ], [ [[Y]], %[[ELSE]] ] ; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[R]] ; CHECK-NEXT: ret i8 [[N]] ; @@ -516,21 +552,22 @@ end: ret i8 %n } define void @phi_with_duplicate_incoming_basic_blocks(i32 %x, i32 %y, i1 %should_lookup, i32 %z) { -; CHECK-LABEL: @phi_with_duplicate_incoming_basic_blocks( -; CHECK-NEXT: entry: -; CHECK-NEXT: [[X_INC_NEG:%.*]] = xor i32 [[X:%.*]], -1 -; CHECK-NEXT: br i1 [[SHOULD_LOOKUP:%.*]], label [[LOOKUP:%.*]], label [[LOOP:%.*]] -; CHECK: lookup: -; CHECK-NEXT: [[TO_LOOKUP:%.*]] = phi i32 [ [[Y:%.*]], [[ENTRY:%.*]] ], [ [[METAVAL_NEG:%.*]], [[LOOP]] ] -; CHECK-NEXT: switch i32 [[TO_LOOKUP]], label [[END:%.*]] [ -; CHECK-NEXT: i32 0, label [[LOOP]] -; CHECK-NEXT: i32 42, label [[LOOP]] +; CHECK-LABEL: define void @phi_with_duplicate_incoming_basic_blocks( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]], i1 [[SHOULD_LOOKUP:%.*]], i32 [[Z:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[X_INC_NEG:%.*]] = xor i32 [[X]], -1 +; CHECK-NEXT: br i1 [[SHOULD_LOOKUP]], label %[[LOOKUP:.*]], label %[[LOOP:.*]] +; CHECK: [[LOOKUP]]: +; CHECK-NEXT: [[TO_LOOKUP:%.*]] = phi i32 [ [[Y]], %[[ENTRY]] ], [ [[METAVAL_NEG:%.*]], %[[LOOP]] ] +; CHECK-NEXT: switch i32 [[TO_LOOKUP]], label %[[END:.*]] [ +; CHECK-NEXT: i32 0, label %[[LOOP]] +; CHECK-NEXT: i32 42, label %[[LOOP]] ; CHECK-NEXT: ] -; CHECK: loop: -; CHECK-NEXT: [[METAVAL_NEG]] = phi i32 [ [[X_INC_NEG]], [[LOOKUP]] ], [ [[X_INC_NEG]], [[LOOKUP]] ], [ -84, [[ENTRY]] ] +; CHECK: [[LOOP]]: +; CHECK-NEXT: [[METAVAL_NEG]] = phi i32 [ [[X_INC_NEG]], %[[LOOKUP]] ], [ [[X_INC_NEG]], %[[LOOKUP]] ], [ -84, %[[ENTRY]] ] ; CHECK-NEXT: [[REPEAT:%.*]] = call i1 @use32gen1(i32 [[METAVAL_NEG]]) -; CHECK-NEXT: br i1 [[REPEAT]], label [[LOOKUP]], label [[END]] -; CHECK: end: +; CHECK-NEXT: br i1 [[REPEAT]], label %[[LOOKUP]], label %[[END]] +; CHECK: [[END]]: ; CHECK-NEXT: ret void ; entry: @@ -556,10 +593,11 @@ end: ; truncation can be negated if it's operand can be negated define i8 @t20(i8 %x, i16 %y) { -; CHECK-LABEL: @t20( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl i16 42, [[Y:%.*]] +; CHECK-LABEL: define i8 @t20( +; CHECK-SAME: i8 [[X:%.*]], i16 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl i16 42, [[Y]] ; CHECK-NEXT: [[T1_NEG:%.*]] = trunc i16 [[T0_NEG]] to i8 -; CHECK-NEXT: [[T2:%.*]] = add i8 [[X:%.*]], [[T1_NEG]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[X]], [[T1_NEG]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i16 -42, %y @@ -568,11 +606,12 @@ define i8 @t20(i8 %x, i16 %y) { ret i8 %t2 } define i8 @n21(i8 %x, i16 %y) { -; CHECK-LABEL: @n21( -; CHECK-NEXT: [[T0:%.*]] = shl i16 -42, [[Y:%.*]] +; CHECK-LABEL: define i8 @n21( +; CHECK-SAME: i8 [[X:%.*]], i16 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i16 -42, [[Y]] ; CHECK-NEXT: [[T1:%.*]] = trunc i16 [[T0]] to i8 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i16 -42, %y @@ -583,8 +622,9 @@ define i8 @n21(i8 %x, i16 %y) { } define i4 @negate_xor(i4 %x) { -; CHECK-LABEL: @negate_xor( -; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X:%.*]], -6 +; CHECK-LABEL: define i4 @negate_xor( +; CHECK-SAME: i4 [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X]], -6 ; CHECK-NEXT: [[O_NEG:%.*]] = add i4 [[TMP1]], 1 ; CHECK-NEXT: ret i4 [[O_NEG]] ; @@ -594,8 +634,9 @@ define i4 @negate_xor(i4 %x) { } define <2 x i4> @negate_xor_vec(<2 x i4> %x) { -; CHECK-LABEL: @negate_xor_vec( -; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i4> [[X:%.*]], <i4 -6, i4 5> +; CHECK-LABEL: define <2 x i4> @negate_xor_vec( +; CHECK-SAME: <2 x i4> [[X:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i4> [[X]], <i4 -6, i4 5> ; CHECK-NEXT: [[O_NEG:%.*]] = add <2 x i4> [[TMP1]], splat (i4 1) ; CHECK-NEXT: ret <2 x i4> [[O_NEG]] ; @@ -605,8 +646,9 @@ define <2 x i4> @negate_xor_vec(<2 x i4> %x) { } define i8 @negate_xor_use(i8 %x) { -; CHECK-LABEL: @negate_xor_use( -; CHECK-NEXT: [[O:%.*]] = xor i8 [[X:%.*]], 5 +; CHECK-LABEL: define i8 @negate_xor_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[O:%.*]] = xor i8 [[X]], 5 ; CHECK-NEXT: call void @use8(i8 [[O]]) ; CHECK-NEXT: [[R:%.*]] = sub i8 0, [[O]] ; CHECK-NEXT: ret i8 [[R]] @@ -618,10 +660,11 @@ define i8 @negate_xor_use(i8 %x) { } define i4 @negate_shl_xor(i4 %x, i4 %y) { -; CHECK-LABEL: @negate_shl_xor( -; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X:%.*]], -6 +; CHECK-LABEL: define i4 @negate_shl_xor( +; CHECK-SAME: i4 [[X:%.*]], i4 [[Y:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = xor i4 [[X]], -6 ; CHECK-NEXT: [[O_NEG:%.*]] = add i4 [[TMP1]], 1 -; CHECK-NEXT: [[S_NEG:%.*]] = shl i4 [[O_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[S_NEG:%.*]] = shl i4 [[O_NEG]], [[Y]] ; CHECK-NEXT: ret i4 [[S_NEG]] ; %o = xor i4 %x, 5 @@ -631,11 +674,12 @@ define i4 @negate_shl_xor(i4 %x, i4 %y) { } define i8 @negate_shl_not_uses(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_shl_not_uses( -; CHECK-NEXT: [[O_NEG:%.*]] = add i8 [[X:%.*]], 1 +; CHECK-LABEL: define i8 @negate_shl_not_uses( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[O_NEG:%.*]] = add i8 [[X]], 1 ; CHECK-NEXT: [[O:%.*]] = xor i8 [[X]], -1 ; CHECK-NEXT: call void @use8(i8 [[O]]) -; CHECK-NEXT: [[S_NEG:%.*]] = shl i8 [[O_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[S_NEG:%.*]] = shl i8 [[O_NEG]], [[Y]] ; CHECK-NEXT: ret i8 [[S_NEG]] ; %o = xor i8 %x, -1 @@ -646,11 +690,12 @@ define i8 @negate_shl_not_uses(i8 %x, i8 %y) { } define <2 x i4> @negate_mul_not_uses_vec(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_mul_not_uses_vec( -; CHECK-NEXT: [[O_NEG:%.*]] = add <2 x i4> [[X:%.*]], splat (i4 1) +; CHECK-LABEL: define <2 x i4> @negate_mul_not_uses_vec( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[O_NEG:%.*]] = add <2 x i4> [[X]], splat (i4 1) ; CHECK-NEXT: [[O:%.*]] = xor <2 x i4> [[X]], splat (i4 -1) ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[O]]) -; CHECK-NEXT: [[S_NEG:%.*]] = mul <2 x i4> [[O_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[S_NEG:%.*]] = mul <2 x i4> [[O_NEG]], [[Y]] ; CHECK-NEXT: ret <2 x i4> [[S_NEG]] ; %o = xor <2 x i4> %x, <i4 -1, i4 -1> @@ -662,9 +707,10 @@ define <2 x i4> @negate_mul_not_uses_vec(<2 x i4> %x, <2 x i4> %y) { ; signed division can be negated if divisor can be negated and is not 1/-1 define i8 @negate_sdiv(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_sdiv( -; CHECK-NEXT: [[T0_NEG:%.*]] = sdiv i8 [[Y:%.*]], -42 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @negate_sdiv( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sdiv i8 [[Y]], -42 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sdiv i8 %y, 42 @@ -672,10 +718,11 @@ define i8 @negate_sdiv(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_sdiv_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_sdiv_extrause( -; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y:%.*]], 42 +; CHECK-LABEL: define i8 @negate_sdiv_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y]], 42 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sdiv i8 %y, 42 @@ -684,8 +731,9 @@ define i8 @negate_sdiv_extrause(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_sdiv_extrause2(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_sdiv_extrause2( -; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y:%.*]], 42 +; CHECK-LABEL: define i8 @negate_sdiv_extrause2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sdiv i8 [[Y]], 42 ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = sub nsw i8 0, [[T0]] ; CHECK-NEXT: ret i8 [[T1]] @@ -698,9 +746,10 @@ define i8 @negate_sdiv_extrause2(i8 %x, i8 %y) { ; Right-shift sign bit smear is negatible. define i8 @negate_ashr(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_ashr( -; CHECK-NEXT: [[T0_NEG:%.*]] = lshr i8 [[Y:%.*]], 7 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @negate_ashr( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = lshr i8 [[Y]], 7 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = ashr i8 %y, 7 @@ -708,9 +757,10 @@ define i8 @negate_ashr(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_lshr(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_lshr( -; CHECK-NEXT: [[T0_NEG:%.*]] = ashr i8 [[Y:%.*]], 7 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X:%.*]] +; CHECK-LABEL: define i8 @negate_lshr( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = ashr i8 [[Y]], 7 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = lshr i8 %y, 7 @@ -718,10 +768,11 @@ define i8 @negate_lshr(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_ashr_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_ashr_extrause( -; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y:%.*]], 7 +; CHECK-LABEL: define i8 @negate_ashr_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y]], 7 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = ashr i8 %y, 7 @@ -730,10 +781,11 @@ define i8 @negate_ashr_extrause(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_lshr_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_lshr_extrause( -; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y:%.*]], 7 +; CHECK-LABEL: define i8 @negate_lshr_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y]], 7 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = lshr i8 %y, 7 @@ -742,9 +794,10 @@ define i8 @negate_lshr_extrause(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_ashr_wrongshift(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_ashr_wrongshift( -; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y:%.*]], 6 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_ashr_wrongshift( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = ashr i8 [[Y]], 6 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = ashr i8 %y, 6 @@ -752,9 +805,10 @@ define i8 @negate_ashr_wrongshift(i8 %x, i8 %y) { ret i8 %t1 } define i8 @negate_lshr_wrongshift(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_lshr_wrongshift( -; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y:%.*]], 6 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_lshr_wrongshift( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = lshr i8 [[Y]], 6 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = lshr i8 %y, 6 @@ -764,9 +818,10 @@ define i8 @negate_lshr_wrongshift(i8 %x, i8 %y) { ; *ext of i1 is always negatible define i8 @negate_sext(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_sext( -; CHECK-NEXT: [[T0_NEG:%.*]] = zext i1 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[X:%.*]], [[T0_NEG]] +; CHECK-LABEL: define i8 @negate_sext( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = zext i1 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[X]], [[T0_NEG]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sext i1 %y to i8 @@ -774,9 +829,10 @@ define i8 @negate_sext(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_zext(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_zext( -; CHECK-NEXT: [[T0_NEG:%.*]] = sext i1 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = add i8 [[X:%.*]], [[T0_NEG]] +; CHECK-LABEL: define i8 @negate_zext( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sext i1 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = add i8 [[X]], [[T0_NEG]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = zext i1 %y to i8 @@ -784,10 +840,11 @@ define i8 @negate_zext(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_sext_extrause(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_sext_extrause( -; CHECK-NEXT: [[T0:%.*]] = sext i1 [[Y:%.*]] to i8 +; CHECK-LABEL: define i8 @negate_sext_extrause( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sext i1 [[Y]] to i8 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sext i1 %y to i8 @@ -796,10 +853,11 @@ define i8 @negate_sext_extrause(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_zext_extrause(i8 %x, i1 %y) { -; CHECK-LABEL: @negate_zext_extrause( -; CHECK-NEXT: [[T0:%.*]] = zext i1 [[Y:%.*]] to i8 +; CHECK-LABEL: define i8 @negate_zext_extrause( +; CHECK-SAME: i8 [[X:%.*]], i1 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = zext i1 [[Y]] to i8 ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = zext i1 %y to i8 @@ -808,9 +866,10 @@ define i8 @negate_zext_extrause(i8 %x, i1 %y) { ret i8 %t1 } define i8 @negate_sext_wrongwidth(i8 %x, i2 %y) { -; CHECK-LABEL: @negate_sext_wrongwidth( -; CHECK-NEXT: [[T0:%.*]] = sext i2 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_sext_wrongwidth( +; CHECK-SAME: i8 [[X:%.*]], i2 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sext i2 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = sext i2 %y to i8 @@ -818,9 +877,10 @@ define i8 @negate_sext_wrongwidth(i8 %x, i2 %y) { ret i8 %t1 } define i8 @negate_zext_wrongwidth(i8 %x, i2 %y) { -; CHECK-LABEL: @negate_zext_wrongwidth( -; CHECK-NEXT: [[T0:%.*]] = zext i2 [[Y:%.*]] to i8 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_zext_wrongwidth( +; CHECK-SAME: i8 [[X:%.*]], i2 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = zext i2 [[Y]] to i8 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[X]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = zext i2 %y to i8 @@ -829,10 +889,11 @@ define i8 @negate_zext_wrongwidth(i8 %x, i2 %y) { } define <2 x i4> @negate_shufflevector_oneinput_reverse(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_shufflevector_oneinput_reverse( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_oneinput_reverse( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X]] ; CHECK-NEXT: [[T1_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> poison, <2 x i32> <i32 1, i32 0> -; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T1_NEG]], [[Y]] ; CHECK-NEXT: ret <2 x i4> [[T2]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -841,10 +902,11 @@ define <2 x i4> @negate_shufflevector_oneinput_reverse(<2 x i4> %x, <2 x i4> %y) ret <2 x i4> %t2 } define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_shufflevector_oneinput_second_lane_is_undef( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X]] ; CHECK-NEXT: [[T11_NEG:%.*]] = insertelement <2 x i4> [[T0_NEG]], i4 undef, i64 1 -; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T11_NEG]], [[Y:%.*]] +; CHECK-NEXT: [[T2:%.*]] = add <2 x i4> [[T11_NEG]], [[Y]] ; CHECK-NEXT: ret <2 x i4> [[T2]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -853,11 +915,12 @@ define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef(<2 x i4> %x, ret <2 x i4> %t2 } define <2 x i4> @negate_shufflevector_twoinputs(<2 x i4> %x, <2 x i4> %y, <2 x i4> %z) { -; CHECK-LABEL: @negate_shufflevector_twoinputs( -; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = add <2 x i4> [[Y:%.*]], <i4 poison, i4 1> +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_twoinputs( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]], <2 x i4> [[Z:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = shl <2 x i4> <i4 6, i4 -5>, [[X]] +; CHECK-NEXT: [[T1_NEG:%.*]] = add <2 x i4> [[Y]], <i4 poison, i4 1> ; CHECK-NEXT: [[T2_NEG:%.*]] = shufflevector <2 x i4> [[T0_NEG]], <2 x i4> [[T1_NEG]], <2 x i32> <i32 0, i32 3> -; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[Z:%.*]] +; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[Z]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -867,11 +930,12 @@ define <2 x i4> @negate_shufflevector_twoinputs(<2 x i4> %x, <2 x i4> %y, <2 x i ret <2 x i4> %t3 } define <2 x i4> @negate_shufflevector_oneinput_extrause(<2 x i4> %x, <2 x i4> %y) { -; CHECK-LABEL: @negate_shufflevector_oneinput_extrause( -; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> <i4 -6, i4 5>, [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_shufflevector_oneinput_extrause( +; CHECK-SAME: <2 x i4> [[X:%.*]], <2 x i4> [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> <i4 -6, i4 5>, [[X]] ; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> poison, <2 x i32> <i32 1, i32 0> ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub <2 x i4> [[Y:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub <2 x i4> [[Y]], [[T1]] ; CHECK-NEXT: ret <2 x i4> [[T2]] ; %t0 = shl <2 x i4> <i4 -6, i4 5>, %x @@ -884,15 +948,16 @@ define <2 x i4> @negate_shufflevector_oneinput_extrause(<2 x i4> %x, <2 x i4> %y ; zext of non-negative can be negated ; sext of non-positive can be negated define i16 @negation_of_zeroext_of_nonnegative(i8 %x) { -; CHECK-LABEL: @negation_of_zeroext_of_nonnegative( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_zeroext_of_nonnegative( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1 -; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] -; CHECK: nonneg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NONNEG_BB:.*]], label %[[NEG_BB:.*]] +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext nneg i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: neg_bb: +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -908,15 +973,16 @@ neg_bb: ret i16 0 } define i16 @negation_of_zeroext_of_positive(i8 %x) { -; CHECK-LABEL: @negation_of_zeroext_of_positive( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_zeroext_of_positive( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], 0 -; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] -; CHECK: nonneg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NONNEG_BB:.*]], label %[[NEG_BB:.*]] +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext nneg i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: neg_bb: +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -932,15 +998,16 @@ neg_bb: ret i16 0 } define i16 @negation_of_signext_of_negative(i8 %x) { -; CHECK-LABEL: @negation_of_signext_of_negative( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_signext_of_negative( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0 -; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] -; CHECK: neg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NEG_BB:.*]], label %[[NONNEG_BB:.*]] +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: nonneg_bb: +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -956,15 +1023,16 @@ nonneg_bb: ret i16 0 } define i16 @negation_of_signext_of_nonpositive(i8 %x) { -; CHECK-LABEL: @negation_of_signext_of_nonpositive( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_signext_of_nonpositive( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 1 -; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] -; CHECK: neg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NEG_BB:.*]], label %[[NONNEG_BB:.*]] +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: nonneg_bb: +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -980,15 +1048,16 @@ nonneg_bb: ret i16 0 } define i16 @negation_of_signext_of_nonnegative__wrong_cast(i8 %x) { -; CHECK-LABEL: @negation_of_signext_of_nonnegative__wrong_cast( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_signext_of_nonnegative__wrong_cast( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1 -; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] -; CHECK: nonneg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NONNEG_BB:.*]], label %[[NEG_BB:.*]] +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext nneg i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: neg_bb: +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -1004,15 +1073,16 @@ neg_bb: ret i16 0 } define i16 @negation_of_zeroext_of_negative_wrongcast(i8 %x) { -; CHECK-LABEL: @negation_of_zeroext_of_negative_wrongcast( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i16 @negation_of_zeroext_of_negative_wrongcast( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0 -; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] -; CHECK: neg_bb: +; CHECK-NEXT: br i1 [[T1]], label %[[NEG_BB:.*]], label %[[NONNEG_BB:.*]] +; CHECK: [[NEG_BB]]: ; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16 ; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] ; CHECK-NEXT: ret i16 [[T3]] -; CHECK: nonneg_bb: +; CHECK: [[NONNEG_BB]]: ; CHECK-NEXT: ret i16 0 ; %t0 = sub i8 0, %x @@ -1030,10 +1100,11 @@ nonneg_bb: ; 'or' of 1 and operand with no lowest bit set is 'inc' define i8 @negation_of_increment_via_or_with_no_common_bits_set(i8 %x, i8 %y) { -; CHECK-LABEL: @negation_of_increment_via_or_with_no_common_bits_set( -; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i8 @negation_of_increment_via_or_with_no_common_bits_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y]], 1 ; CHECK-NEXT: [[T1_NEG:%.*]] = xor i8 [[T0]], -1 -; CHECK-NEXT: [[T2:%.*]] = add i8 [[X:%.*]], [[T1_NEG]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[X]], [[T1_NEG]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 %y, 1 @@ -1042,11 +1113,12 @@ define i8 @negation_of_increment_via_or_with_no_common_bits_set(i8 %x, i8 %y) { ret i8 %t2 } define i8 @negation_of_increment_via_or_with_no_common_bits_set_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negation_of_increment_via_or_with_no_common_bits_set_extrause( -; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i8 @negation_of_increment_via_or_with_no_common_bits_set_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y]], 1 ; CHECK-NEXT: [[T1:%.*]] = or disjoint i8 [[T0]], 1 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 %y, 1 @@ -1056,10 +1128,11 @@ define i8 @negation_of_increment_via_or_with_no_common_bits_set_extrause(i8 %x, ret i8 %t2 } define i8 @negation_of_increment_via_or_common_bits_set(i8 %x, i8 %y) { -; CHECK-LABEL: @negation_of_increment_via_or_common_bits_set( -; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y:%.*]], 1 +; CHECK-LABEL: define i8 @negation_of_increment_via_or_common_bits_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = shl i8 [[Y]], 1 ; CHECK-NEXT: [[T1:%.*]] = or i8 [[T0]], 3 -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = shl i8 %y, 1 @@ -1069,9 +1142,10 @@ define i8 @negation_of_increment_via_or_common_bits_set(i8 %x, i8 %y) { } define i8 @negation_of_increment_via_or_disjoint(i8 %x, i8 %y) { -; CHECK-LABEL: @negation_of_increment_via_or_disjoint( -; CHECK-NEXT: [[T1_NEG:%.*]] = xor i8 [[Y:%.*]], -1 -; CHECK-NEXT: [[T2:%.*]] = add i8 [[X:%.*]], [[T1_NEG]] +; CHECK-LABEL: define i8 @negation_of_increment_via_or_disjoint( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T1_NEG:%.*]] = xor i8 [[Y]], -1 +; CHECK-NEXT: [[T2:%.*]] = add i8 [[X]], [[T1_NEG]] ; CHECK-NEXT: ret i8 [[T2]] ; %t1 = or disjoint i8 %y, 1 @@ -1081,12 +1155,13 @@ define i8 @negation_of_increment_via_or_disjoint(i8 %x, i8 %y) { ; 'or' of operands with no common bits set is 'add' define i8 @add_via_or_with_no_common_bits_set(i8 %x, i8 %y) { -; CHECK-LABEL: @add_via_or_with_no_common_bits_set( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @add_via_or_with_no_common_bits_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Y]], 2 ; CHECK-NEXT: [[T2_NEG:%.*]] = add i8 [[T1_NEG]], -3 -; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -1097,12 +1172,13 @@ define i8 @add_via_or_with_no_common_bits_set(i8 %x, i8 %y) { ret i8 %t3 } define i8 @add_via_or_with_common_bit_maybe_set(i8 %x, i8 %y) { -; CHECK-LABEL: @add_via_or_with_common_bit_maybe_set( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @add_via_or_with_common_bit_maybe_set( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 2 ; CHECK-NEXT: [[T2:%.*]] = or i8 [[T1]], 4 -; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X]], [[T2]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -1113,13 +1189,14 @@ define i8 @add_via_or_with_common_bit_maybe_set(i8 %x, i8 %y) { ret i8 %t3 } define i8 @add_via_or_with_no_common_bits_set_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @add_via_or_with_no_common_bits_set_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y:%.*]] +; CHECK-LABEL: define i8 @add_via_or_with_no_common_bits_set_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Y]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 2 ; CHECK-NEXT: [[T2:%.*]] = or disjoint i8 [[T1]], 3 ; CHECK-NEXT: call void @use8(i8 [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub i8 [[X]], [[T2]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %y @@ -1133,11 +1210,12 @@ define i8 @add_via_or_with_no_common_bits_set_extrause(i8 %x, i8 %y) { ; `extractelement` is negatible if source operand is negatible. define i4 @negate_extractelement(<2 x i4> %x, i32 %y, i4 %z) { -; CHECK-LABEL: @negate_extractelement( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X:%.*]] +; CHECK-LABEL: define i4 @negate_extractelement( +; CHECK-SAME: <2 x i4> [[X:%.*]], i32 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X]] ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T0]]) -; CHECK-NEXT: [[T1_NEG:%.*]] = extractelement <2 x i4> [[X]], i32 [[Y:%.*]] -; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z:%.*]] +; CHECK-NEXT: [[T1_NEG:%.*]] = extractelement <2 x i4> [[X]], i32 [[Y]] +; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub <2 x i4> zeroinitializer, %x @@ -1147,12 +1225,13 @@ define i4 @negate_extractelement(<2 x i4> %x, i32 %y, i4 %z) { ret i4 %t2 } define i4 @negate_extractelement_extrause(<2 x i4> %x, i32 %y, i4 %z) { -; CHECK-LABEL: @negate_extractelement_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X:%.*]] +; CHECK-LABEL: define i4 @negate_extractelement_extrause( +; CHECK-SAME: <2 x i4> [[X:%.*]], i32 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[X]] ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T0]]) -; CHECK-NEXT: [[T1:%.*]] = extractelement <2 x i4> [[T0]], i32 [[Y:%.*]] +; CHECK-NEXT: [[T1:%.*]] = extractelement <2 x i4> [[T0]], i32 [[Y]] ; CHECK-NEXT: call void @use4(i4 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z]], [[T1]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub <2 x i4> zeroinitializer, %x @@ -1165,9 +1244,10 @@ define i4 @negate_extractelement_extrause(<2 x i4> %x, i32 %y, i4 %z) { ; `insertelement` is negatible if both source vector and element-to-be-inserted are negatible. define <2 x i4> @negate_insertelement(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement( -; CHECK-NEXT: [[T2_NEG:%.*]] = insertelement <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]] -; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[B:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T2_NEG:%.*]] = insertelement <2 x i4> [[SRC]], i4 [[A]], i32 [[X]] +; CHECK-NEXT: [[T3:%.*]] = add <2 x i4> [[T2_NEG]], [[B]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = sub <2 x i4> zeroinitializer, %src @@ -1177,12 +1257,13 @@ define <2 x i4> @negate_insertelement(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) ret <2 x i4> %t3 } define <2 x i4> @negate_insertelement_extrause(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC:%.*]] -; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A:%.*]] -; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[T1]], i32 [[X:%.*]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement_extrause( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC]] +; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A]] +; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[T1]], i32 [[X]] ; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B]], [[T2]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = sub <2 x i4> zeroinitializer, %src @@ -1193,10 +1274,11 @@ define <2 x i4> @negate_insertelement_extrause(<2 x i4> %src, i4 %a, i32 %x, <2 ret <2 x i4> %t3 } define <2 x i4> @negate_insertelement_nonnegatible_base(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement_nonnegatible_base( -; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A:%.*]] -; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[SRC:%.*]], i4 [[T1]], i32 [[X:%.*]] -; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B:%.*]], [[T2]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement_nonnegatible_base( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = sub i4 0, [[A]] +; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[SRC]], i4 [[T1]], i32 [[X]] +; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B]], [[T2]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t1 = sub i4 zeroinitializer, %a @@ -1205,10 +1287,11 @@ define <2 x i4> @negate_insertelement_nonnegatible_base(<2 x i4> %src, i4 %a, i3 ret <2 x i4> %t3 } define <2 x i4> @negate_insertelement_nonnegatible_insert(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) { -; CHECK-LABEL: @negate_insertelement_nonnegatible_insert( -; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC:%.*]] -; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[A:%.*]], i32 [[X:%.*]] -; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B:%.*]], [[T2]] +; CHECK-LABEL: define <2 x i4> @negate_insertelement_nonnegatible_insert( +; CHECK-SAME: <2 x i4> [[SRC:%.*]], i4 [[A:%.*]], i32 [[X:%.*]], <2 x i4> [[B:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub <2 x i4> zeroinitializer, [[SRC]] +; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x i4> [[T0]], i4 [[A]], i32 [[X]] +; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[B]], [[T2]] ; CHECK-NEXT: ret <2 x i4> [[T3]] ; %t0 = sub <2 x i4> zeroinitializer, %src @@ -1219,11 +1302,12 @@ define <2 x i4> @negate_insertelement_nonnegatible_insert(<2 x i4> %src, i4 %a, ; left-shift by constant can always be negated define i8 @negate_left_shift_by_constant_prefer_keeping_shl(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @negate_left_shift_by_constant_prefer_keeping_shl( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant_prefer_keeping_shl( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1_NEG:%.*]] = shl i8 [[Z]], 4 -; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X:%.*]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[T1_NEG]], [[X]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -1233,12 +1317,13 @@ define i8 @negate_left_shift_by_constant_prefer_keeping_shl(i8 %x, i8 %y, i8 %z) ret i8 %t2 } define i8 @negate_left_shift_by_constant_prefer_keeping_shl_extrause(i8 %x, i8 %y, i8 %z) { -; CHECK-LABEL: @negate_left_shift_by_constant_prefer_keeping_shl_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant_prefer_keeping_shl_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 4 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %z @@ -1249,11 +1334,12 @@ define i8 @negate_left_shift_by_constant_prefer_keeping_shl_extrause(i8 %x, i8 % ret i8 %t2 } define i8 @negate_left_shift_by_constant(i8 %x, i8 %y, i8 %z, i8 %k) { -; CHECK-LABEL: @negate_left_shift_by_constant( -; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]], i8 [[K:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K]], [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 4 -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 %k, %z @@ -1263,12 +1349,13 @@ define i8 @negate_left_shift_by_constant(i8 %x, i8 %y, i8 %z, i8 %k) { ret i8 %t2 } define i8 @negate_left_shift_by_constant_extrause(i8 %x, i8 %y, i8 %z, i8 %k) { -; CHECK-LABEL: @negate_left_shift_by_constant_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K:%.*]], [[Z:%.*]] +; CHECK-LABEL: define i8 @negate_left_shift_by_constant_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]], i8 [[K:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 [[K]], [[Z]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = shl i8 [[T0]], 4 ; CHECK-NEXT: call void @use8(i8 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i8 [[X]], [[T1]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 %k, %z @@ -1281,8 +1368,9 @@ define i8 @negate_left_shift_by_constant_extrause(i8 %x, i8 %y, i8 %z, i8 %k) { ; `add` with single negatible operand is still negatible define i8 @negate_add_with_single_negatible_operand(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand( -; CHECK-NEXT: [[T1:%.*]] = sub i8 -42, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T1:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = add i8 %x, 42 @@ -1291,9 +1379,10 @@ define i8 @negate_add_with_single_negatible_operand(i8 %x, i8 %y) { } ; do so even if we are two levels deep define i8 @negate_add_with_single_negatible_operand_depth2(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand_depth2( -; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 -21, [[X:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[T0_NEG]], [[Y:%.*]] +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand_depth2( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0_NEG:%.*]] = sub i8 -21, [[X]] +; CHECK-NEXT: [[T1_NEG:%.*]] = mul i8 [[T0_NEG]], [[Y]] ; CHECK-NEXT: ret i8 [[T1_NEG]] ; %t0 = add i8 %x, 21 @@ -1303,8 +1392,9 @@ define i8 @negate_add_with_single_negatible_operand_depth2(i8 %x, i8 %y) { } define i8 @negate_add_with_single_negatible_operand_extrause(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand_extrause( -; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], 42 +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand_extrause( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = add i8 [[X]], 42 ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T1:%.*]] = sub i8 -42, [[X]] ; CHECK-NEXT: ret i8 [[T1]] @@ -1316,9 +1406,10 @@ define i8 @negate_add_with_single_negatible_operand_extrause(i8 %x, i8 %y) { } ; But don't do this if that means just sinking the negation. define i8 @negate_add_with_single_negatible_operand_non_negation(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_add_with_single_negatible_operand_non_negation( -; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], 42 -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Y:%.*]], [[T0]] +; CHECK-LABEL: define i8 @negate_add_with_single_negatible_operand_non_negation( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = add i8 [[X]], 42 +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Y]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = add i8 %x, 42 @@ -1328,11 +1419,12 @@ define i8 @negate_add_with_single_negatible_operand_non_negation(i8 %x, i8 %y) { ; abs/nabs can be negated define i8 @negate_abs(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_abs( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_abs( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[T2:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) -; CHECK-NEXT: [[T3:%.*]] = sub i8 [[Y:%.*]], [[T2]] +; CHECK-NEXT: [[T3:%.*]] = sub i8 [[Y]], [[T2]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %x @@ -1343,11 +1435,12 @@ define i8 @negate_abs(i8 %x, i8 %y) { ret i8 %t3 } define i8 @negate_nabs(i8 %x, i8 %y) { -; CHECK-LABEL: @negate_nabs( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_nabs( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false) -; CHECK-NEXT: [[T3:%.*]] = add i8 [[Y:%.*]], [[TMP1]] +; CHECK-NEXT: [[T3:%.*]] = add i8 [[Y]], [[TMP1]] ; CHECK-NEXT: ret i8 [[T3]] ; %t0 = sub i8 0, %x @@ -1361,11 +1454,12 @@ define i8 @negate_nabs(i8 %x, i8 %y) { ; And in general, if hands of select are known to be negation of each other, ; we can negate the select define i8 @negate_select_of_op_vs_negated_op(i8 %x, i8 %y, i1 %c) { -; CHECK-LABEL: @negate_select_of_op_vs_negated_op( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-LABEL: define i8 @negate_select_of_op_vs_negated_op( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] ; CHECK-NEXT: call void @use8(i8 [[T0]]) -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i8 [[X]], i8 [[T0]], !prof [[PROF0:![0-9]+]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i8 [[X]], i8 [[T0]], !prof [[PROF0:![0-9]+]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub i8 0, %x @@ -1376,10 +1470,11 @@ define i8 @negate_select_of_op_vs_negated_op(i8 %x, i8 %y, i1 %c) { } define i8 @negate_select_of_op_vs_negated_op_nsw(i8 %x, i8 %y, i1 %c) { -; CHECK-LABEL: @negate_select_of_op_vs_negated_op_nsw( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i8 [[X]], i8 [[T0]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define i8 @negate_select_of_op_vs_negated_op_nsw( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i8 [[X]], i8 [[T0]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub nsw i8 0, %x @@ -1389,10 +1484,11 @@ define i8 @negate_select_of_op_vs_negated_op_nsw(i8 %x, i8 %y, i1 %c) { } define i8 @negate_select_of_op_vs_negated_op_nsw_commuted(i8 %x, i8 %y, i1 %c) { -; CHECK-LABEL: @negate_select_of_op_vs_negated_op_nsw_commuted( -; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i8 [[T0]], i8 [[X]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y:%.*]] +; CHECK-LABEL: define i8 @negate_select_of_op_vs_negated_op_nsw_commuted( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X]] +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i8 [[T0]], i8 [[X]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Y]] ; CHECK-NEXT: ret i8 [[T2]] ; %t0 = sub nsw i8 0, %x @@ -1402,11 +1498,12 @@ define i8 @negate_select_of_op_vs_negated_op_nsw_commuted(i8 %x, i8 %y, i1 %c) { } define i8 @negate_select_of_op_vs_negated_op_nsw_xyyx(i8 %x, i8 %y, i8 %z, i1 %c) { -; CHECK-LABEL: @negate_select_of_op_vs_negated_op_nsw_xyyx( -; CHECK-NEXT: [[SUB1:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]] +; CHECK-LABEL: define i8 @negate_select_of_op_vs_negated_op_nsw_xyyx( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[SUB1:%.*]] = sub i8 [[X]], [[Y]] ; CHECK-NEXT: [[SUB2:%.*]] = sub i8 [[Y]], [[X]] -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i8 [[SUB2]], i8 [[SUB1]] -; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Z:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i8 [[SUB2]], i8 [[SUB1]] +; CHECK-NEXT: [[T2:%.*]] = add i8 [[TMP1]], [[Z]] ; CHECK-NEXT: ret i8 [[T2]] ; %sub1 = sub nsw i8 %x, %y @@ -1417,9 +1514,10 @@ define i8 @negate_select_of_op_vs_negated_op_nsw_xyyx(i8 %x, i8 %y, i8 %z, i1 %c } define i8 @dont_negate_ordinary_select(i8 %x, i8 %y, i8 %z, i1 %c) { -; CHECK-LABEL: @dont_negate_ordinary_select( -; CHECK-NEXT: [[T0:%.*]] = select i1 [[C:%.*]], i8 [[X:%.*]], i8 [[Y:%.*]] -; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Z:%.*]], [[T0]] +; CHECK-LABEL: define i8 @dont_negate_ordinary_select( +; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]], i1 [[C:%.*]]) { +; CHECK-NEXT: [[T0:%.*]] = select i1 [[C]], i8 [[X]], i8 [[Y]] +; CHECK-NEXT: [[T1:%.*]] = sub i8 [[Z]], [[T0]] ; CHECK-NEXT: ret i8 [[T1]] ; %t0 = select i1 %c, i8 %x, i8 %y @@ -1428,9 +1526,10 @@ define i8 @dont_negate_ordinary_select(i8 %x, i8 %y, i8 %z, i1 %c) { } define <2 x i32> @negate_select_of_negation_poison(<2 x i1> %c, <2 x i32> %x) { -; CHECK-LABEL: @negate_select_of_negation_poison( -; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i32> <i32 0, i32 poison>, [[X:%.*]] -; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[NEG]], <2 x i32> [[X]] +; CHECK-LABEL: define <2 x i32> @negate_select_of_negation_poison( +; CHECK-SAME: <2 x i1> [[C:%.*]], <2 x i32> [[X:%.*]]) { +; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i32> <i32 0, i32 poison>, [[X]] +; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[C]], <2 x i32> [[NEG]], <2 x i32> [[X]] ; CHECK-NEXT: [[NEG2:%.*]] = sub <2 x i32> zeroinitializer, [[SEL]] ; CHECK-NEXT: ret <2 x i32> [[NEG2]] ; @@ -1442,10 +1541,12 @@ define <2 x i32> @negate_select_of_negation_poison(<2 x i1> %c, <2 x i32> %x) { ; Freeze is transparent as far as negation is concerned define i4 @negate_freeze(i4 %x, i4 %y, i4 %z) { -; CHECK-LABEL: @negate_freeze( -; CHECK-NEXT: [[T0_NEG:%.*]] = sub i4 [[Y:%.*]], [[X:%.*]] -; CHECK-NEXT: [[T1_NEG:%.*]] = freeze i4 [[T0_NEG]] -; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z:%.*]] +; CHECK-LABEL: define i4 @negate_freeze( +; CHECK-SAME: i4 [[X:%.*]], i4 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i4 [[X]] +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i4 [[Y]] +; CHECK-NEXT: [[T1_NEG:%.*]] = sub i4 [[Y_FR]], [[X_FR]] +; CHECK-NEXT: [[T2:%.*]] = add i4 [[T1_NEG]], [[Z]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub i4 %x, %y @@ -1454,11 +1555,13 @@ define i4 @negate_freeze(i4 %x, i4 %y, i4 %z) { ret i4 %t2 } define i4 @negate_freeze_extrause(i4 %x, i4 %y, i4 %z) { -; CHECK-LABEL: @negate_freeze_extrause( -; CHECK-NEXT: [[T0:%.*]] = sub i4 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[T1:%.*]] = freeze i4 [[T0]] +; CHECK-LABEL: define i4 @negate_freeze_extrause( +; CHECK-SAME: i4 [[X:%.*]], i4 [[Y:%.*]], i4 [[Z:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i4 [[X]] +; CHECK-NEXT: [[Y_FR:%.*]] = freeze i4 [[Y]] +; CHECK-NEXT: [[T1:%.*]] = sub i4 [[X_FR]], [[Y_FR]] ; CHECK-NEXT: call void @use4(i4 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z:%.*]], [[T1]] +; CHECK-NEXT: [[T2:%.*]] = sub i4 [[Z]], [[T1]] ; CHECK-NEXT: ret i4 [[T2]] ; %t0 = sub i4 %x, %y @@ -1474,11 +1577,11 @@ define i4 @negate_freeze_extrause(i4 %x, i4 %y, i4 %z) { ; constants to RHS ourselves, since that is helpful sometimes. ; This used to cause an endless combine loop. define void @noncanonical_mul_with_constant_as_first_operand() { -; CHECK-LABEL: @noncanonical_mul_with_constant_as_first_operand( -; CHECK-NEXT: entry: -; CHECK-NEXT: br label [[IF_END:%.*]] -; CHECK: if.end: -; CHECK-NEXT: br label [[IF_END]] +; CHECK-LABEL: define void @noncanonical_mul_with_constant_as_first_operand() { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: br label %[[IF_END:.*]] +; CHECK: [[IF_END]]: +; CHECK-NEXT: br label %[[IF_END]] ; entry: br label %if.end @@ -1499,9 +1602,10 @@ if.end: @g = external hidden global [1 x [1 x double]] define <1 x i64> @PR56601(<1 x i64> %x, <1 x i64> %y) { -; CHECK-LABEL: @PR56601( -; CHECK-NEXT: [[M1:%.*]] = mul nsw <1 x i64> [[X:%.*]], splat (i64 42) -; CHECK-NEXT: [[M2:%.*]] = mul nsw <1 x i64> [[Y:%.*]], splat (i64 12) +; CHECK-LABEL: define <1 x i64> @PR56601( +; CHECK-SAME: <1 x i64> [[X:%.*]], <1 x i64> [[Y:%.*]]) { +; CHECK-NEXT: [[M1:%.*]] = mul nsw <1 x i64> [[X]], splat (i64 42) +; CHECK-NEXT: [[M2:%.*]] = mul nsw <1 x i64> [[Y]], splat (i64 12) ; CHECK-NEXT: [[A1:%.*]] = add <1 x i64> [[M1]], <i64 add (i64 ptrtoint (ptr @g to i64), i64 -4)> ; CHECK-NEXT: [[A2:%.*]] = add <1 x i64> [[M2]], <i64 add (i64 ptrtoint (ptr @g to i64), i64 -3)> ; CHECK-NEXT: [[R:%.*]] = sub <1 x i64> [[A1]], [[A2]] @@ -1515,5 +1619,7 @@ define <1 x i64> @PR56601(<1 x i64> %x, <1 x i64> %y) { ret <1 x i64> %r } -; CHECK: !0 = !{!"branch_weights", i32 40, i32 1} !0 = !{!"branch_weights", i32 40, i32 1} +;. +; CHECK: [[PROF0]] = !{!"branch_weights", i32 40, i32 1} +;. diff --git a/llvm/test/Transforms/InstCombine/trunc-lshr.ll b/llvm/test/Transforms/InstCombine/trunc-lshr.ll index 4364b09cfa70..c443b35cb1c1 100644 --- a/llvm/test/Transforms/InstCombine/trunc-lshr.ll +++ b/llvm/test/Transforms/InstCombine/trunc-lshr.ll @@ -1,6 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt -S -passes=instcombine < %s | FileCheck %s +declare void @use(i8) + define i1 @test1(i32 %i, ptr %p) { ; CHECK-LABEL: define i1 @test1( ; CHECK-SAME: i32 [[I:%.*]], ptr [[P:%.*]]) { @@ -93,3 +95,127 @@ define i1 @test5(i32 %i, ptr %p) { ret i1 %op } +define i1 @fold_lshr_power_of_2(i8 %x) { +; CHECK-LABEL: define i1 @fold_lshr_power_of_2( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TRUNC:%.*]] = icmp eq i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %lshr = lshr i8 16, %x ; 16 is a power of 2 + %trunc = trunc i8 %lshr to i1 + ret i1 %trunc +} + +define i1 @fold_lshr_power_of_2_minus_1(i8 %x) { +; CHECK-LABEL: define i1 @fold_lshr_power_of_2_minus_1( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TRUNC:%.*]] = icmp ult i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %lshr = lshr i8 15, %x + %trunc = trunc i8 %lshr to i1 + ret i1 %trunc +} + +define i1 @fold_ashr_power_of_2(i8 %x) { +; CHECK-LABEL: define i1 @fold_ashr_power_of_2( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TRUNC:%.*]] = icmp eq i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %ashr = ashr i8 16, %x + %trunc = trunc i8 %ashr to i1 + ret i1 %trunc +} + +define i1 @fold_ashr_power_of_2_minus_1(i8 %x) { +; CHECK-LABEL: define i1 @fold_ashr_power_of_2_minus_1( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[TRUNC:%.*]] = icmp ult i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %ashr = ashr i8 15, %x ; (15 + 1) is a power of 2 + %trunc = trunc i8 %ashr to i1 + ret i1 %trunc +} + +define i1 @fold_lshr_power_of_2_multi_use(i8 %x) { +; CHECK-LABEL: define i1 @fold_lshr_power_of_2_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[LSHR:%.*]] = lshr i8 16, [[X]] +; CHECK-NEXT: call void @use(i8 [[LSHR]]) +; CHECK-NEXT: [[TRUNC:%.*]] = icmp eq i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %lshr = lshr i8 16, %x ; 16 is a power of 2 + call void @use(i8 %lshr) + %trunc = trunc i8 %lshr to i1 + ret i1 %trunc +} + +define i1 @fold_lshr_power_of_2_minus_1_multi_use(i8 %x) { +; CHECK-LABEL: define i1 @fold_lshr_power_of_2_minus_1_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[LSHR:%.*]] = lshr i8 15, [[X]] +; CHECK-NEXT: call void @use(i8 [[LSHR]]) +; CHECK-NEXT: [[TRUNC:%.*]] = icmp ult i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %lshr = lshr i8 15, %x + call void @use(i8 %lshr) + %trunc = trunc i8 %lshr to i1 + ret i1 %trunc +} + +define i1 @fold_ashr_power_of_2_multi_use(i8 %x) { +; CHECK-LABEL: define i1 @fold_ashr_power_of_2_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[ASHR:%.*]] = lshr i8 16, [[X]] +; CHECK-NEXT: call void @use(i8 [[ASHR]]) +; CHECK-NEXT: [[TRUNC:%.*]] = icmp eq i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %ashr = ashr i8 16, %x + call void @use(i8 %ashr) + %trunc = trunc i8 %ashr to i1 + ret i1 %trunc +} + +define i1 @fold_ashr_power_of_2_minus_1_multi_use(i8 %x) { +; CHECK-LABEL: define i1 @fold_ashr_power_of_2_minus_1_multi_use( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[ASHR:%.*]] = lshr i8 15, [[X]] +; CHECK-NEXT: call void @use(i8 [[ASHR]]) +; CHECK-NEXT: [[TRUNC:%.*]] = icmp ult i8 [[X]], 4 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %ashr = ashr i8 15, %x ; (15 + 1) is a power of 2 + call void @use(i8 %ashr) + %trunc = trunc i8 %ashr to i1 + ret i1 %trunc +} + +define i1 @negative_test_fold_lshr(i8 %x) { +; CHECK-LABEL: define i1 @negative_test_fold_lshr( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[LSHR:%.*]] = lshr i8 9, [[X]] +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[LSHR]] to i1 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %lshr = lshr i8 9, %x ; 9 or (9 + 1) is not a power of 2 + %trunc = trunc i8 %lshr to i1 + ret i1 %trunc +} + +; Negative Test for arithmetic shift right +define i1 @negative_test_fold_ashr(i8 %x) { +; CHECK-LABEL: define i1 @negative_test_fold_ashr( +; CHECK-SAME: i8 [[X:%.*]]) { +; CHECK-NEXT: [[ASHR:%.*]] = lshr i8 9, [[X]] +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[ASHR]] to i1 +; CHECK-NEXT: ret i1 [[TRUNC]] +; + %ashr = ashr i8 9, %x ; 9 or (9 + 1) is not a power of 2 + %trunc = trunc i8 %ashr to i1 + ret i1 %trunc +} diff --git a/llvm/test/Transforms/InstCombine/urem-via-cmp-select.ll b/llvm/test/Transforms/InstCombine/urem-via-cmp-select.ll index 02be67a2ca25..81e35daff6ec 100644 --- a/llvm/test/Transforms/InstCombine/urem-via-cmp-select.ll +++ b/llvm/test/Transforms/InstCombine/urem-via-cmp-select.ll @@ -1,11 +1,12 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s ; https://alive2.llvm.org/ce/z/5eCiWi define i8 @urem_assume(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_assume( -; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X_FR]], [[N:%.*]] +; CHECK-LABEL: define i8 @urem_assume( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X_FR]], [[N]] ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]]) ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X_FR]], 1 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[ADD]], [[N]] @@ -21,9 +22,10 @@ define i8 @urem_assume(i8 %x, i8 %n) { ; https://alive2.llvm.org/ce/z/MGgtYN define i8 @urem_assume_without_nuw(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_assume_without_nuw( -; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X_FR]], [[N:%.*]] +; CHECK-LABEL: define i8 @urem_assume_without_nuw( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X]] +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X_FR]], [[N]] ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]]) ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X_FR]], 1 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[ADD]], [[N]] @@ -39,8 +41,9 @@ define i8 @urem_assume_without_nuw(i8 %x, i8 %n) { ; Negative test: The assume is false define i8 @urem_assume_eq(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_assume_eq( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X:%.*]], [[N:%.*]] +; CHECK-LABEL: define i8 @urem_assume_eq( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], [[N]] ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]]) ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X]], 1 ; CHECK-NEXT: [[OUT:%.*]] = urem i8 [[ADD]], [[N]] @@ -55,9 +58,10 @@ define i8 @urem_assume_eq(i8 %x, i8 %n) { ; Negative test: The assume is false define i8 @urem_assume_ne(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_assume_ne( -; CHECK-NEXT: start: -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[X:%.*]], [[N:%.*]] +; CHECK-LABEL: define i8 @urem_assume_ne( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[START:.*:]] +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[X]], [[N]] ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]]) ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X]], 1 ; CHECK-NEXT: [[OUT:%.*]] = urem i8 [[ADD]], [[N]] @@ -73,8 +77,9 @@ start: ; Negative test: The add constant is not 1 define i8 @urem_assume_with_unexpected_const(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_assume_with_unexpected_const( -; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X:%.*]], [[N:%.*]] +; CHECK-LABEL: define i8 @urem_assume_with_unexpected_const( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X]], [[N]] ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]]) ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X]], 2 ; CHECK-NEXT: [[OUT:%.*]] = urem i8 [[ADD]], [[N]] @@ -89,11 +94,13 @@ define i8 @urem_assume_with_unexpected_const(i8 %x, i8 %n) { ; https://alive2.llvm.org/ce/z/gNhZ2x define i8 @urem_without_assume(i8 %arg, i8 %arg2) { -; CHECK-LABEL: @urem_without_assume( -; CHECK-NEXT: [[X:%.*]] = urem i8 [[ARG:%.*]], [[ARG2:%.*]] -; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X]] +; CHECK-LABEL: define i8 @urem_without_assume( +; CHECK-SAME: i8 [[ARG:%.*]], i8 [[ARG2:%.*]]) { +; CHECK-NEXT: [[ARG2_FR:%.*]] = freeze i8 [[ARG2]] +; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i8 [[ARG]] +; CHECK-NEXT: [[X_FR:%.*]] = urem i8 [[ARG_FR]], [[ARG2_FR]] ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X_FR]], 1 -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[ADD]], [[ARG2]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[ADD]], [[ARG2_FR]] ; CHECK-NEXT: [[OUT:%.*]] = select i1 [[TMP1]], i8 0, i8 [[ADD]] ; CHECK-NEXT: ret i8 [[OUT]] ; @@ -105,17 +112,18 @@ define i8 @urem_without_assume(i8 %arg, i8 %arg2) { ; https://alive2.llvm.org/ce/z/eHkgRa define i8 @urem_with_dominating_condition(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_with_dominating_condition( -; CHECK-NEXT: start: -; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]] -; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[X_FR]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[DOTBB0:%.*]], label [[DOTBB1:%.*]] -; CHECK: .bb0: +; CHECK-LABEL: define i8 @urem_with_dominating_condition( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[START:.*:]] +; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X]] +; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[X_FR]], [[N]] +; CHECK-NEXT: br i1 [[COND]], [[DOTBB0:label %.*]], [[DOTBB1:label %.*]] +; CHECK: [[_BB0:.*:]] ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X_FR]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[ADD]], [[N]] ; CHECK-NEXT: [[OUT:%.*]] = select i1 [[TMP0]], i8 0, i8 [[ADD]] ; CHECK-NEXT: ret i8 [[OUT]] -; CHECK: .bb1: +; CHECK: [[_BB1:.*:]] ; CHECK-NEXT: ret i8 0 ; start: @@ -131,17 +139,18 @@ start: ; Revert the dominating condition and target branch at the same time. define i8 @urem_with_dominating_condition_false(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_with_dominating_condition_false( -; CHECK-NEXT: start: -; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]] -; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ult i8 [[X_FR]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND_NOT]], label [[DOTBB0:%.*]], label [[DOTBB1:%.*]] -; CHECK: .bb0: +; CHECK-LABEL: define i8 @urem_with_dominating_condition_false( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[START:.*:]] +; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X]] +; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ult i8 [[X_FR]], [[N]] +; CHECK-NEXT: br i1 [[COND_NOT]], [[DOTBB0:label %.*]], [[DOTBB1:label %.*]] +; CHECK: [[_BB0:.*:]] ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X_FR]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[ADD]], [[N]] ; CHECK-NEXT: [[OUT:%.*]] = select i1 [[TMP0]], i8 0, i8 [[ADD]] ; CHECK-NEXT: ret i8 [[OUT]] -; CHECK: .bb1: +; CHECK: [[_BB1:.*:]] ; CHECK-NEXT: ret i8 0 ; start: @@ -157,14 +166,15 @@ start: ; Negative test define noundef i8 @urem_with_opposite_condition(i8 %x, i8 %n) { -; CHECK-LABEL: @urem_with_opposite_condition( -; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[X:%.*]], [[N:%.*]] -; CHECK-NEXT: br i1 [[COND]], label [[DOTBB1:%.*]], label [[DOTBB0:%.*]] -; CHECK: .bb0: +; CHECK-LABEL: define noundef i8 @urem_with_opposite_condition( +; CHECK-SAME: i8 [[X:%.*]], i8 [[N:%.*]]) { +; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[X]], [[N]] +; CHECK-NEXT: br i1 [[COND]], [[DOTBB1:label %.*]], [[DOTBB0:label %.*]] +; CHECK: [[_BB0:.*:]] ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X]], 1 ; CHECK-NEXT: [[OUT:%.*]] = urem i8 [[ADD]], [[N]] ; CHECK-NEXT: ret i8 [[OUT]] -; CHECK: .bb1: +; CHECK: [[_BB1:.*:]] ; CHECK-NEXT: ret i8 0 ; %cond = icmp ult i8 %x, %n diff --git a/llvm/test/Transforms/InstCombine/usub_sat_to_msb_mask.ll b/llvm/test/Transforms/InstCombine/usub_sat_to_msb_mask.ll new file mode 100644 index 000000000000..bca1e7a22791 --- /dev/null +++ b/llvm/test/Transforms/InstCombine/usub_sat_to_msb_mask.ll @@ -0,0 +1,315 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 + +; RUN: opt -passes=instcombine -S < %s 2>&1 | FileCheck %s + +define i8 @test_i8(i8 %a, i8 %b) { +; CHECK-LABEL: define i8 @test_i8( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[A]], i8 96) +; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[B]], i8 112) +; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = and i8 [[TMP3]], -128 +; CHECK-NEXT: ret i8 [[RES]] +; + + %a_sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 223) + %b_sub = call i8 @llvm.usub.sat.i8(i8 %b, i8 239) + %or = or i8 %a_sub, %b_sub + %cmp = icmp eq i8 %or, 0 + %res = select i1 %cmp, i8 0, i8 128 + ret i8 %res +} + +define i8 @test_i8_ne(i8 %a, i8 %b) { +; CHECK-LABEL: define i8 @test_i8_ne( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[A]], i8 96) +; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[B]], i8 112) +; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = and i8 [[TMP3]], -128 +; CHECK-NEXT: ret i8 [[RES]] +; + + %a_sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 223) + %b_sub = call i8 @llvm.usub.sat.i8(i8 %b, i8 239) + %or = or i8 %a_sub, %b_sub + %cmp = icmp ne i8 %or, 0 + %res = select i1 %cmp, i8 128, i8 0 + ret i8 %res +} + +define i16 @test_i16(i16 %a, i16 %b) { +; CHECK-LABEL: define i16 @test_i16( +; CHECK-SAME: i16 [[A:%.*]], i16 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[A]], i16 32642) +; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[B]], i16 32656) +; CHECK-NEXT: [[TMP3:%.*]] = or i16 [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = and i16 [[TMP3]], -32768 +; CHECK-NEXT: ret i16 [[RES]] +; + + %a_sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 65409) + %b_sub = call i16 @llvm.usub.sat.i16(i16 %b, i16 65423) + %or = or i16 %a_sub, %b_sub + %cmp = icmp eq i16 %or, 0 + %res = select i1 %cmp, i16 0, i16 32768 + ret i16 %res +} + +define i32 @test_i32(i32 %a, i32 %b) { +; CHECK-LABEL: define i32 @test_i32( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A]], i32 224) +; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[B]], i32 240) +; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = and i32 [[TMP3]], -2147483648 +; CHECK-NEXT: ret i32 [[RES]] +; + + %a_sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 2147483871) + %b_sub = call i32 @llvm.usub.sat.i32(i32 %b, i32 2147483887) + %or = or i32 %a_sub, %b_sub + %cmp = icmp eq i32 %or, 0 + %res = select i1 %cmp, i32 0, i32 2147483648 + ret i32 %res +} + +define i64 @test_i64(i64 %a, i64 %b) { +; CHECK-LABEL: define i64 @test_i64( +; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 224) +; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[B]], i64 240) +; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = and i64 [[TMP3]], -9223372036854775808 +; CHECK-NEXT: ret i64 [[RES]] +; + + %a_sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 9223372036854776031) + %b_sub = call i64 @llvm.usub.sat.i64(i64 %b, i64 9223372036854776047) + %or = or i64 %a_sub, %b_sub + %cmp = icmp eq i64 %or, 0 + %res = select i1 %cmp, i64 0, i64 9223372036854775808 + ret i64 %res +} + +define i32 @no_fold_due_to_small_K(i32 %a, i32 %b) { +; CHECK-LABEL: define i32 @no_fold_due_to_small_K( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[A_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A]], i32 100) +; CHECK-NEXT: [[B_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[B]], i32 239) +; CHECK-NEXT: [[OR:%.*]] = or i32 [[A_SUB]], [[B_SUB]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], 0 +; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i32 0, i32 -2147483648 +; CHECK-NEXT: ret i32 [[RES]] +; + + %a_sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 100) + %b_sub = call i32 @llvm.usub.sat.i32(i32 %b, i32 239) + %or = or i32 %a_sub, %b_sub + %cmp = icmp eq i32 %or, 0 + %res = select i1 %cmp, i32 0, i32 2147483648 + ret i32 %res +} + +define i32 @commuted_test_neg(i32 %a, i32 %b) { +; CHECK-LABEL: define i32 @commuted_test_neg( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[B_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[B]], i32 239) +; CHECK-NEXT: [[A_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A]], i32 223) +; CHECK-NEXT: [[OR:%.*]] = or i32 [[B_SUB]], [[A_SUB]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], 0 +; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i32 0, i32 -2147483648 +; CHECK-NEXT: ret i32 [[RES]] +; + + %b_sub = call i32 @llvm.usub.sat.i32(i32 %b, i32 239) + %a_sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 223) + %or = or i32 %b_sub, %a_sub + %cmp = icmp eq i32 %or, 0 + %res = select i1 %cmp, i32 0, i32 2147483648 + ret i32 %res +} +define <4 x i32> @vector_test(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: define <4 x i32> @vector_test( +; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> [[A]], <4 x i32> splat (i32 224)) +; CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> [[B]], <4 x i32> splat (i32 240)) +; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = and <4 x i32> [[TMP3]], splat (i32 -2147483648) +; CHECK-NEXT: ret <4 x i32> [[RES]] +; + + + %a_sub = call <4 x i32> @llvm.usub.sat.v4i32( + <4 x i32> %a, <4 x i32> splat (i32 2147483871)) + %b_sub = call <4 x i32> @llvm.usub.sat.v4i32( + <4 x i32> %b, <4 x i32> splat (i32 2147483887)) + %or = or <4 x i32> %a_sub, %b_sub + %cmp = icmp eq <4 x i32> %or, zeroinitializer + %res = select <4 x i1> %cmp, + <4 x i32> zeroinitializer, + <4 x i32> splat (i32 -2147483648) + ret <4 x i32> %res +} + +define <4 x i32> @vector_negative_test(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: define <4 x i32> @vector_negative_test( +; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[A_SUB:%.*]] = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> [[A]], <4 x i32> <i32 -2147483425, i32 0, i32 -2147483425, i32 -2147483425>) +; CHECK-NEXT: [[B_SUB:%.*]] = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> [[B]], <4 x i32> splat (i32 -2147483409)) +; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[A_SUB]], [[B_SUB]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[OR]], zeroinitializer +; CHECK-NEXT: [[RES:%.*]] = select <4 x i1> [[CMP]], <4 x i32> zeroinitializer, <4 x i32> splat (i32 -2147483648) +; CHECK-NEXT: ret <4 x i32> [[RES]] +; + %a_sub = call <4 x i32> @llvm.usub.sat.v4i32( + <4 x i32> %a, + <4 x i32> <i32 2147483871, i32 0, i32 2147483871, i32 2147483871>) + %b_sub = call <4 x i32> @llvm.usub.sat.v4i32( + <4 x i32> %b, + <4 x i32> <i32 2147483887, i32 2147483887, i32 2147483887, i32 2147483887>) + %or = or <4 x i32> %a_sub, %b_sub + %cmp = icmp eq <4 x i32> %or, zeroinitializer + %res = select <4 x i1> %cmp, <4 x i32> zeroinitializer, + <4 x i32> <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648> + ret <4 x i32> %res +} + +define <4 x i32> @vector_ne_test(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: define <4 x i32> @vector_ne_test( +; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> [[A]], <4 x i32> splat (i32 224)) +; CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> [[B]], <4 x i32> splat (i32 240)) +; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = and <4 x i32> [[TMP3]], splat (i32 -2147483648) +; CHECK-NEXT: ret <4 x i32> [[RES]] +; + + + %a_sub = call <4 x i32> @llvm.usub.sat.v4i32( + <4 x i32> %a, <4 x i32> splat (i32 2147483871)) + %b_sub = call <4 x i32> @llvm.usub.sat.v4i32( + <4 x i32> %b, <4 x i32> splat (i32 2147483887)) + %or = or <4 x i32> %a_sub, %b_sub + %cmp = icmp eq <4 x i32> %or, zeroinitializer + %res = select <4 x i1> %cmp, + <4 x i32> zeroinitializer, + <4 x i32> splat (i32 -2147483648) + ret <4 x i32> %res +} + +declare i1 @id_i1(i1) + + +define i1 @multi_use_icmp(i32 %a, i32 %b) { +; CHECK-LABEL: define i1 @multi_use_icmp( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[A_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A]], i32 5) +; CHECK-NEXT: [[B_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[B]], i32 7) +; CHECK-NEXT: [[OR:%.*]] = or i32 [[A_SUB]], [[B_SUB]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[OR]], 0 +; CHECK-NEXT: [[CMP_OPAQUE:%.*]] = call i1 @id_i1(i1 [[CMP]]) +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 0, i32 -2147483648 +; CHECK-NEXT: [[EXTRA:%.*]] = xor i1 [[CMP_OPAQUE]], true +; CHECK-NEXT: [[SEL_OPAQUE:%.*]] = call i32 @id_i32(i32 [[SEL]]) +; CHECK-NEXT: [[SEL_NZ:%.*]] = icmp ne i32 [[SEL_OPAQUE]], 0 +; CHECK-NEXT: [[R:%.*]] = and i1 [[SEL_NZ]], [[EXTRA]] +; CHECK-NEXT: ret i1 [[R]] +; + %a_sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 5) + %b_sub = call i32 @llvm.usub.sat.i32(i32 %b, i32 7) + %or = or i32 %a_sub, %b_sub + %cmp = icmp eq i32 %or, 0 + %cmp_opaque = call i1 @id_i1(i1 %cmp) + %sel = select i1 %cmp, i32 0, i32 -2147483648 + %extra = xor i1 %cmp_opaque, true + %sel_opaque = call i32 @id_i32(i32 %sel) + %sel_is_nonzero = icmp ne i32 %sel_opaque, 0 + %r = and i1 %extra, %sel_is_nonzero + ret i1 %r +} + + +declare i32 @id_i32(i32) + +define i32 @multi_use_select(i32 %a, i32 %b) { +; CHECK-LABEL: define i32 @multi_use_select( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[A_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A]], i32 224) +; CHECK-NEXT: [[B_SUB:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[B]], i32 240) +; CHECK-NEXT: [[OR:%.*]] = or i32 [[A_SUB]], [[B_SUB]] +; CHECK-NEXT: [[SEL:%.*]] = and i32 [[OR]], -2147483648 +; CHECK-NEXT: [[SEL_OPAQUE:%.*]] = call i32 @id_i32(i32 [[SEL]]) +; CHECK-NEXT: ret i32 [[SEL_OPAQUE]] +; + %a_sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 -2147483425) + %b_sub = call i32 @llvm.usub.sat.i32(i32 %b, i32 -2147483409) + %or = or i32 %a_sub, %b_sub + %cmp = icmp eq i32 %or, 0 + %sel = select i1 %cmp, i32 0, i32 -2147483648 + %sel_opaque = call i32 @id_i32(i32 %sel) + ret i32 %sel_opaque +} + + +define i8 @no_fold_usub_extra_use(i8 %a, i8 %b) { +; CHECK-LABEL: define i8 @no_fold_usub_extra_use( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A_SUB:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[A]], i8 -33) +; CHECK-NEXT: [[B_SUB:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[B]], i8 -17) +; CHECK-NEXT: [[OR:%.*]] = or i8 [[A_SUB]], [[B_SUB]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 0 +; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i8 0, i8 -128 +; CHECK-NEXT: call void @use(i8 [[A_SUB]]) +; CHECK-NEXT: ret i8 [[RES]] +; + %a_sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 223) + %b_sub = call i8 @llvm.usub.sat.i8(i8 %b, i8 239) + %or = or i8 %a_sub, %b_sub + %cmp = icmp eq i8 %or, 0 + %res = select i1 %cmp, i8 0, i8 128 + call void @use(i8 %a_sub) + ret i8 %res +} + +define i8 @no_fold_or_extra_use(i8 %a, i8 %b) { +; CHECK-LABEL: define i8 @no_fold_or_extra_use( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A_SUB:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[A]], i8 -33) +; CHECK-NEXT: [[B_SUB:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[B]], i8 -17) +; CHECK-NEXT: [[OR:%.*]] = or i8 [[A_SUB]], [[B_SUB]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 0 +; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i8 0, i8 -128 +; CHECK-NEXT: call void @use(i8 [[OR]]) +; CHECK-NEXT: ret i8 [[RES]] +; + %a_sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 223) + %b_sub = call i8 @llvm.usub.sat.i8(i8 %b, i8 239) + %or = or i8 %a_sub, %b_sub + %cmp = icmp eq i8 %or, 0 + %res = select i1 %cmp, i8 0, i8 128 + call void @use(i8 %or) + ret i8 %res +} + +define i8 @no_fold_usub_b_extra_use(i8 %a, i8 %b) { +; CHECK-LABEL: define i8 @no_fold_usub_b_extra_use( +; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]]) { +; CHECK-NEXT: [[A_SUB:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[A]], i8 -33) +; CHECK-NEXT: [[B_SUB:%.*]] = call i8 @llvm.usub.sat.i8(i8 [[B]], i8 -17) +; CHECK-NEXT: [[OR:%.*]] = or i8 [[A_SUB]], [[B_SUB]] +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 0 +; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i8 0, i8 -128 +; CHECK-NEXT: call void @use(i8 [[B_SUB]]) +; CHECK-NEXT: ret i8 [[RES]] +; + %a_sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 223) + %b_sub = call i8 @llvm.usub.sat.i8(i8 %b, i8 239) + %or = or i8 %a_sub, %b_sub + %cmp = icmp eq i8 %or, 0 + %res = select i1 %cmp, i8 0, i8 128 + call void @use(i8 %b_sub) + ret i8 %res +} + +declare void @use(i8) diff --git a/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll index cbfdebc6cb41..00cc06f74d54 100644 --- a/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll @@ -652,7 +652,7 @@ define ptr @zero_sized_type_extract(<4 x i64> %arg, i64 %arg1) { ; CHECK-LABEL: @zero_sized_type_extract( ; CHECK-NEXT: bb: ; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i64> [[ARG:%.*]], i64 0 -; CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds [0 x i32], ptr @global, i64 0, i64 [[TMP0]] +; CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds i32, ptr @global, i64 [[TMP0]] ; CHECK-NEXT: ret ptr [[T2]] ; bb: diff --git a/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll b/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll index f0ef33dcc6b4..dae5d93694e0 100644 --- a/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll +++ b/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll @@ -655,7 +655,7 @@ define ptr @zero_sized_type_extract(<4 x i64> %arg, i64 %arg1) { ; CHECK-LABEL: @zero_sized_type_extract( ; CHECK-NEXT: bb: ; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i64> [[ARG:%.*]], i64 0 -; CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds [0 x i32], ptr @global, i64 0, i64 [[TMP0]] +; CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds i32, ptr @global, i64 [[TMP0]] ; CHECK-NEXT: ret ptr [[T2]] ; bb: diff --git a/llvm/test/Transforms/InstCombine/vectorgep-crash.ll b/llvm/test/Transforms/InstCombine/vectorgep-crash.ll index 2645500afef3..d33a2d3417bf 100644 --- a/llvm/test/Transforms/InstCombine/vectorgep-crash.ll +++ b/llvm/test/Transforms/InstCombine/vectorgep-crash.ll @@ -14,7 +14,8 @@ define <8 x ptr> @test_vector_gep(ptr %arg1, <8 x i64> %arg2) { ; CHECK-LABEL: define <8 x ptr> @test_vector_gep( ; CHECK-SAME: ptr [[ARG1:%.*]], <8 x i64> [[ARG2:%.*]]) { ; CHECK-NEXT: [[TOP:.*:]] -; CHECK-NEXT: [[VECTORGEP14:%.*]] = getelementptr inbounds [[DUAL:%.*]], ptr [[ARG1]], <8 x i64> [[ARG2]], i32 1, i32 0, i64 0, i32 1 +; CHECK-NEXT: [[VECTORGEP14_SPLIT:%.*]] = getelementptr inbounds [[DUAL:%.*]], ptr [[ARG1]], <8 x i64> [[ARG2]] +; CHECK-NEXT: [[VECTORGEP14:%.*]] = getelementptr inbounds i8, <8 x ptr> [[VECTORGEP14_SPLIT]], i64 32 ; CHECK-NEXT: ret <8 x ptr> [[VECTORGEP14]] ; top: diff --git a/llvm/test/Transforms/InstCombine/wcslen-1.ll b/llvm/test/Transforms/InstCombine/wcslen-1.ll index ffd62564f1dd..3c79c32ffe0d 100644 --- a/llvm/test/Transforms/InstCombine/wcslen-1.ll +++ b/llvm/test/Transforms/InstCombine/wcslen-1.ll @@ -233,7 +233,7 @@ define i64 @test_no_simplify1() { define i64 @test_no_simplify2(i32 %x) { ; CHECK-LABEL: @test_no_simplify2( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds i32, ptr @null_hello, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] ; @@ -245,7 +245,7 @@ define i64 @test_no_simplify2(i32 %x) { define i64 @test_no_simplify2_no_null_opt(i32 %x) #0 { ; CHECK-LABEL: @test_no_simplify2_no_null_opt( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds i32, ptr @null_hello, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] ; @@ -260,7 +260,7 @@ define i64 @test_no_simplify3(i32 %x) { ; CHECK-LABEL: @test_no_simplify3( ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 15 ; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[AND]] to i64 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [13 x i32], ptr @null_hello_mid, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw i32, ptr @null_hello_mid, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] ; @@ -274,7 +274,7 @@ define i64 @test_no_simplify3_no_null_opt(i32 %x) #0 { ; CHECK-LABEL: @test_no_simplify3_no_null_opt( ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 15 ; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[AND]] to i64 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [13 x i32], ptr @null_hello_mid, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw i32, ptr @null_hello_mid, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] ; diff --git a/llvm/test/Transforms/InstCombine/wcslen-3.ll b/llvm/test/Transforms/InstCombine/wcslen-3.ll index 39516de0a080..89fc4e758c54 100644 --- a/llvm/test/Transforms/InstCombine/wcslen-3.ll +++ b/llvm/test/Transforms/InstCombine/wcslen-3.ll @@ -150,7 +150,7 @@ define i64 @test_no_simplify1() { define i64 @test_no_simplify2(i16 %x) { ; CHECK-LABEL: @test_no_simplify2( ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[X:%.*]] to i64 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i16], ptr @null_hello, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds i16, ptr @null_hello, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] ; @@ -165,7 +165,7 @@ define i64 @test_no_simplify3(i16 %x) { ; CHECK-LABEL: @test_no_simplify3( ; CHECK-NEXT: [[AND:%.*]] = and i16 [[X:%.*]], 15 ; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i16 [[AND]] to i64 -; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [13 x i16], ptr @null_hello_mid, i64 0, i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw i16, ptr @null_hello_mid, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] ; diff --git a/llvm/test/Transforms/InstCombine/wcslen-5.ll b/llvm/test/Transforms/InstCombine/wcslen-5.ll index 33c6075a602a..b127f2ae5ea1 100644 --- a/llvm/test/Transforms/InstCombine/wcslen-5.ll +++ b/llvm/test/Transforms/InstCombine/wcslen-5.ll @@ -19,7 +19,7 @@ declare i64 @wcslen(ptr) define dso_local i64 @fold_wcslen_s3_pi_s5(i1 zeroext %0, i64 %1) { ; CHECK-LABEL: @fold_wcslen_s3_pi_s5( -; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds i32, ptr @ws3, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr @ws5 ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -41,7 +41,7 @@ define dso_local i64 @fold_wcslen_s3_pi_p1_s5(i1 zeroext %0, i64 %1) { ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] ; CHECK-LABEL: @fold_wcslen_s3_pi_p1_s5( -; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds i32, ptr @ws3, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr inbounds nuw i8, ptr [[PS3_PI]], i64 4 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @ws5 ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) @@ -62,7 +62,7 @@ define dso_local i64 @fold_wcslen_s3_pi_p1_s5(i1 zeroext %0, i64 %1) { define dso_local i64 @call_wcslen_s5_3_pi_s5(i1 zeroext %0, i64 %1) { ; CHECK-LABEL: @call_wcslen_s5_3_pi_s5( -; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds i32, ptr @ws5_3, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @ws5 ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -79,7 +79,7 @@ define dso_local i64 @call_wcslen_s5_3_pi_s5(i1 zeroext %0, i64 %1) { define dso_local i64 @call_wcslen_s5_3_s5_pj(i1 zeroext %0, i64 %1) { ; CHECK-LABEL: @call_wcslen_s5_3_s5_pj( -; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds i32, ptr @ws5, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws5_3, ptr [[PS5]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -96,7 +96,7 @@ define dso_local i64 @call_wcslen_s5_3_s5_pj(i1 zeroext %0, i64 %1) { define dso_local i64 @fold_wcslen_s3_s5_pj(i1 zeroext %0, i64 %1) { ; CHECK-LABEL: @fold_wcslen_s3_s5_pj( -; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds i32, ptr @ws5, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_PJ]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -115,7 +115,7 @@ define dso_local i64 @fold_wcslen_s3_s5_pj(i1 zeroext %0, i64 %1) { define dso_local i64 @call_wcslen_s3_s5_3_pj(i1 zeroext %0, i64 %1) { ; CHECK-LABEL: @call_wcslen_s3_s5_3_pj( -; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds i32, ptr @ws5_3, i64 [[TMP1:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_3_PJ]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] @@ -132,8 +132,8 @@ define dso_local i64 @call_wcslen_s3_s5_3_pj(i1 zeroext %0, i64 %1) { define dso_local i64 @fold_wcslen_s3_pi_s5_pj(i1 zeroext %0, i64 %1, i64 %2) { ; CHECK-LABEL: @fold_wcslen_s3_pi_s5_pj( -; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] -; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP2:%.*]] +; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds i32, ptr @ws3, i64 [[TMP1:%.*]] +; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds i32, ptr @ws5, i64 [[TMP2:%.*]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ; CHECK-NEXT: ret i64 [[LEN]] |