Merge branch 'main' into users/meinersbur/flang_runtime_split-headersusers/meinersbur/flang_runtime_split-headers

66 files changed, 136 insertions, 136 deletions

diff --git a/llvm/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll b/llvm/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
index 082f9f40f289..3e9ff2e6977c 100644
--- a/llvm/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
+++ b/llvm/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc
+; RUN: llc < %s -mtriple=sparc
 
 define void @execute_list() {
         %tmp.33.i = fdiv float 0.000000e+00, 0.000000e+00               ; <float> [#uses=1]
diff --git a/llvm/test/CodeGen/SPARC/2007-05-09-JumpTables.ll b/llvm/test/CodeGen/SPARC/2007-05-09-JumpTables.ll
index 41ad3b27b5a7..688504abe512 100644
--- a/llvm/test/CodeGen/SPARC/2007-05-09-JumpTables.ll
+++ b/llvm/test/CodeGen/SPARC/2007-05-09-JumpTables.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc
+; RUN: llc < %s -mtriple=sparc
 
 ; We cannot emit jump tables on Sparc, but we should correctly handle this case.
 
diff --git a/llvm/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll b/llvm/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll
index 77c20028824f..12cded377f4d 100644
--- a/llvm/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll
+++ b/llvm/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc
+; RUN: llc < %s -mtriple=sparc
 ; PR1540
 
 declare float @sinf(float)
diff --git a/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll b/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll
index 7e70d21191a5..cb1879ab7d39 100644
--- a/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll
+++ b/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc
+; RUN: llc < %s -mtriple=sparc
 ; PR 1557
 
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
diff --git a/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll b/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
index 04113bd1b4d0..3d944a45b98e 100644
--- a/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
+++ b/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc
+; RUN: llc < %s -mtriple=sparc
 ; PR 1557
 
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
diff --git a/llvm/test/CodeGen/SPARC/2009-08-28-PIC.ll b/llvm/test/CodeGen/SPARC/2009-08-28-PIC.ll
index 0482d9ce7fd4..c119bfe76454 100644
--- a/llvm/test/CodeGen/SPARC/2009-08-28-PIC.ll
+++ b/llvm/test/CodeGen/SPARC/2009-08-28-PIC.ll
@@ -1,7 +1,7 @@
-; RUN: llc -march=sparc --relocation-model=pic < %s | FileCheck %s --check-prefix=V8
-; RUN: llc -march=sparcv9 --relocation-model=pic < %s | FileCheck %s --check-prefix=V9
-; RUN: llc -march=sparc   --relocation-model=pic < %s -O0 | FileCheck %s --check-prefix=V8UNOPT
-; RUN: llc -march=sparcv9 --relocation-model=pic < %s -O0 | FileCheck %s --check-prefix=V9UNOPT
+; RUN: llc -mtriple=sparc --relocation-model=pic < %s | FileCheck %s --check-prefix=V8
+; RUN: llc -mtriple=sparcv9 --relocation-model=pic < %s | FileCheck %s --check-prefix=V9
+; RUN: llc -mtriple=sparc --relocation-model=pic < %s -O0 | FileCheck %s --check-prefix=V8UNOPT
+; RUN: llc -mtriple=sparcv9 --relocation-model=pic < %s -O0 | FileCheck %s --check-prefix=V9UNOPT
 
 
 ; V8-LABEL: func
diff --git a/llvm/test/CodeGen/SPARC/2009-08-28-WeakLinkage.ll b/llvm/test/CodeGen/SPARC/2009-08-28-WeakLinkage.ll
index 0167d3237aad..0ff44a7b9896 100644
--- a/llvm/test/CodeGen/SPARC/2009-08-28-WeakLinkage.ll
+++ b/llvm/test/CodeGen/SPARC/2009-08-28-WeakLinkage.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc < %s | grep weak
+; RUN: llc -mtriple=sparc < %s | grep weak
 
 define weak i32 @func() nounwind {
 entry:
diff --git a/llvm/test/CodeGen/SPARC/2011-01-11-CC.ll b/llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
index 62cf06d7ee3c..1560bc687b7d 100644
--- a/llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
+++ b/llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -march=sparc %s -o - | FileCheck %s -check-prefix=V8
-; RUN: llc -march=sparc -mattr=v9 %s -o - | FileCheck %s -check-prefix=V9
+; RUN: llc -mtriple=sparc %s -o - | FileCheck %s -check-prefix=V8
+; RUN: llc -mtriple=sparc -mattr=v9 %s -o - | FileCheck %s -check-prefix=V9
 ; RUN: llc -mtriple=sparc64-unknown-linux %s -o - | FileCheck %s -check-prefix=SPARC64
 
 define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind {
diff --git a/llvm/test/CodeGen/SPARC/2011-01-11-Call.ll b/llvm/test/CodeGen/SPARC/2011-01-11-Call.ll
index 6e3c47cc0dca..7869e5dcdd73 100644
--- a/llvm/test/CodeGen/SPARC/2011-01-11-Call.ll
+++ b/llvm/test/CodeGen/SPARC/2011-01-11-Call.ll
@@ -1,6 +1,6 @@
-; RUN: llc -march=sparc -O0 <%s
-; RUN: llc -march=sparc   <%s | FileCheck %s --check-prefix=V8
-; RUN: llc -march=sparcv9 <%s | FileCheck %s --check-prefix=V9
+; RUN: llc -mtriple=sparc -O0 <%s
+; RUN: llc -mtriple=sparc <%s | FileCheck %s --check-prefix=V8
+; RUN: llc -mtriple=sparcv9 <%s | FileCheck %s --check-prefix=V9
 
 ; V8-LABEL: test
 ; V8:       save %sp
diff --git a/llvm/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll b/llvm/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
index b0249bef2345..07f25e1dfd87 100644
--- a/llvm/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
+++ b/llvm/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
@@ -1,8 +1,8 @@
-;RUN: llc -march=sparc -show-mc-encoding < %s | FileCheck %s -check-prefix=V8
-;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
-;RUN: llc -march=sparc -show-mc-encoding -regalloc=basic < %s | FileCheck %s -check-prefix=V8
-;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
-;RUN: llc -march=sparcv9  < %s | FileCheck %s -check-prefix=SPARC64
+;RUN: llc -mtriple=sparc -show-mc-encoding < %s | FileCheck %s -check-prefix=V8
+;RUN: llc -mtriple=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
+;RUN: llc -mtriple=sparc -show-mc-encoding -regalloc=basic < %s | FileCheck %s -check-prefix=V8
+;RUN: llc -mtriple=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
+;RUN: llc -mtriple=sparcv9 < %s | FileCheck %s -check-prefix=SPARC64
 
 
 define ptr @frameaddr() nounwind readnone {
diff --git a/llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll b/llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
index 98005a610322..f5cd6c703c9d 100644
--- a/llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
+++ b/llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
@@ -1,5 +1,5 @@
-;RUN: llc -march=sparc < %s -verify-machineinstrs | FileCheck %s
-;RUN: llc -march=sparc -O0 < %s -verify-machineinstrs | FileCheck %s -check-prefix=UNOPT
+;RUN: llc -mtriple=sparc < %s -verify-machineinstrs | FileCheck %s
+;RUN: llc -mtriple=sparc -O0 < %s -verify-machineinstrs | FileCheck %s -check-prefix=UNOPT
 
 target triple = "sparc-unknown-linux-gnu"
 
diff --git a/llvm/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll b/llvm/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll
index 05a1ea47bf11..378cbdf48771 100644
--- a/llvm/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll
+++ b/llvm/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll
@@ -1,4 +1,4 @@
-;RUN: llc -march=sparc < %s | FileCheck %s
+;RUN: llc -mtriple=sparc < %s | FileCheck %s
 
 %struct.foo_t = type { i32, i32, i32 }
 
diff --git a/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll b/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll
index 60b0f8918803..d8a8caf0d83f 100644
--- a/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll
+++ b/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll
@@ -1,4 +1,4 @@
-;RUN: llc -march=sparc < %s | FileCheck %s
+;RUN: llc -mtriple=sparc < %s | FileCheck %s
 
 %struct.foo_t = type { i32, i32, i32 }
 
diff --git a/llvm/test/CodeGen/SPARC/2011-12-03-TailDuplication.ll b/llvm/test/CodeGen/SPARC/2011-12-03-TailDuplication.ll
index bc390853143d..5c19665e2854 100644
--- a/llvm/test/CodeGen/SPARC/2011-12-03-TailDuplication.ll
+++ b/llvm/test/CodeGen/SPARC/2011-12-03-TailDuplication.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc <%s
+; RUN: llc -mtriple=sparc <%s
 
 define void @foo(i32 %a) nounwind {
 entry:
diff --git a/llvm/test/CodeGen/SPARC/2013-05-17-CallFrame.ll b/llvm/test/CodeGen/SPARC/2013-05-17-CallFrame.ll
index 9ebedfb68102..4a4db8c2ebaa 100644
--- a/llvm/test/CodeGen/SPARC/2013-05-17-CallFrame.ll
+++ b/llvm/test/CodeGen/SPARC/2013-05-17-CallFrame.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -march=sparc   < %s | FileCheck %s --check-prefix=V8
-; RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefix=SPARC64
+; RUN: llc -mtriple=sparc < %s | FileCheck %s --check-prefix=V8
+; RUN: llc -mtriple=sparcv9 < %s | FileCheck %s --check-prefix=SPARC64
 
 ; (this should ideally be doing "add 4+7; and -8", instead of
 ;  "add 7; and -8; add 8"; see comments in LowerDYNAMIC_STACKALLOC)
diff --git a/llvm/test/CodeGen/SPARC/32abi.ll b/llvm/test/CodeGen/SPARC/32abi.ll
index 15ba6d408be4..9bf7dcc18f39 100644
--- a/llvm/test/CodeGen/SPARC/32abi.ll
+++ b/llvm/test/CodeGen/SPARC/32abi.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=CHECK-BE
-; RUN: llc < %s -march=sparcel -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=CHECK-LE
-; RUN: llc < %s -march=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=CHECK-BE
+; RUN: llc < %s -mtriple=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=CHECK-BE
+; RUN: llc < %s -mtriple=sparcel -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=CHECK-LE
+; RUN: llc < %s -mtriple=sparc -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=CHECK-BE
 
 ; CHECK-LABEL: intarg:
 ; The save/restore frame is not strictly necessary here, but we would need to
diff --git a/llvm/test/CodeGen/SPARC/64abi.ll b/llvm/test/CodeGen/SPARC/64abi.ll
index 8d2f152ef756..61056f50a8c5 100644
--- a/llvm/test/CodeGen/SPARC/64abi.ll
+++ b/llvm/test/CodeGen/SPARC/64abi.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s --check-prefix=CHECK --check-prefix=HARD
-; RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT
+; RUN: llc < %s -mtriple=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s --check-prefix=CHECK --check-prefix=HARD
+; RUN: llc < %s -mtriple=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT
 
 ; CHECK-LABEL: intarg:
 ; The save/restore frame is not strictly necessary here, but we would need to
diff --git a/llvm/test/CodeGen/SPARC/64atomics.ll b/llvm/test/CodeGen/SPARC/64atomics.ll
index feb37fdae52b..e209954f895f 100644
--- a/llvm/test/CodeGen/SPARC/64atomics.ll
+++ b/llvm/test/CodeGen/SPARC/64atomics.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=sparc -mcpu=v9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC,SPARC32
-; RUN: llc < %s -march=sparcv9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC,SPARC64
+; RUN: llc < %s -mtriple=sparc -mcpu=v9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC,SPARC32
+; RUN: llc < %s -mtriple=sparcv9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC,SPARC64
 
 ; SPARC-LABEL: test_atomic_i64
 ; SPARC32:       __atomic_load_8
diff --git a/llvm/test/CodeGen/SPARC/64bit.ll b/llvm/test/CodeGen/SPARC/64bit.ll
index 7b30d7abebc0..08c9ab131910 100644
--- a/llvm/test/CodeGen/SPARC/64bit.ll
+++ b/llvm/test/CodeGen/SPARC/64bit.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=sparcv9 -mattr=+popc -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s
-; RUN: llc < %s -march=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=OPT
-; RUN: llc %s -march=sparcv9 -mattr=+popc -filetype=null
+; RUN: llc < %s -mtriple=sparcv9 -mattr=+popc -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s
+; RUN: llc < %s -mtriple=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=OPT
+; RUN: llc %s -mtriple=sparcv9 -mattr=+popc -filetype=null
 
 ; CHECK-LABEL: ret2:
 ; CHECK: mov %i1, %i0
diff --git a/llvm/test/CodeGen/SPARC/64spill.ll b/llvm/test/CodeGen/SPARC/64spill.ll
index ab08d6b0570b..877831cb3adc 100644
--- a/llvm/test/CodeGen/SPARC/64spill.ll
+++ b/llvm/test/CodeGen/SPARC/64spill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparcv9 | FileCheck %s
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s
 
 target datalayout = "E-i64:64-n32:64-S128"
 target triple = "sparc64-sun-sparc"
diff --git a/llvm/test/CodeGen/SPARC/DbgValueOtherTargets.test b/llvm/test/CodeGen/SPARC/DbgValueOtherTargets.test
index a669bf848d65..a7e3c81fb3e5 100644
--- a/llvm/test/CodeGen/SPARC/DbgValueOtherTargets.test
+++ b/llvm/test/CodeGen/SPARC/DbgValueOtherTargets.test
@@ -1 +1 @@
-RUN: llc -O0 -march=sparc -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
+RUN: llc -O0 -mtriple=sparc -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
diff --git a/llvm/test/CodeGen/SPARC/LeonCASAInstructionUT.ll b/llvm/test/CodeGen/SPARC/LeonCASAInstructionUT.ll
index 740c17be4365..785eb00e9018 100644
--- a/llvm/test/CodeGen/SPARC/LeonCASAInstructionUT.ll
+++ b/llvm/test/CodeGen/SPARC/LeonCASAInstructionUT.ll
@@ -1,22 +1,22 @@
-; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+hasleoncasa -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=gr712rc -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=leon4 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=gr740 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=myriad2 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.1 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.2 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.3 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2100 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2150 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2155 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2450 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2455 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2x5x -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2080 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2085 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2480 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2485 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ma2x8x -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon3 -mattr=+hasleoncasa -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=gr712rc -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon4 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=gr740 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=myriad2 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=myriad2.1 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=myriad2.2 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=myriad2.3 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2100 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2150 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2155 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2450 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2455 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2x5x -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2080 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2085 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2480 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2485 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ma2x8x -o - | FileCheck %s
 
 ; CHECK-LABEL: casa_test
 ; CHECK-DAG:   mov 1, [[R0:%[a-z0-9]+]]
diff --git a/llvm/test/CodeGen/SPARC/LeonDetectRoundChangePassUT.ll b/llvm/test/CodeGen/SPARC/LeonDetectRoundChangePassUT.ll
index 70203e8eb524..b84ebcafac59 100644
--- a/llvm/test/CodeGen/SPARC/LeonDetectRoundChangePassUT.ll
+++ b/llvm/test/CodeGen/SPARC/LeonDetectRoundChangePassUT.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+detectroundchange -o - 2>&1 | grep "detect rounding changes"
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon3 -mattr=+detectroundchange -o - 2>&1 | grep "detect rounding changes"
 
 ; Function Attrs: nounwind
 declare i32 @fesetround(i32)
diff --git a/llvm/test/CodeGen/SPARC/LeonFixAllFDIVSQRTPassUT.ll b/llvm/test/CodeGen/SPARC/LeonFixAllFDIVSQRTPassUT.ll
index c5cfdd8c151c..02ee23fb827d 100644
--- a/llvm/test/CodeGen/SPARC/LeonFixAllFDIVSQRTPassUT.ll
+++ b/llvm/test/CodeGen/SPARC/LeonFixAllFDIVSQRTPassUT.ll
@@ -1,5 +1,5 @@
-; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+fixallfdivsqrt -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon3 -mattr=+fixallfdivsqrt -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ut699 -o - | FileCheck %s
 
 ; CHECK-LABEL: test_1
 ; CHECK:  nop
diff --git a/llvm/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll b/llvm/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll
index 7027d862f134..7b4db4d3034c 100644
--- a/llvm/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll
+++ b/llvm/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+insertnopload -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=ut699 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon3 -mattr=+insertnopload -o - | FileCheck %s
 
 define float @ld_float_test() #0 {
 ; CHECK-LABEL: ld_float_test:
diff --git a/llvm/test/CodeGen/SPARC/LeonItinerariesUT.ll b/llvm/test/CodeGen/SPARC/LeonItinerariesUT.ll
index 01916a2a3c59..cb713c7de492 100644
--- a/llvm/test/CodeGen/SPARC/LeonItinerariesUT.ll
+++ b/llvm/test/CodeGen/SPARC/LeonItinerariesUT.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -O1 -march=sparc | FileCheck %s -check-prefix=NO_ITIN
-; RUN: llc < %s -O1 -march=sparc -mcpu=leon2   | FileCheck %s -check-prefix=LEON2_ITIN
-; RUN: llc < %s -O1 -march=sparc -mcpu=leon3   | FileCheck %s -check-prefix=LEON3_4_ITIN
-; RUN: llc < %s -O1 -march=sparc -mcpu=leon4   | FileCheck %s -check-prefix=LEON3_4_ITIN
+; RUN: llc < %s -O1 -mtriple=sparc | FileCheck %s -check-prefix=NO_ITIN
+; RUN: llc < %s -O1 -mtriple=sparc -mcpu=leon2 | FileCheck %s -check-prefix=LEON2_ITIN
+; RUN: llc < %s -O1 -mtriple=sparc -mcpu=leon3 | FileCheck %s -check-prefix=LEON3_4_ITIN
+; RUN: llc < %s -O1 -mtriple=sparc -mcpu=leon4 | FileCheck %s -check-prefix=LEON3_4_ITIN
 
 ; NO_ITIN-LABEL: f32_ops:
 ; NO_ITIN:       ld
diff --git a/llvm/test/CodeGen/SPARC/LeonSMACUMACInstructionUT.ll b/llvm/test/CodeGen/SPARC/LeonSMACUMACInstructionUT.ll
index 1d960ee53a86..73b16b66dacb 100644
--- a/llvm/test/CodeGen/SPARC/LeonSMACUMACInstructionUT.ll
+++ b/llvm/test/CodeGen/SPARC/LeonSMACUMACInstructionUT.ll
@@ -1,6 +1,6 @@
-; RUN: llc %s -O0 -march=sparc -mcpu=leon2 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -o - | FileCheck %s
-; RUN: llc %s -O0 -march=sparc -mcpu=leon4 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon2 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon3 -o - | FileCheck %s
+; RUN: llc %s -O0 -mtriple=sparc -mcpu=leon4 -o - | FileCheck %s
 
 ; CHECK-LABEL: smac_test:
 ; CHECK:       smac %i1, %i0, %i0
diff --git a/llvm/test/CodeGen/SPARC/alloca-align.ll b/llvm/test/CodeGen/SPARC/alloca-align.ll
index f6330f16df47..a3dcc3779f4e 100644
--- a/llvm/test/CodeGen/SPARC/alloca-align.ll
+++ b/llvm/test/CodeGen/SPARC/alloca-align.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -march=sparc < %s | FileCheck %s --check-prefixes=CHECK32
-; RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefixes=CHECK64
+; RUN: llc -mtriple=sparc < %s | FileCheck %s --check-prefixes=CHECK32
+; RUN: llc -mtriple=sparcv9 < %s | FileCheck %s --check-prefixes=CHECK64
 
 define void @variable_alloca_with_overalignment(i32 %num) nounwind {
 ; CHECK32-LABEL: variable_alloca_with_overalignment:
diff --git a/llvm/test/CodeGen/SPARC/atomicrmw-uinc-udec-wrap.ll b/llvm/test/CodeGen/SPARC/atomicrmw-uinc-udec-wrap.ll
index 0f9feeb17716..380a4a0a6b87 100644
--- a/llvm/test/CodeGen/SPARC/atomicrmw-uinc-udec-wrap.ll
+++ b/llvm/test/CodeGen/SPARC/atomicrmw-uinc-udec-wrap.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -march=sparc -mcpu=v9 < %s | FileCheck %s
+; RUN: llc -mtriple=sparc -mcpu=v9 < %s | FileCheck %s
 
 define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
 ; CHECK-LABEL: atomicrmw_uinc_wrap_i8:
diff --git a/llvm/test/CodeGen/SPARC/atomics.ll b/llvm/test/CodeGen/SPARC/atomics.ll
index d8c8879f40f1..00c30693b348 100644
--- a/llvm/test/CodeGen/SPARC/atomics.ll
+++ b/llvm/test/CodeGen/SPARC/atomics.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=sparc -mcpu=v9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC
-; RUN: llc < %s -march=sparcv9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC64
+; RUN: llc < %s -mtriple=sparc -mcpu=v9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC
+; RUN: llc < %s -mtriple=sparcv9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC64
 
 ; SPARC-LABEL: test_atomic_i8
 ; SPARC:       ldub [%o0]
diff --git a/llvm/test/CodeGen/SPARC/basictest.ll b/llvm/test/CodeGen/SPARC/basictest.ll
index 54b4fad92421..1272eae73e16 100644
--- a/llvm/test/CodeGen/SPARC/basictest.ll
+++ b/llvm/test/CodeGen/SPARC/basictest.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc | FileCheck %s
+; RUN: llc < %s -mtriple=sparc | FileCheck %s
 
 define i32 @test0(i32 %X) {
 	%tmp.1 = add i32 %X, 1
diff --git a/llvm/test/CodeGen/SPARC/cast-sret-func.ll b/llvm/test/CodeGen/SPARC/cast-sret-func.ll
index 47e5a0aa64f4..64a8d02e8e9f 100644
--- a/llvm/test/CodeGen/SPARC/cast-sret-func.ll
+++ b/llvm/test/CodeGen/SPARC/cast-sret-func.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc
+; RUN: llc < %s -mtriple=sparc
 
 ; CHECK: call func
 ; CHECK: st %i0, [%sp+64]
diff --git a/llvm/test/CodeGen/SPARC/ctpop.ll b/llvm/test/CodeGen/SPARC/ctpop.ll
index 3a373404b991..f7dc1fb2d085 100644
--- a/llvm/test/CodeGen/SPARC/ctpop.ll
+++ b/llvm/test/CodeGen/SPARC/ctpop.ll
@@ -1,13 +1,13 @@
-; RUN: llc < %s -march=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
-; RUN: llc < %s -march=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s -check-prefix=V8
-; RUN: llc < %s -march=sparc -mcpu=ultrasparc  | FileCheck %s -check-prefix=V8
-; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V8
-; RUN: llc < %s -march=sparc -mcpu=niagara     | FileCheck %s -check-prefix=V8
-; RUN: llc < %s -march=sparc -mcpu=niagara2    | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparc -mcpu=niagara3    | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparc -mcpu=niagara4    | FileCheck %s -check-prefix=V9
-; RUN: llc < %s -march=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=SPARC64
+; RUN: llc < %s -mtriple=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -mtriple=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparc -mcpu=v9 | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -mtriple=sparc -mcpu=ultrasparc | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -mtriple=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -mtriple=sparc -mcpu=niagara | FileCheck %s -check-prefix=V8
+; RUN: llc < %s -mtriple=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=SPARC64
 
 declare i32 @llvm.ctpop.i32(i32)
 
diff --git a/llvm/test/CodeGen/SPARC/cttz.ll b/llvm/test/CodeGen/SPARC/cttz.ll
index a5d0b1be859e..eab2433a074a 100644
--- a/llvm/test/CodeGen/SPARC/cttz.ll
+++ b/llvm/test/CodeGen/SPARC/cttz.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s
+; RUN: llc < %s -mtriple=sparc -mcpu=v9 | FileCheck %s
 
 define i32 @f(i32 %x) {
 ; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/SPARC/data-align.ll b/llvm/test/CodeGen/SPARC/data-align.ll
index d4a39524da44..1c4a4f58708c 100644
--- a/llvm/test/CodeGen/SPARC/data-align.ll
+++ b/llvm/test/CodeGen/SPARC/data-align.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=sparc | FileCheck %s
-; RUN: llc < %s -march=sparcel | FileCheck %s
-; RUN: llc < %s -march=sparcv9 | FileCheck %s
+; RUN: llc < %s -mtriple=sparc | FileCheck %s
+; RUN: llc < %s -mtriple=sparcel | FileCheck %s
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s
 
 ; CHECK:      .Li8:
 ; CHECK-DAG: .size .Li8, 1
diff --git a/llvm/test/CodeGen/SPARC/disable-fsmuld-fmuls.ll b/llvm/test/CodeGen/SPARC/disable-fsmuld-fmuls.ll
index 13207c56b248..96b34d87acc0 100644
--- a/llvm/test/CodeGen/SPARC/disable-fsmuld-fmuls.ll
+++ b/llvm/test/CodeGen/SPARC/disable-fsmuld-fmuls.ll
@@ -1,7 +1,7 @@
-; RUN: llc %s -march=sparc -o - | FileCheck --check-prefix=CHECK --check-prefix=DEFAULT %s
-; RUN: llc %s -march=sparc -mattr=no-fmuls -o - | FileCheck --check-prefix=CHECK --check-prefix=NO-FMULS %s
-; RUN: llc %s -march=sparc -mattr=no-fsmuld -o - | FileCheck --check-prefix=CHECK --check-prefix=NO-FSMULD %s
-; RUN: llc %s -march=sparc -mattr=no-fsmuld,no-fmuls -o - | FileCheck --check-prefix=CHECK --check-prefix=NO-BOTH %s
+; RUN: llc %s -mtriple=sparc -o - | FileCheck --check-prefix=CHECK --check-prefix=DEFAULT %s
+; RUN: llc %s -mtriple=sparc -mattr=no-fmuls -o - | FileCheck --check-prefix=CHECK --check-prefix=NO-FMULS %s
+; RUN: llc %s -mtriple=sparc -mattr=no-fsmuld -o - | FileCheck --check-prefix=CHECK --check-prefix=NO-FSMULD %s
+; RUN: llc %s -mtriple=sparc -mattr=no-fsmuld,no-fmuls -o - | FileCheck --check-prefix=CHECK --check-prefix=NO-BOTH %s
 
 ;;; Test case ensures that the no-fsmuld and no-fmuls features disable
 ;;; the relevant instruction, and alternative sequences get emitted
diff --git a/llvm/test/CodeGen/SPARC/float-constants.ll b/llvm/test/CodeGen/SPARC/float-constants.ll
index 8424bf216dd4..b04ec68ed3d7 100644
--- a/llvm/test/CodeGen/SPARC/float-constants.ll
+++ b/llvm/test/CodeGen/SPARC/float-constants.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -march=sparc | FileCheck %s
-; RUN: llc < %s -march=sparcel | FileCheck %s --check-prefix=CHECK-LE
+; RUN: llc < %s -mtriple=sparc | FileCheck %s
+; RUN: llc < %s -mtriple=sparcel | FileCheck %s --check-prefix=CHECK-LE
 
 ;; Bitcast should not do a runtime conversion, but rather emit a
 ;; constant into integer registers directly.
diff --git a/llvm/test/CodeGen/SPARC/float.ll b/llvm/test/CodeGen/SPARC/float.ll
index ce4a394d516b..54ef6fc8522d 100644
--- a/llvm/test/CodeGen/SPARC/float.ll
+++ b/llvm/test/CodeGen/SPARC/float.ll
@@ -1,7 +1,7 @@
-; RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-BE
-; RUN: llc -march=sparcel < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-EL
-; RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=V8-UNOPT
-; RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
+; RUN: llc -mtriple=sparc < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-BE
+; RUN: llc -mtriple=sparcel < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-EL
+; RUN: llc -mtriple=sparc -O0 < %s | FileCheck %s -check-prefix=V8-UNOPT
+; RUN: llc -mtriple=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
 ; RUN: llc -mtriple=sparc64-unknown-linux < %s | FileCheck %s -check-prefix=SPARC64
 
 ; V8-LABEL:     test_neg:
diff --git a/llvm/test/CodeGen/SPARC/fp128.ll b/llvm/test/CodeGen/SPARC/fp128.ll
index 3e43d3eb5da7..521e33399ac2 100644
--- a/llvm/test/CodeGen/SPARC/fp128.ll
+++ b/llvm/test/CodeGen/SPARC/fp128.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=sparc -mattr=hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=BE
-; RUN: llc < %s -march=sparcel -mattr=hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=EL
-; RUN: llc < %s -march=sparc -mattr=-hard-quad-float -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=BE
-; RUN: llc < %s -march=sparcel -mattr=-hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=EL
+; RUN: llc < %s -mtriple=sparc -mattr=hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=BE
+; RUN: llc < %s -mtriple=sparcel -mattr=hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=EL
+; RUN: llc < %s -mtriple=sparc -mattr=-hard-quad-float -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=BE
+; RUN: llc < %s -mtriple=sparcel -mattr=-hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=EL
 
 ; CHECK-LABEL: f128_ops:
 ; CHECK:      ldd
diff --git a/llvm/test/CodeGen/SPARC/inlineasm-bad.ll b/llvm/test/CodeGen/SPARC/inlineasm-bad.ll
index bfcf98ed7fd5..c470eab70500 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm-bad.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm-bad.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -march=sparc <%s 2>&1 | FileCheck %s
-; RUN: not llc -march=sparcv9 <%s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=sparc <%s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=sparcv9 <%s 2>&1 | FileCheck %s
 
 ; CHECK: error: couldn't allocate input reg for constraint '{f32}'
 ; CHECK: error: couldn't allocate input reg for constraint '{f21}'
diff --git a/llvm/test/CodeGen/SPARC/inlineasm-v9.ll b/llvm/test/CodeGen/SPARC/inlineasm-v9.ll
index 94dbabc84296..47126d5d64da 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm-v9.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm-v9.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparcv9 <%s | FileCheck %s
+; RUN: llc -mtriple=sparcv9 <%s | FileCheck %s
 
 ;; Ensures that inline-asm accepts and uses 'f' and 'e' register constraints.
 ; CHECK-LABEL: faddd:
diff --git a/llvm/test/CodeGen/SPARC/inlineasm.ll b/llvm/test/CodeGen/SPARC/inlineasm.ll
index e2853f03a002..3ca2168efb71 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc <%s | FileCheck %s
+; RUN: llc -mtriple=sparc <%s | FileCheck %s
 
 ; CHECK-LABEL: test_constraint_r
 ; CHECK:       add %i1, %i0, %i0
diff --git a/llvm/test/CodeGen/SPARC/leafproc.ll b/llvm/test/CodeGen/SPARC/leafproc.ll
index 4aa3fbbc3058..81dee16159d7 100644
--- a/llvm/test/CodeGen/SPARC/leafproc.ll
+++ b/llvm/test/CodeGen/SPARC/leafproc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc -disable-sparc-leaf-proc=0 < %s | FileCheck %s
+; RUN: llc -mtriple=sparc -disable-sparc-leaf-proc=0 < %s | FileCheck %s
 
 ; CHECK-LABEL:      func_nobody:
 ; CHECK:      retl
diff --git a/llvm/test/CodeGen/SPARC/mult-alt-generic-sparc.ll b/llvm/test/CodeGen/SPARC/mult-alt-generic-sparc.ll
index 3ce23f2ee804..5005a1a751b1 100644
--- a/llvm/test/CodeGen/SPARC/mult-alt-generic-sparc.ll
+++ b/llvm/test/CodeGen/SPARC/mult-alt-generic-sparc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc -no-integrated-as
+; RUN: llc < %s -mtriple=sparc -no-integrated-as
 ; ModuleID = 'mult-alt-generic.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"
 target triple = "sparc"
diff --git a/llvm/test/CodeGen/SPARC/multiple-div.ll b/llvm/test/CodeGen/SPARC/multiple-div.ll
index 6934f69ac18c..8149f1985fc9 100644
--- a/llvm/test/CodeGen/SPARC/multiple-div.ll
+++ b/llvm/test/CodeGen/SPARC/multiple-div.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=sparc | FileCheck %s
-; RUN: llc -O0 < %s -march=sparc | FileCheck %s
+; RUN: llc < %s -mtriple=sparc | FileCheck %s
+; RUN: llc -O0 < %s -mtriple=sparc | FileCheck %s
 
 ;; llc -O0 used to try to spill Y to the stack, which isn't possible,
 ;; and then crashed. Additionally, in -O1, it would omit the second
diff --git a/llvm/test/CodeGen/SPARC/parts.ll b/llvm/test/CodeGen/SPARC/parts.ll
index 47feb1514275..938c4471968b 100644
--- a/llvm/test/CodeGen/SPARC/parts.ll
+++ b/llvm/test/CodeGen/SPARC/parts.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparcv9    | FileCheck %s
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s
   
 ; CHECK-LABEL: test
 ; CHECK:        srl %i1, 0, %o2
diff --git a/llvm/test/CodeGen/SPARC/private.ll b/llvm/test/CodeGen/SPARC/private.ll
index 6afd237f8f1c..b4005d8cc194 100644
--- a/llvm/test/CodeGen/SPARC/private.ll
+++ b/llvm/test/CodeGen/SPARC/private.ll
@@ -1,6 +1,6 @@
 ; Test to make sure that the 'private' is used correctly.
 ;
-; RUN: llc < %s  -march=sparc | FileCheck %s
+; RUN: llc < %s -mtriple=sparc | FileCheck %s
 
 define private void @foo() {
         ret void
diff --git a/llvm/test/CodeGen/SPARC/readcycle.ll b/llvm/test/CodeGen/SPARC/readcycle.ll
index 5c8dfb493a19..d77a725b8f35 100644
--- a/llvm/test/CodeGen/SPARC/readcycle.ll
+++ b/llvm/test/CodeGen/SPARC/readcycle.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc -mcpu=gr740 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=sparc -mcpu=gr740 -verify-machineinstrs | FileCheck %s
 ; CHECK: rd %asr23, %o1
 ; CHECK: mov %g0, %o0
 
diff --git a/llvm/test/CodeGen/SPARC/reg64.ll b/llvm/test/CodeGen/SPARC/reg64.ll
index 74f4d46568f9..06c5bc5f6400 100644
--- a/llvm/test/CodeGen/SPARC/reg64.ll
+++ b/llvm/test/CodeGen/SPARC/reg64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparcv9 | FileCheck %s
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s
 
 define dso_local zeroext i32 @f() local_unnamed_addr {
 entry:
diff --git a/llvm/test/CodeGen/SPARC/register-clobber.ll b/llvm/test/CodeGen/SPARC/register-clobber.ll
index 0ea36df6d015..a77986779c05 100644
--- a/llvm/test/CodeGen/SPARC/register-clobber.ll
+++ b/llvm/test/CodeGen/SPARC/register-clobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc < %s | FileCheck %s
+; RUN: llc -mtriple=sparc < %s | FileCheck %s
 
 ;; Verify that g1 (the output of first asm) is properly understood to
 ;; be clobbered by the call instruction, and moved out of the way
diff --git a/llvm/test/CodeGen/SPARC/reserved-regs.ll b/llvm/test/CodeGen/SPARC/reserved-regs.ll
index bf46177a9566..6bb4e1245589 100644
--- a/llvm/test/CodeGen/SPARC/reserved-regs.ll
+++ b/llvm/test/CodeGen/SPARC/reserved-regs.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=sparc -verify-machineinstrs < %s | FileCheck %s
 
 ;; Test reserve-* options.
 ; RUN: llc -mtriple=sparc64-linux-gnu -mattr=+reserve-g1 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVED-G1
diff --git a/llvm/test/CodeGen/SPARC/salvage-debug-isel.ll b/llvm/test/CodeGen/SPARC/salvage-debug-isel.ll
index ce44d3ab7fd0..275049180ac3 100644
--- a/llvm/test/CodeGen/SPARC/salvage-debug-isel.ll
+++ b/llvm/test/CodeGen/SPARC/salvage-debug-isel.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc -O1 %s -o - -stop-after=finalize-isel | FileCheck %s
+; RUN: llc -mtriple=sparc -O1 %s -o - -stop-after=finalize-isel | FileCheck %s
 
 ; Debug info salvaging in isel means we should see a location for this variable.
 
diff --git a/llvm/test/CodeGen/SPARC/select-mask.ll b/llvm/test/CodeGen/SPARC/select-mask.ll
index 3929d66db343..88caf5c1b7ac 100644
--- a/llvm/test/CodeGen/SPARC/select-mask.ll
+++ b/llvm/test/CodeGen/SPARC/select-mask.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc < %s
+; RUN: llc -mtriple=sparc < %s
 
 ;; getBooleanContents on Sparc used to claim that no bits mattered
 ;; other than the first for SELECT. Thus, the 'trunc' got eliminated
diff --git a/llvm/test/CodeGen/SPARC/setjmp.ll b/llvm/test/CodeGen/SPARC/setjmp.ll
index e7fab9d0b8df..6cfd0ded4f75 100644
--- a/llvm/test/CodeGen/SPARC/setjmp.ll
+++ b/llvm/test/CodeGen/SPARC/setjmp.ll
@@ -1,5 +1,5 @@
-;RUN: llc -march=sparc   < %s | FileCheck %s
-;RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefix=V9
+;RUN: llc -mtriple=sparc < %s | FileCheck %s
+;RUN: llc -mtriple=sparcv9 < %s | FileCheck %s --check-prefix=V9
 
 
 %0 = type { [32 x i32] }
diff --git a/llvm/test/CodeGen/SPARC/soft-float.ll b/llvm/test/CodeGen/SPARC/soft-float.ll
index 35cbbb1adaf0..1d905b4c8ca2 100644
--- a/llvm/test/CodeGen/SPARC/soft-float.ll
+++ b/llvm/test/CodeGen/SPARC/soft-float.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc -mattr=soft-float -O0 < %s | FileCheck %s
+; RUN: llc -mtriple=sparc -mattr=soft-float -O0 < %s | FileCheck %s
 
 ; Arithmetic functions
 
diff --git a/llvm/test/CodeGen/SPARC/soft-mul-div.ll b/llvm/test/CodeGen/SPARC/soft-mul-div.ll
index a5a7583b930f..baef198550a3 100644
--- a/llvm/test/CodeGen/SPARC/soft-mul-div.ll
+++ b/llvm/test/CodeGen/SPARC/soft-mul-div.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc -mcpu=v7 -O0 < %s | FileCheck %s
+; RUN: llc -mtriple=sparc -mcpu=v7 -O0 < %s | FileCheck %s
 
 define i32 @test_mul32(i32 %a, i32 %b) #0 {
     ; CHECK-LABEL: test_mul32
diff --git a/llvm/test/CodeGen/SPARC/spill.ll b/llvm/test/CodeGen/SPARC/spill.ll
index a461de9640bd..e1253feedf5e 100644
--- a/llvm/test/CodeGen/SPARC/spill.ll
+++ b/llvm/test/CodeGen/SPARC/spill.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc  < %s | FileCheck %s
+; RUN: llc -mtriple=sparc < %s | FileCheck %s
 
 ;; Ensure that spills and reloads work for various types on
 ;; sparcv8.
diff --git a/llvm/test/CodeGen/SPARC/sret-secondary.ll b/llvm/test/CodeGen/SPARC/sret-secondary.ll
index ad26cb8915fc..eaf92951b9cf 100644
--- a/llvm/test/CodeGen/SPARC/sret-secondary.ll
+++ b/llvm/test/CodeGen/SPARC/sret-secondary.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc -march=sparc < %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=sparc < %s -o /dev/null 2>&1 | FileCheck %s
 
 ; CHECK: sparc only supports sret on the first parameter
 
diff --git a/llvm/test/CodeGen/SPARC/stack-align.ll b/llvm/test/CodeGen/SPARC/stack-align.ll
index c861b2d0296f..18bb052b47d9 100644
--- a/llvm/test/CodeGen/SPARC/stack-align.ll
+++ b/llvm/test/CodeGen/SPARC/stack-align.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -march=sparc < %s | FileCheck %s --check-prefixes=CHECK32
-; RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefixes=CHECK64
+; RUN: llc -mtriple=sparc < %s | FileCheck %s --check-prefixes=CHECK32
+; RUN: llc -mtriple=sparcv9 < %s | FileCheck %s --check-prefixes=CHECK64
 declare void @stack_realign_helper(i32 %a, ptr %b)
 
 ;; This is a function where we have a local variable of 64-byte
diff --git a/llvm/test/CodeGen/SPARC/tn0009.mir b/llvm/test/CodeGen/SPARC/tn0009.mir
index f3807940cd30..c64381a9bc94 100644
--- a/llvm/test/CodeGen/SPARC/tn0009.mir
+++ b/llvm/test/CodeGen/SPARC/tn0009.mir
@@ -1,4 +1,4 @@
-# RUN: llc %s -mattr=+fix-tn0009 -march=sparc -run-pass=errata-workaround -o - \
+# RUN: llc %s -mattr=+fix-tn0009 -mtriple=sparc -run-pass=errata-workaround -o - \
 # RUN:   | FileCheck %s
 
 ---
diff --git a/llvm/test/CodeGen/SPARC/tn0010.mir b/llvm/test/CodeGen/SPARC/tn0010.mir
index 416dd740cf21..5792c7ce244f 100644
--- a/llvm/test/CodeGen/SPARC/tn0010.mir
+++ b/llvm/test/CodeGen/SPARC/tn0010.mir
@@ -1,4 +1,4 @@
-# RUN: llc %s -mattr=+fix-tn0010 -march=sparc -run-pass=errata-workaround -o - \
+# RUN: llc %s -mattr=+fix-tn0010 -mtriple=sparc -run-pass=errata-workaround -o - \
 # RUN:   | FileCheck %s
 
 ---
diff --git a/llvm/test/CodeGen/SPARC/tn0012.mir b/llvm/test/CodeGen/SPARC/tn0012.mir
index f6c55b0d9a77..52e9c41b6caa 100644
--- a/llvm/test/CodeGen/SPARC/tn0012.mir
+++ b/llvm/test/CodeGen/SPARC/tn0012.mir
@@ -1,4 +1,4 @@
-# RUN: llc %s -mattr=+fix-tn0012 -march=sparc -run-pass=errata-workaround -o - \
+# RUN: llc %s -mattr=+fix-tn0012 -mtriple=sparc -run-pass=errata-workaround -o - \
 # RUN:   | FileCheck %s
 
 ---
diff --git a/llvm/test/CodeGen/SPARC/tn0013.mir b/llvm/test/CodeGen/SPARC/tn0013.mir
index 068bd0f02b34..4a8ac55fecb8 100644
--- a/llvm/test/CodeGen/SPARC/tn0013.mir
+++ b/llvm/test/CodeGen/SPARC/tn0013.mir
@@ -1,4 +1,4 @@
-# RUN: llc %s -mattr=+fix-tn0013 -march=sparc -run-pass=errata-workaround -o - \
+# RUN: llc %s -mattr=+fix-tn0013 -mtriple=sparc -run-pass=errata-workaround -o - \
 # RUN:   | FileCheck %s
 
 ---
diff --git a/llvm/test/CodeGen/SPARC/vector-call.ll b/llvm/test/CodeGen/SPARC/vector-call.ll
index 3b004b6230f8..d0adf3dcd771 100644
--- a/llvm/test/CodeGen/SPARC/vector-call.ll
+++ b/llvm/test/CodeGen/SPARC/vector-call.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc | FileCheck %s
+; RUN: llc < %s -mtriple=sparc | FileCheck %s
 
 ; Verify that we correctly handle vector types that appear directly
 ; during call lowering. These may cause issue as v2i32 is a legal type
diff --git a/llvm/test/CodeGen/SPARC/vector-extract-elt.ll b/llvm/test/CodeGen/SPARC/vector-extract-elt.ll
index 8c3d5183b993..ef2a4323accc 100644
--- a/llvm/test/CodeGen/SPARC/vector-extract-elt.ll
+++ b/llvm/test/CodeGen/SPARC/vector-extract-elt.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=sparc < %s | FileCheck %s
+; RUN: llc -mtriple=sparc < %s | FileCheck %s
 
 
 ; If computeKnownSignBits (in SelectionDAG) can do a simple
diff --git a/llvm/test/CodeGen/SPARC/zerostructcall.ll b/llvm/test/CodeGen/SPARC/zerostructcall.ll
index 9b9976faba73..c25c72cd5603 100644
--- a/llvm/test/CodeGen/SPARC/zerostructcall.ll
+++ b/llvm/test/CodeGen/SPARC/zerostructcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=sparc | FileCheck %s
+; RUN: llc < %s -mtriple=sparc | FileCheck %s
 
 ; CHECK-LABEL: struct_ptr_test
 ; CHECK:       call struct_ptr_fn