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| author | Mingming Liu <mingmingl@google.com> | 2025-09-10 15:25:31 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-10 15:25:31 -0700 |
| commit | 1417dafa1db9cb1b2b09438aa9f53ea5ab6e36e2 (patch) | |
| tree | 57f4b1f313c8cf74eed8819870f39c36ea263c68 /llvm/test/CodeGen/RISCV/float-convert.ll | |
| parent | 898b813bc8a6d0276bf0f4769f5f2f64b34e632d (diff) | |
| parent | b8cefcb601ddaa18482555c4ff363c01a270c2fe (diff) | |
Merge branch 'main' into users/mingmingl-llvm/samplefdo-profile-formatusers/mingmingl-llvm/samplefdo-profile-format
Diffstat (limited to 'llvm/test/CodeGen/RISCV/float-convert.ll')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/float-convert.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/RISCV/float-convert.ll b/llvm/test/CodeGen/RISCV/float-convert.ll index 6e49d479cf0b..72578193ee4b 100644 --- a/llvm/test/CodeGen/RISCV/float-convert.ll +++ b/llvm/test/CodeGen/RISCV/float-convert.ll @@ -1474,8 +1474,8 @@ define signext i16 @fcvt_w_s_sat_i16(float %a) nounwind { ; RV32I-NEXT: # %bb.1: # %start ; RV32I-NEXT: lui s1, 1048568 ; RV32I-NEXT: .LBB24_2: # %start -; RV32I-NEXT: lui a0, 290816 -; RV32I-NEXT: addi a1, a0, -512 +; RV32I-NEXT: lui a1, 290816 +; RV32I-NEXT: addi a1, a1, -512 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2 ; RV32I-NEXT: blez a0, .LBB24_4 @@ -1516,8 +1516,8 @@ define signext i16 @fcvt_w_s_sat_i16(float %a) nounwind { ; RV64I-NEXT: # %bb.1: # %start ; RV64I-NEXT: lui s1, 1048568 ; RV64I-NEXT: .LBB24_2: # %start -; RV64I-NEXT: lui a0, 290816 -; RV64I-NEXT: addi a1, a0, -512 +; RV64I-NEXT: lui a1, 290816 +; RV64I-NEXT: addi a1, a1, -512 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2 ; RV64I-NEXT: blez a0, .LBB24_4 @@ -1640,8 +1640,8 @@ define zeroext i16 @fcvt_wu_s_sat_i16(float %a) nounwind { ; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: call __fixunssfsi ; RV32I-NEXT: mv s1, a0 -; RV32I-NEXT: lui a0, 292864 -; RV32I-NEXT: addi a1, a0, -256 +; RV32I-NEXT: lui a1, 292864 +; RV32I-NEXT: addi a1, a1, -256 ; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: call __gtsf2 ; RV32I-NEXT: lui a1, 16 @@ -1677,8 +1677,8 @@ define zeroext i16 @fcvt_wu_s_sat_i16(float %a) nounwind { ; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: call __fixunssfdi ; RV64I-NEXT: mv s1, a0 -; RV64I-NEXT: lui a0, 292864 -; RV64I-NEXT: addi a1, a0, -256 +; RV64I-NEXT: lui a1, 292864 +; RV64I-NEXT: addi a1, a1, -256 ; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: call __gtsf2 ; RV64I-NEXT: lui a1, 16 |