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| author | NAKAMURA Takumi <geek4civic@gmail.com> | 2025-01-09 18:49:54 +0900 |
|---|---|---|
| committer | NAKAMURA Takumi <geek4civic@gmail.com> | 2025-01-09 18:49:54 +0900 |
| commit | e2810c9a248f4c7fbfae84bb32b6f7e01027458b (patch) | |
| tree | ae0b02a8491b969a1cee94ea16ffe42c559143c5 /llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll | |
| parent | fa04eb4af95c1ca7377279728cb004bcd2324d01 (diff) | |
| parent | bdcf47e4bcb92889665825654bb80a8bbe30379e (diff) | |
Merge branch 'users/chapuni/cov/single/base' into users/chapuni/cov/single/switchusers/chapuni/cov/single/switch
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll b/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll index b6799c8a88e0..f62f70ca7ac1 100644 --- a/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll +++ b/llvm/test/CodeGen/PowerPC/scalar_vector_test_5.ll @@ -11,24 +11,35 @@ define i8 @scalar_to_vector_half(ptr nocapture readonly %ad) { ; P9LE-LABEL: scalar_to_vector_half: ; P9LE: # %bb.0: # %entry -; P9LE-NEXT: lhz r3, 0(r3) +; P9LE-NEXT: lxsihzx v2, 0, r3 +; P9LE-NEXT: li r3, 0 +; P9LE-NEXT: vsplth v2, v2, 3 +; P9LE-NEXT: vextubrx r3, r3, v2 ; P9LE-NEXT: blr ; ; P9BE-LABEL: scalar_to_vector_half: ; P9BE: # %bb.0: # %entry -; P9BE-NEXT: lhz r3, 0(r3) -; P9BE-NEXT: srwi r3, r3, 24 +; P9BE-NEXT: lxsihzx v2, 0, r3 +; P9BE-NEXT: li r3, 0 +; P9BE-NEXT: vsplth v2, v2, 3 +; P9BE-NEXT: vextublx r3, r3, v2 ; P9BE-NEXT: blr ; ; P8LE-LABEL: scalar_to_vector_half: ; P8LE: # %bb.0: # %entry ; P8LE-NEXT: lhz r3, 0(r3) +; P8LE-NEXT: mtfprd f0, r3 +; P8LE-NEXT: mffprd r3, f0 +; P8LE-NEXT: clrldi r3, r3, 56 ; P8LE-NEXT: blr ; ; P8BE-LABEL: scalar_to_vector_half: ; P8BE: # %bb.0: # %entry ; P8BE-NEXT: lhz r3, 0(r3) -; P8BE-NEXT: srwi r3, r3, 24 +; P8BE-NEXT: sldi r3, r3, 48 +; P8BE-NEXT: mtfprd f0, r3 +; P8BE-NEXT: mffprd r3, f0 +; P8BE-NEXT: rldicl r3, r3, 8, 56 ; P8BE-NEXT: blr entry: %0 = load <2 x i8>, ptr %ad, align 1 |