Merge branch 'main' into users/meinersbur/flang_runtime_split-headersusers/meinersbur/flang_runtime_split-headers

16 files changed, 2908 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/cmpxchg.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/cmpxchg.ll
new file mode 100644
index 000000000000..36bd4654d3e5
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/cmpxchg.ll
@@ -0,0 +1,316 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+
+@thread_id = internal global <{ [5 x i8] }> <{ [5 x i8] zeroinitializer}>, align 4
+
+define { i32, i1 } @std_thread_new() {
+; NO-ATOMIC-LABEL: std_thread_new:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.l #1, (8,%sp)
+; NO-ATOMIC-NEXT:    move.l #0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l #thread_id, (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_val_compare_and_swap_4
+; NO-ATOMIC-NEXT:    cmpi.l #0, %d0
+; NO-ATOMIC-NEXT:    seq %d1
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: std_thread_new:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    lea (_GLOBAL_OFFSET_TABLE_@GOTPCREL,%pc), %a0
+; NO-ATOMIC-PIC-NEXT:    adda.l #thread_id@GOTOFF, %a0
+; NO-ATOMIC-PIC-NEXT:    move.l %a0, (%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #1, (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_val_compare_and_swap_4@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    cmpi.l #0, %d0
+; NO-ATOMIC-PIC-NEXT:    seq %d1
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: std_thread_new:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-NEXT:    move.l #thread_id, %a0
+; ATOMIC-NEXT:    moveq #1, %d1
+; ATOMIC-NEXT:    moveq #0, %d0
+; ATOMIC-NEXT:    cas.l %d0, %d1, (%a0)
+; ATOMIC-NEXT:    cmpi.l #0, %d0
+; ATOMIC-NEXT:    seq %d1
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: std_thread_new:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-PIC-NEXT:    suba.l #4, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -8
+; ATOMIC-PIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-PIC-NEXT:    lea (_GLOBAL_OFFSET_TABLE_@GOTPCREL,%pc), %a0
+; ATOMIC-PIC-NEXT:    move.l #thread_id@GOTOFF, %d1
+; ATOMIC-PIC-NEXT:    moveq #1, %d2
+; ATOMIC-PIC-NEXT:    moveq #0, %d0
+; ATOMIC-PIC-NEXT:    cas.l %d0, %d2, (0,%a0,%d1)
+; ATOMIC-PIC-NEXT:    cmpi.l #0, %d0
+; ATOMIC-PIC-NEXT:    seq %d1
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #4, %sp
+; ATOMIC-PIC-NEXT:    rts
+start:
+  %1 = cmpxchg ptr @thread_id, i32 0, i32 1 acquire monotonic, align 4
+  ret { i32, i1 } %1
+}
+
+define i1 @cmpxchg_i8_monotonic_monotonic(i8 %cmp, i8 %new, ptr %mem) nounwind {
+; NO-ATOMIC-LABEL: cmpxchg_i8_monotonic_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-NEXT:    movem.l %d2, (16,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-NEXT:    move.b (31,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-NEXT:    move.b (27,%sp), %d2
+; NO-ATOMIC-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_val_compare_and_swap_1
+; NO-ATOMIC-NEXT:    sub.b %d2, %d0
+; NO-ATOMIC-NEXT:    seq %d0
+; NO-ATOMIC-NEXT:    movem.l (16,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: cmpxchg_i8_monotonic_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    movem.l %d2, (16,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-PIC-NEXT:    move.b (31,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.b (27,%sp), %d2
+; NO-ATOMIC-PIC-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_val_compare_and_swap_1@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    sub.b %d2, %d0
+; NO-ATOMIC-PIC-NEXT:    seq %d0
+; NO-ATOMIC-PIC-NEXT:    movem.l (16,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: cmpxchg_i8_monotonic_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #4, %sp
+; ATOMIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.b (15,%sp), %d0
+; ATOMIC-NEXT:    move.b (11,%sp), %d1
+; ATOMIC-NEXT:    move.b %d1, %d2
+; ATOMIC-NEXT:    cas.b %d2, %d0, (%a0)
+; ATOMIC-NEXT:    sub.b %d1, %d2
+; ATOMIC-NEXT:    seq %d0
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #4, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: cmpxchg_i8_monotonic_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #4, %sp
+; ATOMIC-PIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (15,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.b (11,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.b %d1, %d2
+; ATOMIC-PIC-NEXT:    cas.b %d2, %d0, (%a0)
+; ATOMIC-PIC-NEXT:    sub.b %d1, %d2
+; ATOMIC-PIC-NEXT:    seq %d0
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #4, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %res = cmpxchg ptr %mem, i8 %cmp, i8 %new monotonic monotonic
+  %val = extractvalue {i8, i1} %res, 1
+  ret i1 %val
+}
+
+define i16 @cmpxchg_i16_release_monotonic(i16 %cmp, i16 %new, ptr %mem) nounwind {
+; NO-ATOMIC-LABEL: cmpxchg_i16_release_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    move.w (22,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_val_compare_and_swap_2
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: cmpxchg_i16_release_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    move.w (22,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_val_compare_and_swap_2@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: cmpxchg_i16_release_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (12,%sp), %a0
+; ATOMIC-NEXT:    move.w (10,%sp), %d1
+; ATOMIC-NEXT:    move.w (6,%sp), %d0
+; ATOMIC-NEXT:    cas.w %d0, %d1, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: cmpxchg_i16_release_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (12,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (10,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.w (6,%sp), %d0
+; ATOMIC-PIC-NEXT:    cas.w %d0, %d1, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  %res = cmpxchg ptr %mem, i16 %cmp, i16 %new release monotonic
+  %val = extractvalue {i16, i1} %res, 0
+  ret i16 %val
+}
+
+define i32 @cmpxchg_i32_release_acquire(i32 %cmp, i32 %new, ptr %mem) nounwind {
+; NO-ATOMIC-LABEL: cmpxchg_i32_release_acquire:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (8,%sp)
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_val_compare_and_swap_4
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: cmpxchg_i32_release_acquire:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_val_compare_and_swap_4@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: cmpxchg_i32_release_acquire:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (12,%sp), %a0
+; ATOMIC-NEXT:    move.l (8,%sp), %d1
+; ATOMIC-NEXT:    move.l (4,%sp), %d0
+; ATOMIC-NEXT:    cas.l %d0, %d1, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: cmpxchg_i32_release_acquire:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (12,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %d0
+; ATOMIC-PIC-NEXT:    cas.l %d0, %d1, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  %res = cmpxchg ptr %mem, i32 %cmp, i32 %new release acquire
+  %val = extractvalue {i32, i1} %res, 0
+  ret i32 %val
+}
+
+define i64 @cmpxchg_i64_seqcst_seqcst(i64 %cmp, i64 %new, ptr %mem) nounwind {
+; NO-ATOMIC-LABEL: cmpxchg_i64_seqcst_seqcst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #36, %sp
+; NO-ATOMIC-NEXT:    move.l (44,%sp), (28,%sp)
+; NO-ATOMIC-NEXT:    move.l (40,%sp), (24,%sp)
+; NO-ATOMIC-NEXT:    lea (24,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l %a0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-NEXT:    move.l (52,%sp), (12,%sp)
+; NO-ATOMIC-NEXT:    move.l (48,%sp), (8,%sp)
+; NO-ATOMIC-NEXT:    move.l (56,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_compare_exchange_8
+; NO-ATOMIC-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-NEXT:    adda.l #36, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: cmpxchg_i64_seqcst_seqcst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #36, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l (44,%sp), (28,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (40,%sp), (24,%sp)
+; NO-ATOMIC-PIC-NEXT:    lea (24,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l %a0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (52,%sp), (12,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (48,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (56,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_compare_exchange_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    adda.l #36, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: cmpxchg_i64_seqcst_seqcst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #36, %sp
+; ATOMIC-NEXT:    move.l (44,%sp), (28,%sp)
+; ATOMIC-NEXT:    move.l (40,%sp), (24,%sp)
+; ATOMIC-NEXT:    lea (24,%sp), %a0
+; ATOMIC-NEXT:    move.l %a0, (4,%sp)
+; ATOMIC-NEXT:    move.l #5, (20,%sp)
+; ATOMIC-NEXT:    move.l #5, (16,%sp)
+; ATOMIC-NEXT:    move.l (52,%sp), (12,%sp)
+; ATOMIC-NEXT:    move.l (48,%sp), (8,%sp)
+; ATOMIC-NEXT:    move.l (56,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_compare_exchange_8
+; ATOMIC-NEXT:    move.l (28,%sp), %d1
+; ATOMIC-NEXT:    move.l (24,%sp), %d0
+; ATOMIC-NEXT:    adda.l #36, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: cmpxchg_i64_seqcst_seqcst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #36, %sp
+; ATOMIC-PIC-NEXT:    move.l (44,%sp), (28,%sp)
+; ATOMIC-PIC-NEXT:    move.l (40,%sp), (24,%sp)
+; ATOMIC-PIC-NEXT:    lea (24,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l %a0, (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l #5, (20,%sp)
+; ATOMIC-PIC-NEXT:    move.l #5, (16,%sp)
+; ATOMIC-PIC-NEXT:    move.l (52,%sp), (12,%sp)
+; ATOMIC-PIC-NEXT:    move.l (48,%sp), (8,%sp)
+; ATOMIC-PIC-NEXT:    move.l (56,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_compare_exchange_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    move.l (28,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (24,%sp), %d0
+; ATOMIC-PIC-NEXT:    adda.l #36, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %res = cmpxchg ptr %mem, i64 %cmp, i64 %new seq_cst seq_cst
+  %val = extractvalue {i64, i1} %res, 0
+  ret i64 %val
+}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/fence.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/fence.ll
new file mode 100644
index 000000000000..727c4d1192b8
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/fence.ll
@@ -0,0 +1,41 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc -mtriple=m68k-linux-gnu --code-model=large < %s | FileCheck %s
+; RUN: llc -mtriple=m68k-linux-gnu --code-model=large --relocation-model=pic < %s | FileCheck %s --check-prefix=PIC
+
+; M68k's libgcc does NOT have __sync_synchronize so we shouldn't
+; lower to that.
+
+define void @atomic_fence() {
+; CHECK-LABEL: atomic_fence:
+; CHECK:         .cfi_startproc
+; CHECK-NEXT:  ; %bb.0: ; %entry
+; CHECK-NEXT:    ;APP
+; CHECK-NEXT:    ;NO_APP
+; CHECK-NEXT:    ;APP
+; CHECK-NEXT:    ;NO_APP
+; CHECK-NEXT:    ;APP
+; CHECK-NEXT:    ;NO_APP
+; CHECK-NEXT:    ;APP
+; CHECK-NEXT:    ;NO_APP
+; CHECK-NEXT:    rts
+;
+; PIC-LABEL: atomic_fence:
+; PIC:         .cfi_startproc
+; PIC-NEXT:  ; %bb.0: ; %entry
+; PIC-NEXT:    ;APP
+; PIC-NEXT:    ;NO_APP
+; PIC-NEXT:    ;APP
+; PIC-NEXT:    ;NO_APP
+; PIC-NEXT:    ;APP
+; PIC-NEXT:    ;NO_APP
+; PIC-NEXT:    ;APP
+; PIC-NEXT:    ;NO_APP
+; PIC-NEXT:    rts
+entry:
+  fence acquire
+  fence release
+  fence acq_rel
+  fence seq_cst
+  ret void
+}
+
diff --git a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/load-store.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/load-store.ll
new file mode 100644
index 000000000000..a59a40d8e9fd
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/load-store.ll
@@ -0,0 +1,1161 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+
+define i8 @atomic_load_i8_unordered(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i8_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i8_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i8_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i8_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i8, ptr %a unordered, align 1
+  ret i8 %1
+}
+
+define i8 @atomic_load_i8_monotonic(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i8_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i8_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i8_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i8_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i8, ptr %a monotonic, align 1
+  ret i8 %1
+}
+
+define i8 @atomic_load_i8_acquire(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i8_acquire:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i8_acquire:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i8_acquire:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i8_acquire:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i8, ptr %a acquire, align 1
+  ret i8 %1
+}
+
+define i8 @atomic_load_i8_seq_cst(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i8_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i8_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i8_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i8_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i8, ptr %a seq_cst, align 1
+  ret i8 %1
+}
+
+define i16 @atomic_load_i16_unordered(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i16_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i16_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i16_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i16_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i16, ptr %a unordered, align 2
+  ret i16 %1
+}
+
+define i16 @atomic_load_i16_monotonic(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i16_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i16_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i16_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i16_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i16, ptr %a monotonic, align 2
+  ret i16 %1
+}
+
+define i16 @atomic_load_i16_acquire(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i16_acquire:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i16_acquire:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i16_acquire:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i16_acquire:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i16, ptr %a acquire, align 2
+  ret i16 %1
+}
+
+define i16 @atomic_load_i16_seq_cst(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i16_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i16_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i16_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i16_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i16, ptr %a seq_cst, align 2
+  ret i16 %1
+}
+
+define i32 @atomic_load_i32_unordered(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i32_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i32_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i32_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i32_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i32, ptr %a unordered, align 4
+  ret i32 %1
+}
+
+define i32 @atomic_load_i32_monotonic(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i32_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i32_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i32_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i32_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i32, ptr %a monotonic, align 4
+  ret i32 %1
+}
+
+define i32 @atomic_load_i32_acquire(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i32_acquire:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i32_acquire:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i32_acquire:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i32_acquire:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i32, ptr %a acquire, align 4
+  ret i32 %1
+}
+
+define i32 @atomic_load_i32_seq_cst(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i32_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i32_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i32_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i32_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i32, ptr %a seq_cst, align 4
+  ret i32 %1
+}
+
+define i64 @atomic_load_i64_unordered(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i64_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    move.l #0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_load_8
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i64_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i64_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #12, %sp
+; ATOMIC-NEXT:    move.l #0, (4,%sp)
+; ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_load_8
+; ATOMIC-NEXT:    adda.l #12, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i64_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; ATOMIC-PIC-NEXT:    move.l #0, (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i64, ptr %a unordered, align 8
+  ret i64 %1
+}
+
+define i64 @atomic_load_i64_monotonic(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i64_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    move.l #0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_load_8
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i64_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i64_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #12, %sp
+; ATOMIC-NEXT:    move.l #0, (4,%sp)
+; ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_load_8
+; ATOMIC-NEXT:    adda.l #12, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i64_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; ATOMIC-PIC-NEXT:    move.l #0, (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i64, ptr %a monotonic, align 8
+  ret i64 %1
+}
+
+define i64 @atomic_load_i64_acquire(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i64_acquire:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    move.l #2, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_load_8
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i64_acquire:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #2, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i64_acquire:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #12, %sp
+; ATOMIC-NEXT:    move.l #2, (4,%sp)
+; ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_load_8
+; ATOMIC-NEXT:    adda.l #12, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i64_acquire:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; ATOMIC-PIC-NEXT:    move.l #2, (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i64, ptr %a acquire, align 8
+  ret i64 %1
+}
+
+define i64 @atomic_load_i64_seq_cst(ptr %a) nounwind {
+; NO-ATOMIC-LABEL: atomic_load_i64_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    move.l #5, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_load_8
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_load_i64_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #5, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_load_i64_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #12, %sp
+; ATOMIC-NEXT:    move.l #5, (4,%sp)
+; ATOMIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_load_8
+; ATOMIC-NEXT:    adda.l #12, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_load_i64_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; ATOMIC-PIC-NEXT:    move.l #5, (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_load_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %1 = load atomic i64, ptr %a seq_cst, align 8
+  ret i64 %1
+}
+
+define void @atomic_store_i8_unordered(ptr %a, i8 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i8_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i8_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i8_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i8_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i8 %val, ptr %a unordered, align 1
+  ret void
+}
+
+define void @atomic_store_i8_monotonic(ptr %a, i8 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i8_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i8_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i8_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i8_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i8 %val, ptr %a monotonic, align 1
+  ret void
+}
+
+define void @atomic_store_i8_release(ptr %a, i8 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i8_release:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i8_release:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i8_release:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i8_release:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i8 %val, ptr %a release, align 1
+  ret void
+}
+
+define void @atomic_store_i8_seq_cst(ptr %a, i8 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i8_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i8_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i8_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i8_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.b (11,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i8 %val, ptr %a seq_cst, align 1
+  ret void
+}
+
+define void @atomic_store_i16_unordered(ptr %a, i16 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i16_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i16_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i16_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i16_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i16 %val, ptr %a unordered, align 2
+  ret void
+}
+
+define void @atomic_store_i16_monotonic(ptr %a, i16 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i16_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i16_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i16_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i16_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i16 %val, ptr %a monotonic, align 2
+  ret void
+}
+
+define void @atomic_store_i16_release(ptr %a, i16 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i16_release:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i16_release:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i16_release:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i16_release:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i16 %val, ptr %a release, align 2
+  ret void
+}
+
+define void @atomic_store_i16_seq_cst(ptr %a, i16 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i16_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i16_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i16_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i16_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.w (10,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i16 %val, ptr %a seq_cst, align 2
+  ret void
+}
+
+define void @atomic_store_i32_unordered(ptr %a, i32 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i32_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i32_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i32_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i32_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i32 %val, ptr %a unordered, align 4
+  ret void
+}
+
+define void @atomic_store_i32_monotonic(ptr %a, i32 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i32_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i32_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i32_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i32_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i32 %val, ptr %a monotonic, align 4
+  ret void
+}
+
+define void @atomic_store_i32_release(ptr %a, i32 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i32_release:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i32_release:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i32_release:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i32_release:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i32 %val, ptr %a release, align 4
+  ret void
+}
+
+define void @atomic_store_i32_seq_cst(ptr %a, i32 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i32_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i32_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i32_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i32_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l %d0, (%a0)
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i32 %val, ptr %a seq_cst, align 4
+  ret void
+}
+
+define void @atomic_store_i64_unordered(ptr %a, i64 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i64_unordered:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-NEXT:    move.l #0, (12,%sp)
+; NO-ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_store_8
+; NO-ATOMIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i64_unordered:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #0, (12,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i64_unordered:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #20, %sp
+; ATOMIC-NEXT:    move.l #0, (12,%sp)
+; ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_store_8
+; ATOMIC-NEXT:    adda.l #20, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i64_unordered:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; ATOMIC-PIC-NEXT:    move.l #0, (12,%sp)
+; ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i64 %val, ptr %a unordered, align 8
+  ret void
+}
+
+define void @atomic_store_i64_monotonic(ptr %a, i64 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i64_monotonic:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-NEXT:    move.l #0, (12,%sp)
+; NO-ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_store_8
+; NO-ATOMIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i64_monotonic:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #0, (12,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i64_monotonic:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #20, %sp
+; ATOMIC-NEXT:    move.l #0, (12,%sp)
+; ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_store_8
+; ATOMIC-NEXT:    adda.l #20, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i64_monotonic:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; ATOMIC-PIC-NEXT:    move.l #0, (12,%sp)
+; ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i64 %val, ptr %a monotonic, align 8
+  ret void
+}
+
+define void @atomic_store_i64_release(ptr %a, i64 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i64_release:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_store_8
+; NO-ATOMIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i64_release:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i64_release:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #20, %sp
+; ATOMIC-NEXT:    move.l #3, (12,%sp)
+; ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_store_8
+; ATOMIC-NEXT:    adda.l #20, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i64_release:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; ATOMIC-PIC-NEXT:    move.l #3, (12,%sp)
+; ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i64 %val, ptr %a release, align 8
+  ret void
+}
+
+define void @atomic_store_i64_seq_cst(ptr %a, i64 %val) nounwind {
+; NO-ATOMIC-LABEL: atomic_store_i64_seq_cst:
+; NO-ATOMIC:       ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-NEXT:    move.l #5, (12,%sp)
+; NO-ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_store_8
+; NO-ATOMIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomic_store_i64_seq_cst:
+; NO-ATOMIC-PIC:       ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    move.l #5, (12,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomic_store_i64_seq_cst:
+; ATOMIC:       ; %bb.0:
+; ATOMIC-NEXT:    suba.l #20, %sp
+; ATOMIC-NEXT:    move.l #5, (12,%sp)
+; ATOMIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_store_8
+; ATOMIC-NEXT:    adda.l #20, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomic_store_i64_seq_cst:
+; ATOMIC-PIC:       ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; ATOMIC-PIC-NEXT:    move.l #5, (12,%sp)
+; ATOMIC-PIC-NEXT:    move.l (32,%sp), (8,%sp)
+; ATOMIC-PIC-NEXT:    move.l (28,%sp), (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (24,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_store_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; ATOMIC-PIC-NEXT:    rts
+  store atomic i64 %val, ptr %a seq_cst, align 8
+  ret void
+}
+
+define void @store_arid(ptr nonnull align 4 %a) {
+; NO-ATOMIC-LABEL: store_arid:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-NEXT:    moveq #1, %d0
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l %d0, (32,%a0)
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: store_arid:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-NEXT:    moveq #1, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (32,%a0)
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: store_arid:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-NEXT:    moveq #1, %d0
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l %d0, (32,%a0)
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: store_arid:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-PIC-NEXT:    moveq #1, %d0
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l %d0, (32,%a0)
+; ATOMIC-PIC-NEXT:    rts
+start:
+  %1 = getelementptr inbounds i32, ptr %a, i32 8
+  store atomic i32 1, ptr %1 seq_cst, align 4
+  br label %exit
+
+exit:                                              ; preds = %start
+  ret void
+}
+
+define i32 @load_arid(ptr nonnull align 4 %a) {
+; NO-ATOMIC-LABEL: load_arid:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (32,%a0), %d0
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: load_arid:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (32,%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: load_arid:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-NEXT:    move.l (32,%a0), %d0
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: load_arid:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-PIC-NEXT:    move.l (4,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (32,%a0), %d0
+; ATOMIC-PIC-NEXT:    rts
+start:
+  %1 = getelementptr inbounds i32, ptr %a, i32 8
+  %2 = load atomic i32, ptr %1 seq_cst, align 4
+  br label %exit
+
+exit:                                              ; preds = %start
+  ret i32 %2
+}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
new file mode 100644
index 000000000000..b4c2bb1d223c
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
@@ -0,0 +1,1390 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=NO-ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68000 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68010 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=NO-ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 -verify-machineinstrs --code-model=large | FileCheck %s --check-prefix=ATOMIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68020 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 -verify-machineinstrs --code-model=large --relocation-model=pic | FileCheck %s --check-prefix=ATOMIC-PIC
+
+define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_add_1
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_add_i8:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_add_1@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_add_i8:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.b (15,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.b (%a0), %d2
+; ATOMIC-NEXT:    move.b %d2, %d0
+; ATOMIC-NEXT:  .LBB0_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.b %d2, %d3
+; ATOMIC-NEXT:    add.b %d1, %d3
+; ATOMIC-NEXT:    cas.b %d0, %d3, (%a0)
+; ATOMIC-NEXT:    move.b %d0, %d3
+; ATOMIC-NEXT:    sub.b %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    bne .LBB0_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_add_i8:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.b (15,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (%a0), %d2
+; ATOMIC-PIC-NEXT:    move.b %d2, %d0
+; ATOMIC-PIC-NEXT:  .LBB0_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.b %d2, %d3
+; ATOMIC-PIC-NEXT:    add.b %d1, %d3
+; ATOMIC-PIC-NEXT:    cas.b %d0, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.b %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.b %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB0_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw add ptr %ptr, i8 %val monotonic
+  ret i8 %old
+}
+
+define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i16:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_sub_i16:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.w (14,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-NEXT:    move.w %d2, %d0
+; ATOMIC-NEXT:  .LBB1_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.w %d2, %d3
+; ATOMIC-NEXT:    sub.w %d1, %d3
+; ATOMIC-NEXT:    cas.w %d0, %d3, (%a0)
+; ATOMIC-NEXT:    move.w %d0, %d3
+; ATOMIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    bne .LBB1_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_sub_i16:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.w (14,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-PIC-NEXT:    move.w %d2, %d0
+; ATOMIC-PIC-NEXT:  .LBB1_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.w %d2, %d3
+; ATOMIC-PIC-NEXT:    sub.w %d1, %d3
+; ATOMIC-PIC-NEXT:    cas.w %d0, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.w %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.w %d0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB1_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw sub ptr %ptr, i16 %val acquire
+  ret i16 %old
+}
+
+define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_and_4
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_and_i32:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_and_4@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_and_i32:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.l (12,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %d2
+; ATOMIC-NEXT:    move.l %d2, %d0
+; ATOMIC-NEXT:  .LBB2_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.l %d2, %d3
+; ATOMIC-NEXT:    and.l %d1, %d3
+; ATOMIC-NEXT:    cas.l %d0, %d3, (%a0)
+; ATOMIC-NEXT:    move.l %d0, %d3
+; ATOMIC-NEXT:    sub.l %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    bne .LBB2_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_and_i32:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (12,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %d2
+; ATOMIC-PIC-NEXT:    move.l %d2, %d0
+; ATOMIC-PIC-NEXT:  .LBB2_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d2, %d3
+; ATOMIC-PIC-NEXT:    and.l %d1, %d3
+; ATOMIC-PIC-NEXT:    cas.l %d0, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.l %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.l %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.l %d0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB2_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw and ptr %ptr, i32 %val seq_cst
+  ret i32 %old
+}
+
+define i64 @atomicrmw_xor_i64(i64 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_fetch_xor_8
+; NO-ATOMIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_xor_i64:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -24
+; NO-ATOMIC-PIC-NEXT:    move.l #3, (12,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (32,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_fetch_xor_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_xor_i64:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #20, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -24
+; ATOMIC-NEXT:    move.l #3, (12,%sp)
+; ATOMIC-NEXT:    move.l (28,%sp), (8,%sp)
+; ATOMIC-NEXT:    move.l (24,%sp), (4,%sp)
+; ATOMIC-NEXT:    move.l (32,%sp), (%sp)
+; ATOMIC-NEXT:    jsr __atomic_fetch_xor_8
+; ATOMIC-NEXT:    adda.l #20, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_xor_i64:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #20, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -24
+; ATOMIC-PIC-NEXT:    move.l #3, (12,%sp)
+; ATOMIC-PIC-NEXT:    move.l (28,%sp), (8,%sp)
+; ATOMIC-PIC-NEXT:    move.l (24,%sp), (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l (32,%sp), (%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_fetch_xor_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    adda.l #20, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw xor ptr %ptr, i64 %val release
+  ret i64 %old
+}
+
+define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_or_1
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_or_i8:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_or_1@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_or_i8:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.b (15,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.b (%a0), %d2
+; ATOMIC-NEXT:    move.b %d2, %d0
+; ATOMIC-NEXT:  .LBB4_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.b %d2, %d3
+; ATOMIC-NEXT:    or.b %d1, %d3
+; ATOMIC-NEXT:    cas.b %d0, %d3, (%a0)
+; ATOMIC-NEXT:    move.b %d0, %d3
+; ATOMIC-NEXT:    sub.b %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    bne .LBB4_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_or_i8:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.b (15,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (%a0), %d2
+; ATOMIC-PIC-NEXT:    move.b %d2, %d0
+; ATOMIC-PIC-NEXT:  .LBB4_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.b %d2, %d3
+; ATOMIC-PIC-NEXT:    or.b %d1, %d3
+; ATOMIC-PIC-NEXT:    cas.b %d0, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.b %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.b %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB4_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw or ptr %ptr, i8 %val monotonic
+  ret i8 %old
+}
+
+define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_nand_2
+; NO-ATOMIC-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atmoicrmw_nand_i16:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    movem.l %d2, (8,%sp) ; 8-byte Folded Spill
+; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d2
+; NO-ATOMIC-PIC-NEXT:    move.l %d2, %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_nand_2@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    move.w %d2, %d0
+; NO-ATOMIC-PIC-NEXT:    movem.l (8,%sp), %d2 ; 8-byte Folded Reload
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atmoicrmw_nand_i16:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.w (14,%sp), %d0
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-NEXT:    move.w %d2, %d1
+; ATOMIC-NEXT:  .LBB5_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.w %d2, %d3
+; ATOMIC-NEXT:    and.w %d0, %d3
+; ATOMIC-NEXT:    not.w %d3
+; ATOMIC-NEXT:    cas.w %d1, %d3, (%a0)
+; ATOMIC-NEXT:    move.w %d1, %d3
+; ATOMIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.w %d1, %d2
+; ATOMIC-NEXT:    bne .LBB5_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atmoicrmw_nand_i16:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.w (14,%sp), %d0
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-PIC-NEXT:    move.w %d2, %d1
+; ATOMIC-PIC-NEXT:  .LBB5_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.w %d2, %d3
+; ATOMIC-PIC-NEXT:    and.w %d0, %d3
+; ATOMIC-PIC-NEXT:    not.w %d3
+; ATOMIC-PIC-NEXT:    cas.w %d1, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.w %d1, %d3
+; ATOMIC-PIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.w %d1, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB5_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw nand ptr %ptr, i16 %val seq_cst
+  ret i16 %val
+}
+
+define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_min_4
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_min_i32:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_min_4@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_min_i32:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.l (12,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %d2
+; ATOMIC-NEXT:    bra .LBB6_1
+; ATOMIC-NEXT:  .LBB6_3: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB6_1 Depth=1
+; ATOMIC-NEXT:    move.l %d2, %d0
+; ATOMIC-NEXT:    cas.l %d0, %d3, (%a0)
+; ATOMIC-NEXT:    move.l %d0, %d3
+; ATOMIC-NEXT:    sub.l %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    beq .LBB6_4
+; ATOMIC-NEXT:  .LBB6_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.l %d2, %d0
+; ATOMIC-NEXT:    sub.l %d1, %d0
+; ATOMIC-NEXT:    move.l %d2, %d3
+; ATOMIC-NEXT:    ble .LBB6_3
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB6_1 Depth=1
+; ATOMIC-NEXT:    move.l %d1, %d3
+; ATOMIC-NEXT:    bra .LBB6_3
+; ATOMIC-NEXT:  .LBB6_4: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_min_i32:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (12,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %d2
+; ATOMIC-PIC-NEXT:    bra .LBB6_1
+; ATOMIC-PIC-NEXT:  .LBB6_3: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB6_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d2, %d0
+; ATOMIC-PIC-NEXT:    cas.l %d0, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.l %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.l %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.l %d0, %d2
+; ATOMIC-PIC-NEXT:    beq .LBB6_4
+; ATOMIC-PIC-NEXT:  .LBB6_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d2, %d0
+; ATOMIC-PIC-NEXT:    sub.l %d1, %d0
+; ATOMIC-PIC-NEXT:    move.l %d2, %d3
+; ATOMIC-PIC-NEXT:    ble .LBB6_3
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB6_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d1, %d3
+; ATOMIC-PIC-NEXT:    bra .LBB6_3
+; ATOMIC-PIC-NEXT:  .LBB6_4: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw min ptr %ptr, i32 %val acquire
+  ret i32 %old
+}
+
+define i64 @atomicrmw_max_i64(i64 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-NEXT:    bra .LBB7_1
+; NO-ATOMIC-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-NEXT:    jsr __atomic_compare_exchange_8
+; NO-ATOMIC-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-NEXT:    bne .LBB7_4
+; NO-ATOMIC-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-NEXT:    slt %d2
+; NO-ATOMIC-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-NEXT:    bne .LBB7_3
+; NO-ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-NEXT:    bra .LBB7_3
+; NO-ATOMIC-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_max_i64:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #52, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -56
+; NO-ATOMIC-PIC-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; NO-ATOMIC-PIC-NEXT:    move.l (60,%sp), %d3
+; NO-ATOMIC-PIC-NEXT:    move.l (56,%sp), %d4
+; NO-ATOMIC-PIC-NEXT:    move.l (64,%sp), %a2
+; NO-ATOMIC-PIC-NEXT:    move.l (4,%a2), %d1
+; NO-ATOMIC-PIC-NEXT:    move.l (%a2), %d0
+; NO-ATOMIC-PIC-NEXT:    lea (24,%sp), %a3
+; NO-ATOMIC-PIC-NEXT:    bra .LBB7_1
+; NO-ATOMIC-PIC-NEXT:  .LBB7_3: ; %atomicrmw.start
+; NO-ATOMIC-PIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-PIC-NEXT:    move.l %d1, (12,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (8,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #5, (20,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #5, (16,%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__atomic_compare_exchange_8@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; NO-ATOMIC-PIC-NEXT:    move.l (28,%sp), %d1
+; NO-ATOMIC-PIC-NEXT:    move.l (24,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-PIC-NEXT:    bne .LBB7_4
+; NO-ATOMIC-PIC-NEXT:  .LBB7_1: ; %atomicrmw.start
+; NO-ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (24,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l %d1, (28,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l %a2, (%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l %a3, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l %d3, %d2
+; NO-ATOMIC-PIC-NEXT:    sub.l %d1, %d2
+; NO-ATOMIC-PIC-NEXT:    move.l %d4, %d2
+; NO-ATOMIC-PIC-NEXT:    subx.l %d0, %d2
+; NO-ATOMIC-PIC-NEXT:    slt %d2
+; NO-ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; NO-ATOMIC-PIC-NEXT:    bne .LBB7_3
+; NO-ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; NO-ATOMIC-PIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; NO-ATOMIC-PIC-NEXT:    move.l %d3, %d1
+; NO-ATOMIC-PIC-NEXT:    move.l %d4, %d0
+; NO-ATOMIC-PIC-NEXT:    bra .LBB7_3
+; NO-ATOMIC-PIC-NEXT:  .LBB7_4: ; %atomicrmw.end
+; NO-ATOMIC-PIC-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; NO-ATOMIC-PIC-NEXT:    adda.l #52, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_max_i64:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #52, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -56
+; ATOMIC-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; ATOMIC-NEXT:    move.l (60,%sp), %d3
+; ATOMIC-NEXT:    move.l (56,%sp), %d4
+; ATOMIC-NEXT:    move.l (64,%sp), %a2
+; ATOMIC-NEXT:    move.l (4,%a2), %d1
+; ATOMIC-NEXT:    move.l (%a2), %d0
+; ATOMIC-NEXT:    lea (24,%sp), %a3
+; ATOMIC-NEXT:    bra .LBB7_1
+; ATOMIC-NEXT:  .LBB7_3: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; ATOMIC-NEXT:    move.l %d1, (12,%sp)
+; ATOMIC-NEXT:    move.l %d0, (8,%sp)
+; ATOMIC-NEXT:    move.l #5, (20,%sp)
+; ATOMIC-NEXT:    move.l #5, (16,%sp)
+; ATOMIC-NEXT:    jsr __atomic_compare_exchange_8
+; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    move.l (28,%sp), %d1
+; ATOMIC-NEXT:    move.l (24,%sp), %d0
+; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    bne .LBB7_4
+; ATOMIC-NEXT:  .LBB7_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.l %d0, (24,%sp)
+; ATOMIC-NEXT:    move.l %d1, (28,%sp)
+; ATOMIC-NEXT:    move.l %a2, (%sp)
+; ATOMIC-NEXT:    move.l %a3, (4,%sp)
+; ATOMIC-NEXT:    move.l %d3, %d2
+; ATOMIC-NEXT:    sub.l %d1, %d2
+; ATOMIC-NEXT:    move.l %d4, %d2
+; ATOMIC-NEXT:    subx.l %d0, %d2
+; ATOMIC-NEXT:    slt %d2
+; ATOMIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-NEXT:    bne .LBB7_3
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; ATOMIC-NEXT:    move.l %d3, %d1
+; ATOMIC-NEXT:    move.l %d4, %d0
+; ATOMIC-NEXT:    bra .LBB7_3
+; ATOMIC-NEXT:  .LBB7_4: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #52, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_max_i64:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #52, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -56
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d4/%a2-%a3, (32,%sp) ; 24-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (60,%sp), %d3
+; ATOMIC-PIC-NEXT:    move.l (56,%sp), %d4
+; ATOMIC-PIC-NEXT:    move.l (64,%sp), %a2
+; ATOMIC-PIC-NEXT:    move.l (4,%a2), %d1
+; ATOMIC-PIC-NEXT:    move.l (%a2), %d0
+; ATOMIC-PIC-NEXT:    lea (24,%sp), %a3
+; ATOMIC-PIC-NEXT:    bra .LBB7_1
+; ATOMIC-PIC-NEXT:  .LBB7_3: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d1, (12,%sp)
+; ATOMIC-PIC-NEXT:    move.l %d0, (8,%sp)
+; ATOMIC-PIC-NEXT:    move.l #5, (20,%sp)
+; ATOMIC-PIC-NEXT:    move.l #5, (16,%sp)
+; ATOMIC-PIC-NEXT:    jsr (__atomic_compare_exchange_8@PLT,%pc)
+; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    move.l (28,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (24,%sp), %d0
+; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB7_4
+; ATOMIC-PIC-NEXT:  .LBB7_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d0, (24,%sp)
+; ATOMIC-PIC-NEXT:    move.l %d1, (28,%sp)
+; ATOMIC-PIC-NEXT:    move.l %a2, (%sp)
+; ATOMIC-PIC-NEXT:    move.l %a3, (4,%sp)
+; ATOMIC-PIC-NEXT:    move.l %d3, %d2
+; ATOMIC-PIC-NEXT:    sub.l %d1, %d2
+; ATOMIC-PIC-NEXT:    move.l %d4, %d2
+; ATOMIC-PIC-NEXT:    subx.l %d0, %d2
+; ATOMIC-PIC-NEXT:    slt %d2
+; ATOMIC-PIC-NEXT:    cmpi.b #0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB7_3
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d3, %d1
+; ATOMIC-PIC-NEXT:    move.l %d4, %d0
+; ATOMIC-PIC-NEXT:    bra .LBB7_3
+; ATOMIC-PIC-NEXT:  .LBB7_4: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (32,%sp), %d2-%d4/%a2-%a3 ; 24-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #52, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw max ptr %ptr, i64 %val seq_cst
+  ret i64 %old
+}
+
+define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_umin_1
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_i8_umin:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.b (19,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #255, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_umin_1@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_i8_umin:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.b (15,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.b (%a0), %d2
+; ATOMIC-NEXT:    bra .LBB8_1
+; ATOMIC-NEXT:  .LBB8_3: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB8_1 Depth=1
+; ATOMIC-NEXT:    move.b %d2, %d0
+; ATOMIC-NEXT:    cas.b %d0, %d3, (%a0)
+; ATOMIC-NEXT:    move.b %d0, %d3
+; ATOMIC-NEXT:    sub.b %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    beq .LBB8_4
+; ATOMIC-NEXT:  .LBB8_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.b %d2, %d0
+; ATOMIC-NEXT:    sub.b %d1, %d0
+; ATOMIC-NEXT:    move.b %d2, %d3
+; ATOMIC-NEXT:    bls .LBB8_3
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB8_1 Depth=1
+; ATOMIC-NEXT:    move.b %d1, %d3
+; ATOMIC-NEXT:    bra .LBB8_3
+; ATOMIC-NEXT:  .LBB8_4: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_i8_umin:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.b (15,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.b (%a0), %d2
+; ATOMIC-PIC-NEXT:    bra .LBB8_1
+; ATOMIC-PIC-NEXT:  .LBB8_3: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB8_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.b %d2, %d0
+; ATOMIC-PIC-NEXT:    cas.b %d0, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.b %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.b %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    beq .LBB8_4
+; ATOMIC-PIC-NEXT:  .LBB8_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.b %d2, %d0
+; ATOMIC-PIC-NEXT:    sub.b %d1, %d0
+; ATOMIC-PIC-NEXT:    move.b %d2, %d3
+; ATOMIC-PIC-NEXT:    bls .LBB8_3
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB8_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.b %d1, %d3
+; ATOMIC-PIC-NEXT:    bra .LBB8_3
+; ATOMIC-PIC-NEXT:  .LBB8_4: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw umin ptr %ptr, i8 %val release
+  ret i8 %old
+}
+
+define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_umax_2
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_umax_i16:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0:
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_umax_2@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_umax_i16:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0:
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.w (14,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-NEXT:    bra .LBB9_1
+; ATOMIC-NEXT:  .LBB9_3: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB9_1 Depth=1
+; ATOMIC-NEXT:    move.w %d2, %d0
+; ATOMIC-NEXT:    cas.w %d0, %d3, (%a0)
+; ATOMIC-NEXT:    move.w %d0, %d3
+; ATOMIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    beq .LBB9_4
+; ATOMIC-NEXT:  .LBB9_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.w %d2, %d0
+; ATOMIC-NEXT:    sub.w %d1, %d0
+; ATOMIC-NEXT:    move.w %d2, %d3
+; ATOMIC-NEXT:    bhi .LBB9_3
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; in Loop: Header=BB9_1 Depth=1
+; ATOMIC-NEXT:    move.w %d1, %d3
+; ATOMIC-NEXT:    bra .LBB9_3
+; ATOMIC-NEXT:  .LBB9_4: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_umax_i16:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0:
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.w (14,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-PIC-NEXT:    bra .LBB9_1
+; ATOMIC-PIC-NEXT:  .LBB9_3: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB9_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.w %d2, %d0
+; ATOMIC-PIC-NEXT:    cas.w %d0, %d3, (%a0)
+; ATOMIC-PIC-NEXT:    move.w %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.w %d0, %d2
+; ATOMIC-PIC-NEXT:    beq .LBB9_4
+; ATOMIC-PIC-NEXT:  .LBB9_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.w %d2, %d0
+; ATOMIC-PIC-NEXT:    sub.w %d1, %d0
+; ATOMIC-PIC-NEXT:    move.w %d2, %d3
+; ATOMIC-PIC-NEXT:    bhi .LBB9_3
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; in Loop: Header=BB9_1 Depth=1
+; ATOMIC-PIC-NEXT:    move.w %d1, %d3
+; ATOMIC-PIC-NEXT:    bra .LBB9_3
+; ATOMIC-PIC-NEXT:  .LBB9_4: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+  %old = atomicrmw umax ptr %ptr, i16 %val seq_cst
+  ret i16 %old
+}
+
+define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_lock_test_and_set_2
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_xchg_i16:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.w (18,%sp), %d0
+; NO-ATOMIC-PIC-NEXT:    and.l #65535, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_lock_test_and_set_2@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_xchg_i16:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %entry
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.w (14,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-NEXT:    move.w %d2, %d0
+; ATOMIC-NEXT:  .LBB10_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    cas.w %d0, %d1, (%a0)
+; ATOMIC-NEXT:    move.w %d0, %d3
+; ATOMIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    bne .LBB10_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_xchg_i16:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %entry
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.w (14,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.w (%a0), %d2
+; ATOMIC-PIC-NEXT:    move.w %d2, %d0
+; ATOMIC-PIC-NEXT:  .LBB10_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    cas.w %d0, %d1, (%a0)
+; ATOMIC-PIC-NEXT:    move.w %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.w %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.w %d0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB10_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+entry:
+  %old = atomicrmw xchg ptr %ptr, i16 %val monotonic
+  ret i16 %old
+}
+
+define i32 @atomicrmw_xchg_i32(i32 %val, ptr %ptr) {
+; NO-ATOMIC-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_lock_test_and_set_4
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_xchg_i32:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %entry
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l (20,%sp), (%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_lock_test_and_set_4@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_xchg_i32:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %entry
+; ATOMIC-NEXT:    suba.l #8, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-NEXT:    move.l (12,%sp), %d1
+; ATOMIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %d2
+; ATOMIC-NEXT:    move.l %d2, %d0
+; ATOMIC-NEXT:  .LBB11_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    cas.l %d0, %d1, (%a0)
+; ATOMIC-NEXT:    move.l %d0, %d3
+; ATOMIC-NEXT:    sub.l %d2, %d3
+; ATOMIC-NEXT:    seq %d2
+; ATOMIC-NEXT:    sub.b #1, %d2
+; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    bne .LBB11_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #8, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_xchg_i32:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %entry
+; ATOMIC-PIC-NEXT:    suba.l #8, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -12
+; ATOMIC-PIC-NEXT:    movem.l %d2-%d3, (0,%sp) ; 12-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (12,%sp), %d1
+; ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %d2
+; ATOMIC-PIC-NEXT:    move.l %d2, %d0
+; ATOMIC-PIC-NEXT:  .LBB11_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    cas.l %d0, %d1, (%a0)
+; ATOMIC-PIC-NEXT:    move.l %d0, %d3
+; ATOMIC-PIC-NEXT:    sub.l %d2, %d3
+; ATOMIC-PIC-NEXT:    seq %d2
+; ATOMIC-PIC-NEXT:    sub.b #1, %d2
+; ATOMIC-PIC-NEXT:    move.l %d0, %d2
+; ATOMIC-PIC-NEXT:    bne .LBB11_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #8, %sp
+; ATOMIC-PIC-NEXT:    rts
+entry:
+  %old = atomicrmw xchg ptr %ptr, i32 %val monotonic
+  ret i32 %old
+}
+
+define i8 @atomicrmw_sub_i8_arid(ptr align 2 %self) {
+; NO-ATOMIC-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-NEXT:    add.l #4, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_1
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i8_arid:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_1@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_sub_i8_arid:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-NEXT:    suba.l #4, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -8
+; ATOMIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-NEXT:    move.l (8,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %a0
+; ATOMIC-NEXT:    move.b (4,%a0), %d1
+; ATOMIC-NEXT:    move.b %d1, %d0
+; ATOMIC-NEXT:  .LBB12_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.b %d1, %d2
+; ATOMIC-NEXT:    add.b #-1, %d2
+; ATOMIC-NEXT:    cas.b %d0, %d2, (4,%a0)
+; ATOMIC-NEXT:    move.b %d0, %d2
+; ATOMIC-NEXT:    sub.b %d1, %d2
+; ATOMIC-NEXT:    seq %d1
+; ATOMIC-NEXT:    sub.b #1, %d1
+; ATOMIC-NEXT:    move.b %d0, %d1
+; ATOMIC-NEXT:    bne .LBB12_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #4, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_sub_i8_arid:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-PIC-NEXT:    suba.l #4, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -8
+; ATOMIC-PIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %a0
+; ATOMIC-PIC-NEXT:    move.b (4,%a0), %d1
+; ATOMIC-PIC-NEXT:    move.b %d1, %d0
+; ATOMIC-PIC-NEXT:  .LBB12_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.b %d1, %d2
+; ATOMIC-PIC-NEXT:    add.b #-1, %d2
+; ATOMIC-PIC-NEXT:    cas.b %d0, %d2, (4,%a0)
+; ATOMIC-PIC-NEXT:    move.b %d0, %d2
+; ATOMIC-PIC-NEXT:    sub.b %d1, %d2
+; ATOMIC-PIC-NEXT:    seq %d1
+; ATOMIC-PIC-NEXT:    sub.b #1, %d1
+; ATOMIC-PIC-NEXT:    move.b %d0, %d1
+; ATOMIC-PIC-NEXT:    bne .LBB12_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #4, %sp
+; ATOMIC-PIC-NEXT:    rts
+start:
+  %self1 = load ptr, ptr %self, align 2
+  %_18.i.i = getelementptr inbounds i8, ptr %self1, i32 4
+  %6 = atomicrmw sub ptr %_18.i.i, i8 1 release, align 4
+  ret i8 %6
+}
+
+define i16 @atomicrmw_sub_i16_arid(ptr align 2 %self) {
+; NO-ATOMIC-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-NEXT:    add.l #4, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_2
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i16_arid:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_2@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_sub_i16_arid:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-NEXT:    suba.l #4, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -8
+; ATOMIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-NEXT:    move.l (8,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %a0
+; ATOMIC-NEXT:    move.w (4,%a0), %d1
+; ATOMIC-NEXT:    move.w %d1, %d0
+; ATOMIC-NEXT:  .LBB13_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.w %d1, %d2
+; ATOMIC-NEXT:    add.w #-1, %d2
+; ATOMIC-NEXT:    cas.w %d0, %d2, (4,%a0)
+; ATOMIC-NEXT:    move.w %d0, %d2
+; ATOMIC-NEXT:    sub.w %d1, %d2
+; ATOMIC-NEXT:    seq %d1
+; ATOMIC-NEXT:    sub.b #1, %d1
+; ATOMIC-NEXT:    move.w %d0, %d1
+; ATOMIC-NEXT:    bne .LBB13_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #4, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_sub_i16_arid:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-PIC-NEXT:    suba.l #4, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -8
+; ATOMIC-PIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %a0
+; ATOMIC-PIC-NEXT:    move.w (4,%a0), %d1
+; ATOMIC-PIC-NEXT:    move.w %d1, %d0
+; ATOMIC-PIC-NEXT:  .LBB13_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.w %d1, %d2
+; ATOMIC-PIC-NEXT:    add.w #-1, %d2
+; ATOMIC-PIC-NEXT:    cas.w %d0, %d2, (4,%a0)
+; ATOMIC-PIC-NEXT:    move.w %d0, %d2
+; ATOMIC-PIC-NEXT:    sub.w %d1, %d2
+; ATOMIC-PIC-NEXT:    seq %d1
+; ATOMIC-PIC-NEXT:    sub.b #1, %d1
+; ATOMIC-PIC-NEXT:    move.w %d0, %d1
+; ATOMIC-PIC-NEXT:    bne .LBB13_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #4, %sp
+; ATOMIC-PIC-NEXT:    rts
+start:
+  %self1 = load ptr, ptr %self, align 2
+  %_18.i.i = getelementptr inbounds i8, ptr %self1, i32 4
+  %6 = atomicrmw sub ptr %_18.i.i, i16 1 release, align 4
+  ret i16 %6
+}
+
+define i32 @atomicrmw_sub_i32_arid(ptr align 2 %self) {
+; NO-ATOMIC-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC:         .cfi_startproc
+; NO-ATOMIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-NEXT:    add.l #4, %d0
+; NO-ATOMIC-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-NEXT:    jsr __sync_fetch_and_sub_4
+; NO-ATOMIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-NEXT:    rts
+;
+; NO-ATOMIC-PIC-LABEL: atomicrmw_sub_i32_arid:
+; NO-ATOMIC-PIC:         .cfi_startproc
+; NO-ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; NO-ATOMIC-PIC-NEXT:    suba.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -16
+; NO-ATOMIC-PIC-NEXT:    move.l (16,%sp), %a0
+; NO-ATOMIC-PIC-NEXT:    move.l (%a0), %d0
+; NO-ATOMIC-PIC-NEXT:    add.l #4, %d0
+; NO-ATOMIC-PIC-NEXT:    move.l %d0, (%sp)
+; NO-ATOMIC-PIC-NEXT:    move.l #1, (4,%sp)
+; NO-ATOMIC-PIC-NEXT:    jsr (__sync_fetch_and_sub_4@PLT,%pc)
+; NO-ATOMIC-PIC-NEXT:    adda.l #12, %sp
+; NO-ATOMIC-PIC-NEXT:    rts
+;
+; ATOMIC-LABEL: atomicrmw_sub_i32_arid:
+; ATOMIC:         .cfi_startproc
+; ATOMIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-NEXT:    suba.l #4, %sp
+; ATOMIC-NEXT:    .cfi_def_cfa_offset -8
+; ATOMIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-NEXT:    move.l (8,%sp), %a0
+; ATOMIC-NEXT:    move.l (%a0), %a0
+; ATOMIC-NEXT:    move.l (4,%a0), %d1
+; ATOMIC-NEXT:    move.l %d1, %d0
+; ATOMIC-NEXT:  .LBB14_1: ; %atomicrmw.start
+; ATOMIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-NEXT:    move.l %d1, %d2
+; ATOMIC-NEXT:    add.l #-1, %d2
+; ATOMIC-NEXT:    cas.l %d0, %d2, (4,%a0)
+; ATOMIC-NEXT:    move.l %d0, %d2
+; ATOMIC-NEXT:    sub.l %d1, %d2
+; ATOMIC-NEXT:    seq %d1
+; ATOMIC-NEXT:    sub.b #1, %d1
+; ATOMIC-NEXT:    move.l %d0, %d1
+; ATOMIC-NEXT:    bne .LBB14_1
+; ATOMIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-NEXT:    adda.l #4, %sp
+; ATOMIC-NEXT:    rts
+;
+; ATOMIC-PIC-LABEL: atomicrmw_sub_i32_arid:
+; ATOMIC-PIC:         .cfi_startproc
+; ATOMIC-PIC-NEXT:  ; %bb.0: ; %start
+; ATOMIC-PIC-NEXT:    suba.l #4, %sp
+; ATOMIC-PIC-NEXT:    .cfi_def_cfa_offset -8
+; ATOMIC-PIC-NEXT:    movem.l %d2, (0,%sp) ; 8-byte Folded Spill
+; ATOMIC-PIC-NEXT:    move.l (8,%sp), %a0
+; ATOMIC-PIC-NEXT:    move.l (%a0), %a0
+; ATOMIC-PIC-NEXT:    move.l (4,%a0), %d1
+; ATOMIC-PIC-NEXT:    move.l %d1, %d0
+; ATOMIC-PIC-NEXT:  .LBB14_1: ; %atomicrmw.start
+; ATOMIC-PIC-NEXT:    ; =>This Inner Loop Header: Depth=1
+; ATOMIC-PIC-NEXT:    move.l %d1, %d2
+; ATOMIC-PIC-NEXT:    add.l #-1, %d2
+; ATOMIC-PIC-NEXT:    cas.l %d0, %d2, (4,%a0)
+; ATOMIC-PIC-NEXT:    move.l %d0, %d2
+; ATOMIC-PIC-NEXT:    sub.l %d1, %d2
+; ATOMIC-PIC-NEXT:    seq %d1
+; ATOMIC-PIC-NEXT:    sub.b #1, %d1
+; ATOMIC-PIC-NEXT:    move.l %d0, %d1
+; ATOMIC-PIC-NEXT:    bne .LBB14_1
+; ATOMIC-PIC-NEXT:  ; %bb.2: ; %atomicrmw.end
+; ATOMIC-PIC-NEXT:    movem.l (0,%sp), %d2 ; 8-byte Folded Reload
+; ATOMIC-PIC-NEXT:    adda.l #4, %sp
+; ATOMIC-PIC-NEXT:    rts
+start:
+  %self1 = load ptr, ptr %self, align 2
+  %_18.i.i = getelementptr inbounds i8, ptr %self1, i32 4
+  %6 = atomicrmw sub ptr %_18.i.i, i32 1 release, align 4
+  ret i32 %6
+}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/large-pic.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/large-pic.ll
index c937efa60b72..c937efa60b72 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/large-pic.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/large-pic.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/large-pie-global-access.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/large-pie-global-access.ll
index f82b961382fb..f82b961382fb 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/large-pie-global-access.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/large-pie-global-access.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/large-pie.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/large-pie.ll
index ad902528d1dd..ad902528d1dd 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/large-pie.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/large-pie.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/large-static.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/large-static.ll
index fb38cd9582bd..fb38cd9582bd 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/large-static.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/large-static.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-pic.ll
index 407bbd48bc7f..407bbd48bc7f 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-pic.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-pie-global-access.ll
index 3d398afe7dc4..3d398afe7dc4 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-pie-global-access.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/medium-pie.ll b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-pie.ll
index 18552f87d154..18552f87d154 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/medium-pie.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-pie.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/medium-static.ll b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-static.ll
index 79512dcc8639..79512dcc8639 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Medium/medium-static.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/small-pic.ll b/llvm/test/CodeGen/M68k/CodeModel/Small/small-pic.ll
index 37115953e5be..37115953e5be 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Small/small-pic.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll b/llvm/test/CodeGen/M68k/CodeModel/Small/small-pie-global-access.ll
index 030f72bb3753..030f72bb3753 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Small/small-pie-global-access.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/small-pie.ll b/llvm/test/CodeGen/M68k/CodeModel/Small/small-pie.ll
index 1456149ed12b..1456149ed12b 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/small-pie.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Small/small-pie.ll
diff --git a/llvm/test/CodeGen/M68k/CodeModel/small-static.ll b/llvm/test/CodeGen/M68k/CodeModel/Small/small-static.ll
index 1b946c19b250..1b946c19b250 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/small-static.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Small/small-static.ll