diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-22 13:15:39 -0500 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2021-01-07 13:13:25 -0500 |
| commit | c9122ddef5213fbdd2d82c473a74e1742010f62f (patch) | |
| tree | c5557f198c4c773422e8a9285a872f1214d0b688 /llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | |
| parent | cf5415c727dda0ea4b27ee16347d170f118b037b (diff) | |
CodeGen: Refactor regallocator command line and target selection
Make the sequence of passes to select and rewrite instructions to
physical registers be a target callback. This is to prepare to allow
targets to split register allocation into multiple phases.
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index 71e8e1485b75..af16d799d1dc 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -326,10 +326,10 @@ public: void addPreEmitPass() override; // No reg alloc - bool addRegAssignmentFast() override { return false; } + bool addRegAssignAndRewriteFast() override { return false; } // No reg alloc - bool addRegAssignmentOptimized() override { return false; } + bool addRegAssignAndRewriteOptimized() override { return false; } }; } // end anonymous namespace |