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| author | Emma Pilkington <Emma.Pilkington@amd.com> | 2025-06-19 11:00:27 -0400 |
|---|---|---|
| committer | Scott Linder <Scott.Linder@amd.com> | 2025-10-22 22:05:05 +0000 |
| commit | 0982e15677101297ee9d4b94761734216c7f9331 (patch) | |
| tree | 1d0cba8ffe2cda4a71583fbce1bf9a37c5cdc873 /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | 9a7f1273be2f8a3c8d067c84502d3d9601b76315 (diff) | |
[AMDGPU][MC] Replace shifted registers in CFI instructionsusers/slinder1/amdgpu-cfi-7
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index 2c275a85440d..c6dc40c0b3ef 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -386,6 +386,9 @@ void SIMachineFunctionInfo::shiftWwmVGPRsToLowestRange( if (RegItr != SpillPhysVGPRs.end()) { unsigned Idx = std::distance(SpillPhysVGPRs.begin(), RegItr); SpillPhysVGPRs[Idx] = NewReg; + + // For replacing registers used in the CFI instructions. + MF.replaceFrameInstRegister(Reg, NewReg); } // The generic `determineCalleeSaves` might have set the old register if it |