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| author | Peter Collingbourne <peter@pcc.me.uk> | 2025-07-18 13:26:00 -0700 |
|---|---|---|
| committer | Peter Collingbourne <peter@pcc.me.uk> | 2025-07-18 13:26:00 -0700 |
| commit | 9bf3524731070cadc6175707314f3b6ca37190d5 (patch) | |
| tree | 86dcab7604336b01ae938fe81062c29ff69efba8 /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | 3a84c15cc13b6daf8e812592898ab6c7f19091a9 (diff) | |
| parent | 4f43f0606c3d7e1ce6d069583b5e59f036e112ce (diff) | |
Created using spr 1.3.6-beta.1
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index 67ad28661da4..75ce67c00228 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -42,7 +42,7 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F, PrivateSegmentWaveByteOffset(false), WorkItemIDX(false), WorkItemIDY(false), WorkItemIDZ(false), ImplicitArgPtr(false), GITPtrHigh(0xffffffff), HighBitsOf32BitAddress(0) { - const GCNSubtarget &ST = *static_cast<const GCNSubtarget *>(STI); + const GCNSubtarget &ST = *STI; FlatWorkGroupSizes = ST.getFlatWorkGroupSizes(F); WavesPerEU = ST.getWavesPerEU(F); MaxNumWorkGroups = ST.getMaxNumWorkGroups(F); |