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| author | Arthur Eubanks <aeubanks@google.com> | 2024-06-27 16:32:27 -0700 |
|---|---|---|
| committer | shawbyoung <shawbyoung@gmail.com> | 2024-06-27 16:32:27 -0700 |
| commit | f5c7df12cacdb84552b36a7ac598a8db41acc680 (patch) | |
| tree | 3b33e941b9bfb88c40c64fd18ee32a633423cbed /llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | 608880c3a7a59c86db82728067e553a8d4665a45 (diff) | |
| parent | 804415825b97e974c96a92580bcbeaf4c7ff0a04 (diff) | |
[𝘀𝗽𝗿] changes introduced through rebaseusers/shawbyoung/spr/main.boltnfc-refactoring-callgraph
Created using spr 1.3.4
[skip ci]
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index 8cdb4ba0ade6..14b147cc5b01 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -369,6 +369,10 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) { case ISD::ABS: case ISD::ABDS: case ISD::ABDU: + case ISD::AVGCEILS: + case ISD::AVGCEILU: + case ISD::AVGFLOORS: + case ISD::AVGFLOORU: case ISD::BSWAP: case ISD::BITREVERSE: case ISD::CTLZ: @@ -445,6 +449,8 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) { case ISD::FP_TO_SINT_SAT: case ISD::FP_TO_UINT_SAT: case ISD::MGATHER: + case ISD::SCMP: + case ISD::UCMP: Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0)); break; case ISD::SMULFIX: @@ -918,6 +924,15 @@ void VectorLegalizer::Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results) { return; } break; + case ISD::AVGCEILS: + case ISD::AVGCEILU: + case ISD::AVGFLOORS: + case ISD::AVGFLOORU: + if (SDValue Expanded = TLI.expandAVG(Node, DAG)) { + Results.push_back(Expanded); + return; + } + break; case ISD::BITREVERSE: ExpandBITREVERSE(Node, Results); return; |
