summaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/MachineSink.cpp
diff options
context:
space:
mode:
authorJay Foad <jay.foad@amd.com>2023-04-17 21:09:19 +0100
committerJay Foad <jay.foad@amd.com>2023-04-18 13:29:41 +0100
commit14bc3748109c73adde7350da60366149ae0d4c3a (patch)
treef128f4284758154fef5856e6304e0078c95f5a7b /llvm/lib/CodeGen/MachineSink.cpp
parent83ae2d3618c1f959031e78573691f1ea86b7c809 (diff)
[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.
Differential Revision: https://reviews.llvm.org/D148613
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 56d27b88678a..5047503f9011 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -1700,8 +1700,8 @@ static void updateLiveIn(MachineInstr *MI, MachineBasicBlock *SuccBB,
MachineFunction &MF = *SuccBB->getParent();
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
for (unsigned DefReg : DefedRegsInCopy)
- for (MCSubRegIterator S(DefReg, TRI, true); S.isValid(); ++S)
- SuccBB->removeLiveIn(*S);
+ for (MCPhysReg S : TRI->subregs_inclusive(DefReg))
+ SuccBB->removeLiveIn(S);
for (auto U : UsedOpsInCopy) {
Register SrcReg = MI->getOperand(U).getReg();
LaneBitmask Mask;