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authorCraig Topper <craig.topper@sifive.com>2023-01-13 14:38:08 -0800
committerCraig Topper <craig.topper@sifive.com>2023-01-13 14:38:08 -0800
commite72ca520bb4806d4003ef69698089fd83a5777cb (patch)
treed0ae50a1b48efe90bce1b4398ceb3cad1e33f7b3 /llvm/lib/CodeGen/MachineOperand.cpp
parent2ca4b4f82e993d31c67a0e595ca584f860cd6811 (diff)
[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D141715
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineOperand.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 62b7f776f165..0a7b12e9ccb9 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -118,7 +118,7 @@ void MachineOperand::setIsDef(bool Val) {
bool MachineOperand::isRenamable() const {
assert(isReg() && "Wrong MachineOperand accessor");
- assert(Register::isPhysicalRegister(getReg()) &&
+ assert(getReg().isPhysical() &&
"isRenamable should only be checked on physical registers");
if (!IsRenamable)
return false;
@@ -136,7 +136,7 @@ bool MachineOperand::isRenamable() const {
void MachineOperand::setIsRenamable(bool Val) {
assert(isReg() && "Wrong MachineOperand accessor");
- assert(Register::isPhysicalRegister(getReg()) &&
+ assert(getReg().isPhysical() &&
"setIsRenamable should only be called on physical registers");
IsRenamable = Val;
}
@@ -800,13 +800,13 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
OS << "undef ";
if (isEarlyClobber())
OS << "early-clobber ";
- if (Register::isPhysicalRegister(getReg()) && isRenamable())
+ if (getReg().isPhysical() && isRenamable())
OS << "renamable ";
// isDebug() is exactly true for register operands of a DBG_VALUE. So we
// simply infer it when parsing and do not need to print it.
const MachineRegisterInfo *MRI = nullptr;
- if (Register::isVirtualRegister(Reg)) {
+ if (Reg.isVirtual()) {
if (const MachineFunction *MF = getMFIfAvailable(*this)) {
MRI = &MF->getRegInfo();
}
@@ -821,7 +821,7 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
OS << ".subreg" << SubReg;
}
// Print the register class / bank.
- if (Register::isVirtualRegister(Reg)) {
+ if (Reg.isVirtual()) {
if (const MachineFunction *MF = getMFIfAvailable(*this)) {
const MachineRegisterInfo &MRI = MF->getRegInfo();
if (IsStandalone || !PrintDef || MRI.def_empty(Reg)) {