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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-09-21 10:42:03 -0400 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-09-22 09:51:15 -0400 |
| commit | 94ebd7d9ff1776bbc94ca6ac82a783fa9d4eaa72 (patch) | |
| tree | 8ec4d1605b39e27926c3b7b15bedf148dc63b343 /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | c2e76f914c9ac0dd15e4a8040a5e277333f91f97 (diff) | |
MachineVerifier: Verify REG_SEQUENCE
Somehow there was no verification of this, other than an ad-hoc
assertion in TwoAddressInstructions.
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineOperand.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index df52741bc4b9..797b3ded8b27 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -531,7 +531,7 @@ static void printFrameIndex(raw_ostream& OS, int FrameIndex, bool IsFixed, void MachineOperand::printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI) { OS << "%subreg."; - if (TRI) + if (TRI && Index != 0 && Index < TRI->getNumSubRegIndices()) OS << TRI->getSubRegIndexName(Index); else OS << Index; |