diff options
| author | Craig Topper <craig.topper@sifive.com> | 2025-01-25 22:53:10 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2025-01-25 23:12:14 -0800 |
| commit | 37fdde6025c8ead27a7608643b63e0d4498211e2 (patch) | |
| tree | 77d173f7d62b1a1a56802d50f9c30bbbf48929e3 /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | 753028bc81c1a556eaaaf45ac77ca0cf4c7a3b4a (diff) | |
[CodeGen] Remove implict conversions from Register to unsigned from MachineOperand. NFC
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineOperand.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index d11ac614ace3..f498491164e1 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -71,13 +71,13 @@ void MachineOperand::setReg(Register Reg) { if (MachineFunction *MF = getMFIfAvailable(*this)) { MachineRegisterInfo &MRI = MF->getRegInfo(); MRI.removeRegOperandFromUseList(this); - SmallContents.RegNo = Reg; + SmallContents.RegNo = Reg.id(); MRI.addRegOperandToUseList(this); return; } // Otherwise, just change the register, no problem. :) - SmallContents.RegNo = Reg; + SmallContents.RegNo = Reg.id(); } void MachineOperand::substVirtReg(Register Reg, unsigned SubIdx, @@ -291,7 +291,7 @@ void MachineOperand::ChangeToRegister(Register Reg, bool isDef, bool isImp, assert(!(isDead && !isDef) && "Dead flag on non-def"); assert(!(isKill && isDef) && "Kill flag on def"); OpKind = MO_Register; - SmallContents.RegNo = Reg; + SmallContents.RegNo = Reg.id(); SubReg_TargetFlags = 0; IsDef = isDef; IsImp = isImp; @@ -390,7 +390,8 @@ hash_code llvm::hash_value(const MachineOperand &MO) { switch (MO.getType()) { case MachineOperand::MO_Register: // Register operands don't have target flags. - return hash_combine(MO.getType(), (unsigned)MO.getReg(), MO.getSubReg(), MO.isDef()); + return hash_combine(MO.getType(), MO.getReg().id(), MO.getSubReg(), + MO.isDef()); case MachineOperand::MO_Immediate: return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getImm()); case MachineOperand::MO_CImmediate: |