diff options
| author | Eli Friedman <efriedma@codeaurora.org> | 2018-11-14 00:39:29 +0000 |
|---|---|---|
| committer | Eli Friedman <efriedma@codeaurora.org> | 2018-11-14 00:39:29 +0000 |
| commit | 6bdabcf368f4c6526cfb3af49c03a98d680b8e8f (patch) | |
| tree | f2d25949e1b94426e9caa7bc7672fad0eeb5267e /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | 2d2e23e89b83ce9c7c2fec011abe16da74711b54 (diff) | |
[CodeGen] Fix forward scan in MachineBasicBlock::computeRegisterLiveness.
The scan was incorrectly skipping the first instruction, so a register
could appear to be dead when it was actually live. This eventually leads
to a machine verifier failure and miscompile in arm-ldst-opt.
Differential Revision: https://reviews.llvm.org/D54491
llvm-svn: 346821
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineBasicBlock.cpp | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp index 0b9ee462d1ae..03771bc5dae1 100644 --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -1380,24 +1380,21 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI, // Try searching forwards from Before, looking for reads or defs. const_iterator I(Before); - // If this is the last insn in the block, don't search forwards. - if (I != end()) { - for (++I; I != end() && N > 0; ++I) { - if (I->isDebugInstr()) - continue; + for (; I != end() && N > 0; ++I) { + if (I->isDebugInstr()) + continue; - --N; + --N; - MachineOperandIteratorBase::PhysRegInfo Info = - ConstMIOperands(*I).analyzePhysReg(Reg, TRI); + MachineOperandIteratorBase::PhysRegInfo Info = + ConstMIOperands(*I).analyzePhysReg(Reg, TRI); - // Register is live when we read it here. - if (Info.Read) - return LQR_Live; - // Register is dead if we can fully overwrite or clobber it here. - if (Info.FullyDefined || Info.Clobbered) - return LQR_Dead; - } + // Register is live when we read it here. + if (Info.Read) + return LQR_Live; + // Register is dead if we can fully overwrite or clobber it here. + if (Info.FullyDefined || Info.Clobbered) + return LQR_Dead; } // If we reached the end, it is safe to clobber Reg at the end of a block of |
