diff options
| author | Amir Ayupov <aaupov@fb.com> | 2025-06-08 17:43:02 -0700 |
|---|---|---|
| committer | Amir Ayupov <aaupov@fb.com> | 2025-06-08 17:43:02 -0700 |
| commit | 68b99df7ad1b910378c8cda5afff637fbe3c0efc (patch) | |
| tree | 1d2e51419c3f89a0909603d355598c27f1a92d42 /llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp | |
| parent | bbbecc425389aeb7b93d9018b40a95b389c27f40 (diff) | |
| parent | c480dcddd91e3ff0707d6629e6ddac8587d9d1f1 (diff) | |
[𝘀𝗽𝗿] changes introduced through rebaseusers/aaupov/spr/main.bolt-sort-entrydata
Created using spr 1.3.4
[skip ci]
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp | 46 |
1 files changed, 33 insertions, 13 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp index 692befde71cb..6650ad25bed0 100644 --- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp +++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp @@ -222,12 +222,11 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known, // Collect the known bits that are shared by every demanded vector element. Known.Zero.setAllBits(); Known.One.setAllBits(); - for (unsigned i = 0, e = MI.getNumOperands() - 1; i < e; ++i) { - if (!DemandedElts[i]) + for (const auto &[I, MO] : enumerate(drop_begin(MI.operands()))) { + if (!DemandedElts[I]) continue; - computeKnownBitsImpl(MI.getOperand(i + 1).getReg(), Known2, APInt(1, 1), - Depth + 1); + computeKnownBitsImpl(MO.getReg(), Known2, APInt(1, 1), Depth + 1); // Known bits are the values that are shared by every demanded element. Known = Known.intersectWith(Known2); @@ -683,14 +682,12 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known, Known.One.setAllBits(); unsigned NumSubVectorElts = MRI.getType(MI.getOperand(1).getReg()).getNumElements(); - unsigned NumSubVectors = MI.getNumOperands() - 1; - for (unsigned i = 0; i != NumSubVectors; ++i) { + for (const auto &[I, MO] : enumerate(drop_begin(MI.operands()))) { APInt DemandedSub = - DemandedElts.extractBits(NumSubVectorElts, i * NumSubVectorElts); + DemandedElts.extractBits(NumSubVectorElts, I * NumSubVectorElts); if (!!DemandedSub) { - computeKnownBitsImpl(MI.getOperand(i + 1).getReg(), Known2, DemandedSub, - Depth + 1); + computeKnownBitsImpl(MO.getReg(), Known2, DemandedSub, Depth + 1); Known = Known.intersectWith(Known2); } @@ -1944,12 +1941,35 @@ unsigned GISelValueTracking::computeNumSignBits(Register R, // Collect the known bits that are shared by every demanded vector element. FirstAnswer = TyBits; APInt SingleDemandedElt(1, 1); - for (unsigned i = 0, e = MI.getNumOperands() - 1; i < e; ++i) { - if (!DemandedElts[i]) + for (const auto &[I, MO] : enumerate(drop_begin(MI.operands()))) { + if (!DemandedElts[I]) + continue; + + unsigned Tmp2 = + computeNumSignBits(MO.getReg(), SingleDemandedElt, Depth + 1); + FirstAnswer = std::min(FirstAnswer, Tmp2); + + // If we don't know any bits, early out. + if (FirstAnswer == 1) + break; + } + break; + } + case TargetOpcode::G_CONCAT_VECTORS: { + if (MRI.getType(MI.getOperand(0).getReg()).isScalableVector()) + break; + FirstAnswer = TyBits; + // Determine the minimum number of sign bits across all demanded + // elts of the input vectors. Early out if the result is already 1. + unsigned NumSubVectorElts = + MRI.getType(MI.getOperand(1).getReg()).getNumElements(); + for (const auto &[I, MO] : enumerate(drop_begin(MI.operands()))) { + APInt DemandedSub = + DemandedElts.extractBits(NumSubVectorElts, I * NumSubVectorElts); + if (!DemandedSub) continue; + unsigned Tmp2 = computeNumSignBits(MO.getReg(), DemandedSub, Depth + 1); - unsigned Tmp2 = computeNumSignBits(MI.getOperand(i + 1).getReg(), - SingleDemandedElt, Depth + 1); FirstAnswer = std::min(FirstAnswer, Tmp2); // If we don't know any bits, early out. |
