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| author | Piotr Sobczak <Piotr.Sobczak@amd.com> | 2020-07-23 19:26:49 +0200 |
|---|---|---|
| committer | Piotr Sobczak <Piotr.Sobczak@amd.com> | 2020-07-27 09:24:11 +0200 |
| commit | 590dd73c6ebdc9fe1314dfa5bda5c2367d866574 (patch) | |
| tree | 44d0a2cf47451a79aa6b988165f35da8c4cb570f /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 14bc85e0ebb6c00c1672158ab6a692bfbb11e1cc (diff) | |
[AMDGPU] Make generating cache invalidating instructions optional
Summary:
D78800 skipped generating cache invalidating instrucions altogether
on AMDPAL. However, this is sometimes too restrictive - we want a
more flexible option to be able to toggle this behaviour on and off
while we work towards developing a correct implementation of the
alternative memory model.
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, dexonsmith, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D84448
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions