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| author | David Sherwood <david.sherwood@arm.com> | 2022-10-26 10:40:02 +0000 |
|---|---|---|
| committer | David Sherwood <david.sherwood@arm.com> | 2022-11-02 08:39:03 +0000 |
| commit | be369ea31b98f23c7d8e7a83ea4a1b4cf76b544f (patch) | |
| tree | 5369e96bb9014d14aa7f62a9d4a649885183aaba /lldb/source/Plugins/ScriptInterpreter/Python/ScriptedProcessPythonInterface.cpp | |
| parent | 870fbf8e300f3012470593ac087219a04d52857f (diff) | |
[AArch64][SVE2] Add the SVE2.1 while & pext predicate pair instructions
This patch adds the assembly/disassembly for the following
predicate pair instructions:
pext: Set pair of predicates from predicate-as-counter
whilelt: While incrementing signed scalar less than scalar
whilele: While incrementing signed scalar less than or equal to scalar
whilegt: While incrementing signed scalar greater than scalar
whilege: While incrementing signed scalar greater than or equal to scalar
whilelo: While incrementing unsigned scalar lower than scalar
whilels: While incrementing unsigned scalar lower or same as scalar
whilehs: While decrementing unsigned scalar higher or same as scalar
whilehi: While decrementing unsigned scalar higher than scalar
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
Differential Revision: https://reviews.llvm.org/D136759
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptedProcessPythonInterface.cpp')
0 files changed, 0 insertions, 0 deletions