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authorSanjay Patel <spatel@rotateright.com>2022-02-02 08:01:23 -0500
committerSanjay Patel <spatel@rotateright.com>2022-02-02 08:17:53 -0500
commit6592bcecd4ffc03f72d23f81bcb8d51f8ebeb07d (patch)
treeb129024a4ccf8cd2f8939eba01153cb69988787a /lldb/source/Plugins/ScriptInterpreter/Python/ScriptedProcessPythonInterface.cpp
parentccf02cdf17d68a7dd4411daa74b81fa5b48d0a0c (diff)
[x86] invert a vector select IR canonicalization with a binop identity constant
This is an intentionally limited/different form of D90113. That patch bravely tries to generalize folds where we pull a binop into the arms of a select: N0 + (Cond ? 0 : FVal) --> Cond ? N0 : (N0 + FVal) ...but it is not universally profitable. This is the inverse of IR canonicalization as discussed in D113442. We know that this transform is not entirely profitable even within x86, so we only handle x86 vector fadd/fsub as a 1st step. The intent is to prevent AVX512 regressions as mentioned in D113442. The plan is to port this to DAGCombiner (so it will eventually look more like D90113) and add more types/cases in pieces with many more tests to verify that we are seeing improvements. Differential Revision: https://reviews.llvm.org/D118644
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