diff options
| author | Mehdi Amini <joker.eph@gmail.com> | 2025-08-14 15:36:46 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-14 15:36:46 +0200 |
| commit | df57d6a01e85ca78da2febab21b268d9fd6955a0 (patch) | |
| tree | 19b0aab453e6bc7e2b15d3220024dfdacd4fa57e /clang | |
| parent | df86ea61b7ed484ca797f96d7ad40fd9ada7ba30 (diff) | |
| parent | 7bda76367f19cfc19086f68d9dd5ac019a9ceccd (diff) | |
Merge branch 'main' into users/joker-eph-python-bindings-maintainersusers/joker-eph-python-bindings-maintainers
Diffstat (limited to 'clang')
99 files changed, 2368 insertions, 1553 deletions
diff --git a/clang/docs/LanguageExtensions.rst b/clang/docs/LanguageExtensions.rst index eef3d0c4ccb9..2db1bae918ad 100644 --- a/clang/docs/LanguageExtensions.rst +++ b/clang/docs/LanguageExtensions.rst @@ -760,7 +760,8 @@ Unless specified otherwise operation(±0) = ±0 and operation(±infinity) = ±in The integer elementwise intrinsics, including ``__builtin_elementwise_popcount``, ``__builtin_elementwise_bitreverse``, ``__builtin_elementwise_add_sat``, ``__builtin_elementwise_sub_sat``, ``__builtin_elementwise_max``, -``__builtin_elementwise_min`` can be called in a ``constexpr`` context. +``__builtin_elementwise_min``, and ``__builtin_elementwise_abs`` +can be called in a ``constexpr`` context. No implicit promotion of integer types takes place. The mixing of integer types of different sizes and signs is forbidden in binary and ternary builtins. diff --git a/clang/docs/OpenMPSupport.rst b/clang/docs/OpenMPSupport.rst index 1f502db53587..6f86e0ac4f44 100644 --- a/clang/docs/OpenMPSupport.rst +++ b/clang/docs/OpenMPSupport.rst @@ -191,7 +191,7 @@ implementation. +------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
| device | teams construct on the host device | :good:`done` | r371553 |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
-| device | support non-contiguous array sections for target update | :good:`done` | https://github.com/llvm/llvm-project/pull/144635 |
+| device | support non-contiguous array sections for target update | :good:`done` | https://github.com/llvm/llvm-project/pull/144635 |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
| device | pointer attachment | :good:`done` | |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
@@ -338,7 +338,7 @@ implementation. +------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
| OMPT | new 'emi' callbacks for external monitoring interfaces | :good:`done` | |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
-| OMPT | device tracing interface | :none:`unclaimed` | |
+| OMPT | device tracing interface | :none:`in progress` | jplehr |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
| task | 'strict' modifier for taskloop construct | :none:`unclaimed` | |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
@@ -376,7 +376,7 @@ implementation. +-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
| loop stripe transformation | :good:`done` | https://github.com/llvm/llvm-project/pull/119891 |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
-| work distribute construct | :none:`unclaimed` | :none:`unclaimed` | |
+| workdistribute construct | | :none:`in progress` | @skc7, @mjklemm |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
| task_iteration | :none:`unclaimed` | :none:`unclaimed` | |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
@@ -470,12 +470,16 @@ implementation. | need_device_addr modifier for adjust_args clause | :part:`partial` | :none:`unclaimed` | Parsing/Sema: https://github.com/llvm/llvm-project/pull/143442 |
| | | | https://github.com/llvm/llvm-project/pull/149586 |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
-| Prescriptive num_threads | :part:`In Progress` | :none:`unclaimed` | |
+| Prescriptive num_threads | :part:`In Progress` | :none:`unclaimed` | ro-i |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
-| Message and severity clauses | :part:`In Progress` | :none:`unclaimed` | |
+| Message and severity clauses | :part:`In Progress` | :none:`unclaimed` | ro-i |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
| Local clause on declare target | :part:`In Progress` | :none:`unclaimed` | |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
+| groupprivate directive | :part:`In Progress` | :none:`unclaimed` | |
++-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
+| variable-category on default clause | :part:`In Progress` | :none:`unclaimed` | |
++-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
| Changes to omp_target_is_accessible | :part:`In Progress` | :part:`In Progress` | |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index af576f817700..e23b7a1267ac 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -115,6 +115,8 @@ Non-comprehensive list of changes in this release ------------------------------------------------- - Added ``__builtin_elementwise_fshl`` and ``__builtin_elementwise_fshr``. +- ``__builtin_elementwise_abs`` can now be used in constant expression. + - Added ``__builtin_elementwise_minnumnum`` and ``__builtin_elementwise_maxnumnum``. - Trapping UBSan (e.g. ``-fsanitize-trap=undefined``) now emits a string describing the reason for @@ -155,6 +157,21 @@ Improvements to Clang's diagnostics - Fixed fix-it hint for fold expressions. Clang now correctly places the suggested right parenthesis when diagnosing malformed fold expressions. (#GH151787) +- Fixed an issue where emitted format-signedness diagnostics were not associated with an appropriate + diagnostic id. Besides being incorrect from an API standpoint, this was user visible, e.g.: + "format specifies type 'unsigned int' but the argument has type 'int' [-Wformat]" + "signedness of format specifier 'u' is incompatible with 'c' [-Wformat]" + This was misleading, because even though -Wformat is required in order to emit the diagnostics, + the warning flag the user needs to concerned with here is -Wformat-signedness, which is also + required and is not enabled by default. With the change you'll now see: + "format specifies type 'unsigned int' but the argument has type 'int', which differs in signedness [-Wformat-signedness]" + "signedness of format specifier 'u' is incompatible with 'c' [-Wformat-signedness]" + and the API-visible diagnostic id will be appropriate. + +- Fixed false positives in ``-Waddress-of-packed-member`` diagnostics when + potential misaligned members get processed before they can get discarded. + (#GH144729) + Improvements to Clang's time-trace ---------------------------------- @@ -181,6 +198,9 @@ Bug Fixes to Attribute Support - ``[[nodiscard]]`` is now respected on Objective-C and Objective-C++ methods. (#GH141504) +- Fixes some late parsed attributes, when applied to function definitions, not being parsed + in function try blocks, and some situations where parsing of the function body + is skipped, such as error recovery and code completion. (#GH153551) - Using ``[[gnu::cleanup(some_func)]]`` where some_func is annotated with ``[[gnu::error("some error")]]`` now correctly triggers an error. (#GH146520) @@ -194,12 +214,15 @@ Bug Fixes to C++ Support - Fix the dynamic_cast to final class optimization to correctly handle casts that are guaranteed to fail (#GH137518). - Fix bug rejecting partial specialization of variable templates with auto NTTPs (#GH118190). +- Fix a crash when using ``explicit(bool)`` in pre-C++11 language modes. (#GH152729) +- Fix the parsing of variadic member functions when the ellipis immediately follows a default argument.(#GH153445) Bug Fixes to AST Handling ^^^^^^^^^^^^^^^^^^^^^^^^^ - Fix incorrect name qualifiers applied to alias CTAD. (#GH136624) - Fixed ElaboratedTypes appearing within NestedNameSpecifier, which was not a legal representation. This is fixed because ElaboratedTypes don't exist anymore. (#GH43179) (#GH68670) (#GH92757) +- Fix comment lexing of special command names (#GH152943) Miscellaneous Bug Fixes ^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/clang/include/clang/AST/APValue.h b/clang/include/clang/AST/APValue.h index 9999a30c51ad..cb942ea865e2 100644 --- a/clang/include/clang/AST/APValue.h +++ b/clang/include/clang/AST/APValue.h @@ -143,7 +143,7 @@ public: AddrLabelDiff }; - class LValueBase { + class alignas(uint64_t) LValueBase { typedef llvm::PointerUnion<const ValueDecl *, const Expr *, TypeInfoLValue, DynamicAllocLValue> PtrTy; diff --git a/clang/include/clang/Basic/Builtins.td b/clang/include/clang/Basic/Builtins.td index 84206cf8b368..604c9cddfe05 100644 --- a/clang/include/clang/Basic/Builtins.td +++ b/clang/include/clang/Basic/Builtins.td @@ -1264,7 +1264,7 @@ def NondetermenisticValue : Builtin { def ElementwiseAbs : Builtin { let Spellings = ["__builtin_elementwise_abs"]; - let Attributes = [NoThrow, Const, CustomTypeChecking]; + let Attributes = [NoThrow, Const, CustomTypeChecking, Constexpr]; let Prototype = "void(...)"; } diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td b/clang/include/clang/Basic/DiagnosticSemaKinds.td index 116341f4b66d..a7f3d3782307 100644 --- a/clang/include/clang/Basic/DiagnosticSemaKinds.td +++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td @@ -10423,9 +10423,10 @@ def warn_format_conversion_argument_type_mismatch : Warning< def warn_format_conversion_argument_type_mismatch_pedantic : Extension< warn_format_conversion_argument_type_mismatch.Summary>, InGroup<FormatPedantic>; -def warn_format_conversion_argument_type_mismatch_signedness : Warning< - warn_format_conversion_argument_type_mismatch.Summary>, - InGroup<FormatSignedness>, DefaultIgnore; +def warn_format_conversion_argument_type_mismatch_signedness: Warning< + "format specifies type %0 but the argument has %select{type|underlying " + "type}2 %1, which differs in signedness" > + , InGroup<FormatSignedness>, DefaultIgnore; def warn_format_conversion_argument_type_mismatch_confusion : Warning< warn_format_conversion_argument_type_mismatch.Summary>, InGroup<FormatTypeConfusion>, DefaultIgnore; @@ -10537,8 +10538,10 @@ def warn_format_cmp_sensitivity_mismatch : Warning< "it should be %select{unspecified|private|public|sensitive}1">, InGroup<Format>; def warn_format_cmp_specifier_mismatch : Warning< "format specifier '%0' is incompatible with '%1'">, InGroup<Format>; -def warn_format_cmp_specifier_sign_mismatch : Warning< - "signedness of format specifier '%0' is incompatible with '%1'">, InGroup<Format>; +def warn_format_cmp_specifier_sign_mismatch + : Warning<"signedness of format specifier '%0' is incompatible with '%1'">, + InGroup<FormatSignedness>, + DefaultIgnore; def warn_format_cmp_specifier_mismatch_pedantic : Extension< warn_format_cmp_specifier_sign_mismatch.Summary>, InGroup<FormatPedantic>; def note_format_cmp_with : Note< @@ -13529,7 +13532,7 @@ def err_acc_invalid_modifier def err_acc_invalid_default_type : Error<"invalid value %0 in '%1' clause; valid values are %2">; def err_acc_device_type_multiple_archs - : Error<"OpenACC 'device_type' clause on a 'set' construct only permits " + : Error<"OpenACC 'device_type' clause on a '%0' construct only permits " "one architecture">; def warn_acc_var_referenced_non_const_array : Warning<"variable of array type %0 referenced in OpenACC '%1' clause " diff --git a/clang/include/clang/Basic/Features.def b/clang/include/clang/Basic/Features.def index c58e3f2400ad..0f6cd005bfd0 100644 --- a/clang/include/clang/Basic/Features.def +++ b/clang/include/clang/Basic/Features.def @@ -155,6 +155,7 @@ FEATURE(ptrauth_vtable_pointer_address_discrimination, LangOpts.PointerAuthVTPtr FEATURE(ptrauth_vtable_pointer_type_discrimination, LangOpts.PointerAuthVTPtrTypeDiscrimination) FEATURE(ptrauth_type_info_vtable_pointer_discrimination, LangOpts.PointerAuthTypeInfoVTPtrDiscrimination) FEATURE(ptrauth_member_function_pointer_type_discrimination, LangOpts.PointerAuthCalls) +FEATURE(ptrauth_signed_block_descriptors, LangOpts.PointerAuthCalls) FEATURE(ptrauth_function_pointer_type_discrimination, LangOpts.PointerAuthFunctionTypeDiscrimination) FEATURE(ptrauth_indirect_gotos, LangOpts.PointerAuthIndirectGotos) FEATURE(ptrauth_init_fini, LangOpts.PointerAuthInitFini) diff --git a/clang/include/clang/Basic/PointerAuthOptions.h b/clang/include/clang/Basic/PointerAuthOptions.h index fb6dddf3ae9c..2b920250721f 100644 --- a/clang/include/clang/Basic/PointerAuthOptions.h +++ b/clang/include/clang/Basic/PointerAuthOptions.h @@ -23,6 +23,10 @@ namespace clang { +/// Constant discriminator to be used with block descriptor pointers. The value +/// is ptrauth_string_discriminator("block_descriptor") +constexpr uint16_t BlockDescriptorConstantDiscriminator = 0xC0BB; + /// Constant discriminator to be used with function pointers in .init_array and /// .fini_array. The value is ptrauth_string_discriminator("init_fini") constexpr uint16_t InitFiniPointerConstantDiscriminator = 0xD9D4; @@ -223,6 +227,18 @@ struct PointerAuthOptions { /// The ABI for function addresses in .init_array and .fini_array PointerAuthSchema InitFiniPointers; + /// The ABI for block invocation function pointers. + PointerAuthSchema BlockInvocationFunctionPointers; + + /// The ABI for block object copy/destroy function pointers. + PointerAuthSchema BlockHelperFunctionPointers; + + /// The ABI for __block variable copy/destroy function pointers. + PointerAuthSchema BlockByrefHelperFunctionPointers; + + /// The ABI for pointers to block descriptors. + PointerAuthSchema BlockDescriptorPointers; + /// The ABI for Objective-C method lists. PointerAuthSchema ObjCMethodListFunctionPointers; diff --git a/clang/include/clang/Basic/TokenKinds.h b/clang/include/clang/Basic/TokenKinds.h index 1b133dde8958..d84f3598cbf3 100644 --- a/clang/include/clang/Basic/TokenKinds.h +++ b/clang/include/clang/Basic/TokenKinds.h @@ -95,10 +95,20 @@ inline bool isStringLiteral(TokenKind K) { /// Return true if this is a "literal" kind, like a numeric /// constant, string, etc. inline bool isLiteral(TokenKind K) { - return K == tok::numeric_constant || K == tok::char_constant || - K == tok::wide_char_constant || K == tok::utf8_char_constant || - K == tok::utf16_char_constant || K == tok::utf32_char_constant || - isStringLiteral(K) || K == tok::header_name || K == tok::binary_data; + const bool isInLiteralRange = + K >= tok::numeric_constant && K <= tok::utf32_string_literal; + +#if !NDEBUG + const bool isLiteralExplicit = + K == tok::numeric_constant || K == tok::char_constant || + K == tok::wide_char_constant || K == tok::utf8_char_constant || + K == tok::utf16_char_constant || K == tok::utf32_char_constant || + isStringLiteral(K) || K == tok::header_name || K == tok::binary_data; + assert(isInLiteralRange == isLiteralExplicit && + "TokenKind literals should be contiguous"); +#endif + + return isInLiteralRange; } /// Return true if this is any of tok::annot_* kinds. diff --git a/clang/include/clang/Basic/arm_sme.td b/clang/include/clang/Basic/arm_sme.td index c491eb0f7e46..a4eb92e76968 100644 --- a/clang/include/clang/Basic/arm_sme.td +++ b/clang/include/clang/Basic/arm_sme.td @@ -21,23 +21,21 @@ let SVETargetGuard = InvalidMode in { // Loads multiclass ZALoad<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { - let SMETargetGuard = "sme" in { - def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimPQ", t, - [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], - MemEltTyDefault, i_prefix # "_horiz", ch>; - - def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimPQl", t, - [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], - MemEltTyDefault, i_prefix # "_horiz", ch>; - - def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimPQ", t, - [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], - MemEltTyDefault, i_prefix # "_vert", ch>; - - def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimPQl", t, - [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], - MemEltTyDefault, i_prefix # "_vert", ch>; - } + def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimPQ", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimPQl", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimPQ", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_vert", ch>; + + def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimPQl", t, + [IsLoad, IsOverloadNone, IsStreaming, IsInOutZA], + MemEltTyDefault, i_prefix # "_vert", ch>; } defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, ImmCheck0_0>]>; @@ -46,7 +44,6 @@ defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, ImmCheck0 defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, ImmCheck0_7>]>; defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, ImmCheck0_15>]>; -let SMETargetGuard = "sme" in { def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmQl", "", [IsOverloadNone, IsStreamingCompatible, IsInOutZA], MemEltTyDefault, "aarch64_sme_ldr">; @@ -54,29 +51,26 @@ def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmQl", "", def SVLDR_ZA : MInst<"svldr_za", "vmQ", "", [IsOverloadNone, IsStreamingCompatible, IsInOutZA], MemEltTyDefault, "aarch64_sme_ldr", []>; -} //////////////////////////////////////////////////////////////////////////////// // Stores multiclass ZAStore<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { - let SMETargetGuard = "sme" in { - def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimP%", t, - [IsStore, IsOverloadNone, IsStreaming, IsInZA], - MemEltTyDefault, i_prefix # "_horiz", ch>; - - def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimP%l", t, - [IsStore, IsOverloadNone, IsStreaming, IsInZA], - MemEltTyDefault, i_prefix # "_horiz", ch>; - - def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimP%", t, - [IsStore, IsOverloadNone, IsStreaming, IsInZA], - MemEltTyDefault, i_prefix # "_vert", ch>; - - def NAME # _V_VNUM : MInst<"svst1_ver_vnum_" # n_suffix, "vimP%l", t, - [IsStore, IsOverloadNone, IsStreaming, IsInZA], - MemEltTyDefault, i_prefix # "_vert", ch>; - } + def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimP%", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimP%l", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_horiz", ch>; + + def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimP%", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_vert", ch>; + + def NAME # _V_VNUM : MInst<"svst1_ver_vnum_" # n_suffix, "vimP%l", t, + [IsStore, IsOverloadNone, IsStreaming, IsInZA], + MemEltTyDefault, i_prefix # "_vert", ch>; } defm SVST1_ZA8 : ZAStore<"za8", "c", "aarch64_sme_st1b", [ImmCheck<0, ImmCheck0_0>]>; @@ -85,7 +79,6 @@ defm SVST1_ZA32 : ZAStore<"za32", "i", "aarch64_sme_st1w", [ImmCheck<0, ImmCheck defm SVST1_ZA64 : ZAStore<"za64", "l", "aarch64_sme_st1d", [ImmCheck<0, ImmCheck0_7>]>; defm SVST1_ZA128 : ZAStore<"za128", "q", "aarch64_sme_st1q", [ImmCheck<0, ImmCheck0_15>]>; -let SMETargetGuard = "sme" in { def SVSTR_VNUM_ZA : MInst<"svstr_vnum_za", "vm%l", "", [IsOverloadNone, IsStreamingCompatible, IsInZA], MemEltTyDefault, "aarch64_sme_str">; @@ -93,21 +86,18 @@ def SVSTR_VNUM_ZA : MInst<"svstr_vnum_za", "vm%l", "", def SVSTR_ZA : MInst<"svstr_za", "vm%", "", [IsOverloadNone, IsStreamingCompatible, IsInZA], MemEltTyDefault, "aarch64_sme_str", []>; -} //////////////////////////////////////////////////////////////////////////////// // Read horizontal/vertical ZA slices multiclass ZARead<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { - let SMETargetGuard = "sme" in { - def NAME # _H : SInst<"svread_hor_" # n_suffix # "[_{d}]", "ddPim", t, - MergeOp1, i_prefix # "_horiz", - [IsReadZA, IsStreaming, IsInZA], ch>; - - def NAME # _V : SInst<"svread_ver_" # n_suffix # "[_{d}]", "ddPim", t, - MergeOp1, i_prefix # "_vert", - [IsReadZA, IsStreaming, IsInZA], ch>; - } + def NAME # _H : SInst<"svread_hor_" # n_suffix # "[_{d}]", "ddPim", t, + MergeOp1, i_prefix # "_horiz", + [IsReadZA, IsStreaming, IsInZA], ch>; + + def NAME # _V : SInst<"svread_ver_" # n_suffix # "[_{d}]", "ddPim", t, + MergeOp1, i_prefix # "_vert", + [IsReadZA, IsStreaming, IsInZA], ch>; } defm SVREAD_ZA8 : ZARead<"za8", "cUcm", "aarch64_sme_read", [ImmCheck<2, ImmCheck0_0>]>; @@ -120,15 +110,13 @@ defm SVREAD_ZA128 : ZARead<"za128", "csilUcUsUiUlmhbfd", "aarch64_sme_readq", [I // Write horizontal/vertical ZA slices multiclass ZAWrite<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> { - let SMETargetGuard = "sme" in { - def NAME # _H : SInst<"svwrite_hor_" # n_suffix # "[_{d}]", "vimPd", t, - MergeOp1, i_prefix # "_horiz", - [IsWriteZA, IsStreaming, IsInOutZA], ch>; - - def NAME # _V : SInst<"svwrite_ver_" # n_suffix # "[_{d}]", "vimPd", t, - MergeOp1, i_prefix # "_vert", - [IsWriteZA, IsStreaming, IsInOutZA], ch>; - } + def NAME # _H : SInst<"svwrite_hor_" # n_suffix # "[_{d}]", "vimPd", t, + MergeOp1, i_prefix # "_horiz", + [IsWriteZA, IsStreaming, IsInOutZA], ch>; + + def NAME # _V : SInst<"svwrite_ver_" # n_suffix # "[_{d}]", "vimPd", t, + MergeOp1, i_prefix # "_vert", + [IsWriteZA, IsStreaming, IsInOutZA], ch>; } defm SVWRITE_ZA8 : ZAWrite<"za8", "cUcm", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_0>]>; @@ -140,13 +128,11 @@ defm SVWRITE_ZA128 : ZAWrite<"za128", "csilUcUsUiUlmhbfd", "aarch64_sme_writeq", //////////////////////////////////////////////////////////////////////////////// // SME - Zero -let SMETargetGuard = "sme" in { - def SVZERO_MASK_ZA : SInst<"svzero_mask_za", "vi", "", MergeNone, "aarch64_sme_zero", - [IsOverloadNone, IsStreamingCompatible, IsInOutZA], - [ImmCheck<0, ImmCheck0_255>]>; - def SVZERO_ZA : SInst<"svzero_za", "vv", "", MergeNone, "aarch64_sme_zero", - [IsOverloadNone, IsStreamingCompatible, IsOutZA]>; -} +def SVZERO_MASK_ZA : SInst<"svzero_mask_za", "vi", "", MergeNone, "aarch64_sme_zero", + [IsOverloadNone, IsStreamingCompatible, IsInOutZA], + [ImmCheck<0, ImmCheck0_255>]>; +def SVZERO_ZA : SInst<"svzero_za", "vv", "", MergeNone, "aarch64_sme_zero", + [IsOverloadNone, IsStreamingCompatible, IsOutZA]>; let SMETargetGuard = "sme2p1" in { def SVZERO_ZA64_VG1x2 : SInst<"svzero_za64_vg1x2", "vm", "", MergeNone, "aarch64_sme_zero_za64_vg1x2", @@ -171,11 +157,9 @@ let SMETargetGuard = "sme2p1" in { // SME - Counting elements in a streaming vector multiclass ZACount<string n_suffix> { - let SMETargetGuard = "sme" in { - def NAME : SInst<"sv" # n_suffix, "nv", "", MergeNone, - "aarch64_sme_" # n_suffix, - [IsOverloadNone, IsStreamingCompatible]>; - } + def NAME : SInst<"sv" # n_suffix, "nv", "", MergeNone, + "aarch64_sme_" # n_suffix, + [IsOverloadNone, IsStreamingCompatible]>; } defm SVCNTSB : ZACount<"cntsb">; @@ -187,11 +171,9 @@ defm SVCNTSD : ZACount<"cntsd">; // SME - ADDHA/ADDVA multiclass ZAAdd<string n_suffix> { - let SMETargetGuard = "sme" in { - def NAME # _ZA32: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPd", "iUi", MergeOp1, - "aarch64_sme_" # n_suffix, [IsStreaming, IsInOutZA], - [ImmCheck<0, ImmCheck0_3>]>; - } + def NAME # _ZA32: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPd", "iUi", MergeOp1, + "aarch64_sme_" # n_suffix, [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; let SMETargetGuard = "sme-i16i64" in { def NAME # _ZA64: SInst<"sv" # n_suffix # "_za64[_{d}]", "viPPd", "lUl", MergeOp1, @@ -207,13 +189,11 @@ defm SVADDVA : ZAAdd<"addva">; // SME - SMOPA, SMOPS, UMOPA, UMOPS multiclass ZAIntOuterProd<string n_suffix1, string n_suffix2> { - let SMETargetGuard = "sme" in { - def NAME # _ZA32_B: SInst<"sv" # n_suffix2 # "_za32[_{d}]", - "viPPdd", !cond(!eq(n_suffix1, "s") : "", true: "U") # "c", - MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", - [IsStreaming, IsInOutZA], - [ImmCheck<0, ImmCheck0_3>]>; - } + def NAME # _ZA32_B: SInst<"sv" # n_suffix2 # "_za32[_{d}]", + "viPPdd", !cond(!eq(n_suffix1, "s") : "", true: "U") # "c", + MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; let SMETargetGuard = "sme-i16i64" in { def NAME # _ZA64_H: SInst<"sv" # n_suffix2 # "_za64[_{d}]", @@ -233,14 +213,12 @@ defm SVUMOPS : ZAIntOuterProd<"u", "mops">; // SME - SUMOPA, SUMOPS, USMOPA, USMOPS multiclass ZAIntOuterProdMixedSigns<string n_suffix1, string n_suffix2> { - let SMETargetGuard = "sme" in { - def NAME # _ZA32_B: SInst<"sv" # n_suffix1 # n_suffix2 # "_za32[_{d}]", - "viPPd" # !cond(!eq(n_suffix1, "su") : "u", true: "x"), - !cond(!eq(n_suffix1, "su") : "", true: "U") # "c", - MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", - [IsStreaming, IsInOutZA], - [ImmCheck<0, ImmCheck0_3>]>; - } + def NAME # _ZA32_B: SInst<"sv" # n_suffix1 # n_suffix2 # "_za32[_{d}]", + "viPPd" # !cond(!eq(n_suffix1, "su") : "u", true: "x"), + !cond(!eq(n_suffix1, "su") : "", true: "U") # "c", + MergeOp1, "aarch64_sme_" # n_suffix1 # n_suffix2 # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; let SMETargetGuard = "sme-i16i64" in { def NAME # _ZA64_H: SInst<"sv" # n_suffix1 # n_suffix2 # "_za64[_{d}]", @@ -261,22 +239,20 @@ defm SVUSMOPS : ZAIntOuterProdMixedSigns<"us", "mops">; // SME - FMOPA, FMOPS multiclass ZAFPOuterProd<string n_suffix> { - let SMETargetGuard = "sme" in { - def NAME # _ZA32_B: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "h", - MergeOp1, "aarch64_sme_" # n_suffix # "_wide", - [IsStreaming, IsInOutZA], - [ImmCheck<0, ImmCheck0_3>]>; + def NAME # _ZA32_B: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "h", + MergeOp1, "aarch64_sme_" # n_suffix # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; - def NAME # _ZA32_H: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "b", - MergeOp1, "aarch64_sme_" # n_suffix # "_wide", - [IsStreaming, IsInOutZA], - [ImmCheck<0, ImmCheck0_3>]>; + def NAME # _ZA32_H: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "b", + MergeOp1, "aarch64_sme_" # n_suffix # "_wide", + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; - def NAME # _ZA32_S: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "f", - MergeOp1, "aarch64_sme_" # n_suffix, - [IsStreaming, IsInOutZA], - [ImmCheck<0, ImmCheck0_3>]>; - } + def NAME # _ZA32_S: SInst<"sv" # n_suffix # "_za32[_{d}]", "viPPdd", "f", + MergeOp1, "aarch64_sme_" # n_suffix, + [IsStreaming, IsInOutZA], + [ImmCheck<0, ImmCheck0_3>]>; let SMETargetGuard = "sme-f64f64" in { def NAME # _ZA64_D: SInst<"sv" # n_suffix # "_za64[_{d}]", "viPPdd", "d", diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td index 7513a3e79bdf..9ba07d879590 100644 --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -36,7 +36,7 @@ def SVLD1UH_VNUM : MInst<"svld1uh_vnum_{d}", "dPXl", "ilUiUl", [IsLoa def SVLD1SW_VNUM : MInst<"svld1sw_vnum_{d}", "dPUl", "lUl", [IsLoad, VerifyRuntimeMode], MemEltTyInt32, "aarch64_sve_ld1">; def SVLD1UW_VNUM : MInst<"svld1uw_vnum_{d}", "dPYl", "lUl", [IsLoad, IsZExtReturn, VerifyRuntimeMode], MemEltTyInt32, "aarch64_sve_ld1">; -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { // Load one vector (vector base) def SVLD1_GATHER_BASES_U : MInst<"svld1_gather[_{2}base]_{d}", "dPu", "ilUiUlfd", [IsGatherLoad], MemEltTyDefault, "aarch64_sve_ld1_gather_scalar_offset">; def SVLD1SB_GATHER_BASES_U : MInst<"svld1sb_gather[_{2}base]_{d}", "dPu", "ilUiUl", [IsGatherLoad], MemEltTyInt8, "aarch64_sve_ld1_gather_scalar_offset">; @@ -134,7 +134,7 @@ def SVLDFF1SW_VNUM : MInst<"svldff1sw_vnum_{d}", "dPUl", "lUl", [I def SVLDFF1UW_VNUM : MInst<"svldff1uw_vnum_{d}", "dPYl", "lUl", [IsLoad, IsZExtReturn], MemEltTyInt32, "aarch64_sve_ldff1">; } -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { // First-faulting load one vector (vector base) def SVLDFF1_GATHER_BASES_U : MInst<"svldff1_gather[_{2}base]_{d}", "dPu", "ilUiUlfd", [IsGatherLoad], MemEltTyDefault, "aarch64_sve_ldff1_gather_scalar_offset">; def SVLDFF1SB_GATHER_BASES_U : MInst<"svldff1sb_gather[_{2}base]_{d}", "dPu", "ilUiUl", [IsGatherLoad], MemEltTyInt8, "aarch64_sve_ldff1_gather_scalar_offset">; @@ -251,15 +251,15 @@ def SVLD3_VNUM : SInst<"svld3_vnum[_{2}]", "3Pcl", "csilUcUsUiUlhfdbm", MergeNon def SVLD4_VNUM : SInst<"svld4_vnum[_{2}]", "4Pcl", "csilUcUsUiUlhfdbm", MergeNone, "aarch64_sve_ld4_sret", [IsStructLoad, VerifyRuntimeMode]>; // Load one octoword and replicate (scalar base) -let SVETargetGuard = "sve,f64mm", SMETargetGuard = InvalidMode in { +let SVETargetGuard = "f64mm", SMETargetGuard = InvalidMode in { def SVLD1RO : SInst<"svld1ro[_{2}]", "dPc", "csilUcUsUiUlhfdbm", MergeNone, "aarch64_sve_ld1ro">; } -let SVETargetGuard = "sve,bf16", SMETargetGuard = InvalidMode in { +let SVETargetGuard = "bf16", SMETargetGuard = InvalidMode in { def SVBFMMLA : SInst<"svbfmmla[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmmla", [IsOverloadNone]>; } -let SVETargetGuard = "sve,bf16", SMETargetGuard = "sme,bf16" in { +let SVETargetGuard = "bf16", SMETargetGuard = "bf16" in { def SVBFDOT : SInst<"svbfdot[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfdot", [IsOverloadNone, VerifyRuntimeMode]>; def SVBFMLALB : SInst<"svbfmlalb[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmlalb", [IsOverloadNone, VerifyRuntimeMode]>; def SVBFMLALT : SInst<"svbfmlalt[_{0}]", "MMdd", "b", MergeNone, "aarch64_sve_bfmlalt", [IsOverloadNone, VerifyRuntimeMode]>; @@ -326,7 +326,7 @@ def SVST1H_VNUM_U : MInst<"svst1h_vnum[_{d}]", "vPFld", "UiUl", [Is def SVST1W_VNUM_S : MInst<"svst1w_vnum[_{d}]", "vPCld", "l", [IsStore, VerifyRuntimeMode], MemEltTyInt32, "aarch64_sve_st1">; def SVST1W_VNUM_U : MInst<"svst1w_vnum[_{d}]", "vPGld", "Ul", [IsStore, VerifyRuntimeMode], MemEltTyInt32, "aarch64_sve_st1">; -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { // Store one vector (vector base) def SVST1_SCATTER_BASES_U : MInst<"svst1_scatter[_{2}base_{d}]", "vPud", "ilUiUlfd", [IsScatterStore], MemEltTyDefault, "aarch64_sve_st1_scatter_scalar_offset">; def SVST1B_SCATTER_BASES_U : MInst<"svst1b_scatter[_{2}base_{d}]", "vPud", "ilUiUl", [IsScatterStore], MemEltTyInt8, "aarch64_sve_st1_scatter_scalar_offset">; @@ -464,7 +464,7 @@ def SVPRFH_VNUM : MInst<"svprfh_vnum", "vPQlJ", "s", [IsPrefetch, VerifyRuntimeM def SVPRFW_VNUM : MInst<"svprfw_vnum", "vPQlJ", "i", [IsPrefetch, VerifyRuntimeMode], MemEltTyInt32, "aarch64_sve_prf">; def SVPRFD_VNUM : MInst<"svprfd_vnum", "vPQlJ", "l", [IsPrefetch, VerifyRuntimeMode], MemEltTyInt64, "aarch64_sve_prf">; -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { // Prefetch (Vector bases) def SVPRFB_GATHER_BASES : MInst<"svprfb_gather[_{2}base]", "vPdJ", "UiUl", [IsGatherPrefetch], MemEltTyInt8, "aarch64_sve_prfb_gather_scalar_offset">; def SVPRFH_GATHER_BASES : MInst<"svprfh_gather[_{2}base]", "vPdJ", "UiUl", [IsGatherPrefetch], MemEltTyInt16, "aarch64_sve_prfh_gather_scalar_offset">; @@ -502,7 +502,7 @@ def SVPRFD_GATHER_BASES_OFFSET : MInst<"svprfd_gather[_{2}base]_index", "vPdlJ" //////////////////////////////////////////////////////////////////////////////// // Address calculations -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { def SVADRB : SInst<"svadrb[_{0}base]_[{2}]offset", "uud", "ilUiUl", MergeNone, "aarch64_sve_adrb">; def SVADRH : SInst<"svadrh[_{0}base]_[{2}]index", "uud", "ilUiUl", MergeNone, "aarch64_sve_adrh">; def SVADRW : SInst<"svadrw[_{0}base]_[{2}]index", "uud", "ilUiUl", MergeNone, "aarch64_sve_adrw">; @@ -778,11 +778,11 @@ defm SVRINTX : SInstZPZ<"svrintx", "hfd", "aarch64_sve_frintx">; defm SVRINTZ : SInstZPZ<"svrintz", "hfd", "aarch64_sve_frintz">; defm SVSQRT : SInstZPZ<"svsqrt", "hfd", "aarch64_sve_fsqrt">; -let SVETargetGuard = "sve", SMETargetGuard = "sme2,ssve-fexpa" in { +let SMETargetGuard = "sme2,ssve-fexpa" in { def SVEXPA : SInst<"svexpa[_{d}]", "du", "hfd", MergeNone, "aarch64_sve_fexpa_x", [VerifyRuntimeMode]>; } -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { def SVTMAD : SInst<"svtmad[_{d}]", "dddi", "hfd", MergeNone, "aarch64_sve_ftmad_x", [], [ImmCheck<2, ImmCheck0_7>]>; def SVTSMUL : SInst<"svtsmul[_{d}]", "ddu", "hfd", MergeNone, "aarch64_sve_ftsmul_x">; def SVTSSEL : SInst<"svtssel[_{d}]", "ddu", "hfd", MergeNone, "aarch64_sve_ftssel_x">; @@ -825,7 +825,7 @@ def SVRSQRTS : SInst<"svrsqrts[_{d}]", "ddd", "hfd", MergeNone, "aarch64_sve_frs //////////////////////////////////////////////////////////////////////////////// // Floating-point reductions -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { def SVFADDA : SInst<"svadda[_{d}]", "sPsd", "hfd", MergeNone, "aarch64_sve_fadda">; } @@ -946,14 +946,14 @@ defm SVFCVT_F32_F64 : SInstCvtMXZ<"svcvt_f32[_f64]", "MMPd", "MPd", "d", "aarc defm SVFCVT_F64_F16 : SInstCvtMXZ<"svcvt_f64[_f16]", "ddPO", "dPO", "d", "aarch64_sve_fcvt_f64f16">; defm SVFCVT_F64_F32 : SInstCvtMXZ<"svcvt_f64[_f32]", "ddPM", "dPM", "d", "aarch64_sve_fcvt_f64f32">; -let SVETargetGuard = "sve,bf16", SMETargetGuard = "sme,bf16" in { +let SVETargetGuard = "bf16", SMETargetGuard = "bf16" in { defm SVCVT_BF16_F32 : SInstCvtMXZ<"svcvt_bf16[_f32]", "$$Pd", "$Pd", "f", "aarch64_sve_fcvt_bf16f32_v2">; def SVCVTNT_BF16_F32 : SInst<"svcvtnt_bf16[_f32]", "$$Pd", "f", MergeOp1, "aarch64_sve_fcvtnt_bf16f32_v2", [IsOverloadNone, VerifyRuntimeMode]>; // SVCVTNT_X_BF16_F32 : Implemented as macro by SveEmitter.cpp } -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { defm SVCVTLT_F32_F16 : SInstCvtMX<"svcvtlt_f32[_f16]", "ddPh", "dPh", "f", "aarch64_sve_fcvtlt_f32f16">; defm SVCVTLT_F64_F32 : SInstCvtMX<"svcvtlt_f64[_f32]", "ddPh", "dPh", "d", "aarch64_sve_fcvtlt_f64f32">; @@ -980,8 +980,8 @@ defm SVCLASTA_N : SVEPerm<"svclasta[_n_{d}]", "sPsd", "aarch64_sve_clasta_n">; defm SVCLASTB : SVEPerm<"svclastb[_{d}]", "dPdd", "aarch64_sve_clastb">; defm SVCLASTB_N : SVEPerm<"svclastb[_n_{d}]", "sPsd", "aarch64_sve_clastb_n">; -let SVETargetGuard = "sve", SMETargetGuard = "sme2p2" in { -def SVCOMPACT : SInst<"svcompact[_{d}]", "dPd", "ilUiUlfd", MergeNone, "aarch64_sve_compact", [VerifyRuntimeMode]>; +let SMETargetGuard = "sme2p2" in { +def SVCOMPACT : SInst<"svcompact[_{d}]", "dPd", "ilUiUlfd", MergeNone, "aarch64_sve_compact", [VerifyRuntimeMode]>; } // Note: svdup_lane is implemented using the intrinsic for TBL to represent a @@ -1088,7 +1088,7 @@ def SVPTEST_LAST : SInst<"svptest_last", "sPP", "Pc", MergeNone, "aarch64_sve_ //////////////////////////////////////////////////////////////////////////////// // FFR manipulation -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { +let SMETargetGuard = InvalidMode in { def SVRDFFR : SInst<"svrdffr", "Pv", "Pc", MergeNone, "", [IsOverloadNone]>; def SVRDFFR_Z : SInst<"svrdffr_z", "PP", "Pc", MergeNone, "", [IsOverloadNone]>; def SVSETFFR : SInst<"svsetffr", "vv", "", MergeNone, "", [IsOverloadNone]>; @@ -1173,13 +1173,13 @@ def SVQINCP_N_S64 : SInst<"svqincp[_n_s64]_{d}", "llP", "PcPsPiPl", MergeNone, " def SVQINCP_N_U32 : SInst<"svqincp[_n_u32]_{d}", "mmP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n32", [VerifyRuntimeMode]>; def SVQINCP_N_U64 : SInst<"svqincp[_n_u64]_{d}", "nnP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n64", [VerifyRuntimeMode]>; -let SVETargetGuard = "sve,i8mm", SMETargetGuard = InvalidMode in { +let SVETargetGuard = "i8mm", SMETargetGuard = InvalidMode in { def SVMLLA_S32 : SInst<"svmmla[_s32]", "ddqq","i", MergeNone, "aarch64_sve_smmla">; def SVMLLA_U32 : SInst<"svmmla[_u32]", "ddqq","Ui", MergeNone, "aarch64_sve_ummla">; def SVUSMLLA_S32 : SInst<"svusmmla[_s32]", "ddbq","i", MergeNone, "aarch64_sve_usmmla">; } -let SVETargetGuard = "sve,i8mm", SMETargetGuard = "sme,i8mm"in { +let SVETargetGuard = "i8mm", SMETargetGuard = "i8mm"in { def SVUSDOT_S : SInst<"svusdot[_s32]", "ddbq", "i", MergeNone, "aarch64_sve_usdot", [VerifyRuntimeMode]>; def SVUSDOT_N_S : SInst<"svusdot[_n_s32]", "ddbr", "i", MergeNone, "aarch64_sve_usdot", [VerifyRuntimeMode]>; def SVSUDOT_S : SInst<"svsudot[_s32]", "ddqb", "i", MergeNone, "aarch64_sve_usdot", [ReverseUSDOT, VerifyRuntimeMode]>; @@ -1189,11 +1189,11 @@ def SVUSDOT_LANE_S : SInst<"svusdot_lane[_s32]", "ddbqi", "i", MergeNone, "aarc def SVSUDOT_LANE_S : SInst<"svsudot_lane[_s32]", "ddqbi", "i", MergeNone, "aarch64_sve_sudot_lane", [VerifyRuntimeMode], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; } -let SVETargetGuard = "sve,f32mm", SMETargetGuard = InvalidMode in { +let SVETargetGuard = "f32mm", SMETargetGuard = InvalidMode in { def SVMLLA_F32 : SInst<"svmmla[_f32]", "dddd","f", MergeNone, "aarch64_sve_fmmla">; } -let SVETargetGuard = "sve,f64mm", SMETargetGuard = InvalidMode in { +let SVETargetGuard = "f64mm", SMETargetGuard = InvalidMode in { def SVMLLA_F64 : SInst<"svmmla[_f64]", "dddd", "d", MergeNone, "aarch64_sve_fmmla">; def SVTRN1Q : SInst<"svtrn1q[_{d}]", "ddd", "csilUcUsUiUlhfdb", MergeNone, "aarch64_sve_trn1q">; @@ -1243,7 +1243,7 @@ let SVETargetGuard = "sve2p1|sme2", SMETargetGuard = "sve2p1|sme2" in { //////////////////////////////////////////////////////////////////////////////// // SVE2 WhileGE/GT -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVWHILEGE_S32 : SInst<"svwhilege_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilege", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>; def SVWHILEGE_S64 : SInst<"svwhilege_{d}[_{1}]", "Pll", "PcPsPiPl", MergeNone, "aarch64_sve_whilege", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>; def SVWHILEGT_S32 : SInst<"svwhilegt_{d}[_{1}]", "Pkk", "PcPsPiPl", MergeNone, "aarch64_sve_whilegt", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>; @@ -1268,7 +1268,7 @@ let SVETargetGuard = "sve2p1|sme2", SMETargetGuard = "sve2p1|sme2" in { //////////////////////////////////////////////////////////////////////////////// // SVE2 - Uniform DSP operations -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { defm SVQADD_S : SInstZPZZ<"svqadd", "csli", "aarch64_sve_sqadd", "aarch64_sve_sqadd">; defm SVQADD_U : SInstZPZZ<"svqadd", "UcUsUiUl", "aarch64_sve_uqadd", "aarch64_sve_uqadd">; defm SVHADD_S : SInstZPZZ<"svhadd", "csli", "aarch64_sve_shadd", "aarch64_sve_shadd">; @@ -1303,7 +1303,7 @@ multiclass SInstZPZxZ<string name, string types, string pat_v, string pat_n, str def _N_Z : SInst<name # "[_n_{d}]", pat_n, types, MergeZero, intrinsic, flags>; } -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { defm SVQRSHL_S : SInstZPZxZ<"svqrshl", "csil", "dPdx", "dPdK", "aarch64_sve_sqrshl", [VerifyRuntimeMode]>; defm SVQRSHL_U : SInstZPZxZ<"svqrshl", "UcUsUiUl", "dPdx", "dPdK", "aarch64_sve_uqrshl", [VerifyRuntimeMode]>; defm SVQSHL_S : SInstZPZxZ<"svqshl", "csil", "dPdx", "dPdK", "aarch64_sve_sqshl", [VerifyRuntimeMode]>; @@ -1357,7 +1357,7 @@ multiclass SInstPairwise<string name, string types, string intrinsic, list<FlagT def _X : SInst<name # "[_{d}]", "dPdd", types, MergeAny, intrinsic, flags>; } -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { defm SVADDP : SInstPairwise<"svaddp", "csliUcUsUiUl", "aarch64_sve_addp", [VerifyRuntimeMode]>; defm SVADDP_F : SInstPairwise<"svaddp", "hfd", "aarch64_sve_faddp", [VerifyRuntimeMode]>; defm SVMAXNMP : SInstPairwise<"svmaxnmp", "hfd", "aarch64_sve_fmaxnmp", [VerifyRuntimeMode]>; @@ -1373,7 +1373,7 @@ defm SVMINP_U : SInstPairwise<"svminp", "UcUsUiUl", "aarch64_sve_uminp", [ //////////////////////////////////////////////////////////////////////////////// // SVE2 - Widening pairwise arithmetic -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVADALP_S_M : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeOp1, "aarch64_sve_sadalp", [VerifyRuntimeMode]>; def SVADALP_S_X : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeAny, "aarch64_sve_sadalp", [VerifyRuntimeMode]>; def SVADALP_S_Z : SInst<"svadalp[_{d}]", "dPdh", "sil", MergeZero, "aarch64_sve_sadalp", [VerifyRuntimeMode]>; @@ -1387,7 +1387,7 @@ def SVADALP_U_Z : SInst<"svadalp[_{d}]", "dPdh", "UsUiUl", MergeZero, "aarch64_s // SVE2 - Bitwise ternary logical instructions // -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVBCAX : SInst<"svbcax[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bcax", [VerifyRuntimeMode]>; def SVBSL : SInst<"svbsl[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl", [VerifyRuntimeMode]>; def SVBSL1N : SInst<"svbsl1n[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_bsl1n", [VerifyRuntimeMode]>; @@ -1407,7 +1407,7 @@ def SVXAR_N : SInst<"svxar[_n_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aar //////////////////////////////////////////////////////////////////////////////// // SVE2 - Large integer arithmetic -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVADCLB : SInst<"svadclb[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_adclb", [VerifyRuntimeMode]>; def SVADCLT : SInst<"svadclt[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_adclt", [VerifyRuntimeMode]>; def SVSBCLB : SInst<"svsbclb[_{d}]", "dddd", "UiUl", MergeNone, "aarch64_sve_sbclb", [VerifyRuntimeMode]>; @@ -1422,7 +1422,7 @@ def SVSBCLT_N : SInst<"svsbclt[_n_{d}]", "ddda", "UiUl", MergeNone, "aarch64_sve //////////////////////////////////////////////////////////////////////////////// // SVE2 - Multiplication by indexed elements -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVMLA_LANE_2 : SInst<"svmla_lane[_{d}]", "ddddi", "silUsUiUl", MergeNone, "aarch64_sve_mla_lane", [VerifyRuntimeMode], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; def SVMLS_LANE_2 : SInst<"svmls_lane[_{d}]", "ddddi", "silUsUiUl", MergeNone, "aarch64_sve_mls_lane", [VerifyRuntimeMode], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; def SVMUL_LANE_2 : SInst<"svmul_lane[_{d}]", "dddi", "silUsUiUl", MergeNone, "aarch64_sve_mul_lane", [VerifyRuntimeMode], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; @@ -1430,7 +1430,7 @@ def SVMUL_LANE_2 : SInst<"svmul_lane[_{d}]", "dddi", "silUsUiUl", MergeNone, "a //////////////////////////////////////////////////////////////////////////////// // SVE2 - Uniform complex integer arithmetic -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVCADD : SInst<"svcadd[_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cadd_x", [VerifyRuntimeMode], [ImmCheck<2, ImmCheckComplexRot90_270>]>; def SVSQCADD : SInst<"svqcadd[_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_sqcadd_x", [VerifyRuntimeMode], [ImmCheck<2, ImmCheckComplexRot90_270>]>; def SVCMLA : SInst<"svcmla[_{d}]", "ddddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmla_x", [VerifyRuntimeMode], [ImmCheck<3, ImmCheckComplexRotAll90>]>; @@ -1457,7 +1457,7 @@ multiclass SInstWideDSPWide<string name, string types, string intrinsic> { def _N : SInst<name # "[_n_{d}]", "ddR", types, MergeNone, intrinsic, [VerifyRuntimeMode]>; } -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { defm SVABALB_S : SInstWideDSPAcc<"svabalb", "sil", "aarch64_sve_sabalb">; defm SVABALB_U : SInstWideDSPAcc<"svabalb", "UsUiUl", "aarch64_sve_uabalb">; defm SVABALT_S : SInstWideDSPAcc<"svabalt", "sil", "aarch64_sve_sabalt">; @@ -1536,7 +1536,7 @@ def SVQDMULLT_LANE : SInst<"svqdmullt_lane[_{d}]", "dhhi", "il", MergeNone, " //////////////////////////////////////////////////////////////////////////////// // SVE2 - Narrowing DSP operations -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVADDHNB : SInst<"svaddhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_addhnb", [VerifyRuntimeMode]>; def SVADDHNT : SInst<"svaddhnt[_{d}]", "hhdd", "silUsUiUl", MergeNone, "aarch64_sve_addhnt", [VerifyRuntimeMode]>; def SVRADDHNB : SInst<"svraddhnb[_{d}]", "hdd", "silUsUiUl", MergeNone, "aarch64_sve_raddhnb", [VerifyRuntimeMode]>; @@ -1576,7 +1576,7 @@ def SVQRSHRNT_U : SInst<"svqrshrnt[_n_{d}]", "hhdi", "UsUiUl", MergeNone, "a //////////////////////////////////////////////////////////////////////////////// // SVE2 - Unary narrowing operations -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVQXTNB_S : SInst<"svqxtnb[_{d}]", "hd", "sil", MergeNone, "aarch64_sve_sqxtnb", [VerifyRuntimeMode]>; def SVQXTNB_U : SInst<"svqxtnb[_{d}]", "hd", "UsUiUl", MergeNone, "aarch64_sve_uqxtnb", [VerifyRuntimeMode]>; def SVQXTUNB_S : SInst<"svqxtunb[_{d}]", "ed", "sil", MergeNone, "aarch64_sve_sqxtunb", [VerifyRuntimeMode]>; @@ -1589,7 +1589,7 @@ def SVQXTUNT_S : SInst<"svqxtunt[_{d}]", "eed", "sil", MergeNone, "aarch64_sv //////////////////////////////////////////////////////////////////////////////// // SVE2 - Widening complex integer arithmetic -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { defm SVADDLBT : SInstWideDSPLong<"svaddlbt", "sil", "aarch64_sve_saddlbt">; defm SVSUBLBT : SInstWideDSPLong<"svsublbt", "sil", "aarch64_sve_ssublbt">; defm SVSUBLTB : SInstWideDSPLong<"svsubltb", "sil", "aarch64_sve_ssubltb">; @@ -1723,7 +1723,7 @@ def SVSTNT1W_SCATTER_INDEX_S : MInst<"svstnt1w_scatter[_{2}base]_index[_{d}]", " //////////////////////////////////////////////////////////////////////////////// // SVE2 - Polynomial arithmetic -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVEORBT : SInst<"sveorbt[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorbt", [VerifyRuntimeMode]>; def SVEORBT_N : SInst<"sveorbt[_n_{d}]", "ddda", "csilUcUsUiUl", MergeNone, "aarch64_sve_eorbt", [VerifyRuntimeMode]>; def SVEORTB : SInst<"sveortb[_{d}]", "dddd", "csilUcUsUiUl", MergeNone, "aarch64_sve_eortb", [VerifyRuntimeMode]>; @@ -1744,7 +1744,7 @@ def SVPMULLT_PAIR_N : SInst<"svpmullt_pair[_n_{d}]", "dda", "UcUi", MergeNone, //////////////////////////////////////////////////////////////////////////////// // SVE2 - Complex integer dot product -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVCDOT : SInst<"svcdot[_{d}]", "ddqqi", "il", MergeNone, "aarch64_sve_cdot", [VerifyRuntimeMode], [ImmCheck<3, ImmCheckComplexRotAll90>]>; def SVCDOT_LANE : SInst<"svcdot_lane[_{d}]", "ddqqii", "il", MergeNone, "aarch64_sve_cdot_lane", [VerifyRuntimeMode], [ImmCheck<4, ImmCheckComplexRotAll90>, ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; } @@ -1752,7 +1752,7 @@ def SVCDOT_LANE : SInst<"svcdot_lane[_{d}]", "ddqqii", "il", MergeNone, "aarch //////////////////////////////////////////////////////////////////////////////// // SVE2 - Floating-point widening multiply-accumulate -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVMLALB_F : SInst<"svmlalb[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlalb", [VerifyRuntimeMode]>; def SVMLALB_F_N : SInst<"svmlalb[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlalb", [VerifyRuntimeMode]>; def SVMLALB_F_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlalb_lane", [VerifyRuntimeMode], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; @@ -1770,7 +1770,7 @@ def SVMLSLT_F_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch //////////////////////////////////////////////////////////////////////////////// // SVE2 - Floating-point integer binary logarithm -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVLOGB_M : SInst<"svlogb[_{d}]", "xxPd", "hfd", MergeOp1, "aarch64_sve_flogb", [VerifyRuntimeMode]>; def SVLOGB_X : SInst<"svlogb[_{d}]", "xPd", "hfd", MergeAnyExp, "aarch64_sve_flogb", [VerifyRuntimeMode]>; def SVLOGB_Z : SInst<"svlogb[_{d}]", "xPd", "hfd", MergeZeroExp, "aarch64_sve_flogb", [VerifyRuntimeMode]>; @@ -1794,7 +1794,7 @@ def SVNMATCH : SInst<"svnmatch[_{d}]", "PPdd", "csUcUs", MergeNone, "aarch64_sve //////////////////////////////////////////////////////////////////////////////// // SVE2 - Contiguous conflict detection -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVWHILERW_B : SInst<"svwhilerw[_{1}]", "Pcc", "cUc", MergeNone, "aarch64_sve_whilerw_b", [IsOverloadWhileRW, VerifyRuntimeMode]>; def SVWHILERW_H : SInst<"svwhilerw[_{1}]", "Pcc", "sUshb", MergeNone, "aarch64_sve_whilerw_h", [IsOverloadWhileRW, VerifyRuntimeMode]>; def SVWHILERW_S : SInst<"svwhilerw[_{1}]", "Pcc", "iUif", MergeNone, "aarch64_sve_whilerw_s", [IsOverloadWhileRW, VerifyRuntimeMode]>; @@ -1808,7 +1808,7 @@ def SVWHILEWR_D : SInst<"svwhilewr[_{1}]", "Pcc", "lUld", MergeNone, "aarch64_sv //////////////////////////////////////////////////////////////////////////////// // SVE2 - Extended table lookup/permute -let SVETargetGuard = "sve2", SMETargetGuard = "sme" in { +let SVETargetGuard = "sve2" in { def SVTBL2 : SInst<"svtbl2[_{d}]", "d2u", "csilUcUsUiUlhfdb", MergeNone, "", [VerifyRuntimeMode]>; def SVTBX : SInst<"svtbx[_{d}]", "dddu", "csilUcUsUiUlhfdb", MergeNone, "aarch64_sve_tbx", [VerifyRuntimeMode]>; } @@ -1850,7 +1850,7 @@ def SVSM4E : SInst<"svsm4e[_{d}]", "ddd", "Ui", MergeNone, "aarch64_sve_sm def SVSM4EKEY : SInst<"svsm4ekey[_{d}]", "ddd", "Ui", MergeNone, "aarch64_sve_sm4ekey", [IsOverloadNone]>; } -let SVETargetGuard = "sve2,sve-bitperm", SMETargetGuard = "sme,ssve-bitperm" in { +let SVETargetGuard = "sve2,sve-bitperm", SMETargetGuard = "ssve-bitperm" in { def SVBDEP : SInst<"svbdep[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_bdep_x", [VerifyRuntimeMode]>; def SVBDEP_N : SInst<"svbdep[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_bdep_x", [VerifyRuntimeMode]>; def SVBEXT : SInst<"svbext[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sve_bext_x", [VerifyRuntimeMode]>; @@ -1859,7 +1859,7 @@ def SVBGRP : SInst<"svbgrp[_{d}]", "ddd", "UcUsUiUl", MergeNone, "aarch64_sv def SVBGRP_N : SInst<"svbgrp[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sve_bgrp_x", [VerifyRuntimeMode]>; } -let SVETargetGuard = "sve2p1|sme", SMETargetGuard = "sve2p1|sme" in { +let SVETargetGuard = "sve2p1|sme" in { def SVPSEL_B : SInst<"svpsel_lane_b8", "PPPm", "Pc", MergeNone, "", [VerifyRuntimeMode], []>; def SVPSEL_H : SInst<"svpsel_lane_b16", "PPPm", "Ps", MergeNone, "", [VerifyRuntimeMode], []>; def SVPSEL_S : SInst<"svpsel_lane_b32", "PPPm", "Pi", MergeNone, "", [VerifyRuntimeMode], []>; @@ -1965,7 +1965,7 @@ def SVDOT_LANE_X2_F : SInst<"svdot_lane[_{d}_{2}]", "ddhhi", "f", MergeNone, "a def SVFCLAMP : SInst<"svclamp[_{d}]", "dddd", "hfd", MergeNone, "aarch64_sve_fclamp", [VerifyRuntimeMode], []>; } -let SVETargetGuard = "sve2p1|sme", SMETargetGuard = "sve2p1|sme" in { +let SVETargetGuard = "sve2p1|sme" in { def SVSCLAMP : SInst<"svclamp[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sclamp", [VerifyRuntimeMode], []>; def SVUCLAMP : SInst<"svclamp[_{d}]", "dddd", "UcUsUiUl", MergeNone, "aarch64_sve_uclamp", [VerifyRuntimeMode], []>; @@ -2340,7 +2340,7 @@ let SVETargetGuard = "sve2,fp8", SMETargetGuard = "sme2,fp8" in { def SVFCVTNT : SInst<"svcvtnt_mf8[_f32_x2]", "~~2>", "f", MergeNone, "aarch64_sve_fp8_cvtnt", [VerifyRuntimeMode]>; } -let SVETargetGuard = "sve2,fp8dot2", SMETargetGuard ="sme,ssve-fp8dot2" in { +let SVETargetGuard = "sve2,fp8dot2", SMETargetGuard ="ssve-fp8dot2" in { // 8-bit floating-point dot product to half-precision (vectors) def SVFDOT_2WAY : SInst<"svdot[_f16_mf8]", "dd~~>", "h", MergeNone, "aarch64_sve_fp8_fdot", [VerifyRuntimeMode]>; def SVFDOT_N_2WAY : SInst<"svdot[_n_f16_mf8]", "dd~!>", "h", MergeNone, "aarch64_sve_fp8_fdot", [VerifyRuntimeMode]>; @@ -2349,7 +2349,7 @@ let SVETargetGuard = "sve2,fp8dot2", SMETargetGuard ="sme,ssve-fp8dot2" in { def SVFDOT_LANE_2WAY : SInst<"svdot_lane[_f16_mf8]", "dd~~i>", "h", MergeNone, "aarch64_sve_fp8_fdot_lane", [VerifyRuntimeMode], [ImmCheck<3, ImmCheck0_7>]>; } -let SVETargetGuard = "sve2,fp8dot4", SMETargetGuard ="sme,ssve-fp8dot4" in { +let SVETargetGuard = "sve2,fp8dot4", SMETargetGuard ="ssve-fp8dot4" in { // 8-bit floating-point dot product to single-precision (vectors) def SVFDOT_4WAY : SInst<"svdot[_f32_mf8]", "dd~~>", "f", MergeNone, "aarch64_sve_fp8_fdot", [VerifyRuntimeMode]>; def SVFDOT_N_4WAY : SInst<"svdot[_n_f32_mf8]", "dd~!>", "f", MergeNone, "aarch64_sve_fp8_fdot", [VerifyRuntimeMode]>; @@ -2358,7 +2358,7 @@ let SVETargetGuard = "sve2,fp8dot4", SMETargetGuard ="sme,ssve-fp8dot4" in { def SVFDOT_LANE_4WAY : SInst<"svdot_lane[_f32_mf8]", "dd~~i>", "f", MergeNone, "aarch64_sve_fp8_fdot_lane", [VerifyRuntimeMode], [ImmCheck<3, ImmCheck0_3>]>; } -let SVETargetGuard = "sve2,fp8fma", SMETargetGuard = "sme,ssve-fp8fma" in { +let SVETargetGuard = "sve2,fp8fma", SMETargetGuard = "ssve-fp8fma" in { // 8-bit floating-point multiply-add long to half-precision (bottom) def SVFMLALB : SInst<"svmlalb[_f16_mf8]", "dd~~>", "h", MergeNone, "aarch64_sve_fp8_fmlalb", [VerifyRuntimeMode]>; def SVFMLALB_N : SInst<"svmlalb[_n_f16_mf8]", "dd~!>", "h", MergeNone, "aarch64_sve_fp8_fmlalb", [VerifyRuntimeMode]>; diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td b/clang/include/clang/CIR/Dialect/IR/CIROps.td index 51cef239aeda..b64fd2734a63 100644 --- a/clang/include/clang/CIR/Dialect/IR/CIROps.td +++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td @@ -1061,6 +1061,21 @@ def CIR_BrOp : CIR_Op<"br",[ } //===----------------------------------------------------------------------===// +// LabelOp +//===----------------------------------------------------------------------===// + +// The LabelOp has AlwaysSpeculatable trait in order to not to be swept +// by canonicalizer +def CIR_LabelOp : CIR_Op<"label", [AlwaysSpeculatable]> { + let description = [{ + An identifier which may be referred by cir.goto operation + }]; + let arguments = (ins StrAttr:$label); + let assemblyFormat = [{ $label attr-dict }]; + let hasVerifier = 1; +} + +//===----------------------------------------------------------------------===// // UnaryOp //===----------------------------------------------------------------------===// @@ -3295,4 +3310,28 @@ def CIR_ExpectOp : CIR_Op<"expect", [ }]; } +//===----------------------------------------------------------------------===// +// Floating Point Ops +//===----------------------------------------------------------------------===// + +class CIR_UnaryFPToFPBuiltinOp<string mnemonic, string llvmOpName> + : CIR_Op<mnemonic, [Pure, SameOperandsAndResultType]> +{ + let arguments = (ins CIR_AnyFloatOrVecOfFloatType:$src); + let results = (outs CIR_AnyFloatOrVecOfFloatType:$result); + + let assemblyFormat = "$src `:` type($src) attr-dict"; + + let llvmOp = llvmOpName; +} + +def CIR_FAbsOp : CIR_UnaryFPToFPBuiltinOp<"fabs", "FAbsOp"> { + let summary = "Computes the floating-point absolute value"; + let description = [{ + `cir.fabs` computes the absolute value of a floating-point operand + and returns a result of the same type, ignoring floating-point + exceptions. It does not set `errno`. + }]; +} + #endif // CLANG_CIR_DIALECT_IR_CIROPS_TD diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index 6aab43c9ed57..7712a49cef15 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -3731,14 +3731,20 @@ def fopenmp_relocatable_target : Flag<["-"], "fopenmp-relocatable-target">, def fnoopenmp_relocatable_target : Flag<["-"], "fnoopenmp-relocatable-target">, Group<f_Group>, Flags<[NoArgumentUnused, HelpHidden]>, Visibility<[ClangOption, CC1Option]>; -def fopenmp_simd : Flag<["-"], "fopenmp-simd">, Group<f_Group>, - Flags<[NoArgumentUnused]>, Visibility<[ClangOption, CC1Option]>, - HelpText<"Emit OpenMP code only for SIMD-based constructs.">; +def fopenmp_simd : Flag<["-"], "fopenmp-simd">, + Group<f_Group>, + Flags<[NoArgumentUnused]>, + Visibility<[ClangOption, CC1Option, FlangOption, FC1Option]>, + HelpText<"Emit OpenMP code only for SIMD-based constructs.">; def fopenmp_enable_irbuilder : Flag<["-"], "fopenmp-enable-irbuilder">, Group<f_Group>, Flags<[NoArgumentUnused, HelpHidden]>, Visibility<[ClangOption, CC1Option]>, HelpText<"Use the experimental OpenMP-IR-Builder codegen path.">; -def fno_openmp_simd : Flag<["-"], "fno-openmp-simd">, Group<f_Group>, - Flags<[NoArgumentUnused]>, Visibility<[ClangOption, CC1Option]>; +def fno_openmp_simd + : Flag<["-"], "fno-openmp-simd">, + Group<f_Group>, + Flags<[NoArgumentUnused]>, + Visibility<[ClangOption, CC1Option, FlangOption, FC1Option]>, + HelpText<"Do not emit code for any OpenMP constructs.">; def fopenmp_cuda_mode : Flag<["-"], "fopenmp-cuda-mode">, Group<f_Group>, Flags<[NoArgumentUnused, HelpHidden]>, Visibility<[ClangOption, CC1Option]>; def fno_openmp_cuda_mode : Flag<["-"], "fno-openmp-cuda-mode">, Group<f_Group>, @@ -5589,7 +5595,8 @@ def mno_outline_atomics : Flag<["-"], "mno-outline-atomics">, Group<f_clang_Grou HelpText<"Don't generate local calls to out-of-line atomic operations">; def mno_implicit_float : Flag<["-"], "mno-implicit-float">, Group<m_Group>, HelpText<"Don't generate implicit floating point or vector instructions">; -def mimplicit_float : Flag<["-"], "mimplicit-float">, Group<m_Group>; +def mimplicit_float : Flag<["-"], "mimplicit-float">, Group<m_Group>, + HelpText<"Generate implicit floating point or vector instructions">; def mrecip : Flag<["-"], "mrecip">, Group<m_Group>, Visibility<[ClangOption, CC1Option, FlangOption, FC1Option]>, HelpText<"Equivalent to '-mrecip=all'">; diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h index 1dfc276147fd..f93380345060 100644 --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -2659,9 +2659,9 @@ public: /// identifies the magic value. typedef std::pair<const IdentifierInfo *, uint64_t> TypeTagMagicValue; - /// Diagnoses the current set of gathered accesses. This typically - /// happens at full expression level. The set is cleared after emitting the - /// diagnostics. + /// Diagnoses the current set of gathered accesses. This happens at the end of + /// each expression evaluation context. Diagnostics are emitted only for + /// accesses gathered in the current evaluation context. void DiagnoseMisalignedMembers(); /// This function checks if the expression is in the sef of potentially @@ -3117,9 +3117,6 @@ private: bool operator==(const MisalignedMember &m) { return this->E == m.E; } }; - /// Small set of gathered accesses to potentially misaligned members - /// due to the packed attribute. - SmallVector<MisalignedMember, 4> MisalignedMembers; /// Adds an expression to the set of gathered misaligned members. void AddPotentialMisalignedMembers(Expr *E, RecordDecl *RD, ValueDecl *MD, @@ -6765,6 +6762,10 @@ public: /// InLifetimeExtendingContext is true. SmallVector<MaterializeTemporaryExpr *, 8> ForRangeLifetimeExtendTemps; + /// Small set of gathered accesses to potentially misaligned members + /// due to the packed attribute. + SmallVector<MisalignedMember, 4> MisalignedMembers; + /// \brief Describes whether we are in an expression constext which we have /// to handle differently. enum ExpressionKind { diff --git a/clang/lib/AST/ByteCode/Descriptor.cpp b/clang/lib/AST/ByteCode/Descriptor.cpp index 234fa2c8cd8f..9ecc7b673cf2 100644 --- a/clang/lib/AST/ByteCode/Descriptor.cpp +++ b/clang/lib/AST/ByteCode/Descriptor.cpp @@ -473,9 +473,7 @@ bool Descriptor::hasTrivialDtor() const { bool Descriptor::isUnion() const { return isRecord() && ElemRecord->isUnion(); } InitMap::InitMap(unsigned N) - : UninitFields(N), Data(std::make_unique<T[]>(numFields(N))) { - std::fill_n(data(), numFields(N), 0); -} + : UninitFields(N), Data(std::make_unique<T[]>(numFields(N))) {} bool InitMap::initializeElement(unsigned I) { unsigned Bucket = I / PER_FIELD; diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp index ee2d53255158..b602b9731a6e 100644 --- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp +++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp @@ -598,6 +598,17 @@ static bool interp__builtin_fpclassify(InterpState &S, CodePtr OpPC, return true; } +static inline Floating abs(InterpState &S, const Floating &In) { + if (!In.isNegative()) + return In; + + Floating Output = S.allocFloat(In.getSemantics()); + APFloat New = In.getAPFloat(); + New.changeSign(); + Output.copy(New); + return Output; +} + // The C standard says "fabs raises no floating-point exceptions, // even if x is a signaling NaN. The returned value is independent of // the current rounding direction mode." Therefore constant folding can @@ -606,16 +617,7 @@ static bool interp__builtin_fpclassify(InterpState &S, CodePtr OpPC, static bool interp__builtin_fabs(InterpState &S, CodePtr OpPC, const InterpFrame *Frame) { const Floating &Val = S.Stk.pop<Floating>(); - APFloat F = Val.getAPFloat(); - if (!F.isNegative()) { - S.Stk.push<Floating>(Val); - return true; - } - - Floating Result = S.allocFloat(Val.getSemantics()); - F.changeSign(); - Result.copy(F); - S.Stk.push<Floating>(Result); + S.Stk.push<Floating>(abs(S, Val)); return true; } @@ -1686,6 +1688,57 @@ static bool interp__builtin_vector_reduce(InterpState &S, CodePtr OpPC, return true; } +static bool interp__builtin_elementwise_abs(InterpState &S, CodePtr OpPC, + const InterpFrame *Frame, + const CallExpr *Call, + unsigned BuiltinID) { + assert(Call->getNumArgs() == 1); + QualType Ty = Call->getArg(0)->getType(); + if (Ty->isIntegerType()) { + PrimType ArgT = *S.getContext().classify(Call->getArg(0)->getType()); + APSInt Val = popToAPSInt(S.Stk, ArgT); + + pushInteger(S, Val.abs(), Call->getType()); + return true; + } + + if (Ty->isFloatingType()) { + Floating Val = S.Stk.pop<Floating>(); + Floating Result = abs(S, Val); + S.Stk.push<Floating>(Result); + return true; + } + + // Otherwise, the argument must be a vector. + assert(Call->getArg(0)->getType()->isVectorType()); + const Pointer &Arg = S.Stk.pop<Pointer>(); + assert(Arg.getFieldDesc()->isPrimitiveArray()); + const Pointer &Dst = S.Stk.peek<Pointer>(); + assert(Dst.getFieldDesc()->isPrimitiveArray()); + assert(Arg.getFieldDesc()->getNumElems() == + Dst.getFieldDesc()->getNumElems()); + + QualType ElemType = Arg.getFieldDesc()->getElemQualType(); + PrimType ElemT = *S.getContext().classify(ElemType); + unsigned NumElems = Arg.getNumElems(); + // we can either have a vector of integer or a vector of floating point + for (unsigned I = 0; I != NumElems; ++I) { + if (ElemType->isIntegerType()) { + INT_TYPE_SWITCH_NO_BOOL(ElemT, { + Dst.elem<T>(I) = T::from(static_cast<T>( + APSInt(Arg.elem<T>(I).toAPSInt().abs(), + ElemType->isUnsignedIntegerOrEnumerationType()))); + }); + } else { + Floating Val = Arg.elem<Floating>(I); + Dst.elem<Floating>(I) = abs(S, Val); + } + } + Dst.initializeAllElements(); + + return true; +} + /// Can be called with an integer or vector as the first and only parameter. static bool interp__builtin_elementwise_popcount(InterpState &S, CodePtr OpPC, const InterpFrame *Frame, @@ -2774,6 +2827,9 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, return interp__builtin_elementwise_popcount(S, OpPC, Frame, Call, BuiltinID); + case Builtin::BI__builtin_elementwise_abs: + return interp__builtin_elementwise_abs(S, OpPC, Frame, Call, BuiltinID); + case Builtin::BI__builtin_memcpy: case Builtin::BImemcpy: case Builtin::BI__builtin_wmemcpy: diff --git a/clang/lib/AST/CommentLexer.cpp b/clang/lib/AST/CommentLexer.cpp index e19c2327aebd..a0903d0903dd 100644 --- a/clang/lib/AST/CommentLexer.cpp +++ b/clang/lib/AST/CommentLexer.cpp @@ -214,7 +214,7 @@ bool isCommandNameStartCharacter(char C) { } bool isCommandNameCharacter(char C) { - return isAlphanumeric(C); + return isAsciiIdentifierContinue(C, false); } const char *skipCommandName(const char *BufferPtr, const char *BufferEnd) { diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp index 36dd0f5d7a06..7d4542288921 100644 --- a/clang/lib/AST/ExprConstant.cpp +++ b/clang/lib/AST/ExprConstant.cpp @@ -11639,6 +11639,29 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) { return Success(APValue(ResultElements.data(), ResultElements.size()), E); } + case Builtin::BI__builtin_elementwise_abs: { + APValue Source; + if (!EvaluateAsRValue(Info, E->getArg(0), Source)) + return false; + + QualType DestEltTy = E->getType()->castAs<VectorType>()->getElementType(); + unsigned SourceLen = Source.getVectorLength(); + SmallVector<APValue, 4> ResultElements; + ResultElements.reserve(SourceLen); + + for (unsigned EltNum = 0; EltNum < SourceLen; ++EltNum) { + APValue CurrentEle = Source.getVectorElt(EltNum); + APValue Val = DestEltTy->isFloatingType() + ? APValue(llvm::abs(CurrentEle.getFloat())) + : APValue(APSInt( + CurrentEle.getInt().abs(), + DestEltTy->isUnsignedIntegerOrEnumerationType())); + ResultElements.push_back(Val); + } + + return Success(APValue(ResultElements.data(), ResultElements.size()), E); + } + case Builtin::BI__builtin_elementwise_add_sat: case Builtin::BI__builtin_elementwise_sub_sat: case clang::X86::BI__builtin_ia32_pmulhuw128: @@ -13387,6 +13410,14 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E, return Success(Operand, E); } + case Builtin::BI__builtin_elementwise_abs: { + APSInt Val; + if (!EvaluateInteger(E->getArg(0), Val, Info)) + return false; + + return Success(Val.abs(), E); + } + case Builtin::BI__builtin_expect: case Builtin::BI__builtin_expect_with_probability: return Visit(E->getArg(0)); @@ -15878,6 +15909,7 @@ bool FloatExprEvaluator::VisitCallExpr(const CallExpr *E) { return Error(E); return true; + case Builtin::BI__builtin_elementwise_abs: case Builtin::BI__builtin_fabs: case Builtin::BI__builtin_fabsf: case Builtin::BI__builtin_fabsl: diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp index 16fc6501106d..36aea4c1d39c 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp @@ -72,6 +72,19 @@ RValue CIRGenFunction::emitRotate(const CallExpr *e, bool isRotateLeft) { return RValue::get(r); } +template <class Operation> +static RValue emitUnaryMaybeConstrainedFPBuiltin(CIRGenFunction &cgf, + const CallExpr &e) { + mlir::Value arg = cgf.emitScalarExpr(e.getArg(0)); + + assert(!cir::MissingFeatures::cgFPOptionsRAII()); + assert(!cir::MissingFeatures::fpConstraints()); + + auto call = + Operation::create(cgf.getBuilder(), arg.getLoc(), arg.getType(), arg); + return RValue::get(call->getResult(0)); +} + RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID, const CallExpr *e, ReturnValueSlot returnValue) { @@ -112,6 +125,16 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID, default: break; + case Builtin::BIfabs: + case Builtin::BIfabsf: + case Builtin::BIfabsl: + case Builtin::BI__builtin_fabs: + case Builtin::BI__builtin_fabsf: + case Builtin::BI__builtin_fabsf16: + case Builtin::BI__builtin_fabsl: + case Builtin::BI__builtin_fabsf128: + return emitUnaryMaybeConstrainedFPBuiltin<cir::FAbsOp>(*this, *e); + case Builtin::BI__assume: case Builtin::BI__builtin_assume: { if (e->getArg(0)->HasSideEffects(getContext())) diff --git a/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp b/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp index 1fda8487796a..6b6ac701e686 100644 --- a/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp @@ -124,8 +124,8 @@ void AggExprEmitter::emitArrayInit(Address destPtr, cir::ArrayType arrayTy, const QualType elementType = cgf.getContext().getAsArrayType(arrayQTy)->getElementType(); - if (elementType.isDestructedType()) { - cgf.cgm.errorNYI(loc, "dtorKind NYI"); + if (elementType.isDestructedType() && cgf.cgm.getLangOpts().Exceptions) { + cgf.cgm.errorNYI(loc, "initialized array requires destruction"); return; } @@ -135,9 +135,9 @@ void AggExprEmitter::emitArrayInit(Address destPtr, cir::ArrayType arrayTy, const cir::PointerType cirElementPtrType = builder.getPointerTo(cirElementType); - auto begin = builder.create<cir::CastOp>(loc, cirElementPtrType, - cir::CastKind::array_to_ptrdecay, - destPtr.getPointer()); + auto begin = cir::CastOp::create(builder, loc, cirElementPtrType, + cir::CastKind::array_to_ptrdecay, + destPtr.getPointer()); const CharUnits elementSize = cgf.getContext().getTypeSizeInChars(elementType); @@ -182,8 +182,8 @@ void AggExprEmitter::emitArrayInit(Address destPtr, cir::ArrayType arrayTy, // Advance to the start of the rest of the array. if (numInitElements) { one = builder.getConstantInt(loc, cgf.PtrDiffTy, 1); - element = builder.create<cir::PtrStrideOp>(loc, cirElementPtrType, - element, one); + element = cir::PtrStrideOp::create(builder, loc, cirElementPtrType, + element, one); } // Allocate the temporary variable @@ -193,25 +193,52 @@ void AggExprEmitter::emitArrayInit(Address destPtr, cir::ArrayType arrayTy, LValue tmpLV = cgf.makeAddrLValue(tmpAddr, elementPtrType); cgf.emitStoreThroughLValue(RValue::get(element), tmpLV); - // TODO(CIR): Replace this part later with cir::DoWhileOp - for (unsigned i = numInitElements; i != numArrayElements; ++i) { - cir::LoadOp currentElement = builder.createLoad(loc, tmpAddr); - - // Emit the actual filler expression. - const LValue elementLV = cgf.makeAddrLValue( - Address(currentElement, cirElementType, elementAlign), elementType); - - if (arrayFiller) - emitInitializationToLValue(arrayFiller, elementLV); - else - emitNullInitializationToLValue(loc, elementLV); - - // Advance pointer and store them to temporary variable - one = builder.getConstantInt(loc, cgf.PtrDiffTy, 1); - cir::PtrStrideOp nextElement = - builder.createPtrStride(loc, currentElement, one); - cgf.emitStoreThroughLValue(RValue::get(nextElement), tmpLV); - } + // Compute the end of array + cir::ConstantOp numArrayElementsConst = builder.getConstInt( + loc, mlir::cast<cir::IntType>(cgf.PtrDiffTy), numArrayElements); + mlir::Value end = cir::PtrStrideOp::create(builder, loc, cirElementPtrType, + begin, numArrayElementsConst); + + builder.createDoWhile( + loc, + /*condBuilder=*/ + [&](mlir::OpBuilder &b, mlir::Location loc) { + cir::LoadOp currentElement = builder.createLoad(loc, tmpAddr); + mlir::Type boolTy = cgf.convertType(cgf.getContext().BoolTy); + cir::CmpOp cmp = cir::CmpOp::create( + builder, loc, boolTy, cir::CmpOpKind::ne, currentElement, end); + builder.createCondition(cmp); + }, + /*bodyBuilder=*/ + [&](mlir::OpBuilder &b, mlir::Location loc) { + cir::LoadOp currentElement = builder.createLoad(loc, tmpAddr); + + assert(!cir::MissingFeatures::requiresCleanups()); + + // Emit the actual filler expression. + LValue elementLV = cgf.makeAddrLValue( + Address(currentElement, cirElementType, elementAlign), + elementType); + if (arrayFiller) + emitInitializationToLValue(arrayFiller, elementLV); + else + emitNullInitializationToLValue(loc, elementLV); + + // Tell the EH cleanup that we finished with the last element. + if (cgf.cgm.getLangOpts().Exceptions) { + cgf.cgm.errorNYI(loc, "update destructed array element for EH"); + return; + } + + // Advance pointer and store them to temporary variable + cir::ConstantOp one = builder.getConstInt( + loc, mlir::cast<cir::IntType>(cgf.PtrDiffTy), 1); + auto nextElement = cir::PtrStrideOp::create( + builder, loc, cirElementPtrType, currentElement, one); + cgf.emitStoreThroughLValue(RValue::get(nextElement), tmpLV); + + builder.createYield(loc); + }); } } diff --git a/clang/lib/CIR/CodeGen/CIRGenFunction.h b/clang/lib/CIR/CodeGen/CIRGenFunction.h index 2333ec3209c3..ddc1edd77010 100644 --- a/clang/lib/CIR/CodeGen/CIRGenFunction.h +++ b/clang/lib/CIR/CodeGen/CIRGenFunction.h @@ -1181,6 +1181,9 @@ public: mlir::Value emitOpOnBoolExpr(mlir::Location loc, const clang::Expr *cond); + mlir::LogicalResult emitLabel(const clang::LabelDecl &d); + mlir::LogicalResult emitLabelStmt(const clang::LabelStmt &s); + mlir::LogicalResult emitIfStmt(const clang::IfStmt &s); /// Emit code to compute the specified expression, diff --git a/clang/lib/CIR/CodeGen/CIRGenModule.cpp b/clang/lib/CIR/CodeGen/CIRGenModule.cpp index 45dfcf57b188..d5296881540a 100644 --- a/clang/lib/CIR/CodeGen/CIRGenModule.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenModule.cpp @@ -438,6 +438,20 @@ void CIRGenModule::emitGlobalFunctionDefinition(clang::GlobalDecl gd, errorNYI(funcDecl->getSourceRange(), "deferredAnnotations"); } +void CIRGenModule::handleCXXStaticMemberVarInstantiation(VarDecl *vd) { + VarDecl::DefinitionKind dk = vd->isThisDeclarationADefinition(); + if (dk == VarDecl::Definition && vd->hasAttr<DLLImportAttr>()) + return; + + TemplateSpecializationKind tsk = vd->getTemplateSpecializationKind(); + // If we have a definition, this might be a deferred decl. If the + // instantiation is explicit, make sure we emit it at the end. + if (vd->getDefinition() && tsk == TSK_ExplicitInstantiationDefinition) + getAddrOfGlobalVar(vd); + + emitTopLevelDecl(vd); +} + mlir::Operation *CIRGenModule::getGlobalValue(StringRef name) { return mlir::SymbolTable::lookupSymbolIn(theModule, name); } diff --git a/clang/lib/CIR/CodeGen/CIRGenModule.h b/clang/lib/CIR/CodeGen/CIRGenModule.h index 5538aba57014..283b76a0dd16 100644 --- a/clang/lib/CIR/CodeGen/CIRGenModule.h +++ b/clang/lib/CIR/CodeGen/CIRGenModule.h @@ -120,6 +120,9 @@ public: mlir::Operation *lastGlobalOp = nullptr; + /// Tell the consumer that this variable has been instantiated. + void handleCXXStaticMemberVarInstantiation(VarDecl *vd); + llvm::DenseMap<const Decl *, cir::GlobalOp> staticLocalDeclMap; mlir::Operation *getGlobalValue(llvm::StringRef ref); diff --git a/clang/lib/CIR/CodeGen/CIRGenStmt.cpp b/clang/lib/CIR/CodeGen/CIRGenStmt.cpp index 332babdf4377..dffe8b408b6d 100644 --- a/clang/lib/CIR/CodeGen/CIRGenStmt.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenStmt.cpp @@ -256,6 +256,9 @@ mlir::LogicalResult CIRGenFunction::emitSimpleStmt(const Stmt *s, // NullStmt doesn't need any handling, but we need to say we handled it. case Stmt::NullStmtClass: break; + + case Stmt::LabelStmtClass: + return emitLabelStmt(cast<LabelStmt>(*s)); case Stmt::CaseStmtClass: case Stmt::DefaultStmtClass: // If we reached here, we must not handling a switch case in the top level. @@ -272,6 +275,17 @@ mlir::LogicalResult CIRGenFunction::emitSimpleStmt(const Stmt *s, return mlir::success(); } +mlir::LogicalResult CIRGenFunction::emitLabelStmt(const clang::LabelStmt &s) { + + if (emitLabel(*s.getDecl()).failed()) + return mlir::failure(); + + if (getContext().getLangOpts().EHAsynch && s.isSideEntry()) + getCIRGenModule().errorNYI(s.getSourceRange(), "IsEHa: not implemented."); + + return emitStmt(s.getSubStmt(), /*useCurrentScope*/ true); +} + // Add a terminating yield on a body region if no other terminators are used. static void terminateBody(CIRGenBuilderTy &builder, mlir::Region &r, mlir::Location loc) { @@ -429,6 +443,32 @@ CIRGenFunction::emitContinueStmt(const clang::ContinueStmt &s) { return mlir::success(); } +mlir::LogicalResult CIRGenFunction::emitLabel(const clang::LabelDecl &d) { + // Create a new block to tag with a label and add a branch from + // the current one to it. If the block is empty just call attach it + // to this label. + mlir::Block *currBlock = builder.getBlock(); + mlir::Block *labelBlock = currBlock; + + if (!currBlock->empty()) { + { + mlir::OpBuilder::InsertionGuard guard(builder); + labelBlock = builder.createBlock(builder.getBlock()->getParent()); + } + builder.create<cir::BrOp>(getLoc(d.getSourceRange()), labelBlock); + } + + builder.setInsertionPointToEnd(labelBlock); + builder.create<cir::LabelOp>(getLoc(d.getSourceRange()), d.getName()); + builder.setInsertionPointToEnd(labelBlock); + + // FIXME: emit debug info for labels, incrementProfileCounter + assert(!cir::MissingFeatures::ehstackBranches()); + assert(!cir::MissingFeatures::incrementProfileCounter()); + assert(!cir::MissingFeatures::generateDebugInfo()); + return mlir::success(); +} + mlir::LogicalResult CIRGenFunction::emitBreakStmt(const clang::BreakStmt &s) { builder.createBreak(getLoc(s.getBreakLoc())); diff --git a/clang/lib/CIR/CodeGen/CIRGenerator.cpp b/clang/lib/CIR/CodeGen/CIRGenerator.cpp index b0357d9d3b7f..fb013d153268 100644 --- a/clang/lib/CIR/CodeGen/CIRGenerator.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenerator.cpp @@ -163,7 +163,7 @@ void CIRGenerator::HandleCXXStaticMemberVarInstantiation(VarDecl *D) { if (diags.hasErrorOccurred()) return; - cgm->errorNYI(D->getSourceRange(), "HandleCXXStaticMemberVarInstantiation"); + cgm->handleCXXStaticMemberVarInstantiation(D); } void CIRGenerator::CompleteTentativeDefinition(VarDecl *d) { diff --git a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp index 7c8429432b0f..936247e9d8fb 100644 --- a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp +++ b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp @@ -1785,6 +1785,19 @@ LogicalResult cir::ShiftOp::verify() { } //===----------------------------------------------------------------------===// +// LabelOp Definitions +//===----------------------------------------------------------------------===// + +LogicalResult cir::LabelOp::verify() { + mlir::Operation *op = getOperation(); + mlir::Block *blk = op->getBlock(); + if (&blk->front() != op) + return emitError() << "must be the first operation in a block"; + + return mlir::success(); +} + +//===----------------------------------------------------------------------===// // UnaryOp //===----------------------------------------------------------------------===// diff --git a/clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp b/clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp index 2eaa60c631a1..d41ea0af5893 100644 --- a/clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp +++ b/clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp @@ -47,8 +47,8 @@ struct RemoveRedundantBranches : public OpRewritePattern<BrOp> { Block *block = op.getOperation()->getBlock(); Block *dest = op.getDest(); - assert(!cir::MissingFeatures::labelOp()); - + if (isa<cir::LabelOp>(dest->front())) + return failure(); // Single edge between blocks: merge it. if (block->getNumSuccessors() == 1 && dest->getSinglePredecessor() == block) { diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index 88a0fe2e1f84..ad5f52034f92 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -1296,6 +1296,15 @@ mlir::LogicalResult CIRToLLVMExpectOpLowering::matchAndRewrite( return mlir::success(); } +mlir::LogicalResult CIRToLLVMFAbsOpLowering::matchAndRewrite( + cir::FAbsOp op, OpAdaptor adaptor, + mlir::ConversionPatternRewriter &rewriter) const { + mlir::Type resTy = typeConverter->convertType(op.getType()); + rewriter.replaceOpWithNewOp<mlir::LLVM::FAbsOp>(op, resTy, + adaptor.getOperands()[0]); + return mlir::success(); +} + /// Convert the `cir.func` attributes to `llvm.func` attributes. /// Only retain those attributes that are not constructed by /// `LLVMFuncOp::build`. If `filterArgAttrs` is set, also filter out @@ -2291,6 +2300,7 @@ void ConvertCIRToLLVMPass::runOnOperation() { CIRToLLVMComplexSubOpLowering, CIRToLLVMConstantOpLowering, CIRToLLVMExpectOpLowering, + CIRToLLVMFAbsOpLowering, CIRToLLVMFuncOpLowering, CIRToLLVMGetBitfieldOpLowering, CIRToLLVMGetGlobalOpLowering, @@ -2313,7 +2323,6 @@ void ConvertCIRToLLVMPass::runOnOperation() { CIRToLLVMVecSplatOpLowering, CIRToLLVMVecTernaryOpLowering, CIRToLLVMUnreachableOpLowering - // clang-format on >(converter, patterns.getContext()); processCIRAttrs(module); diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h index 51b191af2469..a6d2d6559005 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h @@ -648,6 +648,15 @@ public: mlir::ConversionPatternRewriter &) const override; }; +class CIRToLLVMFAbsOpLowering : public mlir::OpConversionPattern<cir::FAbsOp> { +public: + using mlir::OpConversionPattern<cir::FAbsOp>::OpConversionPattern; + + mlir::LogicalResult + matchAndRewrite(cir::FAbsOp op, OpAdaptor, + mlir::ConversionPatternRewriter &) const override; +}; + } // namespace direct } // namespace cir diff --git a/clang/lib/CodeGen/Address.h b/clang/lib/CodeGen/Address.h index a748ddaa110a..4e7f3561ac04 100644 --- a/clang/lib/CodeGen/Address.h +++ b/clang/lib/CodeGen/Address.h @@ -176,6 +176,11 @@ public: static Address invalid() { return Address(nullptr); } bool isValid() const { return Pointer.getPointer() != nullptr; } + llvm::Value *getPointerIfNotSigned() const { + assert(isValid() && "pointer isn't valid"); + return !isSigned() ? Pointer.getPointer() : nullptr; + } + /// This function is used in situations where the caller is doing some sort of /// opaque "laundering" of the pointer. void replaceBasePointer(llvm::Value *P) { diff --git a/clang/lib/CodeGen/CGBlocks.cpp b/clang/lib/CodeGen/CGBlocks.cpp index cfeba6f25ac6..74d92ef038eb 100644 --- a/clang/lib/CodeGen/CGBlocks.cpp +++ b/clang/lib/CodeGen/CGBlocks.cpp @@ -188,13 +188,14 @@ static llvm::Constant *buildBlockDescriptor(CodeGenModule &CGM, // Optional copy/dispose helpers. bool hasInternalHelper = false; if (blockInfo.NeedsCopyDispose) { + auto &Schema = CGM.getCodeGenOpts().PointerAuth.BlockHelperFunctionPointers; // copy_func_helper_decl llvm::Constant *copyHelper = buildCopyHelper(CGM, blockInfo); - elements.add(copyHelper); + elements.addSignedPointer(copyHelper, Schema, GlobalDecl(), QualType()); // destroy_func_decl llvm::Constant *disposeHelper = buildDisposeHelper(CGM, blockInfo); - elements.add(disposeHelper); + elements.addSignedPointer(disposeHelper, Schema, GlobalDecl(), QualType()); if (cast<llvm::Function>(copyHelper->stripPointerCasts()) ->hasInternalLinkage() || @@ -568,9 +569,8 @@ static void computeBlockInfo(CodeGenModule &CGM, CodeGenFunction *CGF, llvm::StructType::get(CGM.getLLVMContext(), elementTypes, true); info.CanBeGlobal = true; return; - } - else if (C.getLangOpts().ObjC && - CGM.getLangOpts().getGC() == LangOptions::NonGC) + } else if (C.getLangOpts().ObjC && + CGM.getLangOpts().getGC() == LangOptions::NonGC) info.HasCapturedVariableLayout = true; if (block->doesNotEscape()) @@ -784,7 +784,7 @@ llvm::Value *CodeGenFunction::EmitBlockLiteral(const BlockExpr *blockExpr) { llvm::Value *CodeGenFunction::EmitBlockLiteral(const CGBlockInfo &blockInfo) { bool IsOpenCL = CGM.getContext().getLangOpts().OpenCL; - auto GenVoidPtrTy = + llvm::PointerType *GenVoidPtrTy = IsOpenCL ? CGM.getOpenCLRuntime().getGenericVoidPointerType() : VoidPtrTy; LangAS GenVoidPtrAddr = IsOpenCL ? LangAS::opencl_generic : LangAS::Default; auto GenVoidPtrSize = CharUnits::fromQuantity( @@ -818,9 +818,6 @@ llvm::Value *CodeGenFunction::EmitBlockLiteral(const CGBlockInfo &blockInfo) { : CGM.getNSConcreteStackBlock(); isa = blockISA; - // Build the block descriptor. - descriptor = buildBlockDescriptor(CGM, blockInfo); - // Compute the initial on-stack block flags. if (!CGM.getCodeGenOpts().DisableBlockSignatureString) flags = BLOCK_HAS_SIGNATURE; @@ -834,6 +831,9 @@ llvm::Value *CodeGenFunction::EmitBlockLiteral(const CGBlockInfo &blockInfo) { flags |= BLOCK_USE_STRET; if (blockInfo.NoEscape) flags |= BLOCK_IS_NOESCAPE | BLOCK_IS_GLOBAL; + + // Build the block descriptor. + descriptor = buildBlockDescriptor(CGM, blockInfo); } auto projectField = [&](unsigned index, const Twine &name) -> Address { @@ -884,11 +884,25 @@ llvm::Value *CodeGenFunction::EmitBlockLiteral(const CGBlockInfo &blockInfo) { llvm::ConstantInt::get(IntTy, blockInfo.BlockAlign.getQuantity()), getIntSize(), "block.align"); } - addHeaderField(blockFn, GenVoidPtrSize, "block.invoke"); - if (!IsOpenCL) - addHeaderField(descriptor, getPointerSize(), "block.descriptor"); - else if (auto *Helper = - CGM.getTargetCodeGenInfo().getTargetOpenCLBlockHelper()) { + + if (!IsOpenCL) { + llvm::Value *blockFnPtr = + llvm::ConstantExpr::getBitCast(InvokeFn, VoidPtrTy); + QualType type = blockInfo.getBlockExpr() + ->getType() + ->castAs<BlockPointerType>() + ->getPointeeType(); + addSignedHeaderField( + blockFnPtr, + CGM.getCodeGenOpts().PointerAuth.BlockInvocationFunctionPointers, + GlobalDecl(), type, getPointerSize(), "block.invoke"); + + addSignedHeaderField( + descriptor, CGM.getCodeGenOpts().PointerAuth.BlockDescriptorPointers, + GlobalDecl(), type, getPointerSize(), "block.descriptor"); + } else if (auto *Helper = + CGM.getTargetCodeGenInfo().getTargetOpenCLBlockHelper()) { + addHeaderField(blockFn, GenVoidPtrSize, "block.invoke"); for (auto I : Helper->getCustomFieldValues(*this, blockInfo)) { addHeaderField( I.first, @@ -896,7 +910,8 @@ llvm::Value *CodeGenFunction::EmitBlockLiteral(const CGBlockInfo &blockInfo) { CGM.getDataLayout().getTypeAllocSize(I.first->getType())), I.second); } - } + } else + addHeaderField(blockFn, GenVoidPtrSize, "block.invoke"); } // Finally, capture all the values into the block. @@ -1167,6 +1182,8 @@ RValue CodeGenFunction::EmitBlockCallExpr(const CallExpr *E, ASTContext &Ctx = getContext(); CallArgList Args; + llvm::Value *FuncPtr = nullptr; + if (getLangOpts().OpenCL) { // For OpenCL, BlockPtr is already casted to generic block literal. @@ -1186,7 +1203,7 @@ RValue CodeGenFunction::EmitBlockCallExpr(const CallExpr *E, if (!isa<ParmVarDecl>(E->getCalleeDecl())) Func = CGM.getOpenCLRuntime().getInvokeFunction(E->getCallee()); else { - llvm::Value *FuncPtr = Builder.CreateStructGEP(GenBlockTy, BlockPtr, 2); + FuncPtr = Builder.CreateStructGEP(GenBlockTy, BlockPtr, 2); Func = Builder.CreateAlignedLoad(GenericVoidPtrTy, FuncPtr, getPointerAlign()); } @@ -1195,7 +1212,7 @@ RValue CodeGenFunction::EmitBlockCallExpr(const CallExpr *E, BlockPtr = Builder.CreatePointerCast(BlockPtr, UnqualPtrTy, "block.literal"); // Get pointer to the block invoke function - llvm::Value *FuncPtr = Builder.CreateStructGEP(GenBlockTy, BlockPtr, 3); + FuncPtr = Builder.CreateStructGEP(GenBlockTy, BlockPtr, 3); // First argument is a block literal casted to a void pointer BlockPtr = Builder.CreatePointerCast(BlockPtr, VoidPtrTy); @@ -1212,7 +1229,15 @@ RValue CodeGenFunction::EmitBlockCallExpr(const CallExpr *E, CGM.getTypes().arrangeBlockFunctionCall(Args, FuncTy); // Prepare the callee. - CGCallee Callee(CGCalleeInfo(), Func); + CGPointerAuthInfo PointerAuth; + if (auto &AuthSchema = + CGM.getCodeGenOpts().PointerAuth.BlockInvocationFunctionPointers) { + assert(FuncPtr != nullptr && "Missing function pointer for AuthInfo"); + PointerAuth = + EmitPointerAuthInfo(AuthSchema, FuncPtr, GlobalDecl(), FnType); + } + + CGCallee Callee(CGCalleeInfo(), Func, PointerAuth); // And call the block. return EmitCall(FnInfo, Callee, ReturnValue, Args, CallOrInvoke); @@ -1296,14 +1321,15 @@ static llvm::Constant *buildGlobalBlock(CodeGenModule &CGM, bool IsOpenCL = CGM.getLangOpts().OpenCL; bool IsWindows = CGM.getTarget().getTriple().isOSWindows(); + auto &CGOPointerAuth = CGM.getCodeGenOpts().PointerAuth; if (!IsOpenCL) { // isa if (IsWindows) fields.addNullPointer(CGM.Int8PtrPtrTy); else fields.addSignedPointer(CGM.getNSConcreteGlobalBlock(), - CGM.getCodeGenOpts().PointerAuth.ObjCIsaPointers, - GlobalDecl(), QualType()); + CGOPointerAuth.ObjCIsaPointers, GlobalDecl(), + QualType()); // __flags BlockFlags flags = BLOCK_IS_GLOBAL; @@ -1322,11 +1348,20 @@ static llvm::Constant *buildGlobalBlock(CodeGenModule &CGM, } // Function - fields.add(blockFn); + if (auto &Schema = CGOPointerAuth.BlockInvocationFunctionPointers) { + QualType FnType = blockInfo.getBlockExpr() + ->getType() + ->castAs<BlockPointerType>() + ->getPointeeType(); + fields.addSignedPointer(blockFn, Schema, GlobalDecl(), FnType); + } else + fields.add(blockFn); if (!IsOpenCL) { // Descriptor - fields.add(buildBlockDescriptor(CGM, blockInfo)); + llvm::Constant *Descriptor = buildBlockDescriptor(CGM, blockInfo); + fields.addSignedPointer(Descriptor, CGOPointerAuth.BlockDescriptorPointers, + GlobalDecl(), QualType()); } else if (auto *Helper = CGM.getTargetCodeGenInfo().getTargetOpenCLBlockHelper()) { for (auto *I : Helper->getCustomFieldValues(CGM, blockInfo)) { @@ -1996,8 +2031,8 @@ CodeGenFunction::GenerateCopyHelperFunction(const CGBlockInfo &blockInfo) { // it. It's not quite worth the annoyance to avoid creating it in the // first place. if (!needsEHCleanup(captureType.isDestructedType())) - if (auto *I = - cast_or_null<llvm::Instruction>(dstField.getBasePointer())) + if (auto *I = cast_or_null<llvm::Instruction>( + dstField.getPointerIfNotSigned())) I->eraseFromParent(); } break; @@ -2731,8 +2766,16 @@ void CodeGenFunction::emitByrefStructureInit(const AutoVarEmission &emission) { unsigned nextHeaderIndex = 0; CharUnits nextHeaderOffset; auto storeHeaderField = [&](llvm::Value *value, CharUnits fieldSize, - const Twine &name) { + const Twine &name, bool isFunction = false) { auto fieldAddr = Builder.CreateStructGEP(addr, nextHeaderIndex, name); + if (isFunction) { + if (auto &Schema = CGM.getCodeGenOpts() + .PointerAuth.BlockByrefHelperFunctionPointers) { + auto PointerAuth = EmitPointerAuthInfo( + Schema, fieldAddr.emitRawPointer(*this), GlobalDecl(), QualType()); + value = EmitPointerAuthSign(PointerAuth, value); + } + } Builder.CreateStore(value, fieldAddr); nextHeaderIndex++; @@ -2815,10 +2858,10 @@ void CodeGenFunction::emitByrefStructureInit(const AutoVarEmission &emission) { storeHeaderField(V, getIntSize(), "byref.size"); if (helpers) { - storeHeaderField(helpers->CopyHelper, getPointerSize(), - "byref.copyHelper"); + storeHeaderField(helpers->CopyHelper, getPointerSize(), "byref.copyHelper", + /*isFunction=*/true); storeHeaderField(helpers->DisposeHelper, getPointerSize(), - "byref.disposeHelper"); + "byref.disposeHelper", /*isFunction=*/true); } if (ByRefHasLifetime && HasByrefExtendedLayout) { diff --git a/clang/lib/CodeGen/CodeGenFunction.h b/clang/lib/CodeGen/CodeGenFunction.h index 84be42244d39..ad318f289ee8 100644 --- a/clang/lib/CodeGen/CodeGenFunction.h +++ b/clang/lib/CodeGen/CodeGenFunction.h @@ -725,7 +725,7 @@ public: }; /// Header for data within LifetimeExtendedCleanupStack. - struct LifetimeExtendedCleanupHeader { + struct alignas(uint64_t) LifetimeExtendedCleanupHeader { /// The size of the following cleanup object. unsigned Size; /// The kind of cleanup to push. @@ -947,7 +947,8 @@ public: LifetimeExtendedCleanupStack.size() + sizeof(Header) + Header.Size + (Header.IsConditional ? sizeof(ActiveFlag) : 0)); - static_assert(sizeof(Header) % alignof(T) == 0, + static_assert((alignof(LifetimeExtendedCleanupHeader) == alignof(T)) && + (alignof(T) == alignof(RawAddress)), "Cleanup will be allocated on misaligned address"); char *Buffer = &LifetimeExtendedCleanupStack[OldSize]; new (Buffer) LifetimeExtendedCleanupHeader(Header); diff --git a/clang/lib/CodeGen/EHScopeStack.h b/clang/lib/CodeGen/EHScopeStack.h index ed11dc2bb05d..54f6ceaa52b9 100644 --- a/clang/lib/CodeGen/EHScopeStack.h +++ b/clang/lib/CodeGen/EHScopeStack.h @@ -143,7 +143,7 @@ public: /// /// Cleanup implementations should generally be declared in an /// anonymous namespace. - class Cleanup { + class alignas(uint64_t) Cleanup { // Anchor the construction vtable. virtual void anchor(); diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 293504ed23ed..29b7180df5cb 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -1736,7 +1736,6 @@ void Clang::AddAArch64TargetArgs(const ArgList &Args, options::OPT_fno_ptrauth_objc_interface_sel); Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_objc_class_ro, options::OPT_fno_ptrauth_objc_class_ro); - if (Triple.getEnvironment() == llvm::Triple::PAuthTest) handlePAuthABI(Args, CmdArgs); diff --git a/clang/lib/Driver/ToolChains/Flang.cpp b/clang/lib/Driver/ToolChains/Flang.cpp index 7ab41e9b85a0..547e3156f519 100644 --- a/clang/lib/Driver/ToolChains/Flang.cpp +++ b/clang/lib/Driver/ToolChains/Flang.cpp @@ -937,6 +937,8 @@ void Flang::ConstructJob(Compilation &C, const JobAction &JA, if (Args.hasArg(options::OPT_fopenmp_force_usm)) CmdArgs.push_back("-fopenmp-force-usm"); + Args.AddLastArg(CmdArgs, options::OPT_fopenmp_simd, + options::OPT_fno_openmp_simd); // FIXME: Clang supports a whole bunch more flags here. break; @@ -952,6 +954,9 @@ void Flang::ConstructJob(Compilation &C, const JobAction &JA, << A->getSpelling() << A->getValue(); break; } + } else { + Args.AddLastArg(CmdArgs, options::OPT_fopenmp_simd, + options::OPT_fno_openmp_simd); } // Pass the path to compiler resource files. diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp index 2ea3ed759ff4..a4d18966be35 100644 --- a/clang/lib/Frontend/CompilerInvocation.cpp +++ b/clang/lib/Frontend/CompilerInvocation.cpp @@ -1542,6 +1542,16 @@ void CompilerInvocation::setDefaultPointerAuthOptions( Discrimination::Constant, InitFiniPointerConstantDiscriminator); } + Opts.BlockInvocationFunctionPointers = + PointerAuthSchema(Key::ASIA, true, Discrimination::None); + Opts.BlockHelperFunctionPointers = + PointerAuthSchema(Key::ASIA, true, Discrimination::None); + Opts.BlockByrefHelperFunctionPointers = + PointerAuthSchema(Key::ASIA, true, Discrimination::None); + Opts.BlockDescriptorPointers = + PointerAuthSchema(Key::ASDA, true, Discrimination::Constant, + BlockDescriptorConstantDiscriminator); + Opts.ObjCMethodListFunctionPointers = PointerAuthSchema(Key::ASIA, true, Discrimination::None); Opts.ObjCMethodListPointer = @@ -3621,7 +3631,6 @@ static void ParsePointerAuthArgs(LangOptions &Opts, ArgList &Args, Opts.PointerAuthELFGOT = Args.hasArg(OPT_fptrauth_elf_got); Opts.AArch64JumpTableHardening = Args.hasArg(OPT_faarch64_jump_table_hardening); - Opts.PointerAuthObjcIsa = Args.hasArg(OPT_fptrauth_objc_isa); Opts.PointerAuthObjcClassROPointers = Args.hasArg(OPT_fptrauth_objc_class_ro); Opts.PointerAuthObjcInterfaceSel = diff --git a/clang/lib/Headers/avx2intrin.h b/clang/lib/Headers/avx2intrin.h index 35258d47c718..0d627488b1a0 100644 --- a/clang/lib/Headers/avx2intrin.h +++ b/clang/lib/Headers/avx2intrin.h @@ -2712,9 +2712,8 @@ _mm256_subs_epu16(__m256i __a, __m256i __b) { /// A 256-bit integer vector used as the source for the odd-numbered bytes /// of the result. /// \returns A 256-bit integer vector containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpackhi_epi8(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpackhi_epi8(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 8, 32+8, 9, 32+9, 10, 32+10, 11, 32+11, 12, 32+12, 13, 32+13, 14, 32+14, 15, 32+15, 24, 32+24, 25, 32+25, 26, 32+26, 27, 32+27, 28, 32+28, 29, 32+29, 30, 32+30, 31, 32+31); } @@ -2747,9 +2746,8 @@ _mm256_unpackhi_epi8(__m256i __a, __m256i __b) /// A 256-bit vector of [16 x i16] used as the source for the odd-numbered /// elements of the result. /// \returns A 256-bit vector of [16 x i16] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpackhi_epi16(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpackhi_epi16(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15); } @@ -2781,9 +2779,8 @@ _mm256_unpackhi_epi16(__m256i __a, __m256i __b) /// A 256-bit vector of [8 x i32] used as the source for the odd-numbered /// elements of the result. /// \returns A 256-bit vector of [8 x i32] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpackhi_epi32(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpackhi_epi32(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7); } @@ -2811,9 +2808,8 @@ _mm256_unpackhi_epi32(__m256i __a, __m256i __b) /// A 256-bit vector of [4 x i64] used as the source for the odd-numbered /// elements of the result. /// \returns A 256-bit vector of [4 x i64] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpackhi_epi64(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpackhi_epi64(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 1, 4+1, 3, 4+3); } @@ -2845,9 +2841,8 @@ _mm256_unpackhi_epi64(__m256i __a, __m256i __b) /// A 256-bit integer vector used as the source for the odd-numbered bytes /// of the result. /// \returns A 256-bit integer vector containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpacklo_epi8(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpacklo_epi8(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 0, 32+0, 1, 32+1, 2, 32+2, 3, 32+3, 4, 32+4, 5, 32+5, 6, 32+6, 7, 32+7, 16, 32+16, 17, 32+17, 18, 32+18, 19, 32+19, 20, 32+20, 21, 32+21, 22, 32+22, 23, 32+23); } @@ -2880,9 +2875,8 @@ _mm256_unpacklo_epi8(__m256i __a, __m256i __b) /// A 256-bit vector of [16 x i16] used as the source for the odd-numbered /// elements of the result. /// \returns A 256-bit vector of [16 x i16] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpacklo_epi16(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpacklo_epi16(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11); } @@ -2914,9 +2908,8 @@ _mm256_unpacklo_epi16(__m256i __a, __m256i __b) /// A 256-bit vector of [8 x i32] used as the source for the odd-numbered /// elements of the result. /// \returns A 256-bit vector of [8 x i32] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpacklo_epi32(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpacklo_epi32(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5); } @@ -2944,9 +2937,8 @@ _mm256_unpacklo_epi32(__m256i __a, __m256i __b) /// A 256-bit vector of [4 x i64] used as the source for the odd-numbered /// elements of the result. /// \returns A 256-bit vector of [4 x i64] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_unpacklo_epi64(__m256i __a, __m256i __b) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_unpacklo_epi64(__m256i __a, __m256i __b) { return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 0, 4+0, 2, 4+2); } @@ -2997,9 +2989,8 @@ _mm256_stream_load_si256(const void *__V) /// \param __X /// A 128-bit vector of [4 x float] whose low element will be broadcast. /// \returns A 128-bit vector of [4 x float] containing the result. -static __inline__ __m128 __DEFAULT_FN_ATTRS128 -_mm_broadcastss_ps(__m128 __X) -{ +static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_broadcastss_ps(__m128 __X) { return (__m128)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0); } @@ -3014,9 +3005,8 @@ _mm_broadcastss_ps(__m128 __X) /// \param __a /// A 128-bit vector of [2 x double] whose low element will be broadcast. /// \returns A 128-bit vector of [2 x double] containing the result. -static __inline__ __m128d __DEFAULT_FN_ATTRS128 -_mm_broadcastsd_pd(__m128d __a) -{ +static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_broadcastsd_pd(__m128d __a) { return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0); } @@ -3031,9 +3021,8 @@ _mm_broadcastsd_pd(__m128d __a) /// \param __X /// A 128-bit vector of [4 x float] whose low element will be broadcast. /// \returns A 256-bit vector of [8 x float] containing the result. -static __inline__ __m256 __DEFAULT_FN_ATTRS256 -_mm256_broadcastss_ps(__m128 __X) -{ +static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcastss_ps(__m128 __X) { return (__m256)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -3048,9 +3037,8 @@ _mm256_broadcastss_ps(__m128 __X) /// \param __X /// A 128-bit vector of [2 x double] whose low element will be broadcast. /// \returns A 256-bit vector of [4 x double] containing the result. -static __inline__ __m256d __DEFAULT_FN_ATTRS256 -_mm256_broadcastsd_pd(__m128d __X) -{ +static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcastsd_pd(__m128d __X) { return (__m256d)__builtin_shufflevector((__v2df)__X, (__v2df)__X, 0, 0, 0, 0); } @@ -3064,9 +3052,8 @@ _mm256_broadcastsd_pd(__m128d __X) /// \param __X /// A 128-bit integer vector to be broadcast. /// \returns A 256-bit integer vector containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcastsi128_si256(__m128i __X) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcastsi128_si256(__m128i __X) { return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 1, 0, 1); } @@ -3156,9 +3143,8 @@ _mm256_broadcastsi128_si256(__m128i __X) /// \param __X /// A 128-bit integer vector whose low byte will be broadcast. /// \returns A 256-bit integer vector containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcastb_epi8(__m128i __X) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcastb_epi8(__m128i __X) { return (__m256i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -3172,9 +3158,8 @@ _mm256_broadcastb_epi8(__m128i __X) /// \param __X /// A 128-bit vector of [8 x i16] whose low element will be broadcast. /// \returns A 256-bit vector of [16 x i16] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcastw_epi16(__m128i __X) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcastw_epi16(__m128i __X) { return (__m256i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -3188,9 +3173,8 @@ _mm256_broadcastw_epi16(__m128i __X) /// \param __X /// A 128-bit vector of [4 x i32] whose low element will be broadcast. /// \returns A 256-bit vector of [8 x i32] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcastd_epi32(__m128i __X) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcastd_epi32(__m128i __X) { return (__m256i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -3204,9 +3188,8 @@ _mm256_broadcastd_epi32(__m128i __X) /// \param __X /// A 128-bit vector of [2 x i64] whose low element will be broadcast. /// \returns A 256-bit vector of [4 x i64] containing the result. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcastq_epi64(__m128i __X) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcastq_epi64(__m128i __X) { return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0, 0, 0); } @@ -3220,9 +3203,8 @@ _mm256_broadcastq_epi64(__m128i __X) /// \param __X /// A 128-bit integer vector whose low byte will be broadcast. /// \returns A 128-bit integer vector containing the result. -static __inline__ __m128i __DEFAULT_FN_ATTRS128 -_mm_broadcastb_epi8(__m128i __X) -{ +static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_broadcastb_epi8(__m128i __X) { return (__m128i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -3236,9 +3218,8 @@ _mm_broadcastb_epi8(__m128i __X) /// \param __X /// A 128-bit vector of [8 x i16] whose low element will be broadcast. /// \returns A 128-bit vector of [8 x i16] containing the result. -static __inline__ __m128i __DEFAULT_FN_ATTRS128 -_mm_broadcastw_epi16(__m128i __X) -{ +static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_broadcastw_epi16(__m128i __X) { return (__m128i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -3252,9 +3233,8 @@ _mm_broadcastw_epi16(__m128i __X) /// \param __X /// A 128-bit vector of [4 x i32] whose low element will be broadcast. /// \returns A 128-bit vector of [4 x i32] containing the result. -static __inline__ __m128i __DEFAULT_FN_ATTRS128 -_mm_broadcastd_epi32(__m128i __X) -{ +static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_broadcastd_epi32(__m128i __X) { return (__m128i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0); } @@ -3268,9 +3248,8 @@ _mm_broadcastd_epi32(__m128i __X) /// \param __X /// A 128-bit vector of [2 x i64] whose low element will be broadcast. /// \returns A 128-bit vector of [2 x i64] containing the result. -static __inline__ __m128i __DEFAULT_FN_ATTRS128 -_mm_broadcastq_epi64(__m128i __X) -{ +static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_broadcastq_epi64(__m128i __X) { return (__m128i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0); } diff --git a/clang/lib/Headers/avx512bwintrin.h b/clang/lib/Headers/avx512bwintrin.h index 886783230cf3..118e1cbc070e 100644 --- a/clang/lib/Headers/avx512bwintrin.h +++ b/clang/lib/Headers/avx512bwintrin.h @@ -1247,7 +1247,7 @@ _mm512_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A) __builtin_ia32_pmovuswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_unpackhi_epi8(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B, 8, 64+8, 9, 64+9, @@ -1282,7 +1282,7 @@ _mm512_maskz_unpackhi_epi8(__mmask64 __U, __m512i __A, __m512i __B) { (__v64qi)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_unpackhi_epi16(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B, 4, 32+4, 5, 32+5, @@ -1309,7 +1309,7 @@ _mm512_maskz_unpackhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) { (__v32hi)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_unpacklo_epi8(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B, 0, 64+0, 1, 64+1, @@ -1344,7 +1344,7 @@ _mm512_maskz_unpacklo_epi8(__mmask64 __U, __m512i __A, __m512i __B) { (__v64qi)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_unpacklo_epi16(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B, 0, 32+0, 1, 32+1, @@ -1881,9 +1881,8 @@ _mm512_movm_epi16 (__mmask32 __A) return (__m512i) __builtin_ia32_cvtmask2w512 (__A); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcastb_epi8 (__m128i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcastb_epi8(__m128i __A) { return (__m512i)__builtin_shufflevector((__v16qi) __A, (__v16qi) __A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -1923,9 +1922,8 @@ _mm512_maskz_set1_epi16 (__mmask32 __M, short __A) (__v32hi) _mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcastw_epi16 (__m128i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcastw_epi16(__m128i __A) { return (__m512i)__builtin_shufflevector((__v8hi) __A, (__v8hi) __A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); diff --git a/clang/lib/Headers/avx512dqintrin.h b/clang/lib/Headers/avx512dqintrin.h index 62325b96f202..87d16b474d46 100644 --- a/clang/lib/Headers/avx512dqintrin.h +++ b/clang/lib/Headers/avx512dqintrin.h @@ -1084,10 +1084,8 @@ _mm512_movepi64_mask (__m512i __A) return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A); } - -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_broadcast_f32x2 (__m128 __A) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_f32x2(__m128 __A) { return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1); @@ -1109,9 +1107,8 @@ _mm512_maskz_broadcast_f32x2 (__mmask16 __M, __m128 __A) (__v16sf)_mm512_setzero_ps()); } -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_broadcast_f32x8(__m256 __A) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_f32x8(__m256 __A) { return (__m512)__builtin_shufflevector((__v8sf)__A, (__v8sf)__A, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); @@ -1133,9 +1130,8 @@ _mm512_maskz_broadcast_f32x8(__mmask16 __M, __m256 __A) (__v16sf)_mm512_setzero_ps()); } -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_broadcast_f64x2(__m128d __A) -{ +static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_f64x2(__m128d __A) { return (__m512d)__builtin_shufflevector((__v2df)__A, (__v2df)__A, 0, 1, 0, 1, 0, 1, 0, 1); } @@ -1156,9 +1152,8 @@ _mm512_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A) (__v8df)_mm512_setzero_pd()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcast_i32x2 (__m128i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_i32x2(__m128i __A) { return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1); @@ -1180,9 +1175,8 @@ _mm512_maskz_broadcast_i32x2 (__mmask16 __M, __m128i __A) (__v16si)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcast_i32x8(__m256i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_i32x8(__m256i __A) { return (__m512i)__builtin_shufflevector((__v8si)__A, (__v8si)__A, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); @@ -1204,9 +1198,8 @@ _mm512_maskz_broadcast_i32x8(__mmask16 __M, __m256i __A) (__v16si)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcast_i64x2(__m128i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_i64x2(__m128i __A) { return (__m512i)__builtin_shufflevector((__v2di)__A, (__v2di)__A, 0, 1, 0, 1, 0, 1, 0, 1); } diff --git a/clang/lib/Headers/avx512fintrin.h b/clang/lib/Headers/avx512fintrin.h index 90f883ba9f77..05a291ecbc66 100644 --- a/clang/lib/Headers/avx512fintrin.h +++ b/clang/lib/Headers/avx512fintrin.h @@ -218,9 +218,8 @@ _mm512_undefined_epi32(void) return (__m512i)__builtin_ia32_undef512(); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcastd_epi32 (__m128i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcastd_epi32(__m128i __A) { return (__m512i)__builtin_shufflevector((__v4si) __A, (__v4si) __A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -241,9 +240,8 @@ _mm512_maskz_broadcastd_epi32 (__mmask16 __M, __m128i __A) (__v16si) _mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcastq_epi64 (__m128i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcastq_epi64(__m128i __A) { return (__m512i)__builtin_shufflevector((__v2di) __A, (__v2di) __A, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -344,9 +342,8 @@ _mm512_maskz_set1_epi64(__mmask8 __M, long long __A) (__v8di)_mm512_setzero_si512()); } -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_broadcastss_ps(__m128 __A) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcastss_ps(__m128 __A) { return (__m512)__builtin_shufflevector((__v4sf) __A, (__v4sf) __A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -389,9 +386,8 @@ _mm512_set4_ps(float __A, float __B, float __C, float __D) { #define _mm512_setr4_ps(e0,e1,e2,e3) \ _mm512_set4_ps((e3),(e2),(e1),(e0)) -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_broadcastsd_pd(__m128d __A) -{ +static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcastsd_pd(__m128d __A) { return (__m512d)__builtin_shufflevector((__v2df) __A, (__v2df) __A, 0, 0, 0, 0, 0, 0, 0, 0); } @@ -4203,9 +4199,8 @@ _mm512_maskz_unpacklo_ps (__mmask16 __U, __m512 __A, __m512 __B) (__v16sf)_mm512_setzero_ps()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_unpackhi_epi32(__m512i __A, __m512i __B) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_unpackhi_epi32(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B, 2, 18, 3, 19, 2+4, 18+4, 3+4, 19+4, @@ -4229,9 +4224,8 @@ _mm512_maskz_unpackhi_epi32(__mmask16 __U, __m512i __A, __m512i __B) (__v16si)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_unpacklo_epi32(__m512i __A, __m512i __B) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_unpacklo_epi32(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B, 0, 16, 1, 17, 0+4, 16+4, 1+4, 17+4, @@ -4255,9 +4249,8 @@ _mm512_maskz_unpacklo_epi32(__mmask16 __U, __m512i __A, __m512i __B) (__v16si)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_unpackhi_epi64(__m512i __A, __m512i __B) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_unpackhi_epi64(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B, 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6); } @@ -4278,9 +4271,8 @@ _mm512_maskz_unpackhi_epi64(__mmask8 __U, __m512i __A, __m512i __B) (__v8di)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_unpacklo_epi64 (__m512i __A, __m512i __B) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_unpacklo_epi64(__m512i __A, __m512i __B) { return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B, 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6); } @@ -6799,9 +6791,8 @@ _mm_maskz_sqrt_ss (__mmask8 __U, __m128 __A, __m128 __B) (__v4sf)_mm_setzero_ps(), \ (__mmask8)(U), (int)(R))) -static __inline__ __m512 __DEFAULT_FN_ATTRS512 -_mm512_broadcast_f32x4(__m128 __A) -{ +static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_f32x4(__m128 __A) { return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3); @@ -6823,9 +6814,8 @@ _mm512_maskz_broadcast_f32x4(__mmask16 __M, __m128 __A) (__v16sf)_mm512_setzero_ps()); } -static __inline__ __m512d __DEFAULT_FN_ATTRS512 -_mm512_broadcast_f64x4(__m256d __A) -{ +static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_f64x4(__m256d __A) { return (__m512d)__builtin_shufflevector((__v4df)__A, (__v4df)__A, 0, 1, 2, 3, 0, 1, 2, 3); } @@ -6846,9 +6836,8 @@ _mm512_maskz_broadcast_f64x4(__mmask8 __M, __m256d __A) (__v8df)_mm512_setzero_pd()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcast_i32x4(__m128i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_i32x4(__m128i __A) { return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3); @@ -6870,9 +6859,8 @@ _mm512_maskz_broadcast_i32x4(__mmask16 __M, __m128i __A) (__v16si)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 -_mm512_broadcast_i64x4(__m256i __A) -{ +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR +_mm512_broadcast_i64x4(__m256i __A) { return (__m512i)__builtin_shufflevector((__v4di)__A, (__v4di)__A, 0, 1, 2, 3, 0, 1, 2, 3); } diff --git a/clang/lib/Headers/avx512vldqintrin.h b/clang/lib/Headers/avx512vldqintrin.h index 272cdd89e2d2..ceebd09e1d3a 100644 --- a/clang/lib/Headers/avx512vldqintrin.h +++ b/clang/lib/Headers/avx512vldqintrin.h @@ -24,6 +24,14 @@ __target__("avx512vl,avx512dq,no-evex512"), \ __min_vector_width__(256))) +#if defined(__cplusplus) && (__cplusplus >= 201103L) +#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr +#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr +#else +#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 +#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 +#endif + static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mullo_epi64 (__m256i __A, __m256i __B) { return (__m256i) ((__v4du) __A * (__v4du) __B); @@ -956,9 +964,8 @@ _mm256_movepi64_mask (__m256i __A) return (__mmask8) __builtin_ia32_cvtq2mask256 ((__v4di) __A); } -static __inline__ __m256 __DEFAULT_FN_ATTRS256 -_mm256_broadcast_f32x2 (__m128 __A) -{ +static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcast_f32x2(__m128 __A) { return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, 0, 1, 0, 1, 0, 1, 0, 1); } @@ -979,9 +986,8 @@ _mm256_maskz_broadcast_f32x2 (__mmask8 __M, __m128 __A) (__v8sf)_mm256_setzero_ps()); } -static __inline__ __m256d __DEFAULT_FN_ATTRS256 -_mm256_broadcast_f64x2(__m128d __A) -{ +static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcast_f64x2(__m128d __A) { return (__m256d)__builtin_shufflevector((__v2df)__A, (__v2df)__A, 0, 1, 0, 1); } @@ -1002,9 +1008,8 @@ _mm256_maskz_broadcast_f64x2 (__mmask8 __M, __m128d __A) (__v4df)_mm256_setzero_pd()); } -static __inline__ __m128i __DEFAULT_FN_ATTRS128 -_mm_broadcast_i32x2 (__m128i __A) -{ +static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR +_mm_broadcast_i32x2(__m128i __A) { return (__m128i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, 0, 1, 0, 1); } @@ -1025,9 +1030,8 @@ _mm_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A) (__v4si)_mm_setzero_si128()); } -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcast_i32x2 (__m128i __A) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcast_i32x2(__m128i __A) { return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, 0, 1, 0, 1, 0, 1, 0, 1); } @@ -1048,9 +1052,8 @@ _mm256_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A) (__v8si)_mm256_setzero_si256()); } -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcast_i64x2(__m128i __A) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcast_i64x2(__m128i __A) { return (__m256i)__builtin_shufflevector((__v2di)__A, (__v2di)__A, 0, 1, 0, 1); } @@ -1169,5 +1172,7 @@ _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A) #undef __DEFAULT_FN_ATTRS128 #undef __DEFAULT_FN_ATTRS256 +#undef __DEFAULT_FN_ATTRS256_CONSTEXPR +#undef __DEFAULT_FN_ATTRS128_CONSTEXPR #endif diff --git a/clang/lib/Headers/avx512vlintrin.h b/clang/lib/Headers/avx512vlintrin.h index 366adab1fab3..09b76d46efaf 100644 --- a/clang/lib/Headers/avx512vlintrin.h +++ b/clang/lib/Headers/avx512vlintrin.h @@ -23,6 +23,14 @@ __target__("avx512vl,no-evex512"), \ __min_vector_width__(256))) +#if defined(__cplusplus) && (__cplusplus >= 201103L) +#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr +#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr +#else +#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 +#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 +#endif + typedef short __v2hi __attribute__((__vector_size__(4))); typedef char __v4qi __attribute__((__vector_size__(4))); typedef char __v2qi __attribute__((__vector_size__(2))); @@ -6744,9 +6752,8 @@ _mm256_maskz_rsqrt14_ps (__mmask8 __U, __m256 __A) (__mmask8) __U); } -static __inline__ __m256 __DEFAULT_FN_ATTRS256 -_mm256_broadcast_f32x4(__m128 __A) -{ +static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcast_f32x4(__m128 __A) { return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, 0, 1, 2, 3, 0, 1, 2, 3); } @@ -6767,9 +6774,8 @@ _mm256_maskz_broadcast_f32x4 (__mmask8 __M, __m128 __A) (__v8sf)_mm256_setzero_ps()); } -static __inline__ __m256i __DEFAULT_FN_ATTRS256 -_mm256_broadcast_i32x4(__m128i __A) -{ +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR +_mm256_broadcast_i32x4(__m128i __A) { return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, 0, 1, 2, 3, 0, 1, 2, 3); } @@ -8385,5 +8391,7 @@ _mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A) #undef __DEFAULT_FN_ATTRS128 #undef __DEFAULT_FN_ATTRS256 +#undef __DEFAULT_FN_ATTRS256_CONSTEXPR +#undef __DEFAULT_FN_ATTRS128_CONSTEXPR #endif /* __AVX512VLINTRIN_H */ diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h index 1973ccb0e00b..58caded7430b 100644 --- a/clang/lib/Headers/emmintrin.h +++ b/clang/lib/Headers/emmintrin.h @@ -4421,8 +4421,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) { /// Bits [119:112] are written to bits [111:104] of the result. \n /// Bits [127:120] are written to bits [127:120] of the result. /// \returns A 128-bit vector of [16 x i8] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpackhi_epi8(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector( (__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11, 16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15); @@ -4449,8 +4449,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a, /// Bits [111:96] are written to bits [95:80] of the result. \n /// Bits [127:112] are written to bits [127:112] of the result. /// \returns A 128-bit vector of [8 x i16] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpackhi_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5, 8 + 5, 6, 8 + 6, 7, 8 + 7); } @@ -4472,8 +4472,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a, /// Bits [95:64] are written to bits [64:32] of the destination. \n /// Bits [127:96] are written to bits [127:96] of the destination. /// \returns A 128-bit vector of [4 x i32] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpackhi_epi32(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3, 4 + 3); } @@ -4493,8 +4493,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a, /// A 128-bit vector of [2 x i64]. \n /// Bits [127:64] are written to bits [127:64] of the destination. /// \returns A 128-bit vector of [2 x i64] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpackhi_epi64(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1); } @@ -4527,8 +4527,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a, /// Bits [55:48] are written to bits [111:104] of the result. \n /// Bits [63:56] are written to bits [127:120] of the result. /// \returns A 128-bit vector of [16 x i8] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpacklo_epi8(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector( (__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4, 16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7); @@ -4556,8 +4556,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a, /// Bits [47:32] are written to bits [95:80] of the result. \n /// Bits [63:48] are written to bits [127:112] of the result. /// \returns A 128-bit vector of [8 x i16] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpacklo_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1, 8 + 1, 2, 8 + 2, 3, 8 + 3); } @@ -4579,8 +4579,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a, /// Bits [31:0] are written to bits [64:32] of the destination. \n /// Bits [63:32] are written to bits [127:96] of the destination. /// \returns A 128-bit vector of [4 x i32] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpacklo_epi32(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1, 4 + 1); } @@ -4600,8 +4600,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a, /// A 128-bit vector of [2 x i64]. \n /// Bits [63:0] are written to bits [127:64] of the destination. \n /// \returns A 128-bit vector of [2 x i64] containing the interleaved values. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_unpacklo_epi64(__m128i __a, __m128i __b) { return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0); } diff --git a/clang/lib/Parse/ParseCXXInlineMethods.cpp b/clang/lib/Parse/ParseCXXInlineMethods.cpp index 9a010fb5f342..74e25002e468 100644 --- a/clang/lib/Parse/ParseCXXInlineMethods.cpp +++ b/clang/lib/Parse/ParseCXXInlineMethods.cpp @@ -1161,6 +1161,12 @@ bool Parser::ConsumeAndStoreInitializer(CachedTokens &Toks, while (true) { switch (Tok.getKind()) { + case tok::ellipsis: + // We found an elipsis at the end of the parameter list; + // it is not part of a parameter declaration. + if (ParenCount == 1 && NextToken().is(tok::r_paren)) + return true; + goto consume_token; case tok::comma: // If we might be in a template, perform a tentative parse to check. if (!AngleCount) diff --git a/clang/lib/Parse/Parser.cpp b/clang/lib/Parse/Parser.cpp index e57a789251a5..7d190ea99dba 100644 --- a/clang/lib/Parse/Parser.cpp +++ b/clang/lib/Parse/Parser.cpp @@ -1418,6 +1418,10 @@ Decl *Parser::ParseFunctionDefinition(ParsingDeclarator &D, // parameter list was specified. CurTemplateDepthTracker.addDepth(1); + // Late attributes are parsed in the same scope as the function body. + if (LateParsedAttrs) + ParseLexedAttributeList(*LateParsedAttrs, Res, false, true); + if (SkipFunctionBodies && (!Res || Actions.canSkipFunctionBody(Res)) && trySkippingFunctionBody()) { BodyScope.Exit(); @@ -1442,10 +1446,6 @@ Decl *Parser::ParseFunctionDefinition(ParsingDeclarator &D, } else Actions.ActOnDefaultCtorInitializers(Res); - // Late attributes are parsed in the same scope as the function body. - if (LateParsedAttrs) - ParseLexedAttributeList(*LateParsedAttrs, Res, false, true); - return ParseFunctionStatementBody(Res, BodyScope); } diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 907740374dbf..2dc4ee74dc9d 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -41,6 +41,7 @@ #include "clang/AST/UnresolvedSet.h" #include "clang/Basic/AddressSpaces.h" #include "clang/Basic/Diagnostic.h" +#include "clang/Basic/DiagnosticSema.h" #include "clang/Basic/IdentifierTable.h" #include "clang/Basic/LLVM.h" #include "clang/Basic/LangOptions.h" @@ -7656,17 +7657,13 @@ bool EquatableFormatArgument::VerifyCompatible( break; case MK::NoMatchSignedness: - if (!S.getDiagnostics().isIgnored( - diag::warn_format_conversion_argument_type_mismatch_signedness, - ElementLoc)) { - EmitDiagnostic(S, - S.PDiag(diag::warn_format_cmp_specifier_sign_mismatch) - << buildFormatSpecifier() - << Other.buildFormatSpecifier(), - FmtExpr, InFunctionCall); - HadError = S.Diag(Other.ElementLoc, diag::note_format_cmp_with) - << 0 << Other.Range; - } + EmitDiagnostic(S, + S.PDiag(diag::warn_format_cmp_specifier_sign_mismatch) + << buildFormatSpecifier() + << Other.buildFormatSpecifier(), + FmtExpr, InFunctionCall); + HadError = S.Diag(Other.ElementLoc, diag::note_format_cmp_with) + << 0 << Other.Range; break; } return !HadError; @@ -8203,11 +8200,14 @@ static analyze_format_string::ArgType::MatchKind handleFormatSignedness(analyze_format_string::ArgType::MatchKind Match, DiagnosticsEngine &Diags, SourceLocation Loc) { if (Match == analyze_format_string::ArgType::NoMatchSignedness) { - Match = + if (Diags.isIgnored( + diag::warn_format_conversion_argument_type_mismatch_signedness, + Loc) || Diags.isIgnored( - diag::warn_format_conversion_argument_type_mismatch_signedness, Loc) - ? analyze_format_string::ArgType::Match - : analyze_format_string::ArgType::NoMatch; + // Arbitrary -Wformat diagnostic to detect -Wno-format: + diag::warn_format_conversion_argument_type_mismatch, Loc)) { + return analyze_format_string::ArgType::Match; + } } return Match; } @@ -8424,8 +8424,10 @@ CheckPrintfHandler::checkFormatExpr(const analyze_printf::PrintfSpecifier &FS, case ArgType::Match: case ArgType::MatchPromotion: case ArgType::NoMatchPromotionTypeConfusion: - case ArgType::NoMatchSignedness: llvm_unreachable("expected non-matching"); + case ArgType::NoMatchSignedness: + Diag = diag::warn_format_conversion_argument_type_mismatch_signedness; + break; case ArgType::NoMatchPedantic: Diag = diag::warn_format_conversion_argument_type_mismatch_pedantic; break; @@ -8750,9 +8752,10 @@ bool CheckScanfHandler::HandleScanfSpecifier( analyze_format_string::ArgType::MatchKind Match = AT.matchesType(S.Context, Ex->getType()); Match = handleFormatSignedness(Match, S.getDiagnostics(), Ex->getExprLoc()); - bool Pedantic = Match == analyze_format_string::ArgType::NoMatchPedantic; if (Match == analyze_format_string::ArgType::Match) return true; + bool Pedantic = Match == analyze_format_string::ArgType::NoMatchPedantic; + bool Signedness = Match == analyze_format_string::ArgType::NoMatchSignedness; ScanfSpecifier fixedFS = FS; bool Success = fixedFS.fixType(Ex->getType(), Ex->IgnoreImpCasts()->getType(), @@ -8760,7 +8763,9 @@ bool CheckScanfHandler::HandleScanfSpecifier( unsigned Diag = Pedantic ? diag::warn_format_conversion_argument_type_mismatch_pedantic - : diag::warn_format_conversion_argument_type_mismatch; + : Signedness + ? diag::warn_format_conversion_argument_type_mismatch_signedness + : diag::warn_format_conversion_argument_type_mismatch; if (Success) { // Get the fix string from the fixed format specifier. @@ -14120,7 +14125,6 @@ void Sema::CheckCompletedExpr(Expr *E, SourceLocation CheckLoc, CheckUnsequencedOperations(E); if (!IsConstexpr && !E->isValueDependent()) CheckForIntOverflow(E); - DiagnoseMisalignedMembers(); } void Sema::CheckBitFieldInitialization(SourceLocation InitLoc, @@ -15565,11 +15569,12 @@ void Sema::CheckArgumentWithTypeTag(const ArgumentWithTypeTagAttr *Attr, void Sema::AddPotentialMisalignedMembers(Expr *E, RecordDecl *RD, ValueDecl *MD, CharUnits Alignment) { - MisalignedMembers.emplace_back(E, RD, MD, Alignment); + currentEvaluationContext().MisalignedMembers.emplace_back(E, RD, MD, + Alignment); } void Sema::DiagnoseMisalignedMembers() { - for (MisalignedMember &m : MisalignedMembers) { + for (MisalignedMember &m : currentEvaluationContext().MisalignedMembers) { const NamedDecl *ND = m.RD; if (ND->getName().empty()) { if (const TypedefNameDecl *TD = m.RD->getTypedefNameForAnonDecl()) @@ -15578,7 +15583,7 @@ void Sema::DiagnoseMisalignedMembers() { Diag(m.E->getBeginLoc(), diag::warn_taking_address_of_packed_member) << m.MD << ND << m.E->getSourceRange(); } - MisalignedMembers.clear(); + currentEvaluationContext().MisalignedMembers.clear(); } void Sema::DiscardMisalignedMemberAddress(const Type *T, Expr *E) { @@ -15589,13 +15594,15 @@ void Sema::DiscardMisalignedMemberAddress(const Type *T, Expr *E) { cast<UnaryOperator>(E)->getOpcode() == UO_AddrOf) { auto *Op = cast<UnaryOperator>(E)->getSubExpr()->IgnoreParens(); if (isa<MemberExpr>(Op)) { - auto *MA = llvm::find(MisalignedMembers, MisalignedMember(Op)); - if (MA != MisalignedMembers.end() && + auto &MisalignedMembersForExpr = + currentEvaluationContext().MisalignedMembers; + auto *MA = llvm::find(MisalignedMembersForExpr, MisalignedMember(Op)); + if (MA != MisalignedMembersForExpr.end() && (T->isDependentType() || T->isIntegerType() || (T->isPointerType() && (T->getPointeeType()->isIncompleteType() || Context.getTypeAlignInChars( T->getPointeeType()) <= MA->Alignment)))) - MisalignedMembers.erase(MA); + MisalignedMembersForExpr.erase(MA); } } } diff --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp index cb59782b8330..6581d4c604eb 100644 --- a/clang/lib/Sema/SemaDecl.cpp +++ b/clang/lib/Sema/SemaDecl.cpp @@ -3653,7 +3653,9 @@ bool Sema::MergeFunctionDecl(FunctionDecl *New, NamedDecl *&OldD, Scope *S, FunctionDecl *Old = OldD->getAsFunction(); if (!Old) { if (UsingShadowDecl *Shadow = dyn_cast<UsingShadowDecl>(OldD)) { - if (New->getFriendObjectKind()) { + // We don't need to check the using friend pattern from other module unit + // since we should have diagnosed such cases in its unit already. + if (New->getFriendObjectKind() && !OldD->isInAnotherModuleUnit()) { Diag(New->getLocation(), diag::err_using_decl_friend); Diag(Shadow->getTargetDecl()->getLocation(), diag::note_using_decl_target); diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp index 85320396fd17..237c068f5928 100644 --- a/clang/lib/Sema/SemaExpr.cpp +++ b/clang/lib/Sema/SemaExpr.cpp @@ -18121,6 +18121,8 @@ void Sema::PopExpressionEvaluationContext() { MaybeODRUseExprs.insert_range(Rec.SavedMaybeODRUseExprs); } + DiagnoseMisalignedMembers(); + // Pop the current expression evaluation context off the stack. ExprEvalContexts.pop_back(); } diff --git a/clang/lib/Sema/SemaOpenACCClause.cpp b/clang/lib/Sema/SemaOpenACCClause.cpp index e8a18243e6db..aa54ff81dbba 100644 --- a/clang/lib/Sema/SemaOpenACCClause.cpp +++ b/clang/lib/Sema/SemaOpenACCClause.cpp @@ -1054,13 +1054,17 @@ OpenACCClause *SemaOpenACCClauseVisitor::VisitWaitClause( OpenACCClause *SemaOpenACCClauseVisitor::VisitDeviceTypeClause( SemaOpenACC::OpenACCParsedClause &Clause) { - // Based on discussions, having more than 1 'architecture' on a 'set' is - // nonsensical, so we're going to fix the standard to reflect this. Implement - // the limitation, since the Dialect requires this. - if (Clause.getDirectiveKind() == OpenACCDirectiveKind::Set && + // OpenACC Pull #550 (https://github.com/OpenACC/openacc-spec/pull/550) + // clarified that Init, Shutdown, and Set only support a single architecture. + // Though the dialect only requires it for 'set' as far as we know, we'll just + // implement all 3 here. + if ((Clause.getDirectiveKind() == OpenACCDirectiveKind::Init || + Clause.getDirectiveKind() == OpenACCDirectiveKind::Shutdown || + Clause.getDirectiveKind() == OpenACCDirectiveKind::Set) && Clause.getDeviceTypeArchitectures().size() > 1) { SemaRef.Diag(Clause.getDeviceTypeArchitectures()[1].getLoc(), - diag::err_acc_device_type_multiple_archs); + diag::err_acc_device_type_multiple_archs) + << Clause.getDirectiveKind(); return nullptr; } diff --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp index d593d1d74d73..ac64dd5c9c41 100644 --- a/clang/lib/Sema/SemaOverload.cpp +++ b/clang/lib/Sema/SemaOverload.cpp @@ -6275,7 +6275,9 @@ static ExprResult BuildConvertedConstantExpression(Sema &S, Expr *From, QualType T, CCEKind CCE, NamedDecl *Dest, APValue &PreNarrowingValue) { - assert((S.getLangOpts().CPlusPlus11 || CCE == CCEKind::TempArgStrict) && + [[maybe_unused]] bool isCCEAllowedPreCXX11 = + (CCE == CCEKind::TempArgStrict || CCE == CCEKind::ExplicitBool); + assert((S.getLangOpts().CPlusPlus11 || isCCEAllowedPreCXX11) && "converted constant expression outside C++11 or TTP matching"); if (checkPlaceholderForOverload(S, From)) diff --git a/clang/test/AST/ast-dump-comment.cpp b/clang/test/AST/ast-dump-comment.cpp index 40c3edb62821..b67f79916d96 100644 --- a/clang/test/AST/ast-dump-comment.cpp +++ b/clang/test/AST/ast-dump-comment.cpp @@ -131,3 +131,9 @@ void Test_TemplatedFunctionVariadic(int arg, ...); // CHECK: ParamCommandComment{{.*}} [in] implicitly Param="..." // CHECK-NEXT: ParagraphComment // CHECK-NEXT: TextComment{{.*}} Text=" More arguments" + +/// \thread_safe test for underscore in special command +int Test_UnderscoreInSpecialCommand; +// CHECK: VarDecl{{.*}}Test_UnderscoreInSpecialCommand 'int' +// CHECK: InlineCommandComment{{.*}} Name="thread_safe" RenderNormal +// CHECK-NEXT: TextComment{{.*}} Text=" test for underscore in special command" diff --git a/clang/test/CIR/CodeGen/array.cpp b/clang/test/CIR/CodeGen/array.cpp index 141b67e0e63c..60028af4b316 100644 --- a/clang/test/CIR/CodeGen/array.cpp +++ b/clang/test/CIR/CodeGen/array.cpp @@ -129,31 +129,50 @@ void func2() { } // CIR: %[[ARR2:.*]] = cir.alloca !cir.array<!s32i x 2>, !cir.ptr<!cir.array<!s32i x 2>>, ["arr", init] -// CIR: %[[ELE_ALLOCA:.*]] = cir.alloca !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>>, ["arrayinit.temp", init] -// CIR: %[[ARR_2_PTR:.*]] = cir.cast(array_to_ptrdecay, %[[ARR2]] : !cir.ptr<!cir.array<!s32i x 2>>), !cir.ptr<!s32i> -// CIR: %[[V1:.*]] = cir.const #cir.int<5> : !s32i -// CIR: cir.store{{.*}} %[[V1]], %[[ARR_2_PTR]] : !s32i, !cir.ptr<!s32i> +// CIR: %[[ARR_PTR:.*]] = cir.alloca !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>>, ["arrayinit.temp", init] +// CIR: %[[ARR_0:.*]] = cir.cast(array_to_ptrdecay, %[[ARR2]] : !cir.ptr<!cir.array<!s32i x 2>>), !cir.ptr<!s32i> +// CIR: %[[FIVE:.*]] = cir.const #cir.int<5> : !s32i +// CIR: cir.store{{.*}} %[[FIVE]], %[[ARR_0]] : !s32i, !cir.ptr<!s32i> // CIR: %[[OFFSET_0:.*]] = cir.const #cir.int<1> : !s64i -// CIR: %[[ELE_PTR:.*]] = cir.ptr_stride(%[[ARR_2_PTR]] : !cir.ptr<!s32i>, %[[OFFSET_0]] : !s64i), !cir.ptr<!s32i> -// CIR: cir.store{{.*}} %[[ELE_PTR]], %[[ELE_ALLOCA]] : !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>> -// CIR: %[[LOAD_1:.*]] = cir.load{{.*}} %[[ELE_ALLOCA]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!s32i> -// CIR: %[[V2:.*]] = cir.const #cir.int<0> : !s32i -// CIR: cir.store{{.*}} %[[V2]], %[[LOAD_1]] : !s32i, !cir.ptr<!s32i> -// CIR: %[[OFFSET_1:.*]] = cir.const #cir.int<1> : !s64i -// CIR: %[[ELE_1_PTR:.*]] = cir.ptr_stride(%[[LOAD_1]] : !cir.ptr<!s32i>, %[[OFFSET_1]] : !s64i), !cir.ptr<!s32i> -// CIR: cir.store{{.*}} %[[ELE_1_PTR]], %[[ELE_ALLOCA]] : !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>> +// CIR: %[[ELE_PTR:.*]] = cir.ptr_stride(%[[ARR_0]] : !cir.ptr<!s32i>, %[[OFFSET_0]] : !s64i), !cir.ptr<!s32i> +// CIR: cir.store{{.*}} %[[ELE_PTR]], %[[ARR_PTR]] : !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>> +// CIR: %[[TWO:.*]] = cir.const #cir.int<2> : !s64i +// CIR: %[[ARR_END:.*]] = cir.ptr_stride(%[[ARR_0]] : !cir.ptr<!s32i>, %[[TWO]] : !s64i), !cir.ptr<!s32i> +// CIR: cir.do { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!s32i> +// CIR: %[[ZERO:.*]] = cir.const #cir.int<0> : !s32i +// CIR: cir.store{{.*}} %[[ZERO]], %[[ARR_CUR]] : !s32i, !cir.ptr<!s32i> +// CIR: %[[ONE:.*]] = cir.const #cir.int<1> : !s64i +// CIR: %[[ARR_NEXT:.*]] = cir.ptr_stride(%[[ARR_CUR]] : !cir.ptr<!s32i>, %[[ONE]] : !s64i), !cir.ptr<!s32i> +// CIR: cir.store{{.*}} %[[ARR_NEXT]], %[[ARR_PTR]] : !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>> +// CIR: cir.yield +// CIR: } while { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!s32i> +// CIR: %[[CMP:.*]] = cir.cmp(ne, %[[ARR_CUR]], %[[ARR_END]]) : !cir.ptr<!s32i>, !cir.bool +// CIR: cir.condition(%[[CMP]]) +// CIR: } // LLVM: define{{.*}} void @_Z5func2v() -// LLVM: %[[ARR:.*]] = alloca [2 x i32], i64 1, align 4 -// LLVM: %[[TMP:.*]] = alloca ptr, i64 1, align 8 -// LLVM: %[[ARR_PTR:.*]] = getelementptr i32, ptr %[[ARR]], i32 0 -// LLVM: store i32 5, ptr %[[ARR_PTR]], align 4 -// LLVM: %[[ELE_1_PTR:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i64 1 -// LLVM: store ptr %[[ELE_1_PTR]], ptr %[[TMP]], align 8 -// LLVM: %[[TMP2:.*]] = load ptr, ptr %[[TMP]], align 8 -// LLVM: store i32 0, ptr %[[TMP2]], align 4 -// LLVM: %[[ELE_1:.*]] = getelementptr i32, ptr %[[TMP2]], i64 1 -// LLVM: store ptr %[[ELE_1]], ptr %[[TMP]], align 8 +// LLVM: %[[ARR:.*]] = alloca [2 x i32], i64 1, align 4 +// LLVM: %[[TMP:.*]] = alloca ptr, i64 1, align 8 +// LLVM: %[[ARR_PTR:.*]] = getelementptr i32, ptr %[[ARR]], i32 0 +// LLVM: store i32 5, ptr %[[ARR_PTR]], align 4 +// LLVM: %[[ELE_1_PTR:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i64 1 +// LLVM: store ptr %[[ELE_1_PTR]], ptr %[[TMP]], align 8 +// LLVM: %[[END_PTR:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i64 2 +// LLVM: br label %[[LOOP_BODY:.*]] +// LLVM: [[LOOP_NEXT:.*]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// LLVM: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[END_PTR]] +// LLVM: br i1 %[[CMP]], label %[[LOOP_BODY]], label %[[LOOP_END:.*]] +// LLVM: [[LOOP_BODY]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// LLVM: store i32 0, ptr %[[CUR]], align 4 +// LLVM: %[[NEXT:.*]] = getelementptr i32, ptr %[[CUR]], i64 1 +// LLVM: store ptr %[[NEXT]], ptr %[[TMP]], align 8 +// LLVM: br label %[[LOOP_NEXT:.*]] +// LLVM: [[LOOP_END]]: +// LLVM: ret void // OGCG: %[[ARR:.*]] = alloca [2 x i32], align 4 // OGCG: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[ARR]], ptr align 4 @[[FUN2_ARR]], i64 8, i1 false) @@ -270,27 +289,46 @@ void func5() { // CIR: %[[V_0_0:.*]] = cir.const #cir.int<5> : !s32i // CIR: cir.store{{.*}} %[[V_0_0]], %[[ARR_0_PTR]] : !s32i, !cir.ptr<!s32i> // CIR: %[[OFFSET:.*]] = cir.const #cir.int<1> : !s64i -// CIR: %6 = cir.ptr_stride(%[[ARR_0]] : !cir.ptr<!cir.array<!s32i x 1>>, %[[OFFSET]] : !s64i), !cir.ptr<!cir.array<!s32i x 1>> -// CIR: cir.store{{.*}} %6, %[[ARR_PTR]] : !cir.ptr<!cir.array<!s32i x 1>>, !cir.ptr<!cir.ptr<!cir.array<!s32i x 1>>> -// CIR: %7 = cir.load{{.*}} %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!cir.array<!s32i x 1>>>, !cir.ptr<!cir.array<!s32i x 1>> -// CIR: %8 = cir.const #cir.zero : !cir.array<!s32i x 1> -// CIR: cir.store{{.*}} %8, %7 : !cir.array<!s32i x 1>, !cir.ptr<!cir.array<!s32i x 1>> -// CIR: %[[OFFSET_1:.*]] = cir.const #cir.int<1> : !s64i -// CIR: %10 = cir.ptr_stride(%7 : !cir.ptr<!cir.array<!s32i x 1>>, %[[OFFSET_1]] : !s64i), !cir.ptr<!cir.array<!s32i x 1>> -// CIR: cir.store{{.*}} %10, %[[ARR_PTR]] : !cir.ptr<!cir.array<!s32i x 1>>, !cir.ptr<!cir.ptr<!cir.array<!s32i x 1>>> +// CIR: %[[ARR_1:.*]] = cir.ptr_stride(%[[ARR_0]] : !cir.ptr<!cir.array<!s32i x 1>>, %[[OFFSET]] : !s64i), !cir.ptr<!cir.array<!s32i x 1>> +// CIR: cir.store{{.*}} %[[ARR_1]], %[[ARR_PTR]] : !cir.ptr<!cir.array<!s32i x 1>>, !cir.ptr<!cir.ptr<!cir.array<!s32i x 1>>> +// CIR: %[[TWO:.*]] = cir.const #cir.int<2> : !s64i +// CIR: %[[ARR_END:.*]] = cir.ptr_stride(%[[ARR_0]] : !cir.ptr<!cir.array<!s32i x 1>>, %[[TWO]] : !s64i), !cir.ptr<!cir.array<!s32i x 1>> +// CIR: cir.do { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!cir.array<!s32i x 1>>>, !cir.ptr<!cir.array<!s32i x 1>> +// CIR: %[[ZERO:.*]] = cir.const #cir.zero : !cir.array<!s32i x 1> +// CIR: cir.store{{.*}} %[[ZERO]], %[[ARR_CUR]] : !cir.array<!s32i x 1>, !cir.ptr<!cir.array<!s32i x 1>> +// CIR: %[[ONE:.*]] = cir.const #cir.int<1> : !s64i +// CIR: %[[ARR_NEXT:.*]] = cir.ptr_stride(%[[ARR_CUR]] : !cir.ptr<!cir.array<!s32i x 1>>, %[[ONE]] : !s64i), !cir.ptr<!cir.array<!s32i x 1>> +// CIR: cir.store{{.*}} %[[ARR_NEXT]], %[[ARR_PTR]] : !cir.ptr<!cir.array<!s32i x 1>>, !cir.ptr<!cir.ptr<!cir.array<!s32i x 1>>> +// CIR: cir.yield +// CIR: } while { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!cir.array<!s32i x 1>>>, !cir.ptr<!cir.array<!s32i x 1>> +// CIR: %[[CMP:.*]] = cir.cmp(ne, %[[ARR_CUR]], %[[ARR_END]]) : !cir.ptr<!cir.array<!s32i x 1>>, !cir.bool +// CIR: cir.condition(%[[CMP]]) +// CIR: } // LLVM: define{{.*}} void @_Z5func5v() -// LLVM: %[[ARR:.*]] = alloca [2 x [1 x i32]], i64 1, align 4 -// LLVM: %[[TMP:.*]] = alloca ptr, i64 1, align 8 -// LLVM: %[[ARR_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR]], i32 0 -// LLVM: %[[ARR_0:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i32 0 -// LLVM: store i32 5, ptr %[[ARR_0]], align 4 -// LLVM: %[[ARR_1:.*]] = getelementptr [1 x i32], ptr %[[ARR_PTR]], i64 1 -// LLVM: store ptr %[[ARR_1]], ptr %[[TMP]], align 8 -// LLVM: %[[ARR_1_VAL:.*]] = load ptr, ptr %[[TMP]], align 8 -// LLVM: store [1 x i32] zeroinitializer, ptr %[[ARR_1_VAL]], align 4 -// LLVM: %[[ARR_1_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR_1_VAL]], i64 1 -// LLVM: store ptr %[[ARR_1_PTR]], ptr %[[TMP]], align 8 +// LLVM: %[[ARR:.*]] = alloca [2 x [1 x i32]], i64 1, align 4 +// LLVM: %[[TMP:.*]] = alloca ptr, i64 1, align 8 +// LLVM: %[[ARR_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR]], i32 0 +// LLVM: %[[ARR_0:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i32 0 +// LLVM: store i32 5, ptr %[[ARR_0]], align 4 +// LLVM: %[[ARR_1:.*]] = getelementptr [1 x i32], ptr %[[ARR_PTR]], i64 1 +// LLVM: store ptr %[[ARR_1]], ptr %[[TMP]], align 8 +// LLVM: %[[END_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR_PTR]], i64 2 +// LLVM: br label %[[LOOP_BODY:.*]] +// LLVM: [[LOOP_NEXT:.*]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// LLVM: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[END_PTR]] +// LLVM: br i1 %[[CMP]], label %[[LOOP_BODY]], label %[[LOOP_END:.*]] +// LLVM: [[LOOP_BODY]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// LLVM: store [1 x i32] zeroinitializer, ptr %[[CUR]], align 4 +// LLVM: %[[NEXT:.*]] = getelementptr [1 x i32], ptr %[[CUR]], i64 1 +// LLVM: store ptr %[[NEXT]], ptr %[[TMP]], align 8 +// LLVM: br label %[[LOOP_NEXT:.*]] +// LLVM: [[LOOP_END]]: +// LLVM: ret void // ORGC: %[[ARR:.*]] = alloca [2 x [1 x i32]], align 4 // ORGC: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[ARR]], ptr align 4 @[[FUN5_ARR]], i64 8, i1 false) @@ -335,25 +373,44 @@ void func7() { } // CIR: %[[ARR:.*]] = cir.alloca !cir.array<!cir.ptr<!s32i> x 1>, !cir.ptr<!cir.array<!cir.ptr<!s32i> x 1>>, ["arr", init] -// CIR: %[[ARR_TMP:.*]] = cir.alloca !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>>, ["arrayinit.temp", init] -// CIR: %[[ARR_PTR:.*]] = cir.cast(array_to_ptrdecay, %[[ARR]] : !cir.ptr<!cir.array<!cir.ptr<!s32i> x 1>>), !cir.ptr<!cir.ptr<!s32i>> -// CIR: cir.store{{.*}} %[[ARR_PTR]], %[[ARR_TMP]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>> -// CIR: %[[TMP:.*]] = cir.load{{.*}} %[[ARR_TMP]] : !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>>, !cir.ptr<!cir.ptr<!s32i>> -// CIR: %[[NULL_PTR:.*]] = cir.const #cir.ptr<null> : !cir.ptr<!s32i> -// CIR: cir.store{{.*}} %[[NULL_PTR]], %[[TMP]] : !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>> -// CIR: %[[OFFSET:.*]] = cir.const #cir.int<1> : !s64i -// CIR: %[[ELE_PTR:.*]] = cir.ptr_stride(%[[TMP]] : !cir.ptr<!cir.ptr<!s32i>>, %[[OFFSET]] : !s64i), !cir.ptr<!cir.ptr<!s32i>> -// CIR: cir.store{{.*}} %[[ELE_PTR]], %[[ARR_TMP]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>> +// CIR: %[[ARR_PTR:.*]] = cir.alloca !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>>, ["arrayinit.temp", init] +// CIR: %[[ARR_0:.*]] = cir.cast(array_to_ptrdecay, %[[ARR]] : !cir.ptr<!cir.array<!cir.ptr<!s32i> x 1>>), !cir.ptr<!cir.ptr<!s32i>> +// CIR: cir.store{{.*}} %[[ARR_0]], %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>> +// CIR: %[[ONE:.*]] = cir.const #cir.int<1> : !s64i +// CIR: %[[ARR_END:.*]] = cir.ptr_stride(%[[ARR_0]] : !cir.ptr<!cir.ptr<!s32i>>, %[[ONE]] : !s64i), !cir.ptr<!cir.ptr<!s32i>> +// CIR: cir.do { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>>, !cir.ptr<!cir.ptr<!s32i>> +// CIR: %[[NULL_PTR:.*]] = cir.const #cir.ptr<null> : !cir.ptr<!s32i> +// CIR: cir.store{{.*}} %[[NULL_PTR]], %[[ARR_CUR]] : !cir.ptr<!s32i>, !cir.ptr<!cir.ptr<!s32i>> +// CIR: %[[ONE:.*]] = cir.const #cir.int<1> : !s64i +// CIR: %[[ARR_NEXT:.*]] = cir.ptr_stride(%[[ARR_CUR]] : !cir.ptr<!cir.ptr<!s32i>>, %[[ONE]] : !s64i), !cir.ptr<!cir.ptr<!s32i>> +// CIR: cir.store{{.*}} %[[ARR_NEXT]], %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!s32i>>, !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>> +// CIR: cir.yield +// CIR: } while { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] : !cir.ptr<!cir.ptr<!cir.ptr<!s32i>>>, !cir.ptr<!cir.ptr<!s32i>> +// CIR: %[[CMP:.*]] = cir.cmp(ne, %[[ARR_CUR]], %[[ARR_END]]) : !cir.ptr<!cir.ptr<!s32i>>, !cir.bool +// CIR: cir.condition(%[[CMP]]) +// CIR: } // LLVM: define{{.*}} void @_Z5func7v() -// LLVM: %[[ARR:.*]] = alloca [1 x ptr], i64 1, align 8 -// LLVM: %[[ALLOCA:.*]] = alloca ptr, i64 1, align 8 -// LLVM: %[[ELE_PTR:.*]] = getelementptr ptr, ptr %[[ARR]], i32 0 -// LLVM: store ptr %[[ELE_PTR]], ptr %[[ALLOCA]], align 8 -// LLVM: %[[TMP:.*]] = load ptr, ptr %[[ALLOCA]], align 8 -// LLVM: store ptr null, ptr %[[TMP]], align 8 -// LLVM: %[[ELE:.*]] = getelementptr ptr, ptr %[[TMP]], i64 1 -// LLVM: store ptr %[[ELE]], ptr %[[ALLOCA]], align 8 +// LLVM: %[[ARR:.*]] = alloca [1 x ptr], i64 1, align 8 +// LLVM: %[[TMP:.*]] = alloca ptr, i64 1, align 8 +// LLVM: %[[ARR_PTR:.*]] = getelementptr ptr, ptr %[[ARR]], i32 0 +// LLVM: store ptr %[[ARR_PTR]], ptr %[[TMP]], align 8 +// LLVM: %[[END_PTR:.*]] = getelementptr ptr, ptr %[[ARR_PTR]], i64 1 +// LLVM: br label %[[LOOP_BODY:.*]] +// LLVM: [[LOOP_NEXT:.*]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// LLVM: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[END_PTR]] +// LLVM: br i1 %[[CMP]], label %[[LOOP_BODY]], label %[[LOOP_END:.*]] +// LLVM: [[LOOP_BODY]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// LLVM: store ptr null, ptr %[[CUR]], align 8 +// LLVM: %[[NEXT:.*]] = getelementptr ptr, ptr %[[CUR]], i64 1 +// LLVM: store ptr %[[NEXT]], ptr %[[TMP]], align 8 +// LLVM: br label %[[LOOP_NEXT:.*]] +// LLVM: [[LOOP_END]]: +// LLVM: ret void // OGCG: %[[ARR:.*]] = alloca [1 x ptr], align 8 // OGCG: call void @llvm.memset.p0.i64(ptr align 8 %[[ARR]], i8 0, i64 8, i1 false) diff --git a/clang/test/CIR/CodeGen/builtins.cpp b/clang/test/CIR/CodeGen/builtins.cpp new file mode 100644 index 000000000000..3d43821af4e5 --- /dev/null +++ b/clang/test/CIR/CodeGen/builtins.cpp @@ -0,0 +1,14 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir +// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll +// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll +// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG + +double fabs(double x) { + return __builtin_fabs(x); +} + +// CIR: {{.*}} = cir.fabs {{.*}} : !cir.double +// LLVM: {{.*}} = call double @llvm.fabs.f64(double {{.*}}) +// OGCG: {{.*}} = call double @llvm.fabs.f64(double {{.*}}) diff --git a/clang/test/CIR/CodeGen/destructors.cpp b/clang/test/CIR/CodeGen/destructors.cpp index de7718f0998f..fde0732a4352 100644 --- a/clang/test/CIR/CodeGen/destructors.cpp +++ b/clang/test/CIR/CodeGen/destructors.cpp @@ -55,3 +55,102 @@ struct inline_destructor { // CIR-NOT: cir.func {{.*}}inline_destructor{{.*}} // LLVM-NOT: define {{.*}}inline_destructor{{.*}} // OGCG-NOT: define {{.*}}inline_destructor{{.*}} + +struct array_element {~array_element();}; +void test_array_destructor() { + array_element arr[5]{}; +} + +// CIR: cir.func dso_local @_Z21test_array_destructorv() +// CIR: %[[ARR:.*]] = cir.alloca !cir.array<!rec_array_element x 5>, !cir.ptr<!cir.array<!rec_array_element x 5>>, ["arr", init] +// CIR: %[[ARR_PTR:.*]] = cir.alloca !cir.ptr<!rec_array_element>, !cir.ptr<!cir.ptr<!rec_array_element>>, ["arrayinit.temp", init] +// CIR: %[[BEGIN:.*]] = cir.cast(array_to_ptrdecay, %[[ARR]] : !cir.ptr<!cir.array<!rec_array_element x 5>>) +// CIR: cir.store{{.*}} %[[BEGIN]], %[[ARR_PTR]] +// CIR: %[[FIVE:.*]] = cir.const #cir.int<5> : !s64i +// CIR: %[[ARR_END:.*]] = cir.ptr_stride(%[[BEGIN]] : !cir.ptr<!rec_array_element>, %[[FIVE]] : !s64i) +// CIR: cir.do { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] +// CIR: %[[ONE:.*]] = cir.const #cir.int<1> : !s64i +// CIR: %[[ARR_NEXT:.*]] = cir.ptr_stride(%[[ARR_CUR]] : !cir.ptr<!rec_array_element>, %[[ONE]] : !s64i) +// CIR: cir.store{{.*}} %[[ARR_NEXT]], %[[ARR_PTR]] : !cir.ptr<!rec_array_element>, !cir.ptr<!cir.ptr<!rec_array_element>> +// CIR: cir.yield +// CIR: } while { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] +// CIR: %[[CMP:.*]] = cir.cmp(ne, %[[ARR_CUR]], %[[ARR_END]]) +// CIR: cir.condition(%[[CMP]]) +// CIR: } +// CIR: %[[FOUR:.*]] = cir.const #cir.int<4> : !u64i +// CIR: %[[BEGIN:.*]] = cir.cast(array_to_ptrdecay, %[[ARR]] : !cir.ptr<!cir.array<!rec_array_element x 5>>) +// CIR: %[[END:.*]] = cir.ptr_stride(%[[BEGIN]] : !cir.ptr<!rec_array_element>, %[[FOUR]] : !u64i) +// CIR: %[[ARR_PTR:.*]] = cir.alloca !cir.ptr<!rec_array_element>, !cir.ptr<!cir.ptr<!rec_array_element>>, ["__array_idx"] +// CIR: cir.store %[[END]], %[[ARR_PTR]] +// CIR: cir.do { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] +// CIR: cir.call @_ZN13array_elementD1Ev(%[[ARR_CUR]]) nothrow : (!cir.ptr<!rec_array_element>) -> () +// CIR: %[[NEG_ONE:.*]] = cir.const #cir.int<-1> : !s64i +// CIR: %[[ARR_NEXT:.*]] = cir.ptr_stride(%[[ARR_CUR]] : !cir.ptr<!rec_array_element>, %[[NEG_ONE]] : !s64i) +// CIR: cir.store %[[ARR_NEXT]], %[[ARR_PTR]] +// CIR: cir.yield +// CIR: } while { +// CIR: %[[ARR_CUR:.*]] = cir.load{{.*}} %[[ARR_PTR]] +// CIR: %[[CMP:.*]] = cir.cmp(ne, %[[ARR_CUR]], %[[BEGIN]]) +// CIR: cir.condition(%[[CMP]]) +// CIR: } + +// LLVM: define{{.*}} void @_Z21test_array_destructorv() +// LLVM: %[[ARR:.*]] = alloca [5 x %struct.array_element] +// LLVM: %[[TMP:.*]] = alloca ptr +// LLVM: %[[ARR_PTR:.*]] = getelementptr %struct.array_element, ptr %[[ARR]], i32 0 +// LLVM: store ptr %[[ARR_PTR]], ptr %[[TMP]] +// LLVM: %[[END_PTR:.*]] = getelementptr %struct.array_element, ptr %[[ARR_PTR]], i64 5 +// LLVM: br label %[[INIT_LOOP_BODY:.*]] +// LLVM: [[INIT_LOOP_NEXT:.*]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]] +// LLVM: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[END_PTR]] +// LLVM: br i1 %[[CMP]], label %[[INIT_LOOP_BODY]], label %[[INIT_LOOP_END:.*]] +// LLVM: [[INIT_LOOP_BODY]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[TMP]] +// LLVM: %[[NEXT:.*]] = getelementptr %struct.array_element, ptr %[[CUR]], i64 1 +// LLVM: store ptr %[[NEXT]], ptr %[[TMP]] +// LLVM: br label %[[INIT_LOOP_NEXT:.*]] +// LLVM: [[INIT_LOOP_END]]: +// LLVM: %[[ARR_BEGIN:.*]] = getelementptr %struct.array_element, ptr %[[ARR]], i32 0 +// LLVM: %[[ARR_END:.*]] = getelementptr %struct.array_element, ptr %[[ARR_BEGIN]], i64 4 +// LLVM: %[[ARR_CUR:.*]] = alloca ptr +// LLVM: store ptr %[[ARR_END]], ptr %[[ARR_CUR]] +// LLVM: br label %[[DESTROY_LOOP_BODY:.*]] +// LLVM: [[DESTROY_LOOP_NEXT:.*]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[ARR_CUR]] +// LLVM: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[ARR_BEGIN]] +// LLVM: br i1 %[[CMP]], label %[[DESTROY_LOOP_BODY]], label %[[DESTROY_LOOP_END:.*]] +// LLVM: [[DESTROY_LOOP_BODY]]: +// LLVM: %[[CUR:.*]] = load ptr, ptr %[[ARR_CUR]] +// LLVM: call void @_ZN13array_elementD1Ev(ptr %[[CUR]]) +// LLVM: %[[PREV:.*]] = getelementptr %struct.array_element, ptr %[[CUR]], i64 -1 +// LLVM: store ptr %[[PREV]], ptr %[[ARR_CUR]] +// LLVM: br label %[[DESTROY_LOOP_NEXT]] +// LLVM: [[DESTROY_LOOP_END]]: +// LLVM: ret void + +// OGCG: define{{.*}} void @_Z21test_array_destructorv() +// OGCG: entry: +// OGCG: %[[ARR:.*]] = alloca [5 x %struct.array_element] +// OGCG: %[[ARRAYINIT_END:.*]] = getelementptr inbounds %struct.array_element, ptr %[[ARR]], i64 5 +// OGCG: br label %[[INIT_LOOP_BODY:.*]] +// OGCG: [[INIT_LOOP_BODY]]: +// OGCG: %[[CUR:.*]] = phi ptr [ %[[ARR]], %entry ], [ %[[NEXT:.*]], %[[INIT_LOOP_BODY]] ] +// OGCG: %[[NEXT]] = getelementptr inbounds %struct.array_element, ptr %[[CUR]], i64 1 +// OGCG: %[[CMP:.*]] = icmp eq ptr %[[NEXT]], %[[ARRAYINIT_END]] +// OGCG: br i1 %[[CMP]], label %[[INIT_LOOP_END:.*]], label %[[INIT_LOOP_BODY]] +// OGCG: [[INIT_LOOP_END:.*]]: +// OGCG: %[[BEGIN:.*]] = getelementptr inbounds [5 x %struct.array_element], ptr %[[ARR]], i32 0, i32 0 +// OGCG: %[[END:.*]] = getelementptr inbounds %struct.array_element, ptr %[[BEGIN]], i64 5 +// OGCG: br label %[[DESTROY_LOOP_BODY:.*]] +// OGCG: [[DESTROY_LOOP_BODY:.*]]: +// OGCG: %[[CUR:.*]] = phi ptr [ %[[END]], %[[INIT_LOOP_END]] ], [ %[[PREV:.*]], %[[DESTROY_LOOP_BODY]] ] +// OGCG: %[[PREV]] = getelementptr inbounds %struct.array_element, ptr %[[CUR]], i64 -1 +// OGCG: call void @_ZN13array_elementD1Ev(ptr {{.*}} %[[PREV]]) +// OGCG: %[[CMP:.*]] = icmp eq ptr %[[PREV]], %[[BEGIN]] +// OGCG: br i1 %[[CMP]], label %[[DESTROY_LOOP_END:.*]], label %[[DESTROY_LOOP_BODY]] +// OGCG: [[DESTROY_LOOP_END:.*]]: +// OGCG: ret void diff --git a/clang/test/CIR/CodeGen/label.c b/clang/test/CIR/CodeGen/label.c new file mode 100644 index 000000000000..2a515fc4046e --- /dev/null +++ b/clang/test/CIR/CodeGen/label.c @@ -0,0 +1,103 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir +// RUN: FileCheck --input-file=%t.cir %s --check-prefix=CIR +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll +// RUN: FileCheck --input-file=%t.ll %s --check-prefix=OGCG + +void label() { +labelA: + return; +} + +// CIR: cir.func no_proto dso_local @label +// CIR: cir.label "labelA" +// CIR: cir.return + +// Note: We are not lowering to LLVM IR via CIR at this stage because that +// process depends on the GotoSolver. + +// OGCG: define dso_local void @label +// OGCG: br label %labelA +// OGCG: labelA: +// OGCG: ret void + +void multiple_labels() { +labelB: +labelC: + return; +} + +// CIR: cir.func no_proto dso_local @multiple_labels +// CIR: cir.label "labelB" +// CIR: cir.br ^bb1 +// CIR: ^bb1: // pred: ^bb0 +// CIR: cir.label "labelC" +// CIR: cir.return + +// OGCG: define dso_local void @multiple_labels +// OGCG: br label %labelB +// OGCG: labelB: +// OGCG: br label %labelC +// OGCG: labelC: +// OGCG: ret void + +void label_in_if(int cond) { + if (cond) { +labelD: + cond++; + } +} + +// CIR: cir.func dso_local @label_in_if +// CIR: cir.if {{.*}} { +// CIR: cir.label "labelD" +// CIR: [[LOAD:%.*]] = cir.load align(4) [[COND:%.*]] : !cir.ptr<!s32i>, !s32i +// CIR: [[INC:%.*]] = cir.unary(inc, %3) nsw : !s32i, !s32i +// CIR: cir.store align(4) [[INC]], [[COND]] : !s32i, !cir.ptr<!s32i> +// CIR: } +// CIR: cir.return + +// OGCG: define dso_local void @label_in_if +// OGCG: if.then: +// OGCG: br label %labelD +// OGCG: labelD: +// OGCG: [[LOAD:%.*]] = load i32, ptr [[COND:%.*]], align 4 +// OGCG: [[INC:%.*]] = add nsw i32 %1, 1 +// OGCG: store i32 [[INC]], ptr [[COND]], align 4 +// OGCG: br label %if.end +// OGCG: if.end: +// OGCG: ret void + +void after_return() { + return; + label: +} + +// CIR: cir.func no_proto dso_local @after_return +// CIR: cir.br ^bb1 +// CIR: ^bb1: // 2 preds: ^bb0, ^bb2 +// CIR: cir.return +// CIR: ^bb2: // no predecessors +// CIR: cir.label "label" +// CIR: cir.br ^bb1 + +// OGCG: define dso_local void @after_return +// OGCG: br label %label +// OGCG: label: +// OGCG: ret void + + +void after_unreachable() { + __builtin_unreachable(); + label: +} + +// CIR: cir.func no_proto dso_local @after_unreachable +// CIR: cir.unreachable +// CIR: ^bb1: +// CIR: cir.label "label" +// CIR: cir.return + +// OGCG: define dso_local void @after_unreachable +// OGCG: unreachable +// OGCG: label: +// OGCG: ret void diff --git a/clang/test/CIR/CodeGen/static-vars.cpp b/clang/test/CIR/CodeGen/static-vars.cpp index d949936f6bff..4f22fc7abc54 100644 --- a/clang/test/CIR/CodeGen/static-vars.cpp +++ b/clang/test/CIR/CodeGen/static-vars.cpp @@ -2,6 +2,37 @@ // RUN: FileCheck --input-file=%t.cir %s // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t1.ll // RUN: FileCheck --check-prefix=LLVM --input-file=%t1.ll %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t1.ll +// RUN: FileCheck --check-prefix=OGCG --input-file=%t1.ll %s + +template<typename T> +struct implicitly_instantiated { + static T member; +}; + +template<typename T> +T implicitly_instantiated<T>::member = 12345; + +int use_implicitly_instantiated() { + return implicitly_instantiated<int>::member; +} + +// CHECK-DAG: cir.global linkonce_odr comdat @_ZN23implicitly_instantiatedIiE6memberE = #cir.int<12345> : !s32i +// LLVM-DAG: @_ZN23implicitly_instantiatedIiE6memberE = linkonce_odr global i32 12345, comdat +// OGCG-DAG: @_ZN23implicitly_instantiatedIiE6memberE = linkonce_odr global i32 12345, comdat + +template<typename T> +struct explicitly_instantiated { + static T member; +}; + +template<typename T> +T explicitly_instantiated<T>::member = 54321; + +template int explicitly_instantiated<int>::member; +// CHECK-DAG: cir.global weak_odr comdat @_ZN23explicitly_instantiatedIiE6memberE = #cir.int<54321> : !s32i +// LLVM-DAG: @_ZN23explicitly_instantiatedIiE6memberE = weak_odr global i32 54321, comdat +// OGCG-DAG: @_ZN23explicitly_instantiatedIiE6memberE = weak_odr global i32 54321, comdat void func1(void) { // Should lower default-initialized static vars. @@ -42,6 +73,8 @@ void func2(void) { // LLVM-DAG: $_ZZ4testvE1c = comdat any // LLVM-DAG: @_ZZ4testvE1c = linkonce_odr global i32 0, comdat, align 4 +// OGCG-DAG: $_ZZ4testvE1c = comdat any +// OGCG-DAG: @_ZZ4testvE1c = linkonce_odr global i32 0, comdat, align 4 inline void test() { static int c; } // CHECK-LABEL: @_Z4testv diff --git a/clang/test/CIR/CodeGenOpenACC/init.c b/clang/test/CIR/CodeGenOpenACC/init.c index 177e5a6ea211..805fb08dbf48 100644 --- a/clang/test/CIR/CodeGenOpenACC/init.c +++ b/clang/test/CIR/CodeGenOpenACC/init.c @@ -11,12 +11,8 @@ void acc_init(int cond) { // CHECK-NEXT: acc.init attributes {device_types = [#acc.device_type<star>]} #pragma acc init device_type(nvidia) // CHECK-NEXT: acc.init attributes {device_types = [#acc.device_type<nvidia>]} -#pragma acc init device_type(host, multicore) - // CHECK-NEXT: acc.init attributes {device_types = [#acc.device_type<host>, #acc.device_type<multicore>]} #pragma acc init device_type(NVIDIA) // CHECK-NEXT: acc.init attributes {device_types = [#acc.device_type<nvidia>]} -#pragma acc init device_type(HoSt, MuLtIcORe) - // CHECK-NEXT: acc.init attributes {device_types = [#acc.device_type<host>, #acc.device_type<multicore>]} #pragma acc init device_type(HoSt) device_type(MuLtIcORe) // CHECK-NEXT: acc.init attributes {device_types = [#acc.device_type<host>, #acc.device_type<multicore>]} diff --git a/clang/test/CIR/CodeGenOpenACC/shutdown.c b/clang/test/CIR/CodeGenOpenACC/shutdown.c index 52db382df217..b68ef90e0725 100644 --- a/clang/test/CIR/CodeGenOpenACC/shutdown.c +++ b/clang/test/CIR/CodeGenOpenACC/shutdown.c @@ -11,12 +11,8 @@ void acc_shutdown(int cond) { // CHECK-NEXT: acc.shutdown attributes {device_types = [#acc.device_type<star>]} #pragma acc shutdown device_type(nvidia) // CHECK-NEXT: acc.shutdown attributes {device_types = [#acc.device_type<nvidia>]} -#pragma acc shutdown device_type(host, multicore) - // CHECK-NEXT: acc.shutdown attributes {device_types = [#acc.device_type<host>, #acc.device_type<multicore>]} #pragma acc shutdown device_type(NVIDIA) // CHECK-NEXT: acc.shutdown attributes {device_types = [#acc.device_type<nvidia>]} -#pragma acc shutdown device_type(HoSt, MuLtIcORe) - // CHECK-NEXT: acc.shutdown attributes {device_types = [#acc.device_type<host>, #acc.device_type<multicore>]} #pragma acc shutdown device_type(HoSt) device_type(MuLtIcORe) // CHECK-NEXT: acc.shutdown attributes {device_types = [#acc.device_type<host>, #acc.device_type<multicore>]} diff --git a/clang/test/CIR/IR/invalid-label.cir b/clang/test/CIR/IR/invalid-label.cir new file mode 100644 index 000000000000..4cb8d0186444 --- /dev/null +++ b/clang/test/CIR/IR/invalid-label.cir @@ -0,0 +1,12 @@ +// RUN: cir-opt %s -verify-diagnostics -split-input-file + +!s32i = !cir.int<s, 32> + +module { + // expected-error@+3 {{must be the first operation in a block}} + cir.func @error(){ + %0 = cir.const #cir.int<0> : !s32i + cir.label "label" + cir.return + } +} diff --git a/clang/test/CIR/IR/label.cir b/clang/test/CIR/IR/label.cir new file mode 100644 index 000000000000..2211a4e8da33 --- /dev/null +++ b/clang/test/CIR/IR/label.cir @@ -0,0 +1,26 @@ +// RUN: cir-opt %s | FileCheck %s + +!s32i = !cir.int<s, 32> + +module { + cir.func @label() { + cir.label "label" + cir.return + } + + cir.func @label2() { + %0 = cir.const #cir.int<0> : !s32i + cir.br ^bb1 + ^bb1: // pred: ^bb0 + cir.label "label2" + cir.return + } +} + +// CHECK: cir.func @label +// CHECK-NEXT: cir.label "label" + +// CHECK: cir.func @label2 +// CHECK: cir.br ^bb1 +// CHECK-NEXT: ^bb1: // pred: ^bb0 +// CHECK-NEXT: cir.label "label2" diff --git a/clang/test/CIR/Lowering/array.cpp b/clang/test/CIR/Lowering/array.cpp index 438d41e2c2c2..82d803a6b5aa 100644 --- a/clang/test/CIR/Lowering/array.cpp +++ b/clang/test/CIR/Lowering/array.cpp @@ -57,17 +57,28 @@ void func() { void func2() { int arr[2] = {5}; } + // CHECK: define{{.*}} void @_Z5func2v() -// CHECK: %[[ARR_ALLOCA:.*]] = alloca [2 x i32], i64 1, align 4 -// CHECK: %[[TMP:.*]] = alloca ptr, i64 1, align 8 -// CHECK: %[[ARR_PTR:.*]] = getelementptr i32, ptr %[[ARR_ALLOCA]], i32 0 -// CHECK: store i32 5, ptr %[[ARR_PTR]], align 4 -// CHECK: %[[ELE_1_PTR:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i64 1 -// CHECK: store ptr %[[ELE_1_PTR]], ptr %[[TMP]], align 8 -// CHECK: %[[TMP2:.*]] = load ptr, ptr %[[TMP]], align 8 -// CHECK: store i32 0, ptr %[[TMP2]], align 4 -// CHECK: %[[ELE_1:.*]] = getelementptr i32, ptr %[[TMP2]], i64 1 -// CHECK: store ptr %[[ELE_1]], ptr %[[TMP]], align 8 +// CHECK: %[[ARR:.*]] = alloca [2 x i32], i64 1, align 4 +// CHECK: %[[TMP:.*]] = alloca ptr, i64 1, align 8 +// CHECK: %[[ARR_PTR:.*]] = getelementptr i32, ptr %[[ARR]], i32 0 +// CHECK: store i32 5, ptr %[[ARR_PTR]], align 4 +// CHECK: %[[ELE_1_PTR:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i64 1 +// CHECK: store ptr %[[ELE_1_PTR]], ptr %[[TMP]], align 8 +// CHECK: %[[END_PTR:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i64 2 +// CHECK: br label %[[LOOP_BODY:.*]] +// CHECK: [[LOOP_NEXT:.*]]: +// CHECK: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// CHECK: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[END_PTR]] +// CHECK: br i1 %[[CMP]], label %[[LOOP_BODY]], label %[[LOOP_END:.*]] +// CHECK: [[LOOP_BODY]]: +// CHECK: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// CHECK: store i32 0, ptr %[[CUR]], align 4 +// CHECK: %[[NEXT:.*]] = getelementptr i32, ptr %[[CUR]], i64 1 +// CHECK: store ptr %[[NEXT]], ptr %[[TMP]], align 8 +// CHECK: br label %[[LOOP_NEXT:.*]] +// CHECK: [[LOOP_END]]: +// CHECK: ret void void func3() { int arr3[2] = {5, 6}; @@ -103,17 +114,27 @@ void func5() { int arr[2][1] = {{5}}; } // CHECK: define{{.*}} void @_Z5func5v() -// CHECK: %[[ARR_ALLOCA:.*]] = alloca [2 x [1 x i32]], i64 1, align 4 -// CHECK: %[[TMP:.*]] = alloca ptr, i64 1, align 8 -// CHECK: %[[ARR_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR_ALLOCA]], i32 0 -// CHECK: %[[ARR_0:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i32 0 -// CHECK: store i32 5, ptr %[[ARR_0]], align 4 -// CHECK: %[[ARR_1:.*]] = getelementptr [1 x i32], ptr %[[ARR_PTR]], i64 1 -// CHECK: store ptr %[[ARR_1]], ptr %[[TMP]], align 8 -// CHECK: %[[ARR_1_VAL:.*]] = load ptr, ptr %[[TMP]], align 8 -// CHECK: store [1 x i32] zeroinitializer, ptr %[[ARR_1_VAL]], align 4 -// CHECK: %[[ARR_1_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR_1_VAL]], i64 1 -// CHECK: store ptr %[[ARR_1_PTR]], ptr %[[TMP]], align 8 +// CHECK: %[[ARR:.*]] = alloca [2 x [1 x i32]], i64 1, align 4 +// CHECK: %[[TMP:.*]] = alloca ptr, i64 1, align 8 +// CHECK: %[[ARR_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR]], i32 0 +// CHECK: %[[ARR_0:.*]] = getelementptr i32, ptr %[[ARR_PTR]], i32 0 +// CHECK: store i32 5, ptr %[[ARR_0]], align 4 +// CHECK: %[[ARR_1:.*]] = getelementptr [1 x i32], ptr %[[ARR_PTR]], i64 1 +// CHECK: store ptr %[[ARR_1]], ptr %[[TMP]], align 8 +// CHECK: %[[END_PTR:.*]] = getelementptr [1 x i32], ptr %[[ARR_PTR]], i64 2 +// CHECK: br label %[[LOOP_BODY:.*]] +// CHECK: [[LOOP_NEXT:.*]]: +// CHECK: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// CHECK: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[END_PTR]] +// CHECK: br i1 %[[CMP]], label %[[LOOP_BODY]], label %[[LOOP_END:.*]] +// CHECK: [[LOOP_BODY]]: +// CHECK: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// CHECK: store [1 x i32] zeroinitializer, ptr %[[CUR]], align 4 +// CHECK: %[[NEXT:.*]] = getelementptr [1 x i32], ptr %[[CUR]], i64 1 +// CHECK: store ptr %[[NEXT]], ptr %[[TMP]], align 8 +// CHECK: br label %[[LOOP_NEXT:.*]] +// CHECK: [[LOOP_END]]: +// CHECK: ret void void func6() { int x = 4; @@ -133,14 +154,24 @@ void func7() { int* arr[1] = {}; } // CHECK: define{{.*}} void @_Z5func7v() -// CHECK: %[[ARR:.*]] = alloca [1 x ptr], i64 1, align 8 -// CHECK: %[[ALLOCA:.*]] = alloca ptr, i64 1, align 8 -// CHECK: %[[ELE_PTR:.*]] = getelementptr ptr, ptr %[[ARR]], i32 0 -// CHECK: store ptr %[[ELE_PTR]], ptr %[[ALLOCA]], align 8 -// CHECK: %[[TMP:.*]] = load ptr, ptr %[[ALLOCA]], align 8 -// CHECK: store ptr null, ptr %[[TMP]], align 8 -// CHECK: %[[ELE:.*]] = getelementptr ptr, ptr %[[TMP]], i64 1 -// CHECK: store ptr %[[ELE]], ptr %[[ALLOCA]], align 8 +// CHECK: %[[ARR:.*]] = alloca [1 x ptr], i64 1, align 8 +// CHECK: %[[TMP:.*]] = alloca ptr, i64 1, align 8 +// CHECK: %[[ARR_PTR:.*]] = getelementptr ptr, ptr %[[ARR]], i32 0 +// CHECK: store ptr %[[ARR_PTR]], ptr %[[TMP]], align 8 +// CHECK: %[[END_PTR:.*]] = getelementptr ptr, ptr %[[ARR_PTR]], i64 1 +// CHECK: br label %[[LOOP_BODY:.*]] +// CHECK: [[LOOP_NEXT:.*]]: +// CHECK: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// CHECK: %[[CMP:.*]] = icmp ne ptr %[[CUR]], %[[END_PTR]] +// CHECK: br i1 %[[CMP]], label %[[LOOP_BODY]], label %[[LOOP_END:.*]] +// CHECK: [[LOOP_BODY]]: +// CHECK: %[[CUR:.*]] = load ptr, ptr %[[TMP]], align 8 +// CHECK: store ptr null, ptr %[[CUR]], align 8 +// CHECK: %[[NEXT:.*]] = getelementptr ptr, ptr %[[CUR]], i64 1 +// CHECK: store ptr %[[NEXT]], ptr %[[TMP]], align 8 +// CHECK: br label %[[LOOP_NEXT:.*]] +// CHECK: [[LOOP_END]]: +// CHECK: ret void void func8(int p[10]) {} // CHECK: define{{.*}} void @_Z5func8Pi(ptr {{%.*}}) diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c index 28cad0041a21..e0a21c2ac0d2 100644 --- a/clang/test/CodeGen/X86/avx-builtins.c +++ b/clang/test/CodeGen/X86/avx-builtins.c @@ -46,14 +46,14 @@ __m256d test_mm256_and_pd(__m256d A, __m256d B) { // CHECK: and <4 x i64> return _mm256_and_pd(A, B); } -TEST_CONSTEXPR(match_m256d(_mm256_and_pd((__m256d){-4.0, -5.0, +6.0, +7.0}, (__m256d){+0.0, -0.0, -0.0, +7.0}), -0.0, -0.0, +0.0, +7.0)); +TEST_CONSTEXPR(match_m256d(_mm256_and_pd((__m256d){-4.0, -5.0, +6.0, +7.0}, (__m256d){+0.0, -0.0, -0.0, +7.0}), +0.0, -0.0, +0.0, +7.0)); __m256 test_mm256_and_ps(__m256 A, __m256 B) { // CHECK-LABEL: test_mm256_and_ps // CHECK: and <8 x i32> return _mm256_and_ps(A, B); } -TEST_CONSTEXPR(match_m256(_mm256_and_ps((__m256){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m256){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), -0.0f, -0.0f, +0.0f, +7.0f, +7.0f, +0.0f, -0.0f, -0.0f)); +TEST_CONSTEXPR(match_m256(_mm256_and_ps((__m256){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m256){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), +0.0f, -0.0f, +0.0f, +7.0f, +7.0f, +0.0f, -0.0f, +0.0f)); __m256d test_mm256_andnot_pd(__m256d A, __m256d B) { // CHECK-LABEL: test_mm256_andnot_pd @@ -61,7 +61,7 @@ __m256d test_mm256_andnot_pd(__m256d A, __m256d B) { // CHECK: and <4 x i64> return _mm256_andnot_pd(A, B); } -TEST_CONSTEXPR(match_m256d(_mm256_andnot_pd((__m256d){-4.0, -5.0, +6.0, +7.0}, (__m256d){+0.0, -0.0, -0.0, +7.0}), +0.0, +0.0, +0.0, +0.0)); +TEST_CONSTEXPR(match_m256d(_mm256_andnot_pd((__m256d){-4.0, -5.0, +6.0, +7.0}, (__m256d){+0.0, -0.0, -0.0, +7.0}), +0.0, +0.0, -0.0, +0.0)); __m256 test_mm256_andnot_ps(__m256 A, __m256 B) { // CHECK-LABEL: test_mm256_andnot_ps @@ -69,7 +69,7 @@ __m256 test_mm256_andnot_ps(__m256 A, __m256 B) { // CHECK: and <8 x i32> return _mm256_andnot_ps(A, B); } -TEST_CONSTEXPR(match_m256(_mm256_andnot_ps((__m256){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m256){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f)); +TEST_CONSTEXPR(match_m256(_mm256_andnot_ps((__m256){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m256){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), +0.0f, +0.0f, -0.0f, +0.0f, +0.0f, -0.0f, +0.0f, +0.0f)); __m256d test_mm256_blend_pd(__m256d A, __m256d B) { // CHECK-LABEL: test_mm256_blend_pd diff --git a/clang/test/CodeGen/X86/avx2-builtins.c b/clang/test/CodeGen/X86/avx2-builtins.c index 76d26d57cfec..e7f81068ab4f 100644 --- a/clang/test/CodeGen/X86/avx2-builtins.c +++ b/clang/test/CodeGen/X86/avx2-builtins.c @@ -160,6 +160,7 @@ __m128i test_mm_broadcastb_epi8(__m128i a) { // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <16 x i32> zeroinitializer return _mm_broadcastb_epi8(a); } +TEST_CONSTEXPR(match_v16qi(_mm_broadcastb_epi8((__m128i)(__v16qi){42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}), 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42)); __m256i test_mm256_broadcastb_epi8(__m128i a) { // CHECK-LABEL: test_mm256_broadcastb_epi8 @@ -167,6 +168,7 @@ __m256i test_mm256_broadcastb_epi8(__m128i a) { // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <32 x i32> zeroinitializer return _mm256_broadcastb_epi8(a); } +TEST_CONSTEXPR(match_v32qi(_mm256_broadcastb_epi8((__m128i)(__v16qi){42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}), 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42)); __m128i test_mm_broadcastd_epi32(__m128i a) { // CHECK-LABEL: test_mm_broadcastd_epi32 @@ -174,6 +176,7 @@ __m128i test_mm_broadcastd_epi32(__m128i a) { // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> zeroinitializer return _mm_broadcastd_epi32(a); } +TEST_CONSTEXPR(match_v4si(_mm_broadcastd_epi32((__m128i)(__v4si){-42, 0, 0, 0}), -42, -42, -42, -42)); __m256i test_mm256_broadcastd_epi32(__m128i a) { // CHECK-LABEL: test_mm256_broadcastd_epi32 @@ -181,6 +184,7 @@ __m256i test_mm256_broadcastd_epi32(__m128i a) { // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> zeroinitializer return _mm256_broadcastd_epi32(a); } +TEST_CONSTEXPR(match_v8si(_mm256_broadcastd_epi32((__m128i)(__v4si){-42, 0, 0, 0}), -42, -42, -42, -42, -42, -42, -42, -42)); __m128i test_mm_broadcastq_epi64(__m128i a) { // CHECK-LABEL: test_mm_broadcastq_epi64 @@ -188,6 +192,7 @@ __m128i test_mm_broadcastq_epi64(__m128i a) { // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> zeroinitializer return _mm_broadcastq_epi64(a); } +TEST_CONSTEXPR(match_v2di(_mm_broadcastq_epi64((__m128i)(__v2di){-42, 0}), -42, -42)); __m256i test_mm256_broadcastq_epi64(__m128i a) { // CHECK-LABEL: test_mm256_broadcastq_epi64 @@ -195,12 +200,14 @@ __m256i test_mm256_broadcastq_epi64(__m128i a) { // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> zeroinitializer return _mm256_broadcastq_epi64(a); } +TEST_CONSTEXPR(match_v4di(_mm256_broadcastq_epi64((__m128i)(__v2di){-42, 0}), -42, -42, -42, -42)); __m128d test_mm_broadcastsd_pd(__m128d a) { // CHECK-LABEL: test_mm_broadcastsd_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> zeroinitializer return _mm_broadcastsd_pd(a); } +TEST_CONSTEXPR(match_m128d(_mm_broadcastsd_pd((__m128d){+7.0, -7.0}), +7.0, +7.0)); __m256d test_mm256_broadcastsd_pd(__m128d a) { // CHECK-LABEL: test_mm256_broadcastsd_pd @@ -208,12 +215,14 @@ __m256d test_mm256_broadcastsd_pd(__m128d a) { // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <4 x i32> zeroinitializer return _mm256_broadcastsd_pd(a); } +TEST_CONSTEXPR(match_m256d(_mm256_broadcastsd_pd((__m128d){+7.0, -7.0}), +7.0, +7.0, +7.0, +7.0)); __m256i test_mm256_broadcastsi128_si256(__m128i a) { // CHECK-LABEL: test_mm256_broadcastsi128_si256 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> return _mm256_broadcastsi128_si256(a); } +TEST_CONSTEXPR(match_m256i(_mm256_broadcastsi128_si256((__m128i)(__v2di){3, 45}), 3, 45, 3, 45)); __m256i test_mm_broadcastsi128_si256(__m128i a) { // CHECK-LABEL: test_mm_broadcastsi128_si256 @@ -227,6 +236,7 @@ __m128 test_mm_broadcastss_ps(__m128 a) { // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> zeroinitializer return _mm_broadcastss_ps(a); } +TEST_CONSTEXPR(match_m128(_mm_broadcastss_ps((__m128){-4.0f, +5.0f, +6.0f, +7.0f}), -4.0f, -4.0f, -4.0f, -4.0f)); __m256 test_mm256_broadcastss_ps(__m128 a) { // CHECK-LABEL: test_mm256_broadcastss_ps @@ -234,6 +244,7 @@ __m256 test_mm256_broadcastss_ps(__m128 a) { // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> zeroinitializer return _mm256_broadcastss_ps(a); } +TEST_CONSTEXPR(match_m256(_mm256_broadcastss_ps((__m128){-4.0f, +5.0f, +6.0f, +7.0f}), -4.0f, -4.0f, -4.0f, -4.0f, -4.0f, -4.0f, -4.0f, -4.0f)); __m128i test_mm_broadcastw_epi16(__m128i a) { // CHECK-LABEL: test_mm_broadcastw_epi16 @@ -241,6 +252,7 @@ __m128i test_mm_broadcastw_epi16(__m128i a) { // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <8 x i32> zeroinitializer return _mm_broadcastw_epi16(a); } +TEST_CONSTEXPR(match_v8hi(_mm_broadcastw_epi16((__m128i)(__v8hi){42, 0, 0, 0, 0, 0, 0, 0}), 42, 42, 42, 42, 42, 42, 42, 42)); __m256i test_mm256_broadcastw_epi16(__m128i a) { // CHECK-LABEL: test_mm256_broadcastw_epi16 @@ -248,6 +260,7 @@ __m256i test_mm256_broadcastw_epi16(__m128i a) { // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <16 x i32> zeroinitializer return _mm256_broadcastw_epi16(a); } +TEST_CONSTEXPR(match_v16hi(_mm256_broadcastw_epi16((__m128i)(__v8hi){42, 0, 0, 0, 0, 0, 0, 0}), 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42)); __m256i test_mm256_bslli_epi128(__m256i a) { // CHECK-LABEL: test_mm256_bslli_epi128 @@ -1327,48 +1340,56 @@ __m256i test_mm256_unpackhi_epi8(__m256i a, __m256i b) { // CHECK: shufflevector <32 x i8> %{{.*}}, <32 x i8> %{{.*}}, <32 x i32> <i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63> return _mm256_unpackhi_epi8(a, b); } +TEST_CONSTEXPR(match_v32qi(_mm256_unpackhi_epi8((__m256i)(__v32qi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, (__m256i)(__v32qi){32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}), 8, 40, 9, 41, 10, 42, 11, 43, 12, 44, 13, 45, 14, 46, 15, 47, 24, 56, 25, 57, 26, 58, 27, 59, 28, 60, 29, 61, 30, 62, 31, 63)); __m256i test_mm256_unpackhi_epi16(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_unpackhi_epi16 // CHECK: shufflevector <16 x i16> %{{.*}}, <16 x i16> %{{.*}}, <16 x i32> <i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> return _mm256_unpackhi_epi16(a, b); } +TEST_CONSTEXPR(match_v16hi(_mm256_unpackhi_epi16((__m256i)(__v16hi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m256i)(__v16hi){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 4, 20, 5, 21, 6, 22, 7, 23, 12, 28, 13, 29, 14, 30, 15, 31)); __m256i test_mm256_unpackhi_epi32(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_unpackhi_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> return _mm256_unpackhi_epi32(a, b); } +TEST_CONSTEXPR(match_v8si(_mm256_unpackhi_epi32((__m256i)(__v8si){0, 1, 2, 3, 4, 5, 6, 7}, (__m256i)(__v8si){8, 9, 10, 11, 12, 13, 14, 15}), 2, 10, 3, 11, 6, 14, 7, 15)); __m256i test_mm256_unpackhi_epi64(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_unpackhi_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 1, i32 5, i32 3, i32 7> return _mm256_unpackhi_epi64(a, b); } +TEST_CONSTEXPR(match_v4di(_mm256_unpackhi_epi64((__m256i)(__v4di){0, 1, 2, 3}, (__m256i)(__v4di){ 4, 5, 6, 7}), 1, 5, 3, 7)); __m256i test_mm256_unpacklo_epi8(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_unpacklo_epi8 // CHECK: shufflevector <32 x i8> %{{.*}}, <32 x i8> %{{.*}}, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55> return _mm256_unpacklo_epi8(a, b); } +TEST_CONSTEXPR(match_v32qi(_mm256_unpacklo_epi8((__m256i)(__v32qi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, (__m256i)(__v32qi){32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}), 0, 32, 1, 33, 2, 34, 3, 35, 4, 36, 5, 37, 6, 38, 7, 39, 16, 48, 17, 49, 18, 50, 19, 51, 20, 52, 21, 53, 22, 54, 23, 55)); __m256i test_mm256_unpacklo_epi16(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_unpacklo_epi16 // CHECK: shufflevector <16 x i16> %{{.*}}, <16 x i16> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27> return _mm256_unpacklo_epi16(a, b); } +TEST_CONSTEXPR(match_v16hi(_mm256_unpacklo_epi16((__m256i)(__v16hi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m256i)(__v16hi){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 0, 16, 1, 17, 2, 18, 3, 19, 8, 24, 9, 25, 10, 26, 11, 27)); __m256i test_mm256_unpacklo_epi32(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_unpacklo_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> return _mm256_unpacklo_epi32(a, b); } +TEST_CONSTEXPR(match_v8si(_mm256_unpacklo_epi32((__m256i)(__v8si){0, 1, 2, 3, 4, 5, 6, 7}, (__m256i)(__v8si){ 8, 9, 10, 11, 12, 13, 14, 15}), 0, 8, 1, 9, 4, 12, 5, 13)); __m256i test_mm256_unpacklo_epi64(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_unpacklo_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 2, i32 6> return _mm256_unpacklo_epi64(a, b); } +TEST_CONSTEXPR(match_v4di(_mm256_unpacklo_epi64((__m256i)(__v4di){0, 1, 2, 3}, (__m256i)(__v4di){ 4, 5, 6, 7}), 0, 4, 2, 6)); __m256i test_mm256_xor_si256(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_xor_si256 diff --git a/clang/test/CodeGen/X86/avx512bw-builtins.c b/clang/test/CodeGen/X86/avx512bw-builtins.c index 67f7df03469b..0bd9718974c7 100644 --- a/clang/test/CodeGen/X86/avx512bw-builtins.c +++ b/clang/test/CodeGen/X86/avx512bw-builtins.c @@ -1,26 +1,28 @@ -// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bw -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s -// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bw -fno-signed-char -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bw -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bw -fno-signed-char -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bw -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512bw -fno-signed-char -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s #include <immintrin.h> #include "builtin_test_helpers.h" __mmask32 test_knot_mask32(__mmask32 a) { - // CHECK-LABEL: @test_knot_mask32 + // CHECK-LABEL: test_knot_mask32 // CHECK: [[IN:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[NOT:%.*]] = xor <32 x i1> [[IN]], splat (i1 true) return _knot_mask32(a); } __mmask64 test_knot_mask64(__mmask64 a) { - // CHECK-LABEL: @test_knot_mask64 + // CHECK-LABEL: test_knot_mask64 // CHECK: [[IN:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[NOT:%.*]] = xor <64 x i1> [[IN]], splat (i1 true) return _knot_mask64(a); } __mmask32 test_kand_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kand_mask32 + // CHECK-LABEL: test_kand_mask32 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = and <32 x i1> [[LHS]], [[RHS]] @@ -30,7 +32,7 @@ __mmask32 test_kand_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, _ } __mmask64 test_kand_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kand_mask64 + // CHECK-LABEL: test_kand_mask64 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = and <64 x i1> [[LHS]], [[RHS]] @@ -40,7 +42,7 @@ __mmask64 test_kand_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, _ } __mmask32 test_kandn_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kandn_mask32 + // CHECK-LABEL: test_kandn_mask32 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[NOT:%.*]] = xor <32 x i1> [[LHS]], splat (i1 true) @@ -51,7 +53,7 @@ __mmask32 test_kandn_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, } __mmask64 test_kandn_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kandn_mask64 + // CHECK-LABEL: test_kandn_mask64 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[NOT:%.*]] = xor <64 x i1> [[LHS]], splat (i1 true) @@ -62,7 +64,7 @@ __mmask64 test_kandn_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, } __mmask32 test_kor_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kor_mask32 + // CHECK-LABEL: test_kor_mask32 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = or <32 x i1> [[LHS]], [[RHS]] @@ -72,7 +74,7 @@ __mmask32 test_kor_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __ } __mmask64 test_kor_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kor_mask64 + // CHECK-LABEL: test_kor_mask64 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = or <64 x i1> [[LHS]], [[RHS]] @@ -82,7 +84,7 @@ __mmask64 test_kor_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __ } __mmask32 test_kxnor_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kxnor_mask32 + // CHECK-LABEL: test_kxnor_mask32 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[NOT:%.*]] = xor <32 x i1> [[LHS]], splat (i1 true) @@ -93,7 +95,7 @@ __mmask32 test_kxnor_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, } __mmask64 test_kxnor_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kxnor_mask64 + // CHECK-LABEL: test_kxnor_mask64 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[NOT:%.*]] = xor <64 x i1> [[LHS]], splat (i1 true) @@ -104,7 +106,7 @@ __mmask64 test_kxnor_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, } __mmask32 test_kxor_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kxor_mask32 + // CHECK-LABEL: test_kxor_mask32 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = xor <32 x i1> [[LHS]], [[RHS]] @@ -114,7 +116,7 @@ __mmask32 test_kxor_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, _ } __mmask64 test_kxor_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kxor_mask64 + // CHECK-LABEL: test_kxor_mask64 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = xor <64 x i1> [[LHS]], [[RHS]] @@ -124,7 +126,7 @@ __mmask64 test_kxor_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, _ } unsigned char test_kortestz_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_kortestz_mask32_u8 + // CHECK-LABEL: test_kortestz_mask32_u8 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[OR:%.*]] = or <32 x i1> [[LHS]], [[RHS]] @@ -137,7 +139,7 @@ unsigned char test_kortestz_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m } unsigned char test_kortestc_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_kortestc_mask32_u8 + // CHECK-LABEL: test_kortestc_mask32_u8 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[OR:%.*]] = or <32 x i1> [[LHS]], [[RHS]] @@ -150,7 +152,7 @@ unsigned char test_kortestc_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m } unsigned char test_kortest_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) { - // CHECK-LABEL: @test_kortest_mask32_u8 + // CHECK-LABEL: test_kortest_mask32_u8 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[OR:%.*]] = or <32 x i1> [[LHS]], [[RHS]] @@ -170,7 +172,7 @@ unsigned char test_kortest_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m5 } unsigned char test_kortestz_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_kortestz_mask64_u8 + // CHECK-LABEL: test_kortestz_mask64_u8 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[OR:%.*]] = or <64 x i1> [[LHS]], [[RHS]] @@ -183,7 +185,7 @@ unsigned char test_kortestz_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m } unsigned char test_kortestc_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_kortestc_mask64_u8 + // CHECK-LABEL: test_kortestc_mask64_u8 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[OR:%.*]] = or <64 x i1> [[LHS]], [[RHS]] @@ -196,7 +198,7 @@ unsigned char test_kortestc_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m } unsigned char test_kortest_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) { - // CHECK-LABEL: @test_kortest_mask64_u8 + // CHECK-LABEL: test_kortest_mask64_u8 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[OR:%.*]] = or <64 x i1> [[LHS]], [[RHS]] @@ -216,7 +218,7 @@ unsigned char test_kortest_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m5 } unsigned char test_ktestz_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_ktestz_mask32_u8 + // CHECK-LABEL: test_ktestz_mask32_u8 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = call i32 @llvm.x86.avx512.ktestz.d(<32 x i1> [[LHS]], <32 x i1> [[RHS]]) @@ -226,7 +228,7 @@ unsigned char test_ktestz_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m51 } unsigned char test_ktestc_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_ktestc_mask32_u8 + // CHECK-LABEL: test_ktestc_mask32_u8 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = call i32 @llvm.x86.avx512.ktestc.d(<32 x i1> [[LHS]], <32 x i1> [[RHS]]) @@ -236,7 +238,7 @@ unsigned char test_ktestc_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m51 } unsigned char test_ktest_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) { - // CHECK-LABEL: @test_ktest_mask32_u8 + // CHECK-LABEL: test_ktest_mask32_u8 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = call i32 @llvm.x86.avx512.ktestc.d(<32 x i1> [[LHS]], <32 x i1> [[RHS]]) @@ -250,7 +252,7 @@ unsigned char test_ktest_mask32_u8(__m512i __A, __m512i __B, __m512i __C, __m512 } unsigned char test_ktestz_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_ktestz_mask64_u8 + // CHECK-LABEL: test_ktestz_mask64_u8 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = call i32 @llvm.x86.avx512.ktestz.q(<64 x i1> [[LHS]], <64 x i1> [[RHS]]) @@ -260,7 +262,7 @@ unsigned char test_ktestz_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m51 } unsigned char test_ktestc_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) { - // CHECK-LABEL: @test_ktestc_mask64_u8 + // CHECK-LABEL: test_ktestc_mask64_u8 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = call i32 @llvm.x86.avx512.ktestc.q(<64 x i1> [[LHS]], <64 x i1> [[RHS]]) @@ -270,7 +272,7 @@ unsigned char test_ktestc_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m51 } unsigned char test_ktest_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) { - // CHECK-LABEL: @test_ktest_mask64_u8 + // CHECK-LABEL: test_ktest_mask64_u8 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = call i32 @llvm.x86.avx512.ktestc.q(<64 x i1> [[LHS]], <64 x i1> [[RHS]]) @@ -284,7 +286,7 @@ unsigned char test_ktest_mask64_u8(__m512i __A, __m512i __B, __m512i __C, __m512 } __mmask32 test_kadd_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kadd_mask32 + // CHECK-LABEL: test_kadd_mask32 // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = call <32 x i1> @llvm.x86.avx512.kadd.d(<32 x i1> [[LHS]], <32 x i1> [[RHS]]) @@ -294,7 +296,7 @@ __mmask32 test_kadd_mask32(__m512i __A, __m512i __B, __m512i __C, __m512i __D, _ } __mmask64 test_kadd_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_kadd_mask64 + // CHECK-LABEL: test_kadd_mask64 // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = call <64 x i1> @llvm.x86.avx512.kadd.q(<64 x i1> [[LHS]], <64 x i1> [[RHS]]) @@ -304,702 +306,702 @@ __mmask64 test_kadd_mask64(__m512i __A, __m512i __B, __m512i __C, __m512i __D, _ } __mmask32 test_kshiftli_mask32(__m512i A, __m512i B, __m512i C, __m512i D) { - // CHECK-LABEL: @test_kshiftli_mask32 + // CHECK-LABEL: test_kshiftli_mask32 // CHECK: [[VAL:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = shufflevector <32 x i1> zeroinitializer, <32 x i1> [[VAL]], <32 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32> return _mm512_mask_cmpneq_epu16_mask(_kshiftli_mask32(_mm512_cmpneq_epu16_mask(A, B), 31), C, D); } __mmask32 test_kshiftri_mask32(__m512i A, __m512i B, __m512i C, __m512i D) { - // CHECK-LABEL: @test_kshiftri_mask32 + // CHECK-LABEL: test_kshiftri_mask32 // CHECK: [[VAL:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RES:%.*]] = shufflevector <32 x i1> [[VAL]], <32 x i1> zeroinitializer, <32 x i32> <i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62> return _mm512_mask_cmpneq_epu16_mask(_kshiftri_mask32(_mm512_cmpneq_epu16_mask(A, B), 31), C, D); } __mmask64 test_kshiftli_mask64(__m512i A, __m512i B, __m512i C, __m512i D) { - // CHECK-LABEL: @test_kshiftli_mask64 + // CHECK-LABEL: test_kshiftli_mask64 // CHECK: [[VAL:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = shufflevector <64 x i1> zeroinitializer, <64 x i1> [[VAL]], <64 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95> return _mm512_mask_cmpneq_epu8_mask(_kshiftli_mask64(_mm512_cmpneq_epu8_mask(A, B), 32), C, D); } __mmask64 test_kshiftri_mask64(__m512i A, __m512i B, __m512i C, __m512i D) { - // CHECK-LABEL: @test_kshiftri_mask64 + // CHECK-LABEL: test_kshiftri_mask64 // CHECK: [[VAL:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RES:%.*]] = shufflevector <64 x i1> [[VAL]], <64 x i1> zeroinitializer, <64 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95> return _mm512_mask_cmpneq_epu8_mask(_kshiftri_mask64(_mm512_cmpneq_epu8_mask(A, B), 32), C, D); } unsigned int test_cvtmask32_u32(__m512i A, __m512i B) { - // CHECK-LABEL: @test_cvtmask32_u32 + // CHECK-LABEL: test_cvtmask32_u32 return _cvtmask32_u32(_mm512_cmpneq_epu16_mask(A, B)); } unsigned long long test_cvtmask64_u64(__m512i A, __m512i B) { - // CHECK-LABEL: @test_cvtmask64_u64 + // CHECK-LABEL: test_cvtmask64_u64 return _cvtmask64_u64(_mm512_cmpneq_epu8_mask(A, B)); } __mmask32 test_cvtu32_mask32(__m512i A, __m512i B, unsigned int C) { - // CHECK-LABEL: @test_cvtu32_mask32 + // CHECK-LABEL: test_cvtu32_mask32 return _mm512_mask_cmpneq_epu16_mask(_cvtu32_mask32(C), A, B); } __mmask64 test_cvtu64_mask64(__m512i A, __m512i B, unsigned long long C) { - // CHECK-LABEL: @test_cvtu64_mask64 + // CHECK-LABEL: test_cvtu64_mask64 return _mm512_mask_cmpneq_epu8_mask(_cvtu64_mask64(C), A, B); } __mmask32 test_load_mask32(__mmask32 *A, __m512i B, __m512i C) { - // CHECK-LABEL: @test_load_mask32 + // CHECK-LABEL: test_load_mask32 // CHECK: [[LOAD:%.*]] = load i32, ptr %{{.*}} return _mm512_mask_cmpneq_epu16_mask(_load_mask32(A), B, C); } __mmask64 test_load_mask64(__mmask64 *A, __m512i B, __m512i C) { - // CHECK-LABEL: @test_load_mask64 + // CHECK-LABEL: test_load_mask64 // CHECK: [[LOAD:%.*]] = load i64, ptr %{{.*}} return _mm512_mask_cmpneq_epu8_mask(_load_mask64(A), B, C); } void test_store_mask32(__mmask32 *A, __m512i B, __m512i C) { - // CHECK-LABEL: @test_store_mask32 + // CHECK-LABEL: test_store_mask32 // CHECK: store i32 %{{.*}}, ptr %{{.*}} _store_mask32(A, _mm512_cmpneq_epu16_mask(B, C)); } void test_store_mask64(__mmask64 *A, __m512i B, __m512i C) { - // CHECK-LABEL: @test_store_mask64 + // CHECK-LABEL: test_store_mask64 // CHECK: store i64 %{{.*}}, ptr %{{.*}} _store_mask64(A, _mm512_cmpneq_epu8_mask(B, C)); } __mmask64 test_mm512_cmpeq_epi8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpeq_epi8_mask + // CHECK-LABEL: test_mm512_cmpeq_epi8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpeq_epi8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpeq_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpeq_epi8_mask + // CHECK-LABEL: test_mm512_mask_cmpeq_epi8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpeq_epi8_mask(__u, __a, __b); } __mmask32 test_mm512_cmpeq_epi16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpeq_epi16_mask + // CHECK-LABEL: test_mm512_cmpeq_epi16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpeq_epi16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpeq_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpeq_epi16_mask + // CHECK-LABEL: test_mm512_mask_cmpeq_epi16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpeq_epi16_mask(__u, __a, __b); } __mmask64 test_mm512_cmpgt_epi8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpgt_epi8_mask + // CHECK-LABEL: test_mm512_cmpgt_epi8_mask // CHECK: icmp sgt <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpgt_epi8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpgt_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpgt_epi8_mask + // CHECK-LABEL: test_mm512_mask_cmpgt_epi8_mask // CHECK: icmp sgt <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpgt_epi8_mask(__u, __a, __b); } __mmask32 test_mm512_cmpgt_epi16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpgt_epi16_mask + // CHECK-LABEL: test_mm512_cmpgt_epi16_mask // CHECK: icmp sgt <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpgt_epi16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpgt_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpgt_epi16_mask + // CHECK-LABEL: test_mm512_mask_cmpgt_epi16_mask // CHECK: icmp sgt <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpgt_epi16_mask(__u, __a, __b); } __mmask64 test_mm512_cmpeq_epu8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpeq_epu8_mask + // CHECK-LABEL: test_mm512_cmpeq_epu8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpeq_epu8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpeq_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpeq_epu8_mask + // CHECK-LABEL: test_mm512_mask_cmpeq_epu8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpeq_epu8_mask(__u, __a, __b); } __mmask32 test_mm512_cmpeq_epu16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpeq_epu16_mask + // CHECK-LABEL: test_mm512_cmpeq_epu16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpeq_epu16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpeq_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpeq_epu16_mask + // CHECK-LABEL: test_mm512_mask_cmpeq_epu16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpeq_epu16_mask(__u, __a, __b); } __mmask64 test_mm512_cmpgt_epu8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpgt_epu8_mask + // CHECK-LABEL: test_mm512_cmpgt_epu8_mask // CHECK: icmp ugt <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpgt_epu8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpgt_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpgt_epu8_mask + // CHECK-LABEL: test_mm512_mask_cmpgt_epu8_mask // CHECK: icmp ugt <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpgt_epu8_mask(__u, __a, __b); } __mmask32 test_mm512_cmpgt_epu16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpgt_epu16_mask + // CHECK-LABEL: test_mm512_cmpgt_epu16_mask // CHECK: icmp ugt <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpgt_epu16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpgt_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpgt_epu16_mask + // CHECK-LABEL: test_mm512_mask_cmpgt_epu16_mask // CHECK: icmp ugt <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpgt_epu16_mask(__u, __a, __b); } __mmask64 test_mm512_cmpge_epi8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpge_epi8_mask + // CHECK-LABEL: test_mm512_cmpge_epi8_mask // CHECK: icmp sge <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpge_epi8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpge_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpge_epi8_mask + // CHECK-LABEL: test_mm512_mask_cmpge_epi8_mask // CHECK: icmp sge <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpge_epi8_mask(__u, __a, __b); } __mmask64 test_mm512_cmpge_epu8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpge_epu8_mask + // CHECK-LABEL: test_mm512_cmpge_epu8_mask // CHECK: icmp uge <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpge_epu8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpge_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpge_epu8_mask + // CHECK-LABEL: test_mm512_mask_cmpge_epu8_mask // CHECK: icmp uge <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpge_epu8_mask(__u, __a, __b); } __mmask32 test_mm512_cmpge_epi16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpge_epi16_mask + // CHECK-LABEL: test_mm512_cmpge_epi16_mask // CHECK: icmp sge <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpge_epi16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpge_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpge_epi16_mask + // CHECK-LABEL: test_mm512_mask_cmpge_epi16_mask // CHECK: icmp sge <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpge_epi16_mask(__u, __a, __b); } __mmask32 test_mm512_cmpge_epu16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpge_epu16_mask + // CHECK-LABEL: test_mm512_cmpge_epu16_mask // CHECK: icmp uge <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpge_epu16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpge_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpge_epu16_mask + // CHECK-LABEL: test_mm512_mask_cmpge_epu16_mask // CHECK: icmp uge <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpge_epu16_mask(__u, __a, __b); } __mmask64 test_mm512_cmple_epi8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmple_epi8_mask + // CHECK-LABEL: test_mm512_cmple_epi8_mask // CHECK: icmp sle <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmple_epi8_mask(__a, __b); } __mmask64 test_mm512_mask_cmple_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmple_epi8_mask + // CHECK-LABEL: test_mm512_mask_cmple_epi8_mask // CHECK: icmp sle <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmple_epi8_mask(__u, __a, __b); } __mmask64 test_mm512_cmple_epu8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmple_epu8_mask + // CHECK-LABEL: test_mm512_cmple_epu8_mask // CHECK: icmp ule <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmple_epu8_mask(__a, __b); } __mmask64 test_mm512_mask_cmple_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmple_epu8_mask + // CHECK-LABEL: test_mm512_mask_cmple_epu8_mask // CHECK: icmp ule <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmple_epu8_mask(__u, __a, __b); } __mmask32 test_mm512_cmple_epi16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmple_epi16_mask + // CHECK-LABEL: test_mm512_cmple_epi16_mask // CHECK: icmp sle <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmple_epi16_mask(__a, __b); } __mmask32 test_mm512_mask_cmple_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmple_epi16_mask + // CHECK-LABEL: test_mm512_mask_cmple_epi16_mask // CHECK: icmp sle <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmple_epi16_mask(__u, __a, __b); } __mmask32 test_mm512_cmple_epu16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmple_epu16_mask + // CHECK-LABEL: test_mm512_cmple_epu16_mask // CHECK: icmp ule <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmple_epu16_mask(__a, __b); } __mmask32 test_mm512_mask_cmple_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmple_epu16_mask + // CHECK-LABEL: test_mm512_mask_cmple_epu16_mask // CHECK: icmp ule <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmple_epu16_mask(__u, __a, __b); } __mmask64 test_mm512_cmplt_epi8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmplt_epi8_mask + // CHECK-LABEL: test_mm512_cmplt_epi8_mask // CHECK: icmp slt <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmplt_epi8_mask(__a, __b); } __mmask64 test_mm512_mask_cmplt_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmplt_epi8_mask + // CHECK-LABEL: test_mm512_mask_cmplt_epi8_mask // CHECK: icmp slt <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmplt_epi8_mask(__u, __a, __b); } __mmask64 test_mm512_cmplt_epu8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmplt_epu8_mask + // CHECK-LABEL: test_mm512_cmplt_epu8_mask // CHECK: icmp ult <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmplt_epu8_mask(__a, __b); } __mmask64 test_mm512_mask_cmplt_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmplt_epu8_mask + // CHECK-LABEL: test_mm512_mask_cmplt_epu8_mask // CHECK: icmp ult <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmplt_epu8_mask(__u, __a, __b); } __mmask32 test_mm512_cmplt_epi16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmplt_epi16_mask + // CHECK-LABEL: test_mm512_cmplt_epi16_mask // CHECK: icmp slt <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmplt_epi16_mask(__a, __b); } __mmask32 test_mm512_mask_cmplt_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmplt_epi16_mask + // CHECK-LABEL: test_mm512_mask_cmplt_epi16_mask // CHECK: icmp slt <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmplt_epi16_mask(__u, __a, __b); } __mmask32 test_mm512_cmplt_epu16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmplt_epu16_mask + // CHECK-LABEL: test_mm512_cmplt_epu16_mask // CHECK: icmp ult <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmplt_epu16_mask(__a, __b); } __mmask32 test_mm512_mask_cmplt_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmplt_epu16_mask + // CHECK-LABEL: test_mm512_mask_cmplt_epu16_mask // CHECK: icmp ult <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmplt_epu16_mask(__u, __a, __b); } __mmask64 test_mm512_cmpneq_epi8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpneq_epi8_mask + // CHECK-LABEL: test_mm512_cmpneq_epi8_mask // CHECK: icmp ne <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpneq_epi8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpneq_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpneq_epi8_mask + // CHECK-LABEL: test_mm512_mask_cmpneq_epi8_mask // CHECK: icmp ne <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpneq_epi8_mask(__u, __a, __b); } __mmask64 test_mm512_cmpneq_epu8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpneq_epu8_mask + // CHECK-LABEL: test_mm512_cmpneq_epu8_mask // CHECK: icmp ne <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmpneq_epu8_mask(__a, __b); } __mmask64 test_mm512_mask_cmpneq_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpneq_epu8_mask + // CHECK-LABEL: test_mm512_mask_cmpneq_epu8_mask // CHECK: icmp ne <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmpneq_epu8_mask(__u, __a, __b); } __mmask32 test_mm512_cmpneq_epi16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpneq_epi16_mask + // CHECK-LABEL: test_mm512_cmpneq_epi16_mask // CHECK: icmp ne <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpneq_epi16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpneq_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpneq_epi16_mask + // CHECK-LABEL: test_mm512_mask_cmpneq_epi16_mask // CHECK: icmp ne <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpneq_epi16_mask(__u, __a, __b); } __mmask32 test_mm512_cmpneq_epu16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmpneq_epu16_mask + // CHECK-LABEL: test_mm512_cmpneq_epu16_mask // CHECK: icmp ne <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmpneq_epu16_mask(__a, __b); } __mmask32 test_mm512_mask_cmpneq_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmpneq_epu16_mask + // CHECK-LABEL: test_mm512_mask_cmpneq_epu16_mask // CHECK: icmp ne <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmpneq_epu16_mask(__u, __a, __b); } __mmask64 test_mm512_cmp_epi8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmp_epi8_mask + // CHECK-LABEL: test_mm512_cmp_epi8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmp_epi8_mask(__a, __b, 0); } __mmask64 test_mm512_mask_cmp_epi8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmp_epi8_mask + // CHECK-LABEL: test_mm512_mask_cmp_epi8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmp_epi8_mask(__u, __a, __b, 0); } __mmask64 test_mm512_cmp_epu8_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmp_epu8_mask + // CHECK-LABEL: test_mm512_cmp_epu8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} return (__mmask64)_mm512_cmp_epu8_mask(__a, __b, 0); } __mmask64 test_mm512_mask_cmp_epu8_mask(__mmask64 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmp_epu8_mask + // CHECK-LABEL: test_mm512_mask_cmp_epu8_mask // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} return (__mmask64)_mm512_mask_cmp_epu8_mask(__u, __a, __b, 0); } __mmask32 test_mm512_cmp_epi16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmp_epi16_mask + // CHECK-LABEL: test_mm512_cmp_epi16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmp_epi16_mask(__a, __b, 0); } __mmask32 test_mm512_mask_cmp_epi16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmp_epi16_mask + // CHECK-LABEL: test_mm512_mask_cmp_epi16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmp_epi16_mask(__u, __a, __b, 0); } __mmask32 test_mm512_cmp_epu16_mask(__m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_cmp_epu16_mask + // CHECK-LABEL: test_mm512_cmp_epu16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} return (__mmask32)_mm512_cmp_epu16_mask(__a, __b, 0); } __mmask32 test_mm512_mask_cmp_epu16_mask(__mmask32 __u, __m512i __a, __m512i __b) { - // CHECK-LABEL: @test_mm512_mask_cmp_epu16_mask + // CHECK-LABEL: test_mm512_mask_cmp_epu16_mask // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} return (__mmask32)_mm512_mask_cmp_epu16_mask(__u, __a, __b, 0); } __m512i test_mm512_add_epi8 (__m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_add_epi8 + //CHECK-LABEL: test_mm512_add_epi8 //CHECK: add <64 x i8> return _mm512_add_epi8(__A,__B); } __m512i test_mm512_mask_add_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_mask_add_epi8 + //CHECK-LABEL: test_mm512_mask_add_epi8 //CHECK: add <64 x i8> %{{.*}}, %{{.*}} //CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_add_epi8(__W, __U, __A, __B); } __m512i test_mm512_maskz_add_epi8 (__mmask64 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_maskz_add_epi8 + //CHECK-LABEL: test_mm512_maskz_add_epi8 //CHECK: add <64 x i8> %{{.*}}, %{{.*}} //CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_add_epi8(__U, __A, __B); } __m512i test_mm512_sub_epi8 (__m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_sub_epi8 + //CHECK-LABEL: test_mm512_sub_epi8 //CHECK: sub <64 x i8> return _mm512_sub_epi8(__A, __B); } __m512i test_mm512_mask_sub_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_mask_sub_epi8 + //CHECK-LABEL: test_mm512_mask_sub_epi8 //CHECK: sub <64 x i8> %{{.*}}, %{{.*}} //CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_sub_epi8(__W, __U, __A, __B); } __m512i test_mm512_maskz_sub_epi8 (__mmask64 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_maskz_sub_epi8 + //CHECK-LABEL: test_mm512_maskz_sub_epi8 //CHECK: sub <64 x i8> %{{.*}}, %{{.*}} //CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_sub_epi8(__U, __A, __B); } __m512i test_mm512_add_epi16 (__m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_add_epi16 + //CHECK-LABEL: test_mm512_add_epi16 //CHECK: add <32 x i16> return _mm512_add_epi16(__A, __B); } __m512i test_mm512_mask_add_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_mask_add_epi16 + //CHECK-LABEL: test_mm512_mask_add_epi16 //CHECK: add <32 x i16> %{{.*}}, %{{.*}} //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_add_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_add_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_maskz_add_epi16 + //CHECK-LABEL: test_mm512_maskz_add_epi16 //CHECK: add <32 x i16> %{{.*}}, %{{.*}} //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_add_epi16(__U, __A, __B); } __m512i test_mm512_sub_epi16 (__m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_sub_epi16 + //CHECK-LABEL: test_mm512_sub_epi16 //CHECK: sub <32 x i16> return _mm512_sub_epi16(__A, __B); } __m512i test_mm512_mask_sub_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_mask_sub_epi16 + //CHECK-LABEL: test_mm512_mask_sub_epi16 //CHECK: sub <32 x i16> %{{.*}}, %{{.*}} //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_sub_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_sub_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_maskz_sub_epi16 + //CHECK-LABEL: test_mm512_maskz_sub_epi16 //CHECK: sub <32 x i16> %{{.*}}, %{{.*}} //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_sub_epi16(__U, __A, __B); } __m512i test_mm512_mullo_epi16 (__m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_mullo_epi16 + //CHECK-LABEL: test_mm512_mullo_epi16 //CHECK: mul <32 x i16> return _mm512_mullo_epi16(__A, __B); } TEST_CONSTEXPR(match_v32hi(_mm512_mullo_epi16((__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32}, (__m512i)(__v32hi){-64, -62, +60, +58, -56, -54, +52, +50, -48, -46, +44, +42, -40, -38, +36, +34, -32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), -64, 124, 180, -232, -280, 324, 364, -400, -432, 460, 484, -504, -520, 532, 540, -544, -544, 540, 532, -520, -504, 484, 460, -432, -400, 364, 324, -280, -232, -180, -124, -64)); __m512i test_mm512_mask_mullo_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_mask_mullo_epi16 + //CHECK-LABEL: test_mm512_mask_mullo_epi16 //CHECK: mul <32 x i16> %{{.*}}, %{{.*}} //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_mullo_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_mullo_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { - //CHECK-LABEL: @test_mm512_maskz_mullo_epi16 + //CHECK-LABEL: test_mm512_maskz_mullo_epi16 //CHECK: mul <32 x i16> %{{.*}}, %{{.*}} //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_mullo_epi16(__U, __A, __B); } __m512i test_mm512_mask_blend_epi8(__mmask64 __U, __m512i __A, __m512i __W) { - // CHECK-LABEL: @test_mm512_mask_blend_epi8 + // CHECK-LABEL: test_mm512_mask_blend_epi8 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_blend_epi8(__U,__A,__W); } __m512i test_mm512_mask_blend_epi16(__mmask32 __U, __m512i __A, __m512i __W) { - // CHECK-LABEL: @test_mm512_mask_blend_epi16 + // CHECK-LABEL: test_mm512_mask_blend_epi16 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_blend_epi16(__U,__A,__W); } __m512i test_mm512_abs_epi8(__m512i __A) { - // CHECK-LABEL: @test_mm512_abs_epi8 + // CHECK-LABEL: test_mm512_abs_epi8 // CHECK: [[ABS:%.*]] = call <64 x i8> @llvm.abs.v64i8(<64 x i8> %{{.*}}, i1 false) return _mm512_abs_epi8(__A); } __m512i test_mm512_mask_abs_epi8(__m512i __W, __mmask64 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_abs_epi8 + // CHECK-LABEL: test_mm512_mask_abs_epi8 // CHECK: [[ABS:%.*]] = call <64 x i8> @llvm.abs.v64i8(<64 x i8> %{{.*}}, i1 false) // CHECK: select <64 x i1> %{{.*}}, <64 x i8> [[ABS]], <64 x i8> %{{.*}} return _mm512_mask_abs_epi8(__W,__U,__A); } __m512i test_mm512_maskz_abs_epi8(__mmask64 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_abs_epi8 + // CHECK-LABEL: test_mm512_maskz_abs_epi8 // CHECK: [[ABS:%.*]] = call <64 x i8> @llvm.abs.v64i8(<64 x i8> %{{.*}}, i1 false) // CHECK: select <64 x i1> %{{.*}}, <64 x i8> [[ABS]], <64 x i8> %{{.*}} return _mm512_maskz_abs_epi8(__U,__A); } __m512i test_mm512_abs_epi16(__m512i __A) { - // CHECK-LABEL: @test_mm512_abs_epi16 + // CHECK-LABEL: test_mm512_abs_epi16 // CHECK: [[ABS:%.*]] = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %{{.*}}, i1 false) return _mm512_abs_epi16(__A); } __m512i test_mm512_mask_abs_epi16(__m512i __W, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_abs_epi16 + // CHECK-LABEL: test_mm512_mask_abs_epi16 // CHECK: [[ABS:%.*]] = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %{{.*}}, i1 false) // CHECK: select <32 x i1> %{{.*}}, <32 x i16> [[ABS]], <32 x i16> %{{.*}} return _mm512_mask_abs_epi16(__W,__U,__A); } __m512i test_mm512_maskz_abs_epi16(__mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_abs_epi16 + // CHECK-LABEL: test_mm512_maskz_abs_epi16 // CHECK: [[ABS:%.*]] = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %{{.*}}, i1 false) // CHECK: select <32 x i1> %{{.*}}, <32 x i16> [[ABS]], <32 x i16> %{{.*}} return _mm512_maskz_abs_epi16(__U,__A); } __m512i test_mm512_packs_epi32(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_packs_epi32 + // CHECK-LABEL: test_mm512_packs_epi32 // CHECK: @llvm.x86.avx512.packssdw.512 return _mm512_packs_epi32(__A,__B); } __m512i test_mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_packs_epi32 + // CHECK-LABEL: test_mm512_maskz_packs_epi32 // CHECK: @llvm.x86.avx512.packssdw.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_packs_epi32(__M,__A,__B); } __m512i test_mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_packs_epi32 + // CHECK-LABEL: test_mm512_mask_packs_epi32 // CHECK: @llvm.x86.avx512.packssdw.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_packs_epi32(__W,__M,__A,__B); } __m512i test_mm512_packs_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_packs_epi16 + // CHECK-LABEL: test_mm512_packs_epi16 // CHECK: @llvm.x86.avx512.packsswb.512 return _mm512_packs_epi16(__A,__B); } __m512i test_mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_packs_epi16 + // CHECK-LABEL: test_mm512_mask_packs_epi16 // CHECK: @llvm.x86.avx512.packsswb.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_packs_epi16(__W,__M,__A,__B); } __m512i test_mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_packs_epi16 + // CHECK-LABEL: test_mm512_maskz_packs_epi16 // CHECK: @llvm.x86.avx512.packsswb.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_packs_epi16(__M,__A,__B); } __m512i test_mm512_packus_epi32(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_packus_epi32 + // CHECK-LABEL: test_mm512_packus_epi32 // CHECK: @llvm.x86.avx512.packusdw.512 return _mm512_packus_epi32(__A,__B); } __m512i test_mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_packus_epi32 + // CHECK-LABEL: test_mm512_maskz_packus_epi32 // CHECK: @llvm.x86.avx512.packusdw.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_packus_epi32(__M,__A,__B); } __m512i test_mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_packus_epi32 + // CHECK-LABEL: test_mm512_mask_packus_epi32 // CHECK: @llvm.x86.avx512.packusdw.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_packus_epi32(__W,__M,__A,__B); } __m512i test_mm512_packus_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_packus_epi16 + // CHECK-LABEL: test_mm512_packus_epi16 // CHECK: @llvm.x86.avx512.packuswb.512 return _mm512_packus_epi16(__A,__B); } __m512i test_mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_packus_epi16 + // CHECK-LABEL: test_mm512_mask_packus_epi16 // CHECK: @llvm.x86.avx512.packuswb.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_packus_epi16(__W,__M,__A,__B); } __m512i test_mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_packus_epi16 + // CHECK-LABEL: test_mm512_maskz_packus_epi16 // CHECK: @llvm.x86.avx512.packuswb.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_packus_epi16(__M,__A,__B); } __m512i test_mm512_adds_epi8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_adds_epi8 + // CHECK-LABEL: test_mm512_adds_epi8 // CHECK: @llvm.sadd.sat.v64i8 return _mm512_adds_epi8(__A,__B); } -TEST_CONSTEXPR(match_v64qi(_mm512_adds_epi8((__m512i)(__v64qi){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45, -46, +47, +100, +50, -100, +20, +80, -50, +120, -20, -100, -50, +100, -20, -80, +50, -120, +20}, (__m512i)(__v64qi){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45, -46, +47, +50, +80, -50, +110, +60, -30, +20, -10, +50, +80, -50, +110, +60, -30, +20, -10}), 0, +2, -4, +6, -8, +10, -12, +14, -16, +18, -20, +22, -24, +26, -28, +30, -32, +34, -36, +38, -40, +42, -44, +46, -48, +50, -52, +54, -56, +58, -60, +62, -64, +66, -68, +70, -72, +74, -76, +78, -80, +82, -84, +86, -88, +90, -92, +94, +127, +127, -128, +127, +127, -80, +127, -30, -50, +30, +50, +90, -20, +20, -100, +10)); +TEST_CONSTEXPR(match_v64qi(_mm512_adds_epi8((__m512i)(__v64qs){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45, -46, +47, +100, +50, -100, +20, +80, -50, +120, -20, -100, -50, +100, -20, -80, +50, -120, +20}, (__m512i)(__v64qs){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45, -46, +47, +50, +80, -50, +110, +60, -30, +20, -10, +50, +80, -50, +110, +60, -30, +20, -10}), 0, +2, -4, +6, -8, +10, -12, +14, -16, +18, -20, +22, -24, +26, -28, +30, -32, +34, -36, +38, -40, +42, -44, +46, -48, +50, -52, +54, -56, +58, -60, +62, -64, +66, -68, +70, -72, +74, -76, +78, -80, +82, -84, +86, -88, +90, -92, +94, +127, +127, -128, +127, +127, -80, +127, -30, -50, +30, +50, +90, -20, +20, -100, +10)); __m512i test_mm512_mask_adds_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_adds_epi8 + // CHECK-LABEL: test_mm512_mask_adds_epi8 // CHECK: @llvm.sadd.sat.v64i8 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_adds_epi8(__W,__U,__A,__B); } __m512i test_mm512_maskz_adds_epi8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_adds_epi8 + // CHECK-LABEL: test_mm512_maskz_adds_epi8 // CHECK: @llvm.sadd.sat.v64i8 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_adds_epi8(__U,__A,__B); } __m512i test_mm512_adds_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_adds_epi16 + // CHECK-LABEL: test_mm512_adds_epi16 // CHECK: @llvm.sadd.sat.v32i16 return _mm512_adds_epi16(__A,__B); } TEST_CONSTEXPR(match_v32hi(_mm512_adds_epi16((__m512i)(__v32hi){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, +32000, -32000, +32000, -32000}, (__m512i)(__v32hi){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, +800, -800, -800, +800}), 0, +2, -4, +6, -8, +10, -12, +14, -16, +18, -20, +22, -24, +26, -28, +30, -32, +34, -36, +38, -40, +42, -44, +46, -48, +50, -52, +54, +32767, -32768, +31200, -31200)); __m512i test_mm512_mask_adds_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_adds_epi16 + // CHECK-LABEL: test_mm512_mask_adds_epi16 // CHECK: @llvm.sadd.sat.v32i16 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_adds_epi16(__W,__U,__A,__B); } __m512i test_mm512_maskz_adds_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_adds_epi16 + // CHECK-LABEL: test_mm512_maskz_adds_epi16 // CHECK: @llvm.sadd.sat.v32i16 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_adds_epi16(__U,__A,__B); } __m512i test_mm512_adds_epu8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_adds_epu8 + // CHECK-LABEL: test_mm512_adds_epu8 // CHECK-NOT: @llvm.x86.avx512.mask.paddus.b.512 // CHECK: call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_adds_epu8(__A,__B); } -TEST_CONSTEXPR(match_v64qu(_mm512_adds_epu8((__m512i)(__v64qu){0, 0, 0, 0, 0, 0, 0, 0, +63, +63, +63, +63, +63, +63, +63, +63, +64, +64, +64, +64, +64, +64, +64, +64, +127, +127, +127, +127, +127, +127, +127, +127, +128, +128, +128, +128, +128, +128, +128, +128, +191, +191, +191, +191, +191, +191, +191, +191, +192, +192, +192, +192, +192, +192, +192, +192, +255, +255, +255, +255, +255, +255, +255, +255}, (__m512i)(__v64qu){0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255}), 0, +63, +64, +127, +128, +191, +192, +255, +63, +126, +127, +190, +191, +254, +255, +255, +64, +127, +128, +192, +193, +255, +255, +255, +127, +190, +191, +254, +255, +255, +255, +255, +128, +191, +192, +255, +255, +255, +255, +255, +191, +254, +255, +255, +255, +255, +255, +255, +192, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255)); +TEST_CONSTEXPR(match_v64qu(_mm512_adds_epu8((__m512i)(__v64qu){0, 0, 0, 0, 0, 0, 0, 0, +63, +63, +63, +63, +63, +63, +63, +63, +64, +64, +64, +64, +64, +64, +64, +64, +127, +127, +127, +127, +127, +127, +127, +127, +128, +128, +128, +128, +128, +128, +128, +128, +191, +191, +191, +191, +191, +191, +191, +191, +192, +192, +192, +192, +192, +192, +192, +192, +255, +255, +255, +255, +255, +255, +255, +255}, (__m512i)(__v64qu){0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255}), 0, +63, +64, +127, +128, +191, +192, +255, +63, +126, +127, +190, +191, +254, +255, +255, +64, +127, +128, +191, +192, +255, +255, +255, +127, +190, +191, +254, +255, +255, +255, +255, +128, +191, +192, +255, +255, +255, +255, +255, +191, +254, +255, +255, +255, +255, +255, +255, +192, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255, +255)); __m512i test_mm512_mask_adds_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_adds_epu8 + // CHECK-LABEL: test_mm512_mask_adds_epu8 // CHECK-NOT: @llvm.x86.avx512.mask.paddus.b.512 // CHECK: call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} @@ -1008,264 +1010,264 @@ __m512i test_mm512_mask_adds_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m51 TEST_CONSTEXPR(match_v32hu(_mm512_adds_epu16((__m512i)(__v32hu){0, 0, 0, 0, +16384, +16384, +16384, +16384, +16384, +16384, +32767, +32767, +32767, +32767, +32767, +32767, +32768, +32768, +32768, +32768, +32768, +32768, +49152, +49152, +49152, +49152, +49152, +49152, +65535, +65535, +65535, +65535}, (__m512i)(__v32hu){0, +32767, +32768, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +32767, +32768, +65535}), 0, +32767, +32768, +65535, +16384, +32768, +49151, +49152, +65535, +65535, +32767, +49151, +65534, +65535, +65535, +65535, +32768, +49152, +65535, +65535, +65535, +65535, +49152, +65535, +65535, +65535, +65535, +65535, +65535, +65535, +65535, +65535)); __m512i test_mm512_maskz_adds_epu8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_adds_epu8 + // CHECK-LABEL: test_mm512_maskz_adds_epu8 // CHECK-NOT: @llvm.x86.avx512.mask.paddus.b.512 // CHECK: call <64 x i8> @llvm.uadd.sat.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_adds_epu8(__U,__A,__B); } __m512i test_mm512_adds_epu16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_adds_epu16 + // CHECK-LABEL: test_mm512_adds_epu16 // CHECK-NOT: @llvm.x86.avx512.mask.paddus.w.512 // CHECK: call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_adds_epu16(__A,__B); } __m512i test_mm512_mask_adds_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_adds_epu16 + // CHECK-LABEL: test_mm512_mask_adds_epu16 // CHECK-NOT: @llvm.x86.avx512.mask.paddus.w.512 // CHECK: call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_adds_epu16(__W,__U,__A,__B); } __m512i test_mm512_maskz_adds_epu16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_adds_epu16 + // CHECK-LABEL: test_mm512_maskz_adds_epu16 // CHECK-NOT: @llvm.x86.avx512.mask.paddus.w.512 // CHECK: call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_adds_epu16(__U,__A,__B); } __m512i test_mm512_avg_epu8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_avg_epu8 + // CHECK-LABEL: test_mm512_avg_epu8 // CHECK: @llvm.x86.avx512.pavg.b.512 return _mm512_avg_epu8(__A,__B); } __m512i test_mm512_mask_avg_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_avg_epu8 + // CHECK-LABEL: test_mm512_mask_avg_epu8 // CHECK: @llvm.x86.avx512.pavg.b.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_avg_epu8(__W,__U,__A,__B); } __m512i test_mm512_maskz_avg_epu8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_avg_epu8 + // CHECK-LABEL: test_mm512_maskz_avg_epu8 // CHECK: @llvm.x86.avx512.pavg.b.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_avg_epu8(__U,__A,__B); } __m512i test_mm512_avg_epu16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_avg_epu16 + // CHECK-LABEL: test_mm512_avg_epu16 // CHECK: @llvm.x86.avx512.pavg.w.512 return _mm512_avg_epu16(__A,__B); } __m512i test_mm512_mask_avg_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_avg_epu16 + // CHECK-LABEL: test_mm512_mask_avg_epu16 // CHECK: @llvm.x86.avx512.pavg.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_avg_epu16(__W,__U,__A,__B); } __m512i test_mm512_maskz_avg_epu16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_avg_epu16 + // CHECK-LABEL: test_mm512_maskz_avg_epu16 // CHECK: @llvm.x86.avx512.pavg.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_avg_epu16(__U,__A,__B); } __m512i test_mm512_max_epi8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_max_epi8 + // CHECK-LABEL: test_mm512_max_epi8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smax.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_max_epi8(__A,__B); } __m512i test_mm512_maskz_max_epi8(__mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_max_epi8 + // CHECK-LABEL: test_mm512_maskz_max_epi8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smax.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_maskz_max_epi8(__M,__A,__B); } __m512i test_mm512_mask_max_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_max_epi8 + // CHECK-LABEL: test_mm512_mask_max_epi8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smax.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_mask_max_epi8(__W,__M,__A,__B); } __m512i test_mm512_max_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_max_epi16 + // CHECK-LABEL: test_mm512_max_epi16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smax.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_max_epi16(__A,__B); } __m512i test_mm512_maskz_max_epi16(__mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_max_epi16 + // CHECK-LABEL: test_mm512_maskz_max_epi16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smax.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_maskz_max_epi16(__M,__A,__B); } __m512i test_mm512_mask_max_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_max_epi16 + // CHECK-LABEL: test_mm512_mask_max_epi16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smax.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_mask_max_epi16(__W,__M,__A,__B); } __m512i test_mm512_max_epu8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_max_epu8 + // CHECK-LABEL: test_mm512_max_epu8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umax.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_max_epu8(__A,__B); } __m512i test_mm512_maskz_max_epu8(__mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_max_epu8 + // CHECK-LABEL: test_mm512_maskz_max_epu8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umax.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_maskz_max_epu8(__M,__A,__B); } __m512i test_mm512_mask_max_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_max_epu8 + // CHECK-LABEL: test_mm512_mask_max_epu8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umax.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_mask_max_epu8(__W,__M,__A,__B); } __m512i test_mm512_max_epu16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_max_epu16 + // CHECK-LABEL: test_mm512_max_epu16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umax.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_max_epu16(__A,__B); } __m512i test_mm512_maskz_max_epu16(__mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_max_epu16 + // CHECK-LABEL: test_mm512_maskz_max_epu16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umax.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_maskz_max_epu16(__M,__A,__B); } __m512i test_mm512_mask_max_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_max_epu16 + // CHECK-LABEL: test_mm512_mask_max_epu16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umax.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_mask_max_epu16(__W,__M,__A,__B); } __m512i test_mm512_min_epi8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_min_epi8 + // CHECK-LABEL: test_mm512_min_epi8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smin.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_min_epi8(__A,__B); } __m512i test_mm512_maskz_min_epi8(__mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_min_epi8 + // CHECK-LABEL: test_mm512_maskz_min_epi8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smin.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_maskz_min_epi8(__M,__A,__B); } __m512i test_mm512_mask_min_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_min_epi8 + // CHECK-LABEL: test_mm512_mask_min_epi8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smin.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_mask_min_epi8(__W,__M,__A,__B); } __m512i test_mm512_min_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_min_epi16 + // CHECK-LABEL: test_mm512_min_epi16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smin.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_min_epi16(__A,__B); } __m512i test_mm512_maskz_min_epi16(__mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_min_epi16 + // CHECK-LABEL: test_mm512_maskz_min_epi16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smin.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_maskz_min_epi16(__M,__A,__B); } __m512i test_mm512_mask_min_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_min_epi16 + // CHECK-LABEL: test_mm512_mask_min_epi16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smin.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_mask_min_epi16(__W,__M,__A,__B); } __m512i test_mm512_min_epu8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_min_epu8 + // CHECK-LABEL: test_mm512_min_epu8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umin.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_min_epu8(__A,__B); } __m512i test_mm512_maskz_min_epu8(__mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_min_epu8 + // CHECK-LABEL: test_mm512_maskz_min_epu8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umin.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_maskz_min_epu8(__M,__A,__B); } __m512i test_mm512_mask_min_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_min_epu8 + // CHECK-LABEL: test_mm512_mask_min_epu8 // CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umin.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}} return _mm512_mask_min_epu8(__W,__M,__A,__B); } __m512i test_mm512_min_epu16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_min_epu16 + // CHECK-LABEL: test_mm512_min_epu16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umin.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_min_epu16(__A,__B); } __m512i test_mm512_maskz_min_epu16(__mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_min_epu16 + // CHECK-LABEL: test_mm512_maskz_min_epu16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umin.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_maskz_min_epu16(__M,__A,__B); } __m512i test_mm512_mask_min_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_min_epu16 + // CHECK-LABEL: test_mm512_mask_min_epu16 // CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umin.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16> {{.*}} return _mm512_mask_min_epu16(__W,__M,__A,__B); } __m512i test_mm512_shuffle_epi8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_shuffle_epi8 + // CHECK-LABEL: test_mm512_shuffle_epi8 // CHECK: @llvm.x86.avx512.pshuf.b.512 return _mm512_shuffle_epi8(__A,__B); } __m512i test_mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_shuffle_epi8 + // CHECK-LABEL: test_mm512_mask_shuffle_epi8 // CHECK: @llvm.x86.avx512.pshuf.b.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_shuffle_epi8(__W,__U,__A,__B); } __m512i test_mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_shuffle_epi8 + // CHECK-LABEL: test_mm512_maskz_shuffle_epi8 // CHECK: @llvm.x86.avx512.pshuf.b.512 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_shuffle_epi8(__U,__A,__B); } __m512i test_mm512_subs_epi8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_subs_epi8 + // CHECK-LABEL: test_mm512_subs_epi8 // CHECK: @llvm.ssub.sat.v64i8 return _mm512_subs_epi8(__A,__B); } -TEST_CONSTEXPR(match_v64qi(_mm512_subs_epi8((__m512i)(__v64qi){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45, -46, +47, +100, +50, -100, +20, +80, -50, +120, -20, -100, -50, +100, -20, -80, +50, -120, +20}, (__m512i)(__v64qi){0, -1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27, +28, -29, +30, -31, +32, -33, +34, -35, +36, -37, +38, -39, +40, -41, +42, -43, +44, -45, +46, -47, -50, -80, +50, -110, -60, +30, -20, +10, -50, -80, +50, -110, -60, +30, -20, +10}), 0, +2, -4, +6, -8, +10, -12, +14, -16, +18, -20, +22, -24, +26, -28, +30, -32, +34, -36, +38, -40, +42, -44, +46, -48, +50, -52, +54, -56, +58, -60, +62, -64, +66, -68, +70, -72, +74, -76, +78, -80, +82, -84, +86, -88, +90, -92, +94, +127, +127, -128, +127, +127, -80, +127, -30, -50, +30, +50, +90, -20, +20, -100, +10)); +TEST_CONSTEXPR(match_v64qi(_mm512_subs_epi8((__m512i)(__v64qs){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45, -46, +47, +100, +50, -100, +20, +80, -50, +120, -20, -100, -50, +100, -20, -80, +50, -120, +20}, (__m512i)(__v64qs){0, -1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27, +28, -29, +30, -31, +32, -33, +34, -35, +36, -37, +38, -39, +40, -41, +42, -43, +44, -45, +46, -47, -50, -80, +50, -110, -60, +30, -20, +10, -50, -80, +50, -110, -60, +30, -20, +10}), 0, +2, -4, +6, -8, +10, -12, +14, -16, +18, -20, +22, -24, +26, -28, +30, -32, +34, -36, +38, -40, +42, -44, +46, -48, +50, -52, +54, -56, +58, -60, +62, -64, +66, -68, +70, -72, +74, -76, +78, -80, +82, -84, +86, -88, +90, -92, +94, +127, +127, -128, +127, +127, -80, +127, -30, -50, +30, +50, +90, -20, +20, -100, +10)); __m512i test_mm512_mask_subs_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_subs_epi8 + // CHECK-LABEL: test_mm512_mask_subs_epi8 // CHECK: @llvm.ssub.sat.v64i8 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_subs_epi8(__W,__U,__A,__B); } __m512i test_mm512_maskz_subs_epi8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_subs_epi8 + // CHECK-LABEL: test_mm512_maskz_subs_epi8 // CHECK: @llvm.ssub.sat.v64i8 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_subs_epi8(__U,__A,__B); } __m512i test_mm512_subs_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_subs_epi16 + // CHECK-LABEL: test_mm512_subs_epi16 // CHECK: @llvm.ssub.sat.v32i16 return _mm512_subs_epi16(__A,__B); } TEST_CONSTEXPR(match_v32hi(_mm512_subs_epi16((__m512i)(__v32hi){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, +32000, -32000, +32000, -32000}, (__m512i)(__v32hi){0, -1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27, -800, +800, +800, -800}), 0, +2, -4, +6, -8, +10, -12, +14, -16, +18, -20, +22, -24, +26, -28, +30, -32, +34, -36, +38, -40, +42, -44, +46, -48, +50, -52, +54, +32767, -32768, +31200, -31200)); __m512i test_mm512_mask_subs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_subs_epi16 + // CHECK-LABEL: test_mm512_mask_subs_epi16 // CHECK: @llvm.ssub.sat.v32i16 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_subs_epi16(__W,__U,__A,__B); } __m512i test_mm512_maskz_subs_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_subs_epi16 + // CHECK-LABEL: test_mm512_maskz_subs_epi16 // CHECK: @llvm.ssub.sat.v32i16 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_subs_epi16(__U,__A,__B); } __m512i test_mm512_subs_epu8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_subs_epu8 + // CHECK-LABEL: test_mm512_subs_epu8 // CHECK-NOT: @llvm.x86.avx512.mask.psubus.b.512 // CHECK: call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_subs_epu8(__A,__B); } __m512i test_mm512_mask_subs_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_subs_epu8 + // CHECK-LABEL: test_mm512_mask_subs_epu8 // CHECK-NOT: @llvm.x86.avx512.mask.psubus.b.512 // CHECK: call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} @@ -1274,20 +1276,20 @@ return _mm512_mask_subs_epu8(__W,__U,__A,__B); TEST_CONSTEXPR(match_v64qu(_mm512_subs_epu8((__m512i)(__v64qu){0, 0, 0, 0, 0, 0, 0, 0, +63, +63, +63, +63, +63, +63, +63, +63, +64, +64, +64, +64, +64, +64, +64, +64, +127, +127, +127, +127, +127, +127, +127, +127, +128, +128, +128, +128, +128, +128, +128, +128, +191, +191, +191, +191, +191, +191, +191, +191, +192, +192, +192, +192, +192, +192, +192, +192, +255, +255, +255, +255, +255, +255, +255, +255}, (__m512i)(__v64qu){0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255, 0, +63, +64, +127, +128, +191, +192, +255}), 0, 0, 0, 0, 0, 0, 0, 0, +63, 0, 0, 0, 0, 0, 0, 0, +64, +1, 0, 0, 0, 0, 0, 0, +127, +64, +63, 0, 0, 0, 0, 0, +128, +65, +64, +1, 0, 0, 0, 0, +191, +128, +127, +64, +63, 0, 0, 0, +192, +129, +128, +65, +64, +1, 0, 0, +255, +192, +191, +128, +127, +64, +63, +0)); __m512i test_mm512_maskz_subs_epu8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_subs_epu8 + // CHECK-LABEL: test_mm512_maskz_subs_epu8 // CHECK-NOT: @llvm.x86.avx512.mask.psubus.b.512 // CHECK: call <64 x i8> @llvm.usub.sat.v64i8(<64 x i8> %{{.*}}, <64 x i8> %{{.*}}) // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_subs_epu8(__U,__A,__B); } __m512i test_mm512_subs_epu16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_subs_epu16 + // CHECK-LABEL: test_mm512_subs_epu16 // CHECK-NOT: @llvm.x86.avx512.mask.psubus.w.512 // CHECK: call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_subs_epu16(__A,__B); } __m512i test_mm512_mask_subs_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_subs_epu16 + // CHECK-LABEL: test_mm512_mask_subs_epu16 // CHECK-NOT: @llvm.x86.avx512.mask.psubus.w.512 // CHECK: call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} @@ -1295,627 +1297,630 @@ return _mm512_mask_subs_epu16(__W,__U,__A,__B); TEST_CONSTEXPR(match_v32hu(_mm512_subs_epu16((__m512i)(__v32hu){0, 0, 0, 0, +16384, +16384, +16384, +16384, +16384, +16384, +32767, +32767, +32767, +32767, +32767, +32767, +32768, +32768, +32768, +32768, +32768, +32768, +49152, +49152, +49152, +49152, +49152, +49152, +65535, +65535, +65535, +65535}, (__m512i)(__v32hu){0, +32767, +32768, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +16384, +32767, +32768, +49152, +65535, 0, +32767, +32768, +65535}), 0, 0, 0, 0, +16384, 0, 0, 0, 0, 0, +32767, +16383, 0, 0, 0, 0, +32768, +16384, +1, 0, 0, 0, +49152, +32768, +16385, +16384, 0, 0, +65535, +32768, +32767, 0)); } __m512i test_mm512_maskz_subs_epu16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_subs_epu16 + // CHECK-LABEL: test_mm512_maskz_subs_epu16 // CHECK-NOT: @llvm.x86.avx512.mask.psubus.w.512 // CHECK: call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}) // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_subs_epu16(__U,__A,__B); } __m512i test_mm512_mask2_permutex2var_epi16(__m512i __A, __m512i __I, __mmask32 __U, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask2_permutex2var_epi16 + // CHECK-LABEL: test_mm512_mask2_permutex2var_epi16 // CHECK: @llvm.x86.avx512.vpermi2var.hi.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask2_permutex2var_epi16(__A,__I,__U,__B); } __m512i test_mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B) { - // CHECK-LABEL: @test_mm512_permutex2var_epi16 + // CHECK-LABEL: test_mm512_permutex2var_epi16 // CHECK: @llvm.x86.avx512.vpermi2var.hi.512 return _mm512_permutex2var_epi16(__A,__I,__B); } __m512i test_mm512_mask_permutex2var_epi16(__m512i __A, __mmask32 __U, __m512i __I, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_permutex2var_epi16 + // CHECK-LABEL: test_mm512_mask_permutex2var_epi16 // CHECK: @llvm.x86.avx512.vpermi2var.hi.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_permutex2var_epi16(__A,__U,__I,__B); } __m512i test_mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_permutex2var_epi16 + // CHECK-LABEL: test_mm512_maskz_permutex2var_epi16 // CHECK: @llvm.x86.avx512.vpermi2var.hi.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_permutex2var_epi16(__U,__A,__I,__B); } __m512i test_mm512_mulhrs_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mulhrs_epi16 + // CHECK-LABEL: test_mm512_mulhrs_epi16 // CHECK: @llvm.x86.avx512.pmul.hr.sw.512 return _mm512_mulhrs_epi16(__A,__B); } __m512i test_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_mulhrs_epi16 + // CHECK-LABEL: test_mm512_mask_mulhrs_epi16 // CHECK: @llvm.x86.avx512.pmul.hr.sw.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_mulhrs_epi16(__W,__U,__A,__B); } __m512i test_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_mulhrs_epi16 + // CHECK-LABEL: test_mm512_maskz_mulhrs_epi16 // CHECK: @llvm.x86.avx512.pmul.hr.sw.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_mulhrs_epi16(__U,__A,__B); } __m512i test_mm512_mulhi_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mulhi_epi16 + // CHECK-LABEL: test_mm512_mulhi_epi16 // CHECK: @llvm.x86.avx512.pmulh.w.512 return _mm512_mulhi_epi16(__A,__B); } TEST_CONSTEXPR(match_v32hi(_mm512_mulhi_epi16((__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32}, (__m512i)(__v32hi){-64, -62, +60, +58, -56, -54, +52, +50, -48, -46, +44, +42, -40, -38, +36, +34, -32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, -1, -1, -1)); __m512i test_mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_mulhi_epi16 + // CHECK-LABEL: test_mm512_mask_mulhi_epi16 // CHECK: @llvm.x86.avx512.pmulh.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_mulhi_epi16(__W,__U,__A,__B); } __m512i test_mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_mulhi_epi16 + // CHECK-LABEL: test_mm512_maskz_mulhi_epi16 // CHECK: @llvm.x86.avx512.pmulh.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_mulhi_epi16(__U,__A,__B); } __m512i test_mm512_mulhi_epu16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mulhi_epu16 + // CHECK-LABEL: test_mm512_mulhi_epu16 // CHECK: @llvm.x86.avx512.pmulhu.w.512 return _mm512_mulhi_epu16(__A,__B); } TEST_CONSTEXPR(match_v32hi(_mm512_mulhi_epu16((__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32}, (__m512i)(__v32hi){-64, -62, +60, +58, -56, -54, +52, +50, -48, -46, +44, +42, -40, -38, +36, +34, -32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), 0, -64, 0, 57, 4, -60, 0, 49, 8, -56, 0, 41, 12, -52, 0, 33, 16, -48, 0, 25, 20, -44, 0, 17, 24, -40, 0, 9, 28, 5, 30, 1)); __m512i test_mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_mulhi_epu16 + // CHECK-LABEL: test_mm512_mask_mulhi_epu16 // CHECK: @llvm.x86.avx512.pmulhu.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_mulhi_epu16(__W,__U,__A,__B); } __m512i test_mm512_maskz_mulhi_epu16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_mulhi_epu16 + // CHECK-LABEL: test_mm512_maskz_mulhi_epu16 // CHECK: @llvm.x86.avx512.pmulhu.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_mulhi_epu16(__U,__A,__B); } __m512i test_mm512_maddubs_epi16(__m512i __X, __m512i __Y) { - // CHECK-LABEL: @test_mm512_maddubs_epi16 + // CHECK-LABEL: test_mm512_maddubs_epi16 // CHECK: @llvm.x86.avx512.pmaddubs.w.512 return _mm512_maddubs_epi16(__X,__Y); } __m512i test_mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X, __m512i __Y) { - // CHECK-LABEL: @test_mm512_mask_maddubs_epi16 + // CHECK-LABEL: test_mm512_mask_maddubs_epi16 // CHECK: @llvm.x86.avx512.pmaddubs.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_maddubs_epi16(__W,__U,__X,__Y); } __m512i test_mm512_maskz_maddubs_epi16(__mmask32 __U, __m512i __X, __m512i __Y) { - // CHECK-LABEL: @test_mm512_maskz_maddubs_epi16 + // CHECK-LABEL: test_mm512_maskz_maddubs_epi16 // CHECK: @llvm.x86.avx512.pmaddubs.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_maddubs_epi16(__U,__X,__Y); } __m512i test_mm512_madd_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_madd_epi16 + // CHECK-LABEL: test_mm512_madd_epi16 // CHECK: @llvm.x86.avx512.pmaddw.d.512 return _mm512_madd_epi16(__A,__B); } __m512i test_mm512_mask_madd_epi16(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_madd_epi16 + // CHECK-LABEL: test_mm512_mask_madd_epi16 // CHECK: @llvm.x86.avx512.pmaddw.d.512 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} return _mm512_mask_madd_epi16(__W,__U,__A,__B); } __m512i test_mm512_maskz_madd_epi16(__mmask16 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_madd_epi16 + // CHECK-LABEL: test_mm512_maskz_madd_epi16 // CHECK: @llvm.x86.avx512.pmaddw.d.512 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}} return _mm512_maskz_madd_epi16(__U,__A,__B); } __m256i test_mm512_cvtsepi16_epi8(__m512i __A) { - // CHECK-LABEL: @test_mm512_cvtsepi16_epi8 + // CHECK-LABEL: test_mm512_cvtsepi16_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.wb.512 return _mm512_cvtsepi16_epi8(__A); } __m256i test_mm512_mask_cvtsepi16_epi8(__m256i __O, __mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtsepi16_epi8 + // CHECK-LABEL: test_mm512_mask_cvtsepi16_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.wb.512 return _mm512_mask_cvtsepi16_epi8(__O, __M, __A); } __m256i test_mm512_maskz_cvtsepi16_epi8(__mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_cvtsepi16_epi8 + // CHECK-LABEL: test_mm512_maskz_cvtsepi16_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.wb.512 return _mm512_maskz_cvtsepi16_epi8(__M, __A); } __m256i test_mm512_cvtusepi16_epi8(__m512i __A) { - // CHECK-LABEL: @test_mm512_cvtusepi16_epi8 + // CHECK-LABEL: test_mm512_cvtusepi16_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.wb.512 return _mm512_cvtusepi16_epi8(__A); } __m256i test_mm512_mask_cvtusepi16_epi8(__m256i __O, __mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtusepi16_epi8 + // CHECK-LABEL: test_mm512_mask_cvtusepi16_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.wb.512 return _mm512_mask_cvtusepi16_epi8(__O, __M, __A); } __m256i test_mm512_maskz_cvtusepi16_epi8(__mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_cvtusepi16_epi8 + // CHECK-LABEL: test_mm512_maskz_cvtusepi16_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.wb.512 return _mm512_maskz_cvtusepi16_epi8(__M, __A); } __m256i test_mm512_cvtepi16_epi8(__m512i __A) { - // CHECK-LABEL: @test_mm512_cvtepi16_epi8 + // CHECK-LABEL: test_mm512_cvtepi16_epi8 // CHECK: trunc <32 x i16> %{{.*}} to <32 x i8> return _mm512_cvtepi16_epi8(__A); } __m256i test_mm512_mask_cvtepi16_epi8(__m256i __O, __mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtepi16_epi8 + // CHECK-LABEL: test_mm512_mask_cvtepi16_epi8 // CHECK: trunc <32 x i16> %{{.*}} to <32 x i8> // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}} return _mm512_mask_cvtepi16_epi8(__O, __M, __A); } __m256i test_mm512_maskz_cvtepi16_epi8(__mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_cvtepi16_epi8 + // CHECK-LABEL: test_mm512_maskz_cvtepi16_epi8 // CHECK: trunc <32 x i16> %{{.*}} to <32 x i8> // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}} return _mm512_maskz_cvtepi16_epi8(__M, __A); } __m512i test_mm512_unpackhi_epi8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_unpackhi_epi8 + // CHECK-LABEL: test_mm512_unpackhi_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> return _mm512_unpackhi_epi8(__A, __B); } +TEST_CONSTEXPR(match_v64qi(_mm512_unpackhi_epi8((__m512i)(__v64qi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, (__m512i)(__v64qi){64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127}), 8, 72, 9, 73, 10, 74, 11, 75, 12, 76, 13, 77, 14, 78, 15, 79, 24, 88, 25, 89, 26, 90, 27, 91, 28, 92, 29, 93, 30, 94, 31, 95, 40, 104, 41, 105, 42, 106, 43, 107, 44, 108, 45, 109, 46, 110, 47, 111, 56, 120, 57, 121, 58, 122, 59, 123, 60, 124, 61, 125, 62, 126, 63, 127)); __m512i test_mm512_mask_unpackhi_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_unpackhi_epi8 + // CHECK-LABEL: test_mm512_mask_unpackhi_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_unpackhi_epi8(__W, __U, __A, __B); } __m512i test_mm512_maskz_unpackhi_epi8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_unpackhi_epi8 + // CHECK-LABEL: test_mm512_maskz_unpackhi_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127> // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_unpackhi_epi8(__U, __A, __B); } __m512i test_mm512_unpackhi_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_unpackhi_epi16 + // CHECK-LABEL: test_mm512_unpackhi_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63> return _mm512_unpackhi_epi16(__A, __B); } +TEST_CONSTEXPR(match_v32hi(_mm512_unpackhi_epi16((__m512i)(__v32hi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, (__m512i)(__v32hi){32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}), 4, 36, 5, 37, 6, 38, 7, 39, 12, 44, 13, 45, 14, 46, 15, 47, 20, 52, 21, 53, 22, 54, 23, 55, 28, 60, 29, 61, 30, 62, 31, 63)); + __m512i test_mm512_mask_unpackhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_unpackhi_epi16 + // CHECK-LABEL: test_mm512_mask_unpackhi_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_unpackhi_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_unpackhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_unpackhi_epi16 + // CHECK-LABEL: test_mm512_maskz_unpackhi_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_unpackhi_epi16(__U, __A, __B); } __m512i test_mm512_unpacklo_epi8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_unpacklo_epi8 + // CHECK-LABEL: test_mm512_unpacklo_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119> return _mm512_unpacklo_epi8(__A, __B); } +TEST_CONSTEXPR(match_v64qi(_mm512_unpacklo_epi8((__m512i)(__v64qi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, (__m512i)(__v64qi){64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127}), 0, 64, 1, 65, 2, 66, 3, 67, 4, 68, 5, 69, 6, 70, 7, 71, 16, 80, 17, 81, 18, 82, 19, 83, 20, 84, 21, 85, 22, 86, 23, 87, 32, 96, 33, 97, 34, 98, 35, 99, 36, 100, 37, 101, 38, 102, 39, 103, 48, 112, 49, 113, 50, 114, 51, 115, 52, 116, 53, 117, 54, 118, 55, 119)); __m512i test_mm512_mask_unpacklo_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_unpacklo_epi8 + // CHECK-LABEL: test_mm512_mask_unpacklo_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119> // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_unpacklo_epi8(__W, __U, __A, __B); } __m512i test_mm512_maskz_unpacklo_epi8(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_unpacklo_epi8 + // CHECK-LABEL: test_mm512_maskz_unpacklo_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119> // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_unpacklo_epi8(__U, __A, __B); } __m512i test_mm512_unpacklo_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_unpacklo_epi16 + // CHECK-LABEL: test_mm512_unpacklo_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59> return _mm512_unpacklo_epi16(__A, __B); } +TEST_CONSTEXPR(match_v32hi(_mm512_unpacklo_epi16((__m512i)(__v32hi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, (__m512i)(__v32hi){32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}), 0, 32, 1, 33, 2, 34, 3, 35, 8, 40, 9, 41, 10, 42, 11, 43, 16, 48, 17, 49, 18, 50, 19, 51, 24, 56, 25, 57, 26, 58, 27, 59)); __m512i test_mm512_mask_unpacklo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_unpacklo_epi16 + // CHECK-LABEL: test_mm512_mask_unpacklo_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_unpacklo_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_unpacklo_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_unpacklo_epi16 + // CHECK-LABEL: test_mm512_maskz_unpacklo_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_unpacklo_epi16(__U, __A, __B); } __m512i test_mm512_cvtepi8_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm512_cvtepi8_epi16 + // CHECK-LABEL: test_mm512_cvtepi8_epi16 // CHECK: sext <32 x i8> %{{.*}} to <32 x i16> return _mm512_cvtepi8_epi16(__A); } - -TEST_CONSTEXPR(match_v32hi(_mm512_cvtepi8_epi16(_mm256_setr_epi8(-3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16, 17, -18, 19, -20, 21, -22, 23, -24, 25, -26, 27, -28)), -3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16, 17, -18, 19, -20, 21, -22, 23, -24, 25, -26, 27, -28)); +TEST_CONSTEXPR(match_v32hi(_mm512_cvtepi8_epi16((__m256i)(__v32qs){-3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16, 17, -18, 19, -20, 21, -22, 23, -24, 25, -26, 27, -28}), -3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16, 17, -18, 19, -20, 21, -22, 23, -24, 25, -26, 27, -28)); __m512i test_mm512_mask_cvtepi8_epi16(__m512i __W, __mmask32 __U, __m256i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtepi8_epi16 + // CHECK-LABEL: test_mm512_mask_cvtepi8_epi16 // CHECK: sext <32 x i8> %{{.*}} to <32 x i16> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_cvtepi8_epi16(__W, __U, __A); } __m512i test_mm512_maskz_cvtepi8_epi16(__mmask32 __U, __m256i __A) { - // CHECK-LABEL: @test_mm512_maskz_cvtepi8_epi16 + // CHECK-LABEL: test_mm512_maskz_cvtepi8_epi16 // CHECK: sext <32 x i8> %{{.*}} to <32 x i16> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_cvtepi8_epi16(__U, __A); } __m512i test_mm512_cvtepu8_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm512_cvtepu8_epi16 + // CHECK-LABEL: test_mm512_cvtepu8_epi16 // CHECK: zext <32 x i8> %{{.*}} to <32 x i16> return _mm512_cvtepu8_epi16(__A); } - -TEST_CONSTEXPR(match_v32hi(_mm512_cvtepu8_epi16(_mm256_setr_epi8(-3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16, 17, -18, 19, -20, 21, -22, 23, -24, 25, -26, 27, -28)), 253, 2, 255, 0, 1, 254, 3, 252, 5, 250, 7, 248, 9, 246, 11, 244, 13, 242, 15, 240, 17, 238, 19, 236, 21, 234, 23, 232, 25, 230, 27, 228)); +TEST_CONSTEXPR(match_v32hi(_mm512_cvtepu8_epi16((__m256i)(__v32qs){-3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16, 17, -18, 19, -20, 21, -22, 23, -24, 25, -26, 27, -28}), 253, 2, 255, 0, 1, 254, 3, 252, 5, 250, 7, 248, 9, 246, 11, 244, 13, 242, 15, 240, 17, 238, 19, 236, 21, 234, 23, 232, 25, 230, 27, 228)); __m512i test_mm512_mask_cvtepu8_epi16(__m512i __W, __mmask32 __U, __m256i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtepu8_epi16 + // CHECK-LABEL: test_mm512_mask_cvtepu8_epi16 // CHECK: zext <32 x i8> %{{.*}} to <32 x i16> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_cvtepu8_epi16(__W, __U, __A); } __m512i test_mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A) { - // CHECK-LABEL: @test_mm512_maskz_cvtepu8_epi16 + // CHECK-LABEL: test_mm512_maskz_cvtepu8_epi16 // CHECK: zext <32 x i8> %{{.*}} to <32 x i16> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_cvtepu8_epi16(__U, __A); } __m512i test_mm512_shufflehi_epi16(__m512i __A) { - // CHECK-LABEL: @test_mm512_shufflehi_epi16 + // CHECK-LABEL: test_mm512_shufflehi_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 21, i32 21, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 29, i32 29, i32 28, i32 28> return _mm512_shufflehi_epi16(__A, 5); } __m512i test_mm512_mask_shufflehi_epi16(__m512i __W, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_shufflehi_epi16 + // CHECK-LABEL: test_mm512_mask_shufflehi_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 21, i32 21, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 29, i32 29, i32 28, i32 28> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_shufflehi_epi16(__W, __U, __A, 5); } __m512i test_mm512_maskz_shufflehi_epi16(__mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_shufflehi_epi16 + // CHECK-LABEL: test_mm512_maskz_shufflehi_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 21, i32 21, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 29, i32 29, i32 28, i32 28> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_shufflehi_epi16(__U, __A, 5); } __m512i test_mm512_shufflelo_epi16(__m512i __A) { - // CHECK-LABEL: @test_mm512_shufflelo_epi16 + // CHECK-LABEL: test_mm512_shufflelo_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> poison, <32 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31> return _mm512_shufflelo_epi16(__A, 5); } __m512i test_mm512_mask_shufflelo_epi16(__m512i __W, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_shufflelo_epi16 + // CHECK-LABEL: test_mm512_mask_shufflelo_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> poison, <32 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_shufflelo_epi16(__W, __U, __A, 5); } __m512i test_mm512_maskz_shufflelo_epi16(__mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_shufflelo_epi16 + // CHECK-LABEL: test_mm512_maskz_shufflelo_epi16 // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> poison, <32 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31> // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_shufflelo_epi16(__U, __A, 5); } __m512i test_mm512_sllv_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_sllv_epi16 + // CHECK-LABEL: test_mm512_sllv_epi16 // CHECK: @llvm.x86.avx512.psllv.w.512( return _mm512_sllv_epi16(__A, __B); } __m512i test_mm512_mask_sllv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_sllv_epi16 + // CHECK-LABEL: test_mm512_mask_sllv_epi16 // CHECK: @llvm.x86.avx512.psllv.w.512( // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_sllv_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_sllv_epi16 + // CHECK-LABEL: test_mm512_maskz_sllv_epi16 // CHECK: @llvm.x86.avx512.psllv.w.512( // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_sllv_epi16(__U, __A, __B); } __m512i test_mm512_sll_epi16(__m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_sll_epi16 + // CHECK-LABEL: test_mm512_sll_epi16 // CHECK: @llvm.x86.avx512.psll.w.512 return _mm512_sll_epi16(__A, __B); } __m512i test_mm512_mask_sll_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_mask_sll_epi16 + // CHECK-LABEL: test_mm512_mask_sll_epi16 // CHECK: @llvm.x86.avx512.psll.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_sll_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_maskz_sll_epi16 + // CHECK-LABEL: test_mm512_maskz_sll_epi16 // CHECK: @llvm.x86.avx512.psll.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_sll_epi16(__U, __A, __B); } __m512i test_mm512_slli_epi16(__m512i __A) { - // CHECK-LABEL: @test_mm512_slli_epi16 + // CHECK-LABEL: test_mm512_slli_epi16 // CHECK: @llvm.x86.avx512.pslli.w.512 return _mm512_slli_epi16(__A, 5); } __m512i test_mm512_slli_epi16_2(__m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_slli_epi16_2 + // CHECK-LABEL: test_mm512_slli_epi16_2 // CHECK: @llvm.x86.avx512.pslli.w.512 return _mm512_slli_epi16(__A, __B); } __m512i test_mm512_mask_slli_epi16(__m512i __W, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_slli_epi16 + // CHECK-LABEL: test_mm512_mask_slli_epi16 // CHECK: @llvm.x86.avx512.pslli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_slli_epi16(__W, __U, __A, 5); } __m512i test_mm512_mask_slli_epi16_2(__m512i __W, __mmask32 __U, __m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_mask_slli_epi16_2 + // CHECK-LABEL: test_mm512_mask_slli_epi16_2 // CHECK: @llvm.x86.avx512.pslli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_slli_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_slli_epi16 + // CHECK-LABEL: test_mm512_maskz_slli_epi16 // CHECK: @llvm.x86.avx512.pslli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_slli_epi16(__U, __A, 5); } __m512i test_mm512_maskz_slli_epi16_2(__mmask32 __U, __m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_maskz_slli_epi16_2 + // CHECK-LABEL: test_mm512_maskz_slli_epi16_2 // CHECK: @llvm.x86.avx512.pslli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_slli_epi16(__U, __A, __B); } __m512i test_mm512_bslli_epi128(__m512i __A) { - // CHECK-LABEL: @test_mm512_bslli_epi128 + // CHECK-LABEL: test_mm512_bslli_epi128 // CHECK: shufflevector <64 x i8> zeroinitializer, <64 x i8> %{{.*}}, <64 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122> return _mm512_bslli_epi128(__A, 5); } __m512i test_mm512_srlv_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_srlv_epi16 + // CHECK-LABEL: test_mm512_srlv_epi16 // CHECK: @llvm.x86.avx512.psrlv.w.512( return _mm512_srlv_epi16(__A, __B); } __m512i test_mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_srlv_epi16 + // CHECK-LABEL: test_mm512_mask_srlv_epi16 // CHECK: @llvm.x86.avx512.psrlv.w.512( // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_srlv_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_srlv_epi16 + // CHECK-LABEL: test_mm512_maskz_srlv_epi16 // CHECK: @llvm.x86.avx512.psrlv.w.512( // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_srlv_epi16(__U, __A, __B); } __m512i test_mm512_srav_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_srav_epi16 + // CHECK-LABEL: test_mm512_srav_epi16 // CHECK: @llvm.x86.avx512.psrav.w.512( return _mm512_srav_epi16(__A, __B); } __m512i test_mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_srav_epi16 + // CHECK-LABEL: test_mm512_mask_srav_epi16 // CHECK: @llvm.x86.avx512.psrav.w.512( // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_srav_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_srav_epi16 + // CHECK-LABEL: test_mm512_maskz_srav_epi16 // CHECK: @llvm.x86.avx512.psrav.w.512( // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_srav_epi16(__U, __A, __B); } __m512i test_mm512_sra_epi16(__m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_sra_epi16 + // CHECK-LABEL: test_mm512_sra_epi16 // CHECK: @llvm.x86.avx512.psra.w.512 return _mm512_sra_epi16(__A, __B); } __m512i test_mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_mask_sra_epi16 + // CHECK-LABEL: test_mm512_mask_sra_epi16 // CHECK: @llvm.x86.avx512.psra.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_sra_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_maskz_sra_epi16 + // CHECK-LABEL: test_mm512_maskz_sra_epi16 // CHECK: @llvm.x86.avx512.psra.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_sra_epi16(__U, __A, __B); } __m512i test_mm512_srai_epi16(__m512i __A) { - // CHECK-LABEL: @test_mm512_srai_epi16 + // CHECK-LABEL: test_mm512_srai_epi16 // CHECK: @llvm.x86.avx512.psrai.w.512 return _mm512_srai_epi16(__A, 5); } __m512i test_mm512_srai_epi16_2(__m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_srai_epi16_2 + // CHECK-LABEL: test_mm512_srai_epi16_2 // CHECK: @llvm.x86.avx512.psrai.w.512 return _mm512_srai_epi16(__A, __B); } __m512i test_mm512_mask_srai_epi16(__m512i __W, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_srai_epi16 + // CHECK-LABEL: test_mm512_mask_srai_epi16 // CHECK: @llvm.x86.avx512.psrai.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_srai_epi16(__W, __U, __A, 5); } __m512i test_mm512_mask_srai_epi16_2(__m512i __W, __mmask32 __U, __m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_mask_srai_epi16_2 + // CHECK-LABEL: test_mm512_mask_srai_epi16_2 // CHECK: @llvm.x86.avx512.psrai.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_srai_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_srai_epi16 + // CHECK-LABEL: test_mm512_maskz_srai_epi16 // CHECK: @llvm.x86.avx512.psrai.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_srai_epi16(__U, __A, 5); } __m512i test_mm512_maskz_srai_epi16_2(__mmask32 __U, __m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_maskz_srai_epi16_2 + // CHECK-LABEL: test_mm512_maskz_srai_epi16_2 // CHECK: @llvm.x86.avx512.psrai.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_srai_epi16(__U, __A, __B); } __m512i test_mm512_srl_epi16(__m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_srl_epi16 + // CHECK-LABEL: test_mm512_srl_epi16 // CHECK: @llvm.x86.avx512.psrl.w.512 return _mm512_srl_epi16(__A, __B); } __m512i test_mm512_mask_srl_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_mask_srl_epi16 + // CHECK-LABEL: test_mm512_mask_srl_epi16 // CHECK: @llvm.x86.avx512.psrl.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_srl_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B) { - // CHECK-LABEL: @test_mm512_maskz_srl_epi16 + // CHECK-LABEL: test_mm512_maskz_srl_epi16 // CHECK: @llvm.x86.avx512.psrl.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_srl_epi16(__U, __A, __B); } __m512i test_mm512_srli_epi16(__m512i __A) { - // CHECK-LABEL: @test_mm512_srli_epi16 + // CHECK-LABEL: test_mm512_srli_epi16 // CHECK: @llvm.x86.avx512.psrli.w.512 return _mm512_srli_epi16(__A, 5); } __m512i test_mm512_srli_epi16_2(__m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_srli_epi16_2 + // CHECK-LABEL: test_mm512_srli_epi16_2 // CHECK: @llvm.x86.avx512.psrli.w.512 return _mm512_srli_epi16(__A, __B); } __m512i test_mm512_mask_srli_epi16(__m512i __W, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_srli_epi16 + // CHECK-LABEL: test_mm512_mask_srli_epi16 // CHECK: @llvm.x86.avx512.psrli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_srli_epi16(__W, __U, __A, 5); } __m512i test_mm512_mask_srli_epi16_2(__m512i __W, __mmask32 __U, __m512i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm512_mask_srli_epi16_2 + // CHECK-LABEL: test_mm512_mask_srli_epi16_2 // CHECK: @llvm.x86.avx512.psrli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_srli_epi16(__W, __U, __A, __B); } __m512i test_mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_srli_epi16 + // CHECK-LABEL: test_mm512_maskz_srli_epi16 // CHECK: @llvm.x86.avx512.psrli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_srli_epi16(__U, __A, 5); } __m512i test_mm512_maskz_srli_epi16_2(__mmask32 __U, __m512i __A, int __B) { - // CHECK-LABEL: @test_mm512_maskz_srli_epi16_2 + // CHECK-LABEL: test_mm512_maskz_srli_epi16_2 // CHECK: @llvm.x86.avx512.psrli.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_srli_epi16(__U, __A, __B); } __m512i test_mm512_bsrli_epi128(__m512i __A) { - // CHECK-LABEL: @test_mm512_bsrli_epi128 + // CHECK-LABEL: test_mm512_bsrli_epi128 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> zeroinitializer, <64 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116> return _mm512_bsrli_epi128(__A, 5); } __m512i test_mm512_mask_mov_epi16(__m512i __W, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_mov_epi16 + // CHECK-LABEL: test_mm512_mask_mov_epi16 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_mov_epi16(__W, __U, __A); } __m512i test_mm512_maskz_mov_epi16(__mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_mov_epi16 + // CHECK-LABEL: test_mm512_maskz_mov_epi16 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_mov_epi16(__U, __A); } __m512i test_mm512_mask_mov_epi8(__m512i __W, __mmask64 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_mov_epi8 + // CHECK-LABEL: test_mm512_mask_mov_epi8 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_mov_epi8(__W, __U, __A); } __m512i test_mm512_maskz_mov_epi8(__mmask64 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_maskz_mov_epi8 + // CHECK-LABEL: test_mm512_maskz_mov_epi8 // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_mov_epi8(__U, __A); } __m512i test_mm512_mask_set1_epi8(__m512i __O, __mmask64 __M, char __A) { - // CHECK-LABEL: @test_mm512_mask_set1_epi8 + // CHECK-LABEL: test_mm512_mask_set1_epi8 // CHECK: insertelement <64 x i8> poison, i8 %{{.*}}, i32 0 // CHECK: insertelement <64 x i8> %{{.*}}, i8 %{{.*}}, i32 1 // CHECK: insertelement <64 x i8> %{{.*}}, i8 %{{.*}}, i32 2 @@ -1983,7 +1988,7 @@ __m512i test_mm512_mask_set1_epi8(__m512i __O, __mmask64 __M, char __A) { } __m512i test_mm512_maskz_set1_epi8(__mmask64 __M, char __A) { - // CHECK-LABEL: @test_mm512_maskz_set1_epi8 + // CHECK-LABEL: test_mm512_maskz_set1_epi8 // CHECK: insertelement <64 x i8> poison, i8 %{{.*}}, i32 0 // CHECK: insertelement <64 x i8> %{{.*}}, i8 %{{.*}}, i32 1 // CHECK: insertelement <64 x i8> %{{.*}}, i8 %{{.*}}, i32 2 @@ -2053,7 +2058,7 @@ __m512i test_mm512_maskz_set1_epi8(__mmask64 __M, char __A) { } __mmask64 test_mm512_kunpackd(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_mm512_kunpackd + // CHECK-LABEL: test_mm512_kunpackd // CHECK: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1> // CHECK: [[LHS2:%.*]] = shufflevector <64 x i1> [[LHS]], <64 x i1> [[LHS]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31> @@ -2063,7 +2068,7 @@ __mmask64 test_mm512_kunpackd(__m512i __A, __m512i __B, __m512i __C, __m512i __D } __mmask32 test_mm512_kunpackw(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { - // CHECK-LABEL: @test_mm512_kunpackw + // CHECK-LABEL: test_mm512_kunpackw // CHECK: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1> // CHECK: [[LHS2:%.*]] = shufflevector <32 x i1> [[LHS]], <32 x i1> [[LHS]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> @@ -2074,74 +2079,74 @@ __mmask32 test_mm512_kunpackw(__m512i __A, __m512i __B, __m512i __C, __m512i __D __m512i test_mm512_loadu_epi16 (void *__P) { - // CHECK-LABEL: @test_mm512_loadu_epi16 + // CHECK-LABEL: test_mm512_loadu_epi16 // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}} return _mm512_loadu_epi16 (__P); } __m512i test_mm512_mask_loadu_epi16(__m512i __W, __mmask32 __U, void const *__P) { - // CHECK-LABEL: @test_mm512_mask_loadu_epi16 + // CHECK-LABEL: test_mm512_mask_loadu_epi16 // CHECK: @llvm.masked.load.v32i16.p0(ptr %{{.*}}, i32 1, <32 x i1> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_mask_loadu_epi16(__W, __U, __P); } __m512i test_mm512_maskz_loadu_epi16(__mmask32 __U, void const *__P) { - // CHECK-LABEL: @test_mm512_maskz_loadu_epi16 + // CHECK-LABEL: test_mm512_maskz_loadu_epi16 // CHECK: @llvm.masked.load.v32i16.p0(ptr %{{.*}}, i32 1, <32 x i1> %{{.*}}, <32 x i16> %{{.*}}) return _mm512_maskz_loadu_epi16(__U, __P); } __m512i test_mm512_loadu_epi8 (void *__P) { - // CHECK-LABEL: @test_mm512_loadu_epi8 + // CHECK-LABEL: test_mm512_loadu_epi8 // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}} return _mm512_loadu_epi8 (__P); } __m512i test_mm512_mask_loadu_epi8(__m512i __W, __mmask64 __U, void const *__P) { - // CHECK-LABEL: @test_mm512_mask_loadu_epi8 + // CHECK-LABEL: test_mm512_mask_loadu_epi8 // CHECK: @llvm.masked.load.v64i8.p0(ptr %{{.*}}, i32 1, <64 x i1> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_mask_loadu_epi8(__W, __U, __P); } __m512i test_mm512_maskz_loadu_epi8(__mmask64 __U, void const *__P) { - // CHECK-LABEL: @test_mm512_maskz_loadu_epi8 + // CHECK-LABEL: test_mm512_maskz_loadu_epi8 // CHECK: @llvm.masked.load.v64i8.p0(ptr %{{.*}}, i32 1, <64 x i1> %{{.*}}, <64 x i8> %{{.*}}) return _mm512_maskz_loadu_epi8(__U, __P); } void test_mm512_storeu_epi16(void *__P, __m512i __A) { - // CHECK-LABEL: @test_mm512_storeu_epi16 + // CHECK-LABEL: test_mm512_storeu_epi16 // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm512_storeu_epi16(__P, __A); } void test_mm512_mask_storeu_epi16(void *__P, __mmask32 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_storeu_epi16 + // CHECK-LABEL: test_mm512_mask_storeu_epi16 // CHECK: @llvm.masked.store.v32i16.p0(<32 x i16> %{{.*}}, ptr %{{.*}}, i32 1, <32 x i1> %{{.*}}) return _mm512_mask_storeu_epi16(__P, __U, __A); } __mmask64 test_mm512_test_epi8_mask(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_test_epi8_mask + // CHECK-LABEL: test_mm512_test_epi8_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp ne <64 x i8> %{{.*}}, %{{.*}} return _mm512_test_epi8_mask(__A, __B); } void test_mm512_storeu_epi8(void *__P, __m512i __A) { - // CHECK-LABEL: @test_mm512_storeu_epi8 + // CHECK-LABEL: test_mm512_storeu_epi8 // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm512_storeu_epi8(__P, __A); } void test_mm512_mask_storeu_epi8(void *__P, __mmask64 __U, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_storeu_epi8 + // CHECK-LABEL: test_mm512_mask_storeu_epi8 // CHECK: @llvm.masked.store.v64i8.p0(<64 x i8> %{{.*}}, ptr %{{.*}}, i32 1, <64 x i1> %{{.*}}) return _mm512_mask_storeu_epi8(__P, __U, __A); } __mmask64 test_mm512_mask_test_epi8_mask(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_test_epi8_mask + // CHECK-LABEL: test_mm512_mask_test_epi8_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp ne <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} @@ -2149,14 +2154,14 @@ __mmask64 test_mm512_mask_test_epi8_mask(__mmask64 __U, __m512i __A, __m512i __B } __mmask32 test_mm512_test_epi16_mask(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_test_epi16_mask + // CHECK-LABEL: test_mm512_test_epi16_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp ne <32 x i16> %{{.*}}, %{{.*}} return _mm512_test_epi16_mask(__A, __B); } __mmask32 test_mm512_mask_test_epi16_mask(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_test_epi16_mask + // CHECK-LABEL: test_mm512_mask_test_epi16_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp ne <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} @@ -2164,14 +2169,14 @@ __mmask32 test_mm512_mask_test_epi16_mask(__mmask32 __U, __m512i __A, __m512i __ } __mmask64 test_mm512_testn_epi8_mask(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_testn_epi8_mask + // CHECK-LABEL: test_mm512_testn_epi8_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} return _mm512_testn_epi8_mask(__A, __B); } __mmask64 test_mm512_mask_testn_epi8_mask(__mmask64 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_testn_epi8_mask + // CHECK-LABEL: test_mm512_mask_testn_epi8_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp eq <64 x i8> %{{.*}}, %{{.*}} // CHECK: and <64 x i1> %{{.*}}, %{{.*}} @@ -2179,14 +2184,14 @@ __mmask64 test_mm512_mask_testn_epi8_mask(__mmask64 __U, __m512i __A, __m512i __ } __mmask32 test_mm512_testn_epi16_mask(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_testn_epi16_mask + // CHECK-LABEL: test_mm512_testn_epi16_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} return _mm512_testn_epi16_mask(__A, __B); } __mmask32 test_mm512_mask_testn_epi16_mask(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_testn_epi16_mask + // CHECK-LABEL: test_mm512_mask_testn_epi16_mask // CHECK: and <16 x i32> %{{.*}}, %{{.*}} // CHECK: icmp eq <32 x i16> %{{.*}}, %{{.*}} // CHECK: and <32 x i1> %{{.*}}, %{{.*}} @@ -2194,67 +2199,69 @@ __mmask32 test_mm512_mask_testn_epi16_mask(__mmask32 __U, __m512i __A, __m512i _ } __mmask64 test_mm512_movepi8_mask(__m512i __A) { - // CHECK-LABEL: @test_mm512_movepi8_mask + // CHECK-LABEL: test_mm512_movepi8_mask // CHECK: [[CMP:%.*]] = icmp slt <64 x i8> %{{.*}}, zeroinitializer return _mm512_movepi8_mask(__A); } __m512i test_mm512_movm_epi8(__mmask64 __A) { - // CHECK-LABEL: @test_mm512_movm_epi8 + // CHECK-LABEL: test_mm512_movm_epi8 // CHECK: %{{.*}} = bitcast i64 %{{.*}} to <64 x i1> // CHECK: %vpmovm2.i = sext <64 x i1> %{{.*}} to <64 x i8> return _mm512_movm_epi8(__A); } __m512i test_mm512_movm_epi16(__mmask32 __A) { - // CHECK-LABEL: @test_mm512_movm_epi16 + // CHECK-LABEL: test_mm512_movm_epi16 // CHECK: %{{.*}} = bitcast i32 %{{.*}} to <32 x i1> // CHECK: %vpmovm2.i = sext <32 x i1> %{{.*}} to <32 x i16> return _mm512_movm_epi16(__A); } __m512i test_mm512_broadcastb_epi8(__m128i __A) { - // CHECK-LABEL: @test_mm512_broadcastb_epi8 + // CHECK-LABEL: test_mm512_broadcastb_epi8 // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <64 x i32> zeroinitializer return _mm512_broadcastb_epi8(__A); } +TEST_CONSTEXPR(match_v64qi(_mm512_broadcastb_epi8((__m128i)(__v16qi){42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}), 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42)); __m512i test_mm512_mask_broadcastb_epi8(__m512i __O, __mmask64 __M, __m128i __A) { - // CHECK-LABEL: @test_mm512_mask_broadcastb_epi8 + // CHECK-LABEL: test_mm512_mask_broadcastb_epi8 // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <64 x i32> zeroinitializer // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_broadcastb_epi8(__O, __M, __A); } __m512i test_mm512_maskz_broadcastb_epi8(__mmask64 __M, __m128i __A) { - // CHECK-LABEL: @test_mm512_maskz_broadcastb_epi8 + // CHECK-LABEL: test_mm512_maskz_broadcastb_epi8 // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <64 x i32> zeroinitializer // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_broadcastb_epi8(__M, __A); } __m512i test_mm512_broadcastw_epi16(__m128i __A) { - // CHECK-LABEL: @test_mm512_broadcastw_epi16 + // CHECK-LABEL: test_mm512_broadcastw_epi16 // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <32 x i32> zeroinitializer return _mm512_broadcastw_epi16(__A); } +TEST_CONSTEXPR(match_v32hi(_mm512_broadcastw_epi16((__m128i)(__v8hi){42, 3, 10, 8, 0, 256, 256, 128}), 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42)); __m512i test_mm512_mask_broadcastw_epi16(__m512i __O, __mmask32 __M, __m128i __A) { - // CHECK-LABEL: @test_mm512_mask_broadcastw_epi16 + // CHECK-LABEL: test_mm512_mask_broadcastw_epi16 // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <32 x i32> zeroinitializer // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_broadcastw_epi16(__O, __M, __A); } __m512i test_mm512_maskz_broadcastw_epi16(__mmask32 __M, __m128i __A) { - // CHECK-LABEL: @test_mm512_maskz_broadcastw_epi16 + // CHECK-LABEL: test_mm512_maskz_broadcastw_epi16 // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <32 x i32> zeroinitializer // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_broadcastw_epi16(__M, __A); } __m512i test_mm512_mask_set1_epi16(__m512i __O, __mmask32 __M, short __A) { - // CHECK-LABEL: @test_mm512_mask_set1_epi16 + // CHECK-LABEL: test_mm512_mask_set1_epi16 // CHECK: insertelement <32 x i16> poison, i16 %{{.*}}, i32 0 // CHECK: insertelement <32 x i16> %{{.*}}, i16 %{{.*}}, i32 1 // CHECK: insertelement <32 x i16> %{{.*}}, i16 %{{.*}}, i32 2 @@ -2292,7 +2299,7 @@ __m512i test_mm512_mask_set1_epi16(__m512i __O, __mmask32 __M, short __A) { } __m512i test_mm512_maskz_set1_epi16(__mmask32 __M, short __A) { - // CHECK-LABEL: @test_mm512_maskz_set1_epi16 + // CHECK-LABEL: test_mm512_maskz_set1_epi16 // CHECK: insertelement <32 x i16> poison, i16 %{{.*}}, i32 0 // CHECK: insertelement <32 x i16> %{{.*}}, i16 %{{.*}}, i32 1 // CHECK: insertelement <32 x i16> %{{.*}}, i16 %{{.*}}, i32 2 @@ -2329,39 +2336,39 @@ __m512i test_mm512_maskz_set1_epi16(__mmask32 __M, short __A) { return _mm512_maskz_set1_epi16(__M, __A); } __m512i test_mm512_permutexvar_epi16(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_permutexvar_epi16 + // CHECK-LABEL: test_mm512_permutexvar_epi16 // CHECK: @llvm.x86.avx512.permvar.hi.512 return _mm512_permutexvar_epi16(__A, __B); } __m512i test_mm512_maskz_permutexvar_epi16(__mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_maskz_permutexvar_epi16 + // CHECK-LABEL: test_mm512_maskz_permutexvar_epi16 // CHECK: @llvm.x86.avx512.permvar.hi.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_permutexvar_epi16(__M, __A, __B); } __m512i test_mm512_mask_permutexvar_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mask_permutexvar_epi16 + // CHECK-LABEL: test_mm512_mask_permutexvar_epi16 // CHECK: @llvm.x86.avx512.permvar.hi.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_permutexvar_epi16(__W, __M, __A, __B); } __m512i test_mm512_alignr_epi8(__m512i __A,__m512i __B){ - // CHECK-LABEL: @test_mm512_alignr_epi8 + // CHECK-LABEL: test_mm512_alignr_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113> return _mm512_alignr_epi8(__A, __B, 2); } __m512i test_mm512_mask_alignr_epi8(__m512i __W, __mmask64 __U, __m512i __A,__m512i __B){ - // CHECK-LABEL: @test_mm512_mask_alignr_epi8 + // CHECK-LABEL: test_mm512_mask_alignr_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113> // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_mask_alignr_epi8(__W, __U, __A, __B, 2); } __m512i test_mm512_maskz_alignr_epi8(__mmask64 __U, __m512i __A,__m512i __B){ - // CHECK-LABEL: @test_mm512_maskz_alignr_epi8 + // CHECK-LABEL: test_mm512_maskz_alignr_epi8 // CHECK: shufflevector <64 x i8> %{{.*}}, <64 x i8> %{{.*}}, <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113> // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}} return _mm512_maskz_alignr_epi8(__U, __A, __B, 2); @@ -2370,54 +2377,54 @@ __m512i test_mm512_maskz_alignr_epi8(__mmask64 __U, __m512i __A,__m512i __B){ __m512i test_mm512_mm_dbsad_epu8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mm_dbsad_epu8 + // CHECK-LABEL: test_mm512_mm_dbsad_epu8 // CHECK: @llvm.x86.avx512.dbpsadbw.512 return _mm512_dbsad_epu8(__A, __B, 170); } __m512i test_mm512_mm_mask_dbsad_epu8(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mm_mask_dbsad_epu8 + // CHECK-LABEL: test_mm512_mm_mask_dbsad_epu8 // CHECK: @llvm.x86.avx512.dbpsadbw.512 //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_dbsad_epu8(__W, __U, __A, __B, 170); } __m512i test_mm512_mm_maskz_dbsad_epu8(__mmask32 __U, __m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_mm_maskz_dbsad_epu8 + // CHECK-LABEL: test_mm512_mm_maskz_dbsad_epu8 // CHECK: @llvm.x86.avx512.dbpsadbw.512 //CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_dbsad_epu8(__U, __A, __B, 170); } __m512i test_mm512_sad_epu8(__m512i __A, __m512i __B) { - // CHECK-LABEL: @test_mm512_sad_epu8 + // CHECK-LABEL: test_mm512_sad_epu8 // CHECK: @llvm.x86.avx512.psad.bw.512 return _mm512_sad_epu8(__A, __B); } __mmask32 test_mm512_movepi16_mask(__m512i __A) { - // CHECK-LABEL: @test_mm512_movepi16_mask + // CHECK-LABEL: test_mm512_movepi16_mask // CHECK: [[CMP:%.*]] = icmp slt <32 x i16> %{{.*}}, zeroinitializer return _mm512_movepi16_mask(__A); } void test_mm512_mask_cvtepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtepi16_storeu_epi8 + // CHECK-LABEL: test_mm512_mask_cvtepi16_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.wb.mem.512 _mm512_mask_cvtepi16_storeu_epi8 ( __P, __M, __A); } void test_mm512_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtsepi16_storeu_epi8 + // CHECK-LABEL: test_mm512_mask_cvtsepi16_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.wb.mem.512 _mm512_mask_cvtsepi16_storeu_epi8 ( __P, __M, __A); } void test_mm512_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A) { - // CHECK-LABEL: @test_mm512_mask_cvtusepi16_storeu_epi8 + // CHECK-LABEL: test_mm512_mask_cvtusepi16_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.wb.mem.512 _mm512_mask_cvtusepi16_storeu_epi8 ( __P, __M, __A); } diff --git a/clang/test/CodeGen/X86/avx512dq-builtins.c b/clang/test/CodeGen/X86/avx512dq-builtins.c index 1c01695d5325..47e5a3ffeeff 100644 --- a/clang/test/CodeGen/X86/avx512dq-builtins.c +++ b/clang/test/CodeGen/X86/avx512dq-builtins.c @@ -355,7 +355,7 @@ __m512d test_mm512_and_pd (__m512d __A, __m512d __B) { // CHECK: and <8 x i64> return (__m512d) _mm512_and_pd(__A, __B); } -TEST_CONSTEXPR(match_m512d(_mm512_and_pd((__m512d){-4.0, -5.0, +6.0, +7.0, +7.0, +6.0, -5.0, -4.0}, (__m512d){+0.0, -0.0, -0.0, +7.0, +7.0, -0.0, -0.0, +0.0}), -0.0, -0.0, +0.0, +7.0, +7.0, +0.0, -0.0, -0.0)); +TEST_CONSTEXPR(match_m512d(_mm512_and_pd((__m512d){-4.0, -5.0, +6.0, +7.0, +7.0, +6.0, -5.0, -4.0}, (__m512d){+0.0, -0.0, -0.0, +7.0, +7.0, -0.0, -0.0, +0.0}), +0.0, -0.0, +0.0, +7.0, +7.0, +0.0, -0.0, +0.0)); __m512d test_mm512_mask_and_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { // CHECK-LABEL: test_mm512_mask_and_pd @@ -378,7 +378,7 @@ __m512 test_mm512_and_ps (__m512 __A, __m512 __B) { // CHECK: and <16 x i32> return (__m512) _mm512_and_ps(__A, __B); } -TEST_CONSTEXPR(match_m512(_mm512_and_ps((__m512){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f, -4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m512){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f, +0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), -0.0f, -0.0f, +0.0f, +7.0f, +7.0f, +0.0f, -0.0f, -0.0f, -0.0f, -0.0f, +0.0f, +7.0f, +7.0f, +0.0f, -0.0f, -0.0f)); +TEST_CONSTEXPR(match_m512(_mm512_and_ps((__m512){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f, -4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m512){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f, +0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), +0.0f, -0.0f, +0.0f, +7.0f, +7.0f, +0.0f, -0.0f, +0.0f, +0.0f, -0.0f, +0.0f, +7.0f, +7.0f, +0.0f, -0.0f, +0.0f)); __m512 test_mm512_mask_and_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { // CHECK-LABEL: test_mm512_mask_and_ps @@ -402,7 +402,7 @@ __m512d test_mm512_andnot_pd (__m512d __A, __m512d __B) { // CHECK: and <8 x i64> return (__m512d) _mm512_andnot_pd(__A, __B); } -TEST_CONSTEXPR(match_m512d(_mm512_andnot_pd((__m512d){-4.0, -5.0, +6.0, +7.0, +7.0, +6.0, -5.0, -4.0}, (__m512d){+0.0, -0.0, -0.0, +7.0, +7.0, -0.0, -0.0, +0.0}), +0.0, +0.0, +0.0, +0.0, +0.0, +0.0, +0.0, +0.0)); +TEST_CONSTEXPR(match_m512d(_mm512_andnot_pd((__m512d){-4.0, -5.0, +6.0, +7.0, +7.0, +6.0, -5.0, -4.0}, (__m512d){+0.0, -0.0, -0.0, +7.0, +7.0, -0.0, -0.0, +0.0}), +0.0, +0.0, -0.0, +0.0, +0.0, -0.0, +0.0, +0.0)); __m512d test_mm512_mask_andnot_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { // CHECK-LABEL: test_mm512_mask_andnot_pd @@ -426,7 +426,7 @@ __m512 test_mm512_andnot_ps (__m512 __A, __m512 __B) { // CHECK: and <16 x i32> return (__m512) _mm512_andnot_ps(__A, __B); } -TEST_CONSTEXPR(match_m512(_mm512_andnot_ps((__m512){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f, -4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m512){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f, +0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f)); +TEST_CONSTEXPR(match_m512(_mm512_andnot_ps((__m512){-4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f, -4.0f, -5.0f, +6.0f, +7.0f, +7.0f, +6.0f, -5.0f, -4.0f}, (__m512){+0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f, +0.0f, -0.0f, -0.0f, +7.0f, +7.0f, -0.0f, -0.0f, +0.0f}), +0.0f, +0.0f, -0.0f, +0.0f, +0.0f, -0.0f, +0.0f, +0.0f, +0.0f, +0.0f, -0.0f, +0.0f, +0.0f, -0.0f, +0.0f, +0.0f)); __m512 test_mm512_mask_andnot_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { // CHECK-LABEL: test_mm512_mask_andnot_ps @@ -1211,6 +1211,7 @@ __m512 test_mm512_broadcast_f32x2(__m128 __A) { // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> return _mm512_broadcast_f32x2(__A); } +TEST_CONSTEXPR(match_m512(_mm512_broadcast_f32x2((__m128)(__v4sf){1.0, -2.0, 3.0, -4.0}), 1.0, -2.0, 1.0, -2.0, 1.0, -2.0, 1.0, -2.0, 1.0, -2.0, 1.0, -2.0, 1.0, -2.0, 1.0, -2.0)); __m512 test_mm512_mask_broadcast_f32x2(__m512 __O, __mmask16 __M, __m128 __A) { // CHECK-LABEL: test_mm512_mask_broadcast_f32x2 @@ -1231,6 +1232,7 @@ __m512 test_mm512_broadcast_f32x8(float const* __A) { // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> return _mm512_broadcast_f32x8(_mm256_loadu_ps(__A)); } +TEST_CONSTEXPR(match_m512(_mm512_broadcast_f32x8((__m256)(__v8sf){1.0f, 2.0f, 3.0f, 4.0f, -5.0f, -6.0f, -7.0f, -8.0f}), 1.0f, 2.0f, 3.0f, 4.0f, -5.0f, -6.0f, -7.0f, -8.0f, 1.0f, 2.0f, 3.0f, 4.0f, -5.0f, -6.0f, -7.0f, -8.0f)); __m512 test_mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, float const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_f32x8 @@ -1251,6 +1253,7 @@ __m512d test_mm512_broadcast_f64x2(double const* __A) { // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> return _mm512_broadcast_f64x2(_mm_loadu_pd(__A)); } +TEST_CONSTEXPR(match_m512d(_mm512_broadcast_f64x2((__m128d)(__v2df){1.0, -2.0}), 1.0, -2.0, 1.0, -2.0, 1.0, -2.0, 1.0, -2.0)); __m512d test_mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, double const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_f64x2 @@ -1271,6 +1274,7 @@ __m512i test_mm512_broadcast_i32x2(__m128i __A) { // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> return _mm512_broadcast_i32x2(__A); } +TEST_CONSTEXPR(match_v16si(_mm512_broadcast_i32x2((__m128i)(__v4si){1, -2, 3, -4}), 1, -2, 1, -2, 1, -2, 1, -2, 1, -2, 1, -2, 1, -2, 1, -2)); __m512i test_mm512_mask_broadcast_i32x2(__m512i __O, __mmask16 __M, __m128i __A) { // CHECK-LABEL: test_mm512_mask_broadcast_i32x2 @@ -1291,6 +1295,7 @@ __m512i test_mm512_broadcast_i32x8(__m256i const* __A) { // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> return _mm512_broadcast_i32x8(_mm256_loadu_si256(__A)); } +TEST_CONSTEXPR(match_v16si(_mm512_broadcast_i32x8((__m256i)(__v8si){1, 2, 3, 4, -5, -6, -7, -8}), 1, 2, 3, 4, -5, -6, -7, -8, 1, 2, 3, 4, -5, -6, -7, -8)); __m512i test_mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_i32x8 @@ -1311,6 +1316,7 @@ __m512i test_mm512_broadcast_i64x2(__m128i const* __A) { // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> return _mm512_broadcast_i64x2(_mm_loadu_si128(__A)); } +TEST_CONSTEXPR(match_v8di(_mm512_broadcast_i64x2((__m128i)(__v2di){1, -2}), 1, -2, 1, -2, 1, -2, 1, -2)); __m512i test_mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_i64x2 diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c b/clang/test/CodeGen/X86/avx512f-builtins.c index 048bc3057b5f..b8eadc42c78f 100644 --- a/clang/test/CodeGen/X86/avx512f-builtins.c +++ b/clang/test/CodeGen/X86/avx512f-builtins.c @@ -4691,6 +4691,7 @@ __m512i test_mm512_unpackhi_epi32(__m512i __A, __m512i __B) { // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31> return _mm512_unpackhi_epi32(__A, __B); } +TEST_CONSTEXPR(match_v16si(_mm512_unpackhi_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m512i)(__v16si){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 2, 18, 3, 19, 6, 22, 7, 23, 10, 26, 11, 27, 14, 30, 15, 31)); __m512d test_mm512_maskz_unpackhi_pd(__mmask8 __U, __m512d __A, __m512d __B) { // CHECK-LABEL: test_mm512_maskz_unpackhi_pd @@ -5477,6 +5478,7 @@ __m512i test_mm512_unpackhi_epi64(__m512i __A, __m512i __B) { // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> return _mm512_unpackhi_epi64(__A, __B); } +TEST_CONSTEXPR(match_m512i(_mm512_unpackhi_epi64((__m512i){0, 1, 2, 3, 4, 5, 6, 7}, (__m512i){8, 9, 10, 11, 12, 13, 14, 15}), 1, 9, 3, 11, 5, 13, 7, 15)); __m512i test_mm512_mask_unpackhi_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { // CHECK-LABEL: test_mm512_mask_unpackhi_epi64 @@ -5497,6 +5499,7 @@ __m512i test_mm512_unpacklo_epi32(__m512i __A, __m512i __B) { // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29> return _mm512_unpacklo_epi32(__A, __B); } +TEST_CONSTEXPR(match_v16si(_mm512_unpacklo_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m512i)(__v16si){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 0, 16, 1, 17, 4, 20, 5, 21, 8, 24, 9, 25, 12, 28, 13, 29)); __m512i test_mm512_mask_unpacklo_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) { // CHECK-LABEL: test_mm512_mask_unpacklo_epi32 @@ -5517,6 +5520,7 @@ __m512i test_mm512_unpacklo_epi64(__m512i __A, __m512i __B) { // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> return _mm512_unpacklo_epi64(__A, __B); } +TEST_CONSTEXPR(match_m512i(_mm512_unpacklo_epi64((__m512i){0, 1, 2, 3, 4, 5, 6, 7}, (__m512i){8, 9, 10, 11, 12, 13, 14, 15}), 0, 8, 2, 10, 4, 12, 6, 14)); __m512i test_mm512_mask_unpacklo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { // CHECK-LABEL: test_mm512_mask_unpacklo_epi64 @@ -6307,6 +6311,7 @@ __m512 test_mm512_broadcast_f32x4(float const* __A) { // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm512_broadcast_f32x4(_mm_loadu_ps(__A)); } +TEST_CONSTEXPR(match_m512(_mm512_broadcast_f32x4((__m128)(__v4sf){1.0f, 2.0f, -3.0f, -4.0f}), 1.0f, 2.0f, -3.0f, -4.0f, 1.0f, 2.0f, -3.0f, -4.0f, 1.0f, 2.0f, -3.0f, -4.0f, 1.0f, 2.0f, -3.0f, -4.0f)); __m512 test_mm512_mask_broadcast_f32x4(__m512 __O, __mmask16 __M, float const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_f32x4 @@ -6327,6 +6332,7 @@ __m512d test_mm512_broadcast_f64x4(double const* __A) { // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm512_broadcast_f64x4(_mm256_loadu_pd(__A)); } +TEST_CONSTEXPR(match_m512d(_mm512_broadcast_f64x4((__m256d)(__v4df){1.0, 2.0, -3.0, -4.0}), 1.0, 2.0, -3.0, -4.0, 1.0, 2.0, -3.0, -4.0)); __m512d test_mm512_mask_broadcast_f64x4(__m512d __O, __mmask8 __M, double const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_f64x4 @@ -6347,6 +6353,7 @@ __m512i test_mm512_broadcast_i32x4(__m128i const* __A) { // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm512_broadcast_i32x4(_mm_loadu_si128(__A)); } +TEST_CONSTEXPR(match_v16si(_mm512_broadcast_i32x4((__m128i)(__v4si){1, 2, -3, -4}), 1, 2, -3, -4, 1, 2, -3, -4, 1, 2, -3, -4, 1, 2, -3, -4)); __m512i test_mm512_mask_broadcast_i32x4(__m512i __O, __mmask16 __M, __m128i const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_i32x4 @@ -6367,6 +6374,7 @@ __m512i test_mm512_broadcast_i64x4(__m256i const* __A) { // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm512_broadcast_i64x4(_mm256_loadu_si256(__A)); } +TEST_CONSTEXPR(match_v8di(_mm512_broadcast_i64x4((__m256i)(__v4di){1, 2, -3, -4}), 1, 2, -3, -4, 1, 2, -3, -4)); __m512i test_mm512_mask_broadcast_i64x4(__m512i __O, __mmask8 __M, __m256i const* __A) { // CHECK-LABEL: test_mm512_mask_broadcast_i64x4 @@ -6387,6 +6395,7 @@ __m512d test_mm512_broadcastsd_pd(__m128d __A) { // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <8 x i32> zeroinitializer return _mm512_broadcastsd_pd(__A); } +TEST_CONSTEXPR(match_m512d(_mm512_broadcastsd_pd((__m128d)(__v2df){1.0, 2.0}), 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0)); __m512d test_mm512_mask_broadcastsd_pd(__m512d __O, __mmask8 __M, __m128d __A) { // CHECK-LABEL: test_mm512_mask_broadcastsd_pd @@ -6407,6 +6416,7 @@ __m512 test_mm512_broadcastss_ps(__m128 __A) { // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> zeroinitializer return _mm512_broadcastss_ps(__A); } +TEST_CONSTEXPR(match_m512(_mm512_broadcastss_ps((__m128)(__v4sf){1.0f, 2.0f, -3.0f, -4.0f}), 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f)); __m512 test_mm512_mask_broadcastss_ps(__m512 __O, __mmask16 __M, __m128 __A) { // CHECK-LABEL: test_mm512_mask_broadcastss_ps @@ -6427,6 +6437,7 @@ __m512i test_mm512_broadcastd_epi32(__m128i __A) { // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> zeroinitializer return _mm512_broadcastd_epi32(__A); } +TEST_CONSTEXPR(match_v16si(_mm512_broadcastd_epi32((__m128i)(__v4si){-42, 0, 0, 0}), -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42)); __m512i test_mm512_mask_broadcastd_epi32(__m512i __O, __mmask16 __M, __m128i __A) { // CHECK-LABEL: test_mm512_mask_broadcastd_epi32 @@ -6447,6 +6458,7 @@ __m512i test_mm512_broadcastq_epi64(__m128i __A) { // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <8 x i32> zeroinitializer return _mm512_broadcastq_epi64(__A); } +TEST_CONSTEXPR(match_v8di(_mm512_broadcastq_epi64((__m128i)(__v2di){-42, 0}), -42, -42, -42, -42, -42, -42, -42, -42)); __m512i test_mm512_mask_broadcastq_epi64(__m512i __O, __mmask8 __M, __m128i __A) { // CHECK-LABEL: test_mm512_mask_broadcastq_epi64 diff --git a/clang/test/CodeGen/X86/avx512vl-builtins.c b/clang/test/CodeGen/X86/avx512vl-builtins.c index ac7aa3eedbb9..f1ff210b0b1d 100644 --- a/clang/test/CodeGen/X86/avx512vl-builtins.c +++ b/clang/test/CodeGen/X86/avx512vl-builtins.c @@ -2,6 +2,7 @@ // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s #include <immintrin.h> +#include "builtin_test_helpers.h" __mmask8 test_mm_cmpeq_epu32_mask(__m128i __a, __m128i __b) { // CHECK-LABEL: test_mm_cmpeq_epu32_mask @@ -8121,6 +8122,7 @@ __m256 test_mm256_broadcast_f32x4(__m128 __A) { // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm256_broadcast_f32x4(__A); } +TEST_CONSTEXPR(match_m256(_mm256_broadcast_f32x4((__m128)(__v4sf){1.0f, 3.0f, -5.0f, -8.0f}), 1.0f, 3.0f, -5.0f, -8.0f, 1.0f, 3.0f, -5.0f, -8.0f)); __m256 test_mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A) { // CHECK-LABEL: test_mm256_mask_broadcast_f32x4 @@ -8141,6 +8143,7 @@ __m256i test_mm256_broadcast_i32x4(__m128i const* __A) { // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm256_broadcast_i32x4(_mm_loadu_si128(__A)); } +TEST_CONSTEXPR(match_v8si(_mm256_broadcast_i32x4((__m128i)(__v4si){1, 3, -5, -8}), 1, 3, -5, -8, 1, 3, -5, -8)); __m256i test_mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i const* __A) { // CHECK-LABEL: test_mm256_mask_broadcast_i32x4 diff --git a/clang/test/CodeGen/X86/avx512vldq-builtins.c b/clang/test/CodeGen/X86/avx512vldq-builtins.c index cdbd19a91211..66ba0c704668 100644 --- a/clang/test/CodeGen/X86/avx512vldq-builtins.c +++ b/clang/test/CodeGen/X86/avx512vldq-builtins.c @@ -1,50 +1,54 @@ -// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512dq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512dq -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> +#include "builtin_test_helpers.h" __m256i test_mm256_mullo_epi64 (__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mullo_epi64 + // CHECK-LABEL: test_mm256_mullo_epi64 // CHECK: mul <4 x i64> return _mm256_mullo_epi64(__A, __B); } __m256i test_mm256_mask_mullo_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_mullo_epi64 + // CHECK-LABEL: test_mm256_mask_mullo_epi64 // CHECK: mul <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return (__m256i) _mm256_mask_mullo_epi64 ( __W, __U, __A, __B); } __m256i test_mm256_maskz_mullo_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_mullo_epi64 + // CHECK-LABEL: test_mm256_maskz_mullo_epi64 // CHECK: mul <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return (__m256i) _mm256_maskz_mullo_epi64 (__U, __A, __B); } __m128i test_mm_mullo_epi64 (__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mullo_epi64 + // CHECK-LABEL: test_mm_mullo_epi64 // CHECK: mul <2 x i64> return (__m128i) _mm_mullo_epi64(__A, __B); } __m128i test_mm_mask_mullo_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_mullo_epi64 + // CHECK-LABEL: test_mm_mask_mullo_epi64 // CHECK: mul <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return (__m128i) _mm_mask_mullo_epi64 ( __W, __U, __A, __B); } __m128i test_mm_maskz_mullo_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_mullo_epi64 + // CHECK-LABEL: test_mm_maskz_mullo_epi64 // CHECK: mul <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return (__m128i) _mm_maskz_mullo_epi64 (__U, __A, __B); } __m256d test_mm256_mask_andnot_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_andnot_pd + // CHECK-LABEL: test_mm256_mask_andnot_pd // CHECK: xor <4 x i64> %{{.*}}, splat (i64 -1) // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} @@ -52,7 +56,7 @@ __m256d test_mm256_mask_andnot_pd (__m256d __W, __mmask8 __U, __m256d __A, __m25 } __m256d test_mm256_maskz_andnot_pd (__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_andnot_pd + // CHECK-LABEL: test_mm256_maskz_andnot_pd // CHECK: xor <4 x i64> %{{.*}}, splat (i64 -1) // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} @@ -60,7 +64,7 @@ __m256d test_mm256_maskz_andnot_pd (__mmask8 __U, __m256d __A, __m256d __B) { } __m128d test_mm_mask_andnot_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_andnot_pd + // CHECK-LABEL: test_mm_mask_andnot_pd // CHECK: xor <2 x i64> %{{.*}}, splat (i64 -1) // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} @@ -68,7 +72,7 @@ __m128d test_mm_mask_andnot_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d } __m128d test_mm_maskz_andnot_pd (__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_andnot_pd + // CHECK-LABEL: test_mm_maskz_andnot_pd // CHECK: xor <2 x i64> %{{.*}}, splat (i64 -1) // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} @@ -76,7 +80,7 @@ __m128d test_mm_maskz_andnot_pd (__mmask8 __U, __m128d __A, __m128d __B) { } __m256 test_mm256_mask_andnot_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_andnot_ps + // CHECK-LABEL: test_mm256_mask_andnot_ps // CHECK: xor <8 x i32> %{{.*}}, splat (i32 -1) // CHECK: and <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -84,7 +88,7 @@ __m256 test_mm256_mask_andnot_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 _ } __m256 test_mm256_maskz_andnot_ps (__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_andnot_ps + // CHECK-LABEL: test_mm256_maskz_andnot_ps // CHECK: xor <8 x i32> %{{.*}}, splat (i32 -1) // CHECK: and <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -92,7 +96,7 @@ __m256 test_mm256_maskz_andnot_ps (__mmask8 __U, __m256 __A, __m256 __B) { } __m128 test_mm_mask_andnot_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_andnot_ps + // CHECK-LABEL: test_mm_mask_andnot_ps // CHECK: xor <4 x i32> %{{.*}}, splat (i32 -1) // CHECK: and <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} @@ -100,7 +104,7 @@ __m128 test_mm_mask_andnot_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) } __m128 test_mm_maskz_andnot_ps (__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_andnot_ps + // CHECK-LABEL: test_mm_maskz_andnot_ps // CHECK: xor <4 x i32> %{{.*}}, splat (i32 -1) // CHECK: and <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} @@ -108,776 +112,776 @@ __m128 test_mm_maskz_andnot_ps (__mmask8 __U, __m128 __A, __m128 __B) { } __m256d test_mm256_mask_and_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_and_pd + // CHECK-LABEL: test_mm256_mask_and_pd // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return (__m256d) _mm256_mask_and_pd ( __W, __U, __A, __B); } __m256d test_mm256_maskz_and_pd (__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_and_pd + // CHECK-LABEL: test_mm256_maskz_and_pd // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return (__m256d) _mm256_maskz_and_pd (__U, __A, __B); } __m128d test_mm_mask_and_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_and_pd + // CHECK-LABEL: test_mm_mask_and_pd // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return (__m128d) _mm_mask_and_pd ( __W, __U, __A, __B); } __m128d test_mm_maskz_and_pd (__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_and_pd + // CHECK-LABEL: test_mm_maskz_and_pd // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return (__m128d) _mm_maskz_and_pd (__U, __A, __B); } __m256 test_mm256_mask_and_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_and_ps + // CHECK-LABEL: test_mm256_mask_and_ps // CHECK: and <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return (__m256) _mm256_mask_and_ps ( __W, __U, __A, __B); } __m256 test_mm256_maskz_and_ps (__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_and_ps + // CHECK-LABEL: test_mm256_maskz_and_ps // CHECK: and <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return (__m256) _mm256_maskz_and_ps (__U, __A, __B); } __m128 test_mm_mask_and_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_and_ps + // CHECK-LABEL: test_mm_mask_and_ps // CHECK: and <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return (__m128) _mm_mask_and_ps ( __W, __U, __A, __B); } __m128 test_mm_maskz_and_ps (__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_and_ps + // CHECK-LABEL: test_mm_maskz_and_ps // CHECK: and <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return (__m128) _mm_maskz_and_ps (__U, __A, __B); } __m256d test_mm256_mask_xor_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_xor_pd + // CHECK-LABEL: test_mm256_mask_xor_pd // CHECK: xor <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return (__m256d) _mm256_mask_xor_pd ( __W, __U, __A, __B); } __m256d test_mm256_maskz_xor_pd (__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_xor_pd + // CHECK-LABEL: test_mm256_maskz_xor_pd // CHECK: xor <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return (__m256d) _mm256_maskz_xor_pd (__U, __A, __B); } __m128d test_mm_mask_xor_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_xor_pd + // CHECK-LABEL: test_mm_mask_xor_pd // CHECK: xor <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return (__m128d) _mm_mask_xor_pd ( __W, __U, __A, __B); } __m128d test_mm_maskz_xor_pd (__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_xor_pd + // CHECK-LABEL: test_mm_maskz_xor_pd // CHECK: xor <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return (__m128d) _mm_maskz_xor_pd (__U, __A, __B); } __m256 test_mm256_mask_xor_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_xor_ps + // CHECK-LABEL: test_mm256_mask_xor_ps // CHECK: xor <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return (__m256) _mm256_mask_xor_ps ( __W, __U, __A, __B); } __m256 test_mm256_maskz_xor_ps (__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_xor_ps + // CHECK-LABEL: test_mm256_maskz_xor_ps // CHECK: xor <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return (__m256) _mm256_maskz_xor_ps (__U, __A, __B); } __m128 test_mm_mask_xor_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_xor_ps + // CHECK-LABEL: test_mm_mask_xor_ps // CHECK: xor <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return (__m128) _mm_mask_xor_ps ( __W, __U, __A, __B); } __m128 test_mm_maskz_xor_ps (__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_xor_ps + // CHECK-LABEL: test_mm_maskz_xor_ps // CHECK: xor <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return (__m128) _mm_maskz_xor_ps (__U, __A, __B); } __m256d test_mm256_mask_or_pd (__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_or_pd + // CHECK-LABEL: test_mm256_mask_or_pd // CHECK: or <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return (__m256d) _mm256_mask_or_pd ( __W, __U, __A, __B); } __m256d test_mm256_maskz_or_pd (__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_or_pd + // CHECK-LABEL: test_mm256_maskz_or_pd // CHECK: or <4 x i64> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return (__m256d) _mm256_maskz_or_pd (__U, __A, __B); } __m128d test_mm_mask_or_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_or_pd + // CHECK-LABEL: test_mm_mask_or_pd // CHECK: or <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return (__m128d) _mm_mask_or_pd ( __W, __U, __A, __B); } __m128d test_mm_maskz_or_pd (__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_or_pd + // CHECK-LABEL: test_mm_maskz_or_pd // CHECK: or <2 x i64> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return (__m128d) _mm_maskz_or_pd (__U, __A, __B); } __m256 test_mm256_mask_or_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_or_ps + // CHECK-LABEL: test_mm256_mask_or_ps // CHECK: or <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return (__m256) _mm256_mask_or_ps ( __W, __U, __A, __B); } __m256 test_mm256_maskz_or_ps (__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_or_ps + // CHECK-LABEL: test_mm256_maskz_or_ps // CHECK: or <8 x i32> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return (__m256) _mm256_maskz_or_ps (__U, __A, __B); } __m128 test_mm_mask_or_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_or_ps + // CHECK-LABEL: test_mm_mask_or_ps // CHECK: or <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return (__m128) _mm_mask_or_ps ( __W, __U, __A, __B); } __m128 test_mm_maskz_or_ps (__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_or_ps + // CHECK-LABEL: test_mm_maskz_or_ps // CHECK: or <4 x i32> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return (__m128) _mm_maskz_or_ps(__U, __A, __B); } __m128i test_mm_cvtpd_epi64(__m128d __A) { - // CHECK-LABEL: @test_mm_cvtpd_epi64 + // CHECK-LABEL: test_mm_cvtpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvtpd2qq.128 return _mm_cvtpd_epi64(__A); } __m128i test_mm_mask_cvtpd_epi64(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvtpd_epi64 + // CHECK-LABEL: test_mm_mask_cvtpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvtpd2qq.128 return _mm_mask_cvtpd_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvtpd_epi64(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvtpd_epi64 + // CHECK-LABEL: test_mm_maskz_cvtpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvtpd2qq.128 return _mm_maskz_cvtpd_epi64(__U, __A); } __m256i test_mm256_cvtpd_epi64(__m256d __A) { - // CHECK-LABEL: @test_mm256_cvtpd_epi64 + // CHECK-LABEL: test_mm256_cvtpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvtpd2qq.256 return _mm256_cvtpd_epi64(__A); } __m256i test_mm256_mask_cvtpd_epi64(__m256i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvtpd_epi64 + // CHECK-LABEL: test_mm256_mask_cvtpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvtpd2qq.256 return _mm256_mask_cvtpd_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvtpd_epi64(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtpd_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvtpd2qq.256 return _mm256_maskz_cvtpd_epi64(__U, __A); } __m128i test_mm_cvtpd_epu64(__m128d __A) { - // CHECK-LABEL: @test_mm_cvtpd_epu64 + // CHECK-LABEL: test_mm_cvtpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvtpd2uqq.128 return _mm_cvtpd_epu64(__A); } __m128i test_mm_mask_cvtpd_epu64(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvtpd_epu64 + // CHECK-LABEL: test_mm_mask_cvtpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvtpd2uqq.128 return _mm_mask_cvtpd_epu64(__W, __U, __A); } __m128i test_mm_maskz_cvtpd_epu64(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvtpd_epu64 + // CHECK-LABEL: test_mm_maskz_cvtpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvtpd2uqq.128 return _mm_maskz_cvtpd_epu64(__U, __A); } __m256i test_mm256_cvtpd_epu64(__m256d __A) { - // CHECK-LABEL: @test_mm256_cvtpd_epu64 + // CHECK-LABEL: test_mm256_cvtpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvtpd2uqq.256 return _mm256_cvtpd_epu64(__A); } __m256i test_mm256_mask_cvtpd_epu64(__m256i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvtpd_epu64 + // CHECK-LABEL: test_mm256_mask_cvtpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvtpd2uqq.256 return _mm256_mask_cvtpd_epu64(__W, __U, __A); } __m256i test_mm256_maskz_cvtpd_epu64(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtpd_epu64 + // CHECK-LABEL: test_mm256_maskz_cvtpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvtpd2uqq.256 return _mm256_maskz_cvtpd_epu64(__U, __A); } __m128i test_mm_cvtps_epi64(__m128 __A) { - // CHECK-LABEL: @test_mm_cvtps_epi64 + // CHECK-LABEL: test_mm_cvtps_epi64 // CHECK: @llvm.x86.avx512.mask.cvtps2qq.128 return _mm_cvtps_epi64(__A); } __m128i test_mm_mask_cvtps_epi64(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvtps_epi64 + // CHECK-LABEL: test_mm_mask_cvtps_epi64 // CHECK: @llvm.x86.avx512.mask.cvtps2qq.128 return _mm_mask_cvtps_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvtps_epi64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvtps_epi64 + // CHECK-LABEL: test_mm_maskz_cvtps_epi64 // CHECK: @llvm.x86.avx512.mask.cvtps2qq.128 return _mm_maskz_cvtps_epi64(__U, __A); } __m256i test_mm256_cvtps_epi64(__m128 __A) { - // CHECK-LABEL: @test_mm256_cvtps_epi64 + // CHECK-LABEL: test_mm256_cvtps_epi64 // CHECK: @llvm.x86.avx512.mask.cvtps2qq.256 return _mm256_cvtps_epi64(__A); } __m256i test_mm256_mask_cvtps_epi64(__m256i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_cvtps_epi64 + // CHECK-LABEL: test_mm256_mask_cvtps_epi64 // CHECK: @llvm.x86.avx512.mask.cvtps2qq.256 return _mm256_mask_cvtps_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvtps_epi64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtps_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtps_epi64 // CHECK: @llvm.x86.avx512.mask.cvtps2qq.256 return _mm256_maskz_cvtps_epi64(__U, __A); } __m128i test_mm_cvtps_epu64(__m128 __A) { - // CHECK-LABEL: @test_mm_cvtps_epu64 + // CHECK-LABEL: test_mm_cvtps_epu64 // CHECK: @llvm.x86.avx512.mask.cvtps2uqq.128 return _mm_cvtps_epu64(__A); } __m128i test_mm_mask_cvtps_epu64(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvtps_epu64 + // CHECK-LABEL: test_mm_mask_cvtps_epu64 // CHECK: @llvm.x86.avx512.mask.cvtps2uqq.128 return _mm_mask_cvtps_epu64(__W, __U, __A); } __m128i test_mm_maskz_cvtps_epu64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvtps_epu64 + // CHECK-LABEL: test_mm_maskz_cvtps_epu64 // CHECK: @llvm.x86.avx512.mask.cvtps2uqq.128 return _mm_maskz_cvtps_epu64(__U, __A); } __m256i test_mm256_cvtps_epu64(__m128 __A) { - // CHECK-LABEL: @test_mm256_cvtps_epu64 + // CHECK-LABEL: test_mm256_cvtps_epu64 // CHECK: @llvm.x86.avx512.mask.cvtps2uqq.256 return _mm256_cvtps_epu64(__A); } __m256i test_mm256_mask_cvtps_epu64(__m256i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_cvtps_epu64 + // CHECK-LABEL: test_mm256_mask_cvtps_epu64 // CHECK: @llvm.x86.avx512.mask.cvtps2uqq.256 return _mm256_mask_cvtps_epu64(__W, __U, __A); } __m256i test_mm256_maskz_cvtps_epu64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtps_epu64 + // CHECK-LABEL: test_mm256_maskz_cvtps_epu64 // CHECK: @llvm.x86.avx512.mask.cvtps2uqq.256 return _mm256_maskz_cvtps_epu64(__U, __A); } __m128d test_mm_cvtepi64_pd(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepi64_pd + // CHECK-LABEL: test_mm_cvtepi64_pd // CHECK: sitofp <2 x i64> %{{.*}} to <2 x double> return _mm_cvtepi64_pd(__A); } __m128d test_mm_mask_cvtepi64_pd(__m128d __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_pd + // CHECK-LABEL: test_mm_mask_cvtepi64_pd // CHECK: sitofp <2 x i64> %{{.*}} to <2 x double> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_cvtepi64_pd(__W, __U, __A); } __m128d test_mm_maskz_cvtepi64_pd(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi64_pd + // CHECK-LABEL: test_mm_maskz_cvtepi64_pd // CHECK: sitofp <2 x i64> %{{.*}} to <2 x double> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_cvtepi64_pd(__U, __A); } __m256d test_mm256_cvtepi64_pd(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepi64_pd + // CHECK-LABEL: test_mm256_cvtepi64_pd // CHECK: sitofp <4 x i64> %{{.*}} to <4 x double> return _mm256_cvtepi64_pd(__A); } __m256d test_mm256_mask_cvtepi64_pd(__m256d __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_pd + // CHECK-LABEL: test_mm256_mask_cvtepi64_pd // CHECK: sitofp <4 x i64> %{{.*}} to <4 x double> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_cvtepi64_pd(__W, __U, __A); } __m256d test_mm256_maskz_cvtepi64_pd(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi64_pd + // CHECK-LABEL: test_mm256_maskz_cvtepi64_pd // CHECK: sitofp <4 x i64> %{{.*}} to <4 x double> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_cvtepi64_pd(__U, __A); } __m128 test_mm_cvtepi64_ps(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepi64_ps + // CHECK-LABEL: test_mm_cvtepi64_ps // CHECK: @llvm.x86.avx512.mask.cvtqq2ps.128 return _mm_cvtepi64_ps(__A); } __m128 test_mm_mask_cvtepi64_ps(__m128 __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_ps + // CHECK-LABEL: test_mm_mask_cvtepi64_ps // CHECK: @llvm.x86.avx512.mask.cvtqq2ps.128 return _mm_mask_cvtepi64_ps(__W, __U, __A); } __m128 test_mm_maskz_cvtepi64_ps(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi64_ps + // CHECK-LABEL: test_mm_maskz_cvtepi64_ps // CHECK: @llvm.x86.avx512.mask.cvtqq2ps.128 return _mm_maskz_cvtepi64_ps(__U, __A); } __m128 test_mm256_cvtepi64_ps(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepi64_ps + // CHECK-LABEL: test_mm256_cvtepi64_ps // CHECK: sitofp <4 x i64> %{{.*}} to <4 x float> return _mm256_cvtepi64_ps(__A); } __m128 test_mm256_mask_cvtepi64_ps(__m128 __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_ps + // CHECK-LABEL: test_mm256_mask_cvtepi64_ps // CHECK: sitofp <4 x i64> %{{.*}} to <4 x float> // select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm256_mask_cvtepi64_ps(__W, __U, __A); } __m128 test_mm256_maskz_cvtepi64_ps(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi64_ps + // CHECK-LABEL: test_mm256_maskz_cvtepi64_ps // CHECK: sitofp <4 x i64> %{{.*}} to <4 x float> // select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm256_maskz_cvtepi64_ps(__U, __A); } __m128i test_mm_cvttpd_epi64(__m128d __A) { - // CHECK-LABEL: @test_mm_cvttpd_epi64 + // CHECK-LABEL: test_mm_cvttpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvttpd2qq.128 return _mm_cvttpd_epi64(__A); } __m128i test_mm_mask_cvttpd_epi64(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvttpd_epi64 + // CHECK-LABEL: test_mm_mask_cvttpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvttpd2qq.128 return _mm_mask_cvttpd_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvttpd_epi64(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvttpd_epi64 + // CHECK-LABEL: test_mm_maskz_cvttpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvttpd2qq.128 return _mm_maskz_cvttpd_epi64(__U, __A); } __m256i test_mm256_cvttpd_epi64(__m256d __A) { - // CHECK-LABEL: @test_mm256_cvttpd_epi64 + // CHECK-LABEL: test_mm256_cvttpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvttpd2qq.256 return _mm256_cvttpd_epi64(__A); } __m256i test_mm256_mask_cvttpd_epi64(__m256i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvttpd_epi64 + // CHECK-LABEL: test_mm256_mask_cvttpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvttpd2qq.256 return _mm256_mask_cvttpd_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvttpd_epi64(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttpd_epi64 + // CHECK-LABEL: test_mm256_maskz_cvttpd_epi64 // CHECK: @llvm.x86.avx512.mask.cvttpd2qq.256 return _mm256_maskz_cvttpd_epi64(__U, __A); } __m128i test_mm_cvttpd_epu64(__m128d __A) { - // CHECK-LABEL: @test_mm_cvttpd_epu64 + // CHECK-LABEL: test_mm_cvttpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvttpd2uqq.128 return _mm_cvttpd_epu64(__A); } __m128i test_mm_mask_cvttpd_epu64(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvttpd_epu64 + // CHECK-LABEL: test_mm_mask_cvttpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvttpd2uqq.128 return _mm_mask_cvttpd_epu64(__W, __U, __A); } __m128i test_mm_maskz_cvttpd_epu64(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvttpd_epu64 + // CHECK-LABEL: test_mm_maskz_cvttpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvttpd2uqq.128 return _mm_maskz_cvttpd_epu64(__U, __A); } __m256i test_mm256_cvttpd_epu64(__m256d __A) { - // CHECK-LABEL: @test_mm256_cvttpd_epu64 + // CHECK-LABEL: test_mm256_cvttpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvttpd2uqq.256 return _mm256_cvttpd_epu64(__A); } __m256i test_mm256_mask_cvttpd_epu64(__m256i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvttpd_epu64 + // CHECK-LABEL: test_mm256_mask_cvttpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvttpd2uqq.256 return _mm256_mask_cvttpd_epu64(__W, __U, __A); } __m256i test_mm256_maskz_cvttpd_epu64(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttpd_epu64 + // CHECK-LABEL: test_mm256_maskz_cvttpd_epu64 // CHECK: @llvm.x86.avx512.mask.cvttpd2uqq.256 return _mm256_maskz_cvttpd_epu64(__U, __A); } __m128i test_mm_cvttps_epi64(__m128 __A) { - // CHECK-LABEL: @test_mm_cvttps_epi64 + // CHECK-LABEL: test_mm_cvttps_epi64 // CHECK: @llvm.x86.avx512.mask.cvttps2qq.128 return _mm_cvttps_epi64(__A); } __m128i test_mm_mask_cvttps_epi64(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvttps_epi64 + // CHECK-LABEL: test_mm_mask_cvttps_epi64 // CHECK: @llvm.x86.avx512.mask.cvttps2qq.128 return _mm_mask_cvttps_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvttps_epi64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvttps_epi64 + // CHECK-LABEL: test_mm_maskz_cvttps_epi64 // CHECK: @llvm.x86.avx512.mask.cvttps2qq.128 return _mm_maskz_cvttps_epi64(__U, __A); } __m256i test_mm256_cvttps_epi64(__m128 __A) { - // CHECK-LABEL: @test_mm256_cvttps_epi64 + // CHECK-LABEL: test_mm256_cvttps_epi64 // CHECK: @llvm.x86.avx512.mask.cvttps2qq.256 return _mm256_cvttps_epi64(__A); } __m256i test_mm256_mask_cvttps_epi64(__m256i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_cvttps_epi64 + // CHECK-LABEL: test_mm256_mask_cvttps_epi64 // CHECK: @llvm.x86.avx512.mask.cvttps2qq.256 return _mm256_mask_cvttps_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvttps_epi64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttps_epi64 + // CHECK-LABEL: test_mm256_maskz_cvttps_epi64 // CHECK: @llvm.x86.avx512.mask.cvttps2qq.256 return _mm256_maskz_cvttps_epi64(__U, __A); } __m128i test_mm_cvttps_epu64(__m128 __A) { - // CHECK-LABEL: @test_mm_cvttps_epu64 + // CHECK-LABEL: test_mm_cvttps_epu64 // CHECK: @llvm.x86.avx512.mask.cvttps2uqq.128 return _mm_cvttps_epu64(__A); } __m128i test_mm_mask_cvttps_epu64(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvttps_epu64 + // CHECK-LABEL: test_mm_mask_cvttps_epu64 // CHECK: @llvm.x86.avx512.mask.cvttps2uqq.128 return _mm_mask_cvttps_epu64(__W, __U, __A); } __m128i test_mm_maskz_cvttps_epu64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvttps_epu64 + // CHECK-LABEL: test_mm_maskz_cvttps_epu64 // CHECK: @llvm.x86.avx512.mask.cvttps2uqq.128 return _mm_maskz_cvttps_epu64(__U, __A); } __m256i test_mm256_cvttps_epu64(__m128 __A) { - // CHECK-LABEL: @test_mm256_cvttps_epu64 + // CHECK-LABEL: test_mm256_cvttps_epu64 // CHECK: @llvm.x86.avx512.mask.cvttps2uqq.256 return _mm256_cvttps_epu64(__A); } __m256i test_mm256_mask_cvttps_epu64(__m256i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_cvttps_epu64 + // CHECK-LABEL: test_mm256_mask_cvttps_epu64 // CHECK: @llvm.x86.avx512.mask.cvttps2uqq.256 return _mm256_mask_cvttps_epu64(__W, __U, __A); } __m256i test_mm256_maskz_cvttps_epu64(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttps_epu64 + // CHECK-LABEL: test_mm256_maskz_cvttps_epu64 // CHECK: @llvm.x86.avx512.mask.cvttps2uqq.256 return _mm256_maskz_cvttps_epu64(__U, __A); } __m128d test_mm_cvtepu64_pd(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepu64_pd + // CHECK-LABEL: test_mm_cvtepu64_pd // CHECK: uitofp <2 x i64> %{{.*}} to <2 x double> return _mm_cvtepu64_pd(__A); } __m128d test_mm_mask_cvtepu64_pd(__m128d __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu64_pd + // CHECK-LABEL: test_mm_mask_cvtepu64_pd // CHECK: uitofp <2 x i64> %{{.*}} to <2 x double> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_cvtepu64_pd(__W, __U, __A); } __m128d test_mm_maskz_cvtepu64_pd(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu64_pd + // CHECK-LABEL: test_mm_maskz_cvtepu64_pd // CHECK: uitofp <2 x i64> %{{.*}} to <2 x double> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_cvtepu64_pd(__U, __A); } __m256d test_mm256_cvtepu64_pd(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepu64_pd + // CHECK-LABEL: test_mm256_cvtepu64_pd // CHECK: uitofp <4 x i64> %{{.*}} to <4 x double> return _mm256_cvtepu64_pd(__A); } __m256d test_mm256_mask_cvtepu64_pd(__m256d __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu64_pd + // CHECK-LABEL: test_mm256_mask_cvtepu64_pd // CHECK: uitofp <4 x i64> %{{.*}} to <4 x double> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_cvtepu64_pd(__W, __U, __A); } __m256d test_mm256_maskz_cvtepu64_pd(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu64_pd + // CHECK-LABEL: test_mm256_maskz_cvtepu64_pd // CHECK: uitofp <4 x i64> %{{.*}} to <4 x double> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_cvtepu64_pd(__U, __A); } __m128 test_mm_cvtepu64_ps(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepu64_ps + // CHECK-LABEL: test_mm_cvtepu64_ps // CHECK: @llvm.x86.avx512.mask.cvtuqq2ps.128 return _mm_cvtepu64_ps(__A); } __m128 test_mm_mask_cvtepu64_ps(__m128 __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu64_ps + // CHECK-LABEL: test_mm_mask_cvtepu64_ps // CHECK: @llvm.x86.avx512.mask.cvtuqq2ps.128 return _mm_mask_cvtepu64_ps(__W, __U, __A); } __m128 test_mm_maskz_cvtepu64_ps(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu64_ps + // CHECK-LABEL: test_mm_maskz_cvtepu64_ps // CHECK: @llvm.x86.avx512.mask.cvtuqq2ps.128 return _mm_maskz_cvtepu64_ps(__U, __A); } __m128 test_mm256_cvtepu64_ps(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepu64_ps + // CHECK-LABEL: test_mm256_cvtepu64_ps // CHECK: uitofp <4 x i64> %{{.*}} to <4 x float> return _mm256_cvtepu64_ps(__A); } __m128 test_mm256_mask_cvtepu64_ps(__m128 __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu64_ps + // CHECK-LABEL: test_mm256_mask_cvtepu64_ps // CHECK: uitofp <4 x i64> %{{.*}} to <4 x float> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm256_mask_cvtepu64_ps(__W, __U, __A); } __m128 test_mm256_maskz_cvtepu64_ps(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu64_ps + // CHECK-LABEL: test_mm256_maskz_cvtepu64_ps // CHECK: uitofp <4 x i64> %{{.*}} to <4 x float> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm256_maskz_cvtepu64_ps(__U, __A); } __m128d test_mm_range_pd(__m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_range_pd + // CHECK-LABEL: test_mm_range_pd // CHECK: @llvm.x86.avx512.mask.range.pd.128 return _mm_range_pd(__A, __B, 4); } __m128d test_mm_mask_range_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_range_pd + // CHECK-LABEL: test_mm_mask_range_pd // CHECK: @llvm.x86.avx512.mask.range.pd.128 return _mm_mask_range_pd(__W, __U, __A, __B, 4); } __m128d test_mm_maskz_range_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_range_pd + // CHECK-LABEL: test_mm_maskz_range_pd // CHECK: @llvm.x86.avx512.mask.range.pd.128 return _mm_maskz_range_pd(__U, __A, __B, 4); } __m256d test_mm256_range_pd(__m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_range_pd + // CHECK-LABEL: test_mm256_range_pd // CHECK: @llvm.x86.avx512.mask.range.pd.256 return _mm256_range_pd(__A, __B, 4); } __m256d test_mm256_mask_range_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_range_pd + // CHECK-LABEL: test_mm256_mask_range_pd // CHECK: @llvm.x86.avx512.mask.range.pd.256 return _mm256_mask_range_pd(__W, __U, __A, __B, 4); } __m256d test_mm256_maskz_range_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_range_pd + // CHECK-LABEL: test_mm256_maskz_range_pd // CHECK: @llvm.x86.avx512.mask.range.pd.256 return _mm256_maskz_range_pd(__U, __A, __B, 4); } __m128 test_mm_range_ps(__m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_range_ps + // CHECK-LABEL: test_mm_range_ps // CHECK: @llvm.x86.avx512.mask.range.ps.128 return _mm_range_ps(__A, __B, 4); } __m128 test_mm_mask_range_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_range_ps + // CHECK-LABEL: test_mm_mask_range_ps // CHECK: @llvm.x86.avx512.mask.range.ps.128 return _mm_mask_range_ps(__W, __U, __A, __B, 4); } __m128 test_mm_maskz_range_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_range_ps + // CHECK-LABEL: test_mm_maskz_range_ps // CHECK: @llvm.x86.avx512.mask.range.ps.128 return _mm_maskz_range_ps(__U, __A, __B, 4); } __m256 test_mm256_range_ps(__m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_range_ps + // CHECK-LABEL: test_mm256_range_ps // CHECK: @llvm.x86.avx512.mask.range.ps.256 return _mm256_range_ps(__A, __B, 4); } __m256 test_mm256_mask_range_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_range_ps + // CHECK-LABEL: test_mm256_mask_range_ps // CHECK: @llvm.x86.avx512.mask.range.ps.256 return _mm256_mask_range_ps(__W, __U, __A, __B, 4); } __m256 test_mm256_maskz_range_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_range_ps + // CHECK-LABEL: test_mm256_maskz_range_ps // CHECK: @llvm.x86.avx512.mask.range.ps.256 return _mm256_maskz_range_ps(__U, __A, __B, 4); } __m128d test_mm_reduce_pd(__m128d __A) { - // CHECK-LABEL: @test_mm_reduce_pd + // CHECK-LABEL: test_mm_reduce_pd // CHECK: @llvm.x86.avx512.mask.reduce.pd.128 return _mm_reduce_pd(__A, 4); } __m128d test_mm_mask_reduce_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_reduce_pd + // CHECK-LABEL: test_mm_mask_reduce_pd // CHECK: @llvm.x86.avx512.mask.reduce.pd.128 return _mm_mask_reduce_pd(__W, __U, __A, 4); } __m128d test_mm_maskz_reduce_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_reduce_pd + // CHECK-LABEL: test_mm_maskz_reduce_pd // CHECK: @llvm.x86.avx512.mask.reduce.pd.128 return _mm_maskz_reduce_pd(__U, __A, 4); } __m256d test_mm256_reduce_pd(__m256d __A) { - // CHECK-LABEL: @test_mm256_reduce_pd + // CHECK-LABEL: test_mm256_reduce_pd // CHECK: @llvm.x86.avx512.mask.reduce.pd.256 return _mm256_reduce_pd(__A, 4); } __m256d test_mm256_mask_reduce_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_reduce_pd + // CHECK-LABEL: test_mm256_mask_reduce_pd // CHECK: @llvm.x86.avx512.mask.reduce.pd.256 return _mm256_mask_reduce_pd(__W, __U, __A, 4); } __m256d test_mm256_maskz_reduce_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_reduce_pd + // CHECK-LABEL: test_mm256_maskz_reduce_pd // CHECK: @llvm.x86.avx512.mask.reduce.pd.256 return _mm256_maskz_reduce_pd(__U, __A, 4); } __m128 test_mm_reduce_ps(__m128 __A) { - // CHECK-LABEL: @test_mm_reduce_ps + // CHECK-LABEL: test_mm_reduce_ps // CHECK: @llvm.x86.avx512.mask.reduce.ps.128 return _mm_reduce_ps(__A, 4); } __m128 test_mm_mask_reduce_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_reduce_ps + // CHECK-LABEL: test_mm_mask_reduce_ps // CHECK: @llvm.x86.avx512.mask.reduce.ps.128 return _mm_mask_reduce_ps(__W, __U, __A, 4); } __m128 test_mm_maskz_reduce_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_reduce_ps + // CHECK-LABEL: test_mm_maskz_reduce_ps // CHECK: @llvm.x86.avx512.mask.reduce.ps.128 return _mm_maskz_reduce_ps(__U, __A, 4); } __m256 test_mm256_reduce_ps(__m256 __A) { - // CHECK-LABEL: @test_mm256_reduce_ps + // CHECK-LABEL: test_mm256_reduce_ps // CHECK: @llvm.x86.avx512.mask.reduce.ps.256 return _mm256_reduce_ps(__A, 4); } __m256 test_mm256_mask_reduce_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_reduce_ps + // CHECK-LABEL: test_mm256_mask_reduce_ps // CHECK: @llvm.x86.avx512.mask.reduce.ps.256 return _mm256_mask_reduce_ps(__W, __U, __A, 4); } __m256 test_mm256_maskz_reduce_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_reduce_ps + // CHECK-LABEL: test_mm256_maskz_reduce_ps // CHECK: @llvm.x86.avx512.mask.reduce.ps.256 return _mm256_maskz_reduce_ps(__U, __A, 4); } __mmask8 test_mm_movepi32_mask(__m128i __A) { - // CHECK-LABEL: @test_mm_movepi32_mask + // CHECK-LABEL: test_mm_movepi32_mask // CHECK: [[CMP:%.*]] = icmp slt <4 x i32> %{{.*}}, zeroinitializer // CHECK: [[SHUF:%.*]] = shufflevector <4 x i1> [[CMP]], <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> return _mm_movepi32_mask(__A); } __mmask8 test_mm256_movepi32_mask(__m256i __A) { - // CHECK-LABEL: @test_mm256_movepi32_mask + // CHECK-LABEL: test_mm256_movepi32_mask // CHECK: [[CMP:%.*]] = icmp slt <8 x i32> %{{.*}}, zeroinitializer return _mm256_movepi32_mask(__A); } __m128i test_mm_movm_epi32(__mmask8 __A) { - // CHECK-LABEL: @test_mm_movm_epi32 + // CHECK-LABEL: test_mm_movm_epi32 // CHECK: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1> // CHECK: %extract.i = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: %vpmovm2.i = sext <4 x i1> %extract.i to <4 x i32> @@ -885,14 +889,14 @@ __m128i test_mm_movm_epi32(__mmask8 __A) { } __m256i test_mm256_movm_epi32(__mmask8 __A) { - // CHECK-LABEL: @test_mm256_movm_epi32 + // CHECK-LABEL: test_mm256_movm_epi32 // CHECK: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1> // CHECK: %vpmovm2.i = sext <8 x i1> %{{.*}} to <8 x i32> return _mm256_movm_epi32(__A); } __m128i test_mm_movm_epi64(__mmask8 __A) { - // CHECK-LABEL: @test_mm_movm_epi64 + // CHECK-LABEL: test_mm_movm_epi64 // CHECK: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1> // CHECK: %extract.i = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: %vpmovm2.i = sext <2 x i1> %extract.i to <2 x i64> @@ -900,7 +904,7 @@ __m128i test_mm_movm_epi64(__mmask8 __A) { } __m256i test_mm256_movm_epi64(__mmask8 __A) { - // CHECK-LABEL: @test_mm256_movm_epi64 + // CHECK-LABEL: test_mm256_movm_epi64 // CHECK: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1> // CHECK: %extract.i = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: %vpmovm2.i = sext <4 x i1> %extract.i to <4 x i64> @@ -908,14 +912,14 @@ __m256i test_mm256_movm_epi64(__mmask8 __A) { } __mmask8 test_mm_movepi64_mask(__m128i __A) { - // CHECK-LABEL: @test_mm_movepi64_mask + // CHECK-LABEL: test_mm_movepi64_mask // CHECK: [[CMP:%.*]] = icmp slt <2 x i64> %{{.*}}, zeroinitializer // CHECK: [[SHUF:%.*]] = shufflevector <2 x i1> [[CMP]], <2 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3> return _mm_movepi64_mask(__A); } __mmask8 test_mm256_movepi64_mask(__m256i __A) { - // CHECK-LABEL: @test_mm256_movepi64_mask + // CHECK-LABEL: test_mm256_movepi64_mask // CHECK: [[CMP:%.*]] = icmp slt <4 x i64> %{{.*}}, zeroinitializer // CHECK: [[SHUF:%.*]] = shufflevector <4 x i1> [[CMP]], <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> return _mm256_movepi64_mask(__A); @@ -923,229 +927,234 @@ __mmask8 test_mm256_movepi64_mask(__m256i __A) { __m256 test_mm256_broadcast_f32x2(__m128 __A) { - // CHECK-LABEL: @test_mm256_broadcast_f32x2 + // CHECK-LABEL: test_mm256_broadcast_f32x2 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> return _mm256_broadcast_f32x2(__A); } +TEST_CONSTEXPR(match_m256(_mm256_broadcast_f32x2((__m128)(__v4sf){1.0f, -2.0f, 3.0f, -4.0f}), 1.0f, -2.0f, 1.0f, -2.0f, 1.0f, -2.0f, 1.0f, -2.0f)); __m256 test_mm256_mask_broadcast_f32x2(__m256 __O, __mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_broadcast_f32x2 + // CHECK-LABEL: test_mm256_mask_broadcast_f32x2 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_broadcast_f32x2(__O, __M, __A); } __m256 test_mm256_maskz_broadcast_f32x2(__mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcast_f32x2 + // CHECK-LABEL: test_mm256_maskz_broadcast_f32x2 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_broadcast_f32x2(__M, __A); } __m256d test_mm256_broadcast_f64x2(double const* __A) { - // CHECK-LABEL: @test_mm256_broadcast_f64x2 + // CHECK-LABEL: test_mm256_broadcast_f64x2 // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> return _mm256_broadcast_f64x2(_mm_loadu_pd(__A)); } +TEST_CONSTEXPR(match_m256d(_mm256_broadcast_f64x2((__m128d)(__v2df){1.0, -2.0}), 1.0, -2.0, 1.0, -2.0)); __m256d test_mm256_mask_broadcast_f64x2(__m256d __O, __mmask8 __M, double const* __A) { - // CHECK-LABEL: @test_mm256_mask_broadcast_f64x2 + // CHECK-LABEL: test_mm256_mask_broadcast_f64x2 // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_broadcast_f64x2(__O, __M, _mm_loadu_pd(__A)); } __m256d test_mm256_maskz_broadcast_f64x2(__mmask8 __M, double const* __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcast_f64x2 + // CHECK-LABEL: test_mm256_maskz_broadcast_f64x2 // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_broadcast_f64x2(__M, _mm_loadu_pd(__A)); } __m128i test_mm_broadcast_i32x2(__m128i __A) { - // CHECK-LABEL: @test_mm_broadcast_i32x2 + // CHECK-LABEL: test_mm_broadcast_i32x2 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> return _mm_broadcast_i32x2(__A); } +TEST_CONSTEXPR(match_v4si(_mm_broadcast_i32x2((__m128i)(__v4si){1, -2, 3, -4}), 1, -2, 1, -2)); __m128i test_mm_mask_broadcast_i32x2(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_broadcast_i32x2 + // CHECK-LABEL: test_mm_mask_broadcast_i32x2 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_broadcast_i32x2(__O, __M, __A); } __m128i test_mm_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_broadcast_i32x2 + // CHECK-LABEL: test_mm_maskz_broadcast_i32x2 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_broadcast_i32x2(__M, __A); } __m256i test_mm256_broadcast_i32x2(__m128i __A) { - // CHECK-LABEL: @test_mm256_broadcast_i32x2 + // CHECK-LABEL: test_mm256_broadcast_i32x2 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> return _mm256_broadcast_i32x2(__A); } +TEST_CONSTEXPR(match_v8si(_mm256_broadcast_i32x2((__m128i)(__v4si){1, -2, 3, -4}), 1, -2, 1, -2, 1, -2, 1, -2)); __m256i test_mm256_mask_broadcast_i32x2(__m256i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_broadcast_i32x2 + // CHECK-LABEL: test_mm256_mask_broadcast_i32x2 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_broadcast_i32x2(__O, __M, __A); } __m256i test_mm256_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcast_i32x2 + // CHECK-LABEL: test_mm256_maskz_broadcast_i32x2 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_broadcast_i32x2(__M, __A); } __m256i test_mm256_broadcast_i64x2(__m128i const* __A) { - // CHECK-LABEL: @test_mm256_broadcast_i64x2 + // CHECK-LABEL: test_mm256_broadcast_i64x2 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> return _mm256_broadcast_i64x2(_mm_loadu_si128(__A)); } +TEST_CONSTEXPR(match_v4di(_mm256_broadcast_i64x2((__m128i)(__v2di){1, -2}), 1, -2, 1, -2)); __m256i test_mm256_mask_broadcast_i64x2(__m256i __O, __mmask8 __M, __m128i const* __A) { - // CHECK-LABEL: @test_mm256_mask_broadcast_i64x2 + // CHECK-LABEL: test_mm256_mask_broadcast_i64x2 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_broadcast_i64x2(__O, __M, _mm_loadu_si128(__A)); } __m256i test_mm256_maskz_broadcast_i64x2(__mmask8 __M, __m128i const* __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcast_i64x2 + // CHECK-LABEL: test_mm256_maskz_broadcast_i64x2 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 0, i32 1> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_broadcast_i64x2(__M, _mm_loadu_si128(__A)); } __m128d test_mm256_extractf64x2_pd(__m256d __A) { - // CHECK-LABEL: @test_mm256_extractf64x2_pd + // CHECK-LABEL: test_mm256_extractf64x2_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> <i32 2, i32 3> return _mm256_extractf64x2_pd(__A, 1); } __m128d test_mm256_mask_extractf64x2_pd(__m128d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_extractf64x2_pd + // CHECK-LABEL: test_mm256_mask_extractf64x2_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm256_mask_extractf64x2_pd(__W, __U, __A, 1); } __m128d test_mm256_maskz_extractf64x2_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_extractf64x2_pd + // CHECK-LABEL: test_mm256_maskz_extractf64x2_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm256_maskz_extractf64x2_pd(__U, __A, 1); } __m128i test_mm256_extracti64x2_epi64(__m256i __A) { - // CHECK-LABEL: @test_mm256_extracti64x2_epi64 + // CHECK-LABEL: test_mm256_extracti64x2_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> poison, <2 x i32> <i32 2, i32 3> return _mm256_extracti64x2_epi64(__A, 1); } __m128i test_mm256_mask_extracti64x2_epi64(__m128i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_extracti64x2_epi64 + // CHECK-LABEL: test_mm256_mask_extracti64x2_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> poison, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm256_mask_extracti64x2_epi64(__W, __U, __A, 1); } __m128i test_mm256_maskz_extracti64x2_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_extracti64x2_epi64 + // CHECK-LABEL: test_mm256_maskz_extracti64x2_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> poison, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm256_maskz_extracti64x2_epi64(__U, __A, 1); } __m256d test_mm256_insertf64x2(__m256d __A, __m128d __B) { - // CHECK-LABEL: @test_mm256_insertf64x2 + // CHECK-LABEL: test_mm256_insertf64x2 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 5> return _mm256_insertf64x2(__A, __B, 1); } __m256d test_mm256_mask_insertf64x2(__m256d __W, __mmask8 __U, __m256d __A, __m128d __B) { - // CHECK-LABEL: @test_mm256_mask_insertf64x2 + // CHECK-LABEL: test_mm256_mask_insertf64x2 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 5> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_insertf64x2(__W, __U, __A, __B, 1); } __m256d test_mm256_maskz_insertf64x2(__mmask8 __U, __m256d __A, __m128d __B) { - // CHECK-LABEL: @test_mm256_maskz_insertf64x2 + // CHECK-LABEL: test_mm256_maskz_insertf64x2 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 5> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_insertf64x2(__U, __A, __B, 1); } __m256i test_mm256_inserti64x2(__m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_inserti64x2 + // CHECK-LABEL: test_mm256_inserti64x2 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 5> return _mm256_inserti64x2(__A, __B, 1); } __m256i test_mm256_mask_inserti64x2(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_inserti64x2 + // CHECK-LABEL: test_mm256_mask_inserti64x2 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 5> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_inserti64x2(__W, __U, __A, __B, 1); } __m256i test_mm256_maskz_inserti64x2(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_inserti64x2 + // CHECK-LABEL: test_mm256_maskz_inserti64x2 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 5> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_inserti64x2(__U, __A, __B, 1); } __mmask8 test_mm_mask_fpclass_pd_mask(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_fpclass_pd_mask + // CHECK-LABEL: test_mm_mask_fpclass_pd_mask // CHECK: @llvm.x86.avx512.fpclass.pd.128 return _mm_mask_fpclass_pd_mask(__U, __A, 2); } __mmask8 test_mm_fpclass_pd_mask(__m128d __A) { - // CHECK-LABEL: @test_mm_fpclass_pd_mask + // CHECK-LABEL: test_mm_fpclass_pd_mask // CHECK: @llvm.x86.avx512.fpclass.pd.128 return _mm_fpclass_pd_mask(__A, 2); } __mmask8 test_mm256_mask_fpclass_pd_mask(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_fpclass_pd_mask + // CHECK-LABEL: test_mm256_mask_fpclass_pd_mask // CHECK: @llvm.x86.avx512.fpclass.pd.256 return _mm256_mask_fpclass_pd_mask(__U, __A, 2); } __mmask8 test_mm256_fpclass_pd_mask(__m256d __A) { - // CHECK-LABEL: @test_mm256_fpclass_pd_mask + // CHECK-LABEL: test_mm256_fpclass_pd_mask // CHECK: @llvm.x86.avx512.fpclass.pd.256 return _mm256_fpclass_pd_mask(__A, 2); } __mmask8 test_mm_mask_fpclass_ps_mask(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_fpclass_ps_mask + // CHECK-LABEL: test_mm_mask_fpclass_ps_mask // CHECK: @llvm.x86.avx512.fpclass.ps.128 return _mm_mask_fpclass_ps_mask(__U, __A, 2); } __mmask8 test_mm_fpclass_ps_mask(__m128 __A) { - // CHECK-LABEL: @test_mm_fpclass_ps_mask + // CHECK-LABEL: test_mm_fpclass_ps_mask // CHECK: @llvm.x86.avx512.fpclass.ps.128 return _mm_fpclass_ps_mask(__A, 2); } __mmask8 test_mm256_mask_fpclass_ps_mask(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_fpclass_ps_mask + // CHECK-LABEL: test_mm256_mask_fpclass_ps_mask // CHECK: @llvm.x86.avx512.fpclass.ps.256 return _mm256_mask_fpclass_ps_mask(__U, __A, 2); } __mmask8 test_mm256_fpclass_ps_mask(__m256 __A) { - // CHECK-LABEL: @test_mm256_fpclass_ps_mask + // CHECK-LABEL: test_mm256_fpclass_ps_mask // CHECK: @llvm.x86.avx512.fpclass.ps.256 return _mm256_fpclass_ps_mask(__A, 2); } diff --git a/clang/test/CodeGen/X86/builtin_test_helpers.h b/clang/test/CodeGen/X86/builtin_test_helpers.h index b83ca4d711e9..6541ca4fd922 100644 --- a/clang/test/CodeGen/X86/builtin_test_helpers.h +++ b/clang/test/CodeGen/X86/builtin_test_helpers.h @@ -28,8 +28,8 @@ constexpr bool match_v4hu(__m64 _v, unsigned short a, unsigned short b, unsigned return v[0] == a && v[1] == b && v[2] == c && v[3] == d;
}
-constexpr bool match_v8qi(__m64 _v, char a, char b, char c, char d, char e, char f, char g, char h) {
- __v8qi v = (__v8qi)_v;
+constexpr bool match_v8qi(__m64 _v, signed char a, signed char b, signed char c, signed char d, signed char e, signed char f, signed char g, signed char h) {
+ __v8qs v = (__v8qs)_v;
return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h;
}
@@ -38,17 +38,20 @@ constexpr bool match_v8qu(__m64 _v, unsigned char a, unsigned char b, unsigned c return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h;
}
-constexpr bool match_m128(__m128 v, float a, float b, float c, float d) {
- return v[0] == a && v[1] == b && v[2] == c && v[3] == d;
+constexpr bool match_m128(__m128 _v, float a, float b, float c, float d) {
+ __v4su v = (__v4su)_v;
+ return v[0] == __builtin_bit_cast(unsigned, a) && v[1] == __builtin_bit_cast(unsigned, b) && v[2] == __builtin_bit_cast(unsigned, c) && v[3] == __builtin_bit_cast(unsigned, d);
}
-constexpr bool match_m128d(__m128d v, double a, double b) {
- return v[0] == a && v[1] == b;
+constexpr bool match_m128d(__m128d _v, double a, double b) {
+ __v2du v = (__v2du)_v;
+ return v[0] == __builtin_bit_cast(unsigned long long, a) && v[1] == __builtin_bit_cast(unsigned long long, b);
}
constexpr bool match_m128h(__m128h _v, _Float16 __e00, _Float16 __e01, _Float16 __e02, _Float16 __e03, _Float16 __e04, _Float16 __e05, _Float16 __e06, _Float16 __e07) {
- __v8hf v = (__v8hf)_v;
- return v[ 0] == __e00 && v[ 1] == __e01 && v[ 2] == __e02 && v[ 3] == __e03 && v[ 4] == __e04 && v[ 5] == __e05 && v[ 6] == __e06 && v[ 7] == __e07;
+ __v8hu v = (__v8hu)_v;
+ return v[ 0] == __builtin_bit_cast(unsigned short, __e00) && v[ 1] == __builtin_bit_cast(unsigned short, __e01) && v[ 2] == __builtin_bit_cast(unsigned short, __e02) && v[ 3] == __builtin_bit_cast(unsigned short, __e03) &&
+ v[ 4] == __builtin_bit_cast(unsigned short, __e04) && v[ 5] == __builtin_bit_cast(unsigned short, __e05) && v[ 6] == __builtin_bit_cast(unsigned short, __e06) && v[ 7] == __builtin_bit_cast(unsigned short, __e07);
}
constexpr bool match_m128i(__m128i _v, unsigned long long a, unsigned long long b) {
@@ -75,8 +78,8 @@ constexpr bool match_v8hu(__m128i _v, unsigned short a, unsigned short b, unsign return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h;
}
-constexpr bool match_v16qi(__m128i _v, char a, char b, char c, char d, char e, char f, char g, char h, char i, char j, char k, char l, char m, char n, char o, char p) {
- __v16qi v = (__v16qi)_v;
+constexpr bool match_v16qi(__m128i _v, signed char a, signed char b, signed char c, signed char d, signed char e, signed char f, signed char g, signed char h, signed char i, signed char j, signed char k, signed char l, signed char m, signed char n, signed char o, signed char p) {
+ __v16qs v = (__v16qs)_v;
return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h && v[8] == i && v[9] == j && v[10] == k && v[11] == l && v[12] == m && v[13] == n && v[14] == o && v[15] == p;
}
@@ -85,19 +88,24 @@ constexpr bool match_v16qu(__m128i _v, unsigned char a, unsigned char b, unsigne return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h && v[8] == i && v[9] == j && v[10] == k && v[11] == l && v[12] == m && v[13] == n && v[14] == o && v[15] == p;
}
-constexpr bool match_m256(__m256 v, float a, float b, float c, float d, float e, float f, float g, float h) {
- return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h;
+constexpr bool match_m256(__m256 _v, float __e00, float __e01, float __e02, float __e03, float __e04, float __e05, float __e06, float __e07) {
+ __v8su v = (__v8su)_v;
+ return v[ 0] == __builtin_bit_cast(unsigned, __e00) && v[ 1] == __builtin_bit_cast(unsigned, __e01) && v[ 2] == __builtin_bit_cast(unsigned, __e02) && v[ 3] == __builtin_bit_cast(unsigned, __e03) &&
+ v[ 4] == __builtin_bit_cast(unsigned, __e04) && v[ 5] == __builtin_bit_cast(unsigned, __e05) && v[ 6] == __builtin_bit_cast(unsigned, __e06) && v[ 7] == __builtin_bit_cast(unsigned, __e07);
}
-constexpr bool match_m256d(__m256d v, double a, double b, double c, double d) {
- return v[0] == a && v[1] == b && v[2] == c && v[3] == d;
+constexpr bool match_m256d(__m256d _v, double a, double b, double c, double d) {
+ __v4du v = (__v4du)_v;
+ return v[0] == __builtin_bit_cast(unsigned long long, a) && v[1] == __builtin_bit_cast(unsigned long long, b) && v[2] == __builtin_bit_cast(unsigned long long, c) && v[3] == __builtin_bit_cast(unsigned long long, d);
}
constexpr bool match_m256h(__m256h _v, _Float16 __e00, _Float16 __e01, _Float16 __e02, _Float16 __e03, _Float16 __e04, _Float16 __e05, _Float16 __e06, _Float16 __e07,
_Float16 __e08, _Float16 __e09, _Float16 __e10, _Float16 __e11, _Float16 __e12, _Float16 __e13, _Float16 __e14, _Float16 __e15) {
- __v16hf v = (__v16hf)_v;
- return v[ 0] == __e00 && v[ 1] == __e01 && v[ 2] == __e02 && v[ 3] == __e03 && v[ 4] == __e04 && v[ 5] == __e05 && v[ 6] == __e06 && v[ 7] == __e07 &&
- v[ 8] == __e08 && v[ 9] == __e09 && v[10] == __e10 && v[11] == __e11 && v[12] == __e12 && v[13] == __e13 && v[14] == __e14 && v[15] == __e15;
+ __v16hu v = (__v16hu)_v;
+ return v[ 0] == __builtin_bit_cast(unsigned short, __e00) && v[ 1] == __builtin_bit_cast(unsigned short, __e01) && v[ 2] == __builtin_bit_cast(unsigned short, __e02) && v[ 3] == __builtin_bit_cast(unsigned short, __e03) &&
+ v[ 4] == __builtin_bit_cast(unsigned short, __e04) && v[ 5] == __builtin_bit_cast(unsigned short, __e05) && v[ 6] == __builtin_bit_cast(unsigned short, __e06) && v[ 7] == __builtin_bit_cast(unsigned short, __e07) &&
+ v[ 8] == __builtin_bit_cast(unsigned short, __e08) && v[ 9] == __builtin_bit_cast(unsigned short, __e09) && v[10] == __builtin_bit_cast(unsigned short, __e10) && v[11] == __builtin_bit_cast(unsigned short, __e11) &&
+ v[12] == __builtin_bit_cast(unsigned short, __e12) && v[13] == __builtin_bit_cast(unsigned short, __e13) && v[14] == __builtin_bit_cast(unsigned short, __e14) && v[15] == __builtin_bit_cast(unsigned short, __e15);
}
constexpr bool match_m256i(__m256i _v, unsigned long long a, unsigned long long b, unsigned long long c, unsigned long long d) {
@@ -125,11 +133,11 @@ constexpr bool match_v16hu(__m256i _v, unsigned short a, unsigned short b, unsig return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h && v[8] == i && v[9] == j && v[10] == k && v[11] == l && v[12] == m && v[13] == n && v[14] == o && v[15] == p;
}
-constexpr bool match_v32qi(__m256i _v, char __b00, char __b01, char __b02, char __b03, char __b04, char __b05, char __b06, char __b07,
- char __b08, char __b09, char __b10, char __b11, char __b12, char __b13, char __b14, char __b15,
- char __b16, char __b17, char __b18, char __b19, char __b20, char __b21, char __b22, char __b23,
- char __b24, char __b25, char __b26, char __b27, char __b28, char __b29, char __b30, char __b31) {
- __v32qi v = (__v32qi)_v;
+constexpr bool match_v32qi(__m256i _v, signed char __b00, signed char __b01, signed char __b02, signed char __b03, signed char __b04, signed char __b05, signed char __b06, signed char __b07,
+ signed char __b08, signed char __b09, signed char __b10, signed char __b11, signed char __b12, signed char __b13, signed char __b14, signed char __b15,
+ signed char __b16, signed char __b17, signed char __b18, signed char __b19, signed char __b20, signed char __b21, signed char __b22, signed char __b23,
+ signed char __b24, signed char __b25, signed char __b26, signed char __b27, signed char __b28, signed char __b29, signed char __b30, signed char __b31) {
+ __v32qs v = (__v32qs)_v;
return v[ 0] == __b00 && v[ 1] == __b01 && v[ 2] == __b02 && v[ 3] == __b03 && v[ 4] == __b04 && v[ 5] == __b05 && v[ 6] == __b06 && v[ 7] == __b07 &&
v[ 8] == __b08 && v[ 9] == __b09 && v[10] == __b10 && v[11] == __b11 && v[12] == __b12 && v[13] == __b13 && v[14] == __b14 && v[15] == __b15 &&
v[16] == __b16 && v[17] == __b17 && v[18] == __b18 && v[19] == __b19 && v[20] == __b20 && v[21] == __b21 && v[22] == __b22 && v[23] == __b23 &&
@@ -147,23 +155,33 @@ constexpr bool match_v32qu(__m256i _v, unsigned char __b00, unsigned char __b01, v[24] == __b24 && v[25] == __b25 && v[26] == __b26 && v[27] == __b27 && v[28] == __b28 && v[29] == __b29 && v[30] == __b30 && v[31] == __b31;
}
-constexpr bool match_m512(__m512 v, float a, float b, float c, float d, float e, float f, float g, float h, float i, float j, float k, float l, float m, float n, float o, float p) {
- return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h && v[8] == i && v[9] == j && v[10] == k && v[11] == l && v[12] == m && v[13] == n && v[14] == o && v[15] == p;
+constexpr bool match_m512(__m512 _v, float __e00, float __e01, float __e02, float __e03, float __e04, float __e05, float __e06, float __e07, float __e08, float __e09, float __e10, float __e11, float __e12, float __e13, float __e14, float __e15) {
+ __v16su v = (__v16su)_v;
+ return v[ 0] == __builtin_bit_cast(unsigned, __e00) && v[ 1] == __builtin_bit_cast(unsigned, __e01) && v[ 2] == __builtin_bit_cast(unsigned, __e02) && v[ 3] == __builtin_bit_cast(unsigned, __e03) &&
+ v[ 4] == __builtin_bit_cast(unsigned, __e04) && v[ 5] == __builtin_bit_cast(unsigned, __e05) && v[ 6] == __builtin_bit_cast(unsigned, __e06) && v[ 7] == __builtin_bit_cast(unsigned, __e07) &&
+ v[ 8] == __builtin_bit_cast(unsigned, __e08) && v[ 9] == __builtin_bit_cast(unsigned, __e09) && v[10] == __builtin_bit_cast(unsigned, __e10) && v[11] == __builtin_bit_cast(unsigned, __e11) &&
+ v[12] == __builtin_bit_cast(unsigned, __e12) && v[13] == __builtin_bit_cast(unsigned, __e13) && v[14] == __builtin_bit_cast(unsigned, __e14) && v[15] == __builtin_bit_cast(unsigned, __e15);
}
-constexpr bool match_m512d(__m512d v, double a, double b, double c, double d, double e, double f, double g, double h) {
- return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h;
+constexpr bool match_m512d(__m512d _v, double __e00, double __e01, double __e02, double __e03, double __e04, double __e05, double __e06, double __e07) {
+ __v8du v = (__v8du)_v;
+ return v[ 0] == __builtin_bit_cast(unsigned long long, __e00) && v[ 1] == __builtin_bit_cast(unsigned long long, __e01) && v[ 2] == __builtin_bit_cast(unsigned long long, __e02) && v[ 3] == __builtin_bit_cast(unsigned long long, __e03) &&
+ v[ 4] == __builtin_bit_cast(unsigned long long, __e04) && v[ 5] == __builtin_bit_cast(unsigned long long, __e05) && v[ 6] == __builtin_bit_cast(unsigned long long, __e06) && v[ 7] == __builtin_bit_cast(unsigned long long, __e07);
}
constexpr bool match_m512h(__m512h _v, _Float16 __e00, _Float16 __e01, _Float16 __e02, _Float16 __e03, _Float16 __e04, _Float16 __e05, _Float16 __e06, _Float16 __e07,
_Float16 __e08, _Float16 __e09, _Float16 __e10, _Float16 __e11, _Float16 __e12, _Float16 __e13, _Float16 __e14, _Float16 __e15,
_Float16 __e16, _Float16 __e17, _Float16 __e18, _Float16 __e19, _Float16 __e20, _Float16 __e21, _Float16 __e22, _Float16 __e23,
_Float16 __e24, _Float16 __e25, _Float16 __e26, _Float16 __e27, _Float16 __e28, _Float16 __e29, _Float16 __e30, _Float16 __e31) {
- __v32hf v = (__v32hf)_v;
- return v[ 0] == __e00 && v[ 1] == __e01 && v[ 2] == __e02 && v[ 3] == __e03 && v[ 4] == __e04 && v[ 5] == __e05 && v[ 6] == __e06 && v[ 7] == __e07 &&
- v[ 8] == __e08 && v[ 9] == __e09 && v[10] == __e10 && v[11] == __e11 && v[12] == __e12 && v[13] == __e13 && v[14] == __e14 && v[15] == __e15 &&
- v[16] == __e16 && v[17] == __e17 && v[18] == __e18 && v[19] == __e19 && v[20] == __e20 && v[21] == __e21 && v[22] == __e22 && v[23] == __e23 &&
- v[24] == __e24 && v[25] == __e25 && v[26] == __e26 && v[27] == __e27 && v[28] == __e28 && v[29] == __e29 && v[30] == __e30 && v[31] == __e31;
+ __v32hu v = (__v32hu)_v;
+ return v[ 0] == __builtin_bit_cast(unsigned short, __e00) && v[ 1] == __builtin_bit_cast(unsigned short, __e01) && v[ 2] == __builtin_bit_cast(unsigned short, __e02) && v[ 3] == __builtin_bit_cast(unsigned short, __e03) &&
+ v[ 4] == __builtin_bit_cast(unsigned short, __e04) && v[ 5] == __builtin_bit_cast(unsigned short, __e05) && v[ 6] == __builtin_bit_cast(unsigned short, __e06) && v[ 7] == __builtin_bit_cast(unsigned short, __e07) &&
+ v[ 8] == __builtin_bit_cast(unsigned short, __e08) && v[ 9] == __builtin_bit_cast(unsigned short, __e09) && v[10] == __builtin_bit_cast(unsigned short, __e10) && v[11] == __builtin_bit_cast(unsigned short, __e11) &&
+ v[12] == __builtin_bit_cast(unsigned short, __e12) && v[13] == __builtin_bit_cast(unsigned short, __e13) && v[14] == __builtin_bit_cast(unsigned short, __e14) && v[15] == __builtin_bit_cast(unsigned short, __e15) &&
+ v[16] == __builtin_bit_cast(unsigned short, __e16) && v[17] == __builtin_bit_cast(unsigned short, __e17) && v[18] == __builtin_bit_cast(unsigned short, __e18) && v[19] == __builtin_bit_cast(unsigned short, __e19) &&
+ v[20] == __builtin_bit_cast(unsigned short, __e20) && v[21] == __builtin_bit_cast(unsigned short, __e21) && v[22] == __builtin_bit_cast(unsigned short, __e22) && v[23] == __builtin_bit_cast(unsigned short, __e23) &&
+ v[24] == __builtin_bit_cast(unsigned short, __e24) && v[25] == __builtin_bit_cast(unsigned short, __e25) && v[26] == __builtin_bit_cast(unsigned short, __e26) && v[27] == __builtin_bit_cast(unsigned short, __e27) &&
+ v[28] == __builtin_bit_cast(unsigned short, __e28) && v[29] == __builtin_bit_cast(unsigned short, __e29) && v[30] == __builtin_bit_cast(unsigned short, __e30) && v[31] == __builtin_bit_cast(unsigned short, __e31);
}
constexpr bool match_m512i(__m512i _v, unsigned long long a, unsigned long long b, unsigned long long c, unsigned long long d, unsigned long long e, unsigned long long f, unsigned long long g, unsigned long long h) {
@@ -203,15 +221,15 @@ constexpr bool match_v32hu(__m512i _v, unsigned short __e00, unsigned short __e0 v[24] == __e24 && v[25] == __e25 && v[26] == __e26 && v[27] == __e27 && v[28] == __e28 && v[29] == __e29 && v[30] == __e30 && v[31] == __e31;
}
-constexpr bool match_v64qi(__m512i _v, char __e00, char __e01, char __e02, char __e03, char __e04, char __e05, char __e06, char __e07,
- char __e08, char __e09, char __e10, char __e11, char __e12, char __e13, char __e14, char __e15,
- char __e16, char __e17, char __e18, char __e19, char __e20, char __e21, char __e22, char __e23,
- char __e24, char __e25, char __e26, char __e27, char __e28, char __e29, char __e30, char __e31,
- char __e32, char __e33, char __e34, char __e35, char __e36, char __e37, char __e38, char __e39,
- char __e40, char __e41, char __e42, char __e43, char __e44, char __e45, char __e46, char __e47,
- char __e48, char __e49, char __e50, char __e51, char __e52, char __e53, char __e54, char __e55,
- char __e56, char __e57, char __e58, char __e59, char __e60, char __e61, char __e62, char __e63) {
- __v64qi v = (__v64qi)_v;
+constexpr bool match_v64qi(__m512i _v, signed char __e00, signed char __e01, signed char __e02, signed char __e03, signed char __e04, signed char __e05, signed char __e06, signed char __e07,
+ signed char __e08, signed char __e09, signed char __e10, signed char __e11, signed char __e12, signed char __e13, signed char __e14, signed char __e15,
+ signed char __e16, signed char __e17, signed char __e18, signed char __e19, signed char __e20, signed char __e21, signed char __e22, signed char __e23,
+ signed char __e24, signed char __e25, signed char __e26, signed char __e27, signed char __e28, signed char __e29, signed char __e30, signed char __e31,
+ signed char __e32, signed char __e33, signed char __e34, signed char __e35, signed char __e36, signed char __e37, signed char __e38, signed char __e39,
+ signed char __e40, signed char __e41, signed char __e42, signed char __e43, signed char __e44, signed char __e45, signed char __e46, signed char __e47,
+ signed char __e48, signed char __e49, signed char __e50, signed char __e51, signed char __e52, signed char __e53, signed char __e54, signed char __e55,
+ signed char __e56, signed char __e57, signed char __e58, signed char __e59, signed char __e60, signed char __e61, signed char __e62, signed char __e63) {
+ __v64qs v = (__v64qs)_v;
return v[ 0] == __e00 && v[ 1] == __e01 && v[ 2] == __e02 && v[ 3] == __e03 && v[ 4] == __e04 && v[ 5] == __e05 && v[ 6] == __e06 && v[ 7] == __e07 &&
v[ 8] == __e08 && v[ 9] == __e09 && v[10] == __e10 && v[11] == __e11 && v[12] == __e12 && v[13] == __e13 && v[14] == __e14 && v[15] == __e15 &&
v[16] == __e16 && v[17] == __e17 && v[18] == __e18 && v[19] == __e19 && v[20] == __e20 && v[21] == __e21 && v[22] == __e22 && v[23] == __e23 &&
diff --git a/clang/test/CodeGen/X86/sse-builtins.c b/clang/test/CodeGen/X86/sse-builtins.c index 104bfea05469..12d9abdfb582 100644 --- a/clang/test/CodeGen/X86/sse-builtins.c +++ b/clang/test/CodeGen/X86/sse-builtins.c @@ -31,7 +31,7 @@ __m128 test_mm_and_ps(__m128 A, __m128 B) { // CHECK: and <4 x i32> return _mm_and_ps(A, B); } -TEST_CONSTEXPR(match_m128(_mm_and_ps((__m128){-4.0f, -5.0f, +6.0f, +7.0f}, (__m128){+0.0f, -0.0f, -0.0f, +7.0f}), -0.0f, -0.0f, +0.0f, +7.0f)); +TEST_CONSTEXPR(match_m128(_mm_and_ps((__m128){-4.0f, -5.0f, +6.0f, +7.0f}, (__m128){+0.0f, -0.0f, -0.0f, +7.0f}), +0.0f, -0.0f, +0.0f, +7.0f)); __m128 test_mm_andnot_ps(__m128 A, __m128 B) { // CHECK-LABEL: test_mm_andnot_ps @@ -39,7 +39,7 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) { // CHECK: and <4 x i32> return _mm_andnot_ps(A, B); } -TEST_CONSTEXPR(match_m128(_mm_andnot_ps((__m128){-4.0f, -5.0f, +6.0f, +7.0f}, (__m128){+0.0f, -0.0f, -0.0f, +7.0f}), +0.0f, +0.0f, +0.0f, +0.0f)); +TEST_CONSTEXPR(match_m128(_mm_andnot_ps((__m128){-4.0f, -5.0f, +6.0f, +7.0f}, (__m128){+0.0f, -0.0f, -0.0f, +7.0f}), +0.0f, +0.0f, -0.0f, +0.0f)); __m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) { // CHECK-LABEL: test_mm_cmp_ps_eq_oq diff --git a/clang/test/CodeGen/X86/sse2-builtins.c b/clang/test/CodeGen/X86/sse2-builtins.c index 612a61973498..49d8b395a0d5 100644 --- a/clang/test/CodeGen/X86/sse2-builtins.c +++ b/clang/test/CodeGen/X86/sse2-builtins.c @@ -108,7 +108,7 @@ __m128d test_mm_andnot_pd(__m128d A, __m128d B) { // CHECK: and <2 x i64> return _mm_andnot_pd(A, B); } -TEST_CONSTEXPR(match_m128d(_mm_andnot_pd((__m128d){+1.0, -3.0}, (__m128d){+0.0, -0.0}), +0.0, -0.0)); +TEST_CONSTEXPR(match_m128d(_mm_andnot_pd((__m128d){+1.0, -3.0}, (__m128d){-0.0, +0.0}), -0.0, +0.0)); __m128i test_mm_andnot_si128(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_andnot_si128 @@ -1780,24 +1780,28 @@ __m128i test_mm_unpackhi_epi8(__m128i A, __m128i B) { // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> return _mm_unpackhi_epi8(A, B); } +TEST_CONSTEXPR(match_v16qi(_mm_unpackhi_epi8((__m128i)(__v16qi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v16qi){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31)); __m128i test_mm_unpackhi_epi16(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_unpackhi_epi16 // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> return _mm_unpackhi_epi16(A, B); } +TEST_CONSTEXPR(match_v8hi(_mm_unpackhi_epi16((__m128i)(__v8hi){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v8hi){8, 9, 10, 11, 12, 13, 14, 15}), 4, 12, 5, 13, 6, 14, 7, 15)); __m128i test_mm_unpackhi_epi32(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_unpackhi_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 6, i32 3, i32 7> return _mm_unpackhi_epi32(A, B); } +TEST_CONSTEXPR(match_v4si(_mm_unpackhi_epi32((__m128i)(__v4si){0, 1, 2, 3}, (__m128i)(__v4si){ 4, 5, 6, 7}), 2, 6, 3, 7)); __m128i test_mm_unpackhi_epi64(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_unpackhi_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 3> return _mm_unpackhi_epi64(A, B); } +TEST_CONSTEXPR(match_v2di(_mm_unpackhi_epi64((__m128i)(__v2di){0, 1}, (__m128i)(__v2di){2, 3}), 1, 3)); __m128d test_mm_unpackhi_pd(__m128d A, __m128d B) { // CHECK-LABEL: test_mm_unpackhi_pd @@ -1811,24 +1815,28 @@ __m128i test_mm_unpacklo_epi8(__m128i A, __m128i B) { // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> return _mm_unpacklo_epi8(A, B); } +TEST_CONSTEXPR(match_v16qi(_mm_unpacklo_epi8((__m128i)(__v16qi){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v16qi){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23)); __m128i test_mm_unpacklo_epi16(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_unpacklo_epi16 // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> return _mm_unpacklo_epi16(A, B); } +TEST_CONSTEXPR(match_v8hi(_mm_unpacklo_epi16((__m128i)(__v8hi){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v8hi){8, 9, 10, 11, 12, 13, 14, 15}), 0, 8, 1, 9, 2, 10, 3, 11)); __m128i test_mm_unpacklo_epi32(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_unpacklo_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 1, i32 5> return _mm_unpacklo_epi32(A, B); } +TEST_CONSTEXPR(match_v4si(_mm_unpacklo_epi32((__m128i)(__v4si){0, 1, 2, 3}, (__m128i)(__v4si){ 4, 5, 6, 7}), 0, 4, 1, 5)); __m128i test_mm_unpacklo_epi64(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_unpacklo_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 0, i32 2> return _mm_unpacklo_epi64(A, B); } +TEST_CONSTEXPR(match_v2di(_mm_unpacklo_epi64((__m128i)(__v2di){0, 1}, (__m128i)(__v2di){2, 3}), 0, 2)); __m128d test_mm_unpacklo_pd(__m128d A, __m128d B) { // CHECK-LABEL: test_mm_unpacklo_pd diff --git a/clang/test/CodeGen/X86/ssse3-builtins.c b/clang/test/CodeGen/X86/ssse3-builtins.c index 982c74c5fc3b..ee44868fa56f 100644 --- a/clang/test/CodeGen/X86/ssse3-builtins.c +++ b/clang/test/CodeGen/X86/ssse3-builtins.c @@ -1,7 +1,11 @@ // RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s // RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> diff --git a/clang/test/CodeGen/builtins-elementwise-math.c b/clang/test/CodeGen/builtins-elementwise-math.c index bb5d0351db1a..e37e5353603a 100644 --- a/clang/test/CodeGen/builtins-elementwise-math.c +++ b/clang/test/CodeGen/builtins-elementwise-math.c @@ -66,7 +66,7 @@ void test_builtin_elementwise_abs(float f1, float f2, double d1, double d2, // CHECK-NEXT: call i32 @llvm.abs.i32(i32 [[IA1]], i1 false) b = __builtin_elementwise_abs(int_as_one); - // CHECK: call i32 @llvm.abs.i32(i32 -10, i1 false) + // CHECK: store i32 %elt.abs11, ptr @b, align 4 b = __builtin_elementwise_abs(-10); // CHECK: [[SI:%.+]] = load i16, ptr %si.addr, align 2 diff --git a/clang/test/CodeGen/c-strings.c b/clang/test/CodeGen/c-strings.c index 12f7c4254b9f..31c438fd8ff2 100644 --- a/clang/test/CodeGen/c-strings.c +++ b/clang/test/CodeGen/c-strings.c @@ -15,8 +15,8 @@ // MSABI: @f4.x = internal global %struct.s { ptr @"??_C@_05CJBACGMB@hello?$AA@" } // CHECK: @x = {{(dso_local )?}}global [3 x i8] c"ola", align [[ALIGN]] -// XFAIL: target=aarch64-pc-windows-{{.*}}, target=arm64ec-pc-windows-{{.*}} -// Arm64 aligns arrays to either 32-bit or 64-bit boundaries, which fails +// XFAIL: target=aarch64-{{.*}}-windows-msvc, target=arm64ec-{{.*}}-windows-msvc +// Arm64 in MSVC mode aligns arrays to either 32-bit or 64-bit boundaries, which fails // various checks above, since ALIGN is derived from the alignment of a single // i8, which is still 1. diff --git a/clang/test/CodeGen/ptrauth-qualifier-blocks.c b/clang/test/CodeGen/ptrauth-qualifier-blocks.c index 62da59cf327f..f460da205cac 100644 --- a/clang/test/CodeGen/ptrauth-qualifier-blocks.c +++ b/clang/test/CodeGen/ptrauth-qualifier-blocks.c @@ -82,9 +82,15 @@ void test_block_address_byref_capture() { // CHECK: store i32 33554432, // CHECK: store i32 48, // CHECK: [[COPY_HELPER_FIELD:%.*]] = getelementptr inbounds nuw [[BYREF_T]], ptr [[BYREF]], i32 0, i32 4 - // CHECK: store ptr @__Block_byref_object_copy_, ptr [[COPY_HELPER_FIELD]], align + // CHECK: [[T0:%.*]] = ptrtoint ptr [[COPY_HELPER_FIELD]] to i64 + // CHECK: [[T1:%.*]] = call i64 @llvm.ptrauth.sign(i64 ptrtoint (ptr @__Block_byref_object_copy_ to i64), i32 0, i64 [[T0]]) + // CHECK: [[T2:%.*]] = inttoptr i64 [[T1]] to ptr + // CHECK: store ptr [[T2]], ptr [[COPY_HELPER_FIELD]], align // CHECK: [[DISPOSE_HELPER_FIELD:%.*]] = getelementptr inbounds nuw [[BYREF_T]], ptr [[BYREF]], i32 0, i32 5 - // CHECK: store ptr @__Block_byref_object_dispose_, ptr [[DISPOSE_HELPER_FIELD]], align + // CHECK: [[T0:%.*]] = ptrtoint ptr [[DISPOSE_HELPER_FIELD]] to i64 + // CHECK: [[T1:%.*]] = call i64 @llvm.ptrauth.sign(i64 ptrtoint (ptr @__Block_byref_object_dispose_ to i64), i32 0, i64 [[T0]]) + // CHECK: [[T2:%.*]] = inttoptr i64 [[T1]] to ptr + // CHECK: store ptr [[T2]], ptr [[DISPOSE_HELPER_FIELD]], align // flags - copy/dispose required // CHECK: store i32 1107296256, ptr __block struct A * __ptrauth(1, 1, 60) ptr = createA(); diff --git a/clang/test/CodeGenObjC/ptrauth-block-descriptor-pointer.m b/clang/test/CodeGenObjC/ptrauth-block-descriptor-pointer.m new file mode 100644 index 000000000000..559cddfd4e86 --- /dev/null +++ b/clang/test/CodeGenObjC/ptrauth-block-descriptor-pointer.m @@ -0,0 +1,28 @@ +// RUN: %clang_cc1 -fobjc-arc -fblocks -fptrauth-calls -triple arm64e-apple-ios -emit-llvm -o - %s | FileCheck %s + +_Static_assert(__has_feature(ptrauth_signed_block_descriptors), "-fptrauth-block-descriptor-pointers should set ptrauth_signed_block_descriptors"); + +void a() { + // Test out a global block. + void (^blk)(void) = ^{}; +} + +// CHECK: [[BLOCK_DESCRIPTOR_NAME:@"__block_descriptor_.*"]] = linkonce_odr hidden unnamed_addr constant { i64, i64, ptr, ptr } { i64 0, i64 32, ptr @.str, ptr null } + + +// CHECK: @__block_literal_global = internal constant { ptr, i32, i32, ptr, ptr } { ptr @_NSConcreteGlobalBlock, i32 1342177280, i32 0, ptr ptrauth (ptr @__a_block_invoke, i32 0, i64 0, ptr getelementptr inbounds ({ ptr, i32, i32, ptr, ptr }, ptr @__block_literal_global, i32 0, i32 3)), ptr ptrauth (ptr @"__block_descriptor_32_e5_v8\01?0l", i32 2, i64 49339, ptr getelementptr inbounds ({ ptr, i32, i32, ptr, ptr }, ptr @__block_literal_global, i32 0, i32 4)) } + +void b(int p) { + // CHECK-LABEL: define void @b + + // Test out a stack block. + void (^blk)(void) = ^{(void)p;}; + + // CHECK: [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, i32 }> + // CHECK: [[BLOCK_DESCRIPTOR_REF:%.*]] = getelementptr inbounds nuw <{ {{.*}} }>, ptr [[BLOCK]], i32 0, i32 4 + // CHECK: [[BLOCK_DESCRIPTOR_REF_INT:%.*]] = ptrtoint ptr [[BLOCK_DESCRIPTOR_REF]] to i64 + // CHECK: [[BLENDED:%.*]] = call i64 @llvm.ptrauth.blend(i64 [[BLOCK_DESCRIPTOR_REF_INT]], i64 49339) + // CHECK: [[SIGNED_REF:%.*]] = call i64 @llvm.ptrauth.sign(i64 ptrtoint (ptr @"__block_descriptor_36_e5_v8\01?0l" to i64), i32 2, i64 [[BLENDED]]) + // CHECK: [[SIGNED_REF_PTR:%.*]] = inttoptr i64 [[SIGNED_REF]] to ptr + // CHECK: store ptr [[SIGNED_REF_PTR]], ptr [[BLOCK_DESCRIPTOR_REF]] +} diff --git a/clang/test/CodeGenObjC/ptrauth-block-isa.m b/clang/test/CodeGenObjC/ptrauth-block-isa.m index c1e98c6fd9d3..c37fe8b0d7fe 100644 --- a/clang/test/CodeGenObjC/ptrauth-block-isa.m +++ b/clang/test/CodeGenObjC/ptrauth-block-isa.m @@ -1,7 +1,8 @@ -// RUN: %clang_cc1 -fptrauth-calls -fptrauth-objc-isa -fobjc-arc -fblocks -triple arm64e -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fptrauth-calls -fptrauth-objc-isa -fobjc-arc -fblocks -triple arm64e -emit-llvm %s -o - | FileCheck %s void (^globalblock)(void) = ^{}; -// CHECK: [[GLOBAL_BLOCK:@.*]] = internal constant { ptr, i32, i32, ptr, ptr } { ptr ptrauth (ptr @_NSConcreteGlobalBlock, i32 2, i64 27361, ptr [[GLOBAL_BLOCK]]), i32 1342177280, i32 0, ptr @globalblock_block_invoke, ptr @"__block_descriptor_32_e5_v8\01?0l" }, align 8 #0 +// CHECK: [[BLOCK_DESCRIPTOR_NAME:@"__block_descriptor_.*"]] = linkonce_odr hidden unnamed_addr constant { i64, i64, ptr, ptr } { i64 0, i64 32, ptr @.str, ptr null }, comdat, align 8 +// CHECK: @__block_literal_global = internal constant { ptr, i32, i32, ptr, ptr } { ptr ptrauth (ptr @_NSConcreteGlobalBlock, i32 2, i64 27361, ptr @__block_literal_global), i32 1342177280, i32 0, ptr ptrauth (ptr @globalblock_block_invoke, i32 0, i64 0, ptr getelementptr inbounds ({ ptr, i32, i32, ptr, ptr }, ptr @__block_literal_global, i32 0, i32 3)), ptr ptrauth (ptr [[BLOCK_DESCRIPTOR_NAME]], i32 2, i64 49339, ptr getelementptr inbounds ({ ptr, i32, i32, ptr, ptr }, ptr @__block_literal_global, i32 0, i32 4)) } @interface A - (int) count; diff --git a/clang/test/Driver/linker-wrapper-libs.c b/clang/test/Driver/linker-wrapper-libs.c deleted file mode 100644 index 1404fe3fc7a3..000000000000 --- a/clang/test/Driver/linker-wrapper-libs.c +++ /dev/null @@ -1,191 +0,0 @@ -// REQUIRES: x86-registered-target -// REQUIRES: nvptx-registered-target -// REQUIRES: amdgpu-registered-target - -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.elf.o - -#if defined(RESOLVES) -int __attribute__((visibility("hidden"))) sym; -#elif defined(GLOBAL) -int __attribute__((visibility("protected"))) global; -#elif defined(WEAK) -int __attribute__((visibility("hidden"))) weak; -#elif defined(HIDDEN) -int __attribute__((visibility("hidden"))) hidden; -#elif defined(UNDEFINED) -extern int sym; -int baz() { return sym; } -#else -extern int sym; - -extern int __attribute__((weak)) weak; - -int foo() { return sym; } -int bar() { return weak; } -#endif - -// -// Check that we extract a static library defining an undefined symbol. -// -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DRESOLVES -o %t.nvptx.resolves.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DRESOLVES -o %t.amdgpu.resolves.bc -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DUNDEFINED -o %t.nvptx.undefined.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DUNDEFINED -o %t.amdgpu.undefined.bc -// RUN: clang-offload-packager -o %t-lib.out \ -// RUN: --image=file=%t.nvptx.undefined.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.amdgpu.undefined.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 \ -// RUN: --image=file=%t.nvptx.resolves.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.amdgpu.resolves.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t-lib.out -// RUN: llvm-ar rcs %t.a %t.o -// RUN: clang-offload-packager -o %t.out \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t.out -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.o %t.a -o a.out 2>&1 \ -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.a %t.o -o a.out 2>&1 \ -// RUN: | FileCheck %s --check-prefix=LIBRARY-RESOLVES - -// LIBRARY-RESOLVES: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_70 {{.*}}.o {{.*}}.o -// LIBRARY-RESOLVES: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx1030 {{.*}}.o {{.*}}.o - -// -// Check that we extract a static library that defines a global visibile to the -// host. -// -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DGLOBAL -o %t.nvptx.global.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DGLOBAL -o %t.amdgpu.global.bc -// RUN: clang-offload-packager -o %t-lib.out \ -// RUN: --image=file=%t.nvptx.global.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.amdgpu.global.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t-lib.out -// RUN: llvm-ar rcs %t.a %t.o -// RUN: clang-offload-packager -o %t.out \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t.out -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.o %t.a -o a.out 2>&1 \ -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.a %t.o -o a.out 2>&1 \ -// RUN: | FileCheck %s --check-prefix=LIBRARY-GLOBAL - -// LIBRARY-GLOBAL: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_70 {{.*}}.o {{.*}}.o -// LIBRARY-GLOBAL: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx1030 {{.*}}.o {{.*}}.o - -// -// Check that we do not extract a global symbol if the source file was not -// created by an offloading language that expects there to be a host version of -// the symbol. -// -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DGLOBAL -o %t.nvptx.global.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DGLOBAL -o %t.amdgpu.global.bc -// RUN: clang-offload-packager -o %t-lib.out \ -// RUN: --image=file=%t.nvptx.global.bc,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.amdgpu.global.bc,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t-lib.out -// RUN: llvm-ar rcs %t.a %t.o -// RUN: clang-offload-packager -o %t.out \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t.out -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.o %t.a -o a.out 2>&1 \ -// RUN: | FileCheck %s --check-prefix=LIBRARY-GLOBAL-NONE - -// LIBRARY-GLOBAL-NONE-NOT: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx1030 {{.*}}.o {{.*}}.o -// LIBRARY-GLOBAL-NONE-NOT: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_70 {{.*}}.o {{.*}}.o - -// -// Check that we do not extract an external weak symbol. -// -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DWEAK -o %t.nvptx.weak.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DWEAK -o %t.amdgpu.weak.bc -// RUN: clang-offload-packager -o %t-lib.out \ -// RUN: --image=file=%t.nvptx.weak.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.amdgpu.weak.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t-lib.out -// RUN: llvm-ar rcs %t.a %t.o -// RUN: clang-offload-packager -o %t.out \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t.out -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.o %t.a -o a.out 2>&1 \ -// RUN: | FileCheck %s --check-prefix=LIBRARY-WEAK - -// LIBRARY-WEAK: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_70 -// LIBRARY-WEAK-NOT: {{.*}}.o {{.*}}.o -// LIBRARY-WEAK: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx1030 - -// -// Check that we do not extract an unneeded hidden symbol. -// -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DHIDDEN -o %t.nvptx.hidden.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DHIDDEN -o %t.amdgpu.hidden.bc -// RUN: clang-offload-packager -o %t-lib.out \ -// RUN: --image=file=%t.nvptx.hidden.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.amdgpu.hidden.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t-lib.out -// RUN: llvm-ar rcs %t.a %t.o -// RUN: clang-offload-packager -o %t.out \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t.out -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.o %t.a -o a.out 2>&1 \ -// RUN: | FileCheck %s --check-prefix=LIBRARY-HIDDEN - -// LIBRARY-HIDDEN: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_70 -// LIBRARY-HIDDEN-NOT: {{.*}}.o {{.*}}.o -// LIBRARY-HIDDEN: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx1030 - -// -// Check that we do not extract a static library that defines a global visibile -// to the host that is already defined. -// -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DGLOBAL -o %t.nvptx.global.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DGLOBAL -o %t.amdgpu.global.bc -// RUN: clang-offload-packager -o %t-lib.out \ -// RUN: --image=file=%t.nvptx.global.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.amdgpu.global.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t-lib.out -// RUN: llvm-ar rcs %t.a %t.o -// RUN: clang-offload-packager -o %t.out \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t.out -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.o %t.a %t.a -o a.out 2>&1 \ -// RUN: | FileCheck %s --check-prefix=LIBRARY-GLOBAL-DEFINED - -// LIBRARY-GLOBAL-DEFINED: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_70 {{.*}}.o {{.*}}.o -// LIBRARY-GLOBAL-DEFINED-NOT: {{.*}}gfx1030{{.*}}.o -// LIBRARY-GLOBAL-DEFINED: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx1030 {{.*}}.o {{.*}}.o - -// -// Check that we can use --[no-]whole-archive to control extraction. -// -// RUN: %clang -cc1 %s -triple nvptx64-nvidia-cuda -emit-llvm-bc -DGLOBAL -o %t.nvptx.global.bc -// RUN: %clang -cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm-bc -DGLOBAL -o %t.amdgpu.global.bc -// RUN: clang-offload-packager -o %t-lib.out \ -// RUN: --image=file=%t.nvptx.global.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.nvptx.global.bc,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_52 \ -// RUN: --image=file=%t.amdgpu.global.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 \ -// RUN: --image=file=%t.amdgpu.global.bc,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx90a -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t-lib.out -// RUN: llvm-ar rcs %t.a %t.o -// RUN: clang-offload-packager -o %t.out \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=nvptx64-nvidia-cuda,arch=sm_70 \ -// RUN: --image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx1030 -// RUN: %clang -cc1 %s -triple x86_64-unknown-linux-gnu -emit-obj -o %t.o -fembed-offload-object=%t.out -// RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run \ -// RUN: --linker-path=/usr/bin/ld %t.o --whole-archive %t.a -o a.out 2>&1 \ -// RUN: | FileCheck %s --check-prefix=LIBRARY-WHOLE-ARCHIVE - -// LIBRARY-WHOLE-ARCHIVE: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_70 {{.*}}.o {{.*}}.o -// LIBRARY-WHOLE-ARCHIVE: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx1030 {{.*}}.o {{.*}}.o -// LIBRARY-WHOLE-ARCHIVE: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=nvptx64-nvidia-cuda -march=sm_52 {{.*}}.o -// LIBRARY-WHOLE-ARCHIVE: clang{{.*}} -o {{.*}}.img -dumpdir {{.*}}.img. --target=amdgcn-amd-amdhsa -mcpu=gfx90a {{.*}}.o diff --git a/clang/test/Frontend/skip-function-bodies.cpp b/clang/test/Frontend/skip-function-bodies.cpp index d0593b474bda..4cfc4c5bfff3 100644 --- a/clang/test/Frontend/skip-function-bodies.cpp +++ b/clang/test/Frontend/skip-function-bodies.cpp @@ -1,13 +1,15 @@ // Trivial check to ensure skip-function-bodies flag is propagated. // -// RUN: %clang_cc1 -verify -skip-function-bodies -pedantic-errors %s -// expected-no-diagnostics +// RUN: %clang_cc1 -verify -skip-function-bodies %s int f() { // normally this should emit some diags, but we're skipping it! this is garbage; } +void g() __attribute__((__diagnose_if__(baz))) {} +// expected-error@-1 {{use of undeclared identifier 'baz'}} + // Make sure we only accept it as a cc1 arg. // RUN: not %clang -skip-function-bodies %s 2>&1 | FileCheck %s // CHECK: clang: error: unknown argument '-skip-function-bodies'; did you mean '-Xclang -skip-function-bodies'? diff --git a/clang/test/Modules/befriend-2.cppm b/clang/test/Modules/befriend-2.cppm new file mode 100644 index 000000000000..9d0baf849cad --- /dev/null +++ b/clang/test/Modules/befriend-2.cppm @@ -0,0 +1,65 @@ +// RUN: rm -rf %t +// RUN: mkdir -p %t +// RUN: split-file %s %t +// +// RUN: %clang_cc1 -std=c++20 %t/a.cppm -emit-reduced-module-interface -o %t/test-A.pcm +// RUN: %clang_cc1 -std=c++20 %t/N.cppm -emit-reduced-module-interface -o %t/test-N.pcm +// RUN: %clang_cc1 -std=c++20 %t/B.cppm -verify -fsyntax-only -fprebuilt-module-path=%t + +//--- a.h +namespace N { + + template <typename> + class C { + template <typename> friend void foo(); + }; + + template <typename> void foo() {} +} // namespace N + +//--- a.cppm +// This is some unrelated file. It also #includes system headers, but +// here does not even export anything. +module; +#include "a.h" +export module test:A; +export { + using N::C; + using N::foo; +} + +//--- std.h +// Declarations typically #included from C++ header files: +namespace N { // In practice, this would be namespace std + inline namespace impl { // In practice, this would be namespace __1 + template <typename> + class C { + template <typename> friend void foo(); + }; + + template <typename> void foo() {} + } // namespace impl + } // namespace N + +//--- N.cppm +module; +#include "std.h" +export module test:N; + +// Now wrap these names into a module and export them: +export { + namespace N { + using N::C; + using N::foo; + } +} + +//--- B.cppm +// expected-no-diagnostics +// A file that consumes the partitions from the other two files, +// including the exported N::C name. +module test:B; +import :N; +import :A; + +N::C<int> x; diff --git a/clang/test/Modules/befriend-3.cppm b/clang/test/Modules/befriend-3.cppm new file mode 100644 index 000000000000..f8dbc423be2c --- /dev/null +++ b/clang/test/Modules/befriend-3.cppm @@ -0,0 +1,19 @@ +// RUN: %clang_cc1 -std=c++20 %s -fsyntax-only -verify +export module m; + +namespace test { +namespace ns1 { + namespace ns2 { + template<class T> void f(T t); // expected-note {{target of using declaration}} + } + using ns2::f; // expected-note {{using declaration}} +} +struct A { void f(); }; // expected-note 2{{target of using declaration}} +struct B : public A { using A::f; }; // expected-note {{using declaration}} +template<typename T> struct C : A { using A::f; }; // expected-note {{using declaration}} +struct X { + template<class T> friend void ns1::f(T t); // expected-error {{cannot befriend target of using declaration}} + friend void B::f(); // expected-error {{cannot befriend target of using declaration}} + friend void C<int>::f(); // expected-error {{cannot befriend target of using declaration}} +}; +} diff --git a/clang/test/Modules/pr138558.cppm b/clang/test/Modules/pr138558.cppm new file mode 100644 index 000000000000..c637ce2f266e --- /dev/null +++ b/clang/test/Modules/pr138558.cppm @@ -0,0 +1,54 @@ +// RUN: rm -rf %t +// RUN: mkdir -p %t +// RUN: split-file %s %t +// +// RUN: %clang_cc1 -std=c++20 %t/a.cppm -emit-reduced-module-interface -o %t/test-A.pcm +// RUN: %clang_cc1 -std=c++20 %t/N.cppm -emit-reduced-module-interface -o %t/test-N.pcm +// RUN: %clang_cc1 -std=c++20 %t/B.cppm -verify -fsyntax-only -fprebuilt-module-path=%t + +//--- a.h +namespace N { +inline namespace impl { + template <typename> + class C { + template <typename> friend void foo(); + }; + + template <typename> void foo() {} +} // namespace impl +} // namespace N + +//--- a.cppm +// This is some unrelated file. It also #includes system headers, but +// here does not even export anything. +module; +#include "a.h" +export module test:A; +// To make sure they won't elided. +using N::C; +using N::foo; + +//--- N.cppm +module; +#include "a.h" +export module test:N; + +// Now wrap these names into a module and export them: +export { + namespace N { + inline namespace impl { + using N::impl::C; + using N::impl::foo; + } + } +} + +//--- B.cppm +// expected-no-diagnostics +// A file that consumes the partitions from the other two files, +// including the exported N::C name. +module test:B; +import :N; +import :A; + +N::C<int> x; diff --git a/clang/test/Parser/cxx-variadic-func.cpp b/clang/test/Parser/cxx-variadic-func.cpp index 98a34d3e1bf6..73124b8b1b05 100644 --- a/clang/test/Parser/cxx-variadic-func.cpp +++ b/clang/test/Parser/cxx-variadic-func.cpp @@ -6,3 +6,24 @@ void f(...) { } void h(int n..., int m); // expected-error {{expected ')'}} expected-note {{to match}} + + +namespace GH153445 { +void f(int = {}...); + +struct S { + void f(int = {}...); + void g(int...); +}; + +void S::g(int = {}...) {} +} + + +template <typename ...T> +constexpr int a() {return 1;} + +struct S2 { + template <typename ...Ts> + void f(int = a<Ts...>()...); +}; diff --git a/clang/test/Parser/cxx2c-oxford-variadic-comma.cpp b/clang/test/Parser/cxx2c-oxford-variadic-comma.cpp index b8015b4815b2..18ce770851a3 100644 --- a/clang/test/Parser/cxx2c-oxford-variadic-comma.cpp +++ b/clang/test/Parser/cxx2c-oxford-variadic-comma.cpp @@ -36,6 +36,7 @@ void o(int x, ...); struct S { void p(this S...) {} // expected-warning {{declaration of a variadic function without a comma before '...' is deprecated}} + void f(int = {}...); // expected-warning {{declaration of a variadic function without a comma before '...' is deprecated}} }; template<class ...Ts> diff --git a/clang/test/Parser/diagnose_if.cpp b/clang/test/Parser/diagnose_if.cpp new file mode 100644 index 000000000000..52059804c9ef --- /dev/null +++ b/clang/test/Parser/diagnose_if.cpp @@ -0,0 +1,12 @@ +// RUN: %clang_cc1 %s -fsyntax-only -fcxx-exceptions -verify + +void t1() __attribute__((__diagnose_if__(baz))) try {} catch(...) {} +// expected-error@-1 {{use of undeclared identifier 'baz'}} + +struct A { + A(); +}; + +A::A() __attribute__((__diagnose_if__(baz))) :; +// expected-error@-1 {{expected class member or base class name}} +// expected-error@-2 {{use of undeclared identifier 'baz'}} diff --git a/clang/test/Parser/explicit-bool-pre-cxx17.cpp b/clang/test/Parser/explicit-bool-pre-cxx17.cpp new file mode 100644 index 000000000000..fee0889737a8 --- /dev/null +++ b/clang/test/Parser/explicit-bool-pre-cxx17.cpp @@ -0,0 +1,15 @@ +// Regression test for assertion failure when explicit(bool) is used in pre-C++20 +// Fixes GitHub issue #152729 +// RUN: %clang_cc1 -std=c++98 -verify %s +// RUN: %clang_cc1 -std=c++03 -verify %s +// RUN: %clang_cc1 -std=c++11 -verify %s +// RUN: %clang_cc1 -std=c++14 -verify %s +// RUN: %clang_cc1 -std=c++17 -verify %s + +struct S { + explicit(true) S(int); + // expected-warning@-1 {{explicit(bool) is a C++20 extension}} + + explicit(false) S(float); + // expected-warning@-1 {{explicit(bool) is a C++20 extension}} +}; diff --git a/clang/test/Sema/address-packed.c b/clang/test/Sema/address-packed.c index 29f12490e9fa..f826b7d57d91 100644 --- a/clang/test/Sema/address-packed.c +++ b/clang/test/Sema/address-packed.c @@ -338,3 +338,11 @@ struct Invalid0 { void *g14(struct Invalid0 *ivl) { return &(ivl->x); } + +void to_void_with_expr(void *ptr, int expr); + +void g15(void) { + struct Arguable arguable; + to_void_with_expr(&arguable.x, 3); // no-warning + to_void_with_expr(&arguable.x, ({3;})); // no-warning +} diff --git a/clang/test/Sema/constant-builtins-vector.cpp b/clang/test/Sema/constant-builtins-vector.cpp index bc575dca98d7..2b7d76e36ce9 100644 --- a/clang/test/Sema/constant-builtins-vector.cpp +++ b/clang/test/Sema/constant-builtins-vector.cpp @@ -876,3 +876,21 @@ static_assert(__builtin_elementwise_min(~0U, 0U) == 0U); static_assert(__builtin_bit_cast(unsigned, __builtin_elementwise_min((vector4char){1, -2, 3, -4}, (vector4char){4, -3, 2, -1})) == (LITTLE_END ? 0xFC02FD01 : 0x01FD02FC)); static_assert(__builtin_bit_cast(unsigned, __builtin_elementwise_min((vector4uchar){1, 2, 3, 4}, (vector4uchar){4, 3, 2, 1})) == 0x01020201U); static_assert(__builtin_bit_cast(unsigned long long, __builtin_elementwise_min((vector4short){1, -2, 3, -4}, (vector4short){4, -3, 2, -1})) == (LITTLE_END ? 0xFFFC0002FFFD0001 : 0x0001FFFD0002FFFC)); + +static_assert(__builtin_elementwise_abs(10) == 10); +static_assert(__builtin_elementwise_abs(-10) == 10); +static_assert(__builtin_bit_cast(unsigned, __builtin_elementwise_abs((vector4char){-1, -2, -3, 4})) == (LITTLE_END ? 0x04030201 : 0x01020304)); +static_assert(__builtin_elementwise_abs((int)(-2147483648)) == (int)(-2147483648)); // the absolute value of the most negative integer remains the most negative integer + +// check floating point for elementwise abs +#define CHECK_FOUR_FLOAT_VEC(vec1, vec2) \ + static_assert(__builtin_fabs(vec1[0] - vec2[0]) < 1e-6); \ + static_assert(__builtin_fabs(vec1[1] - vec2[1]) < 1e-6); \ + static_assert(__builtin_fabs(vec1[2] - vec2[2]) < 1e-6); \ + static_assert(__builtin_fabs(vec1[3] - vec2[3]) < 1e-6); + +// checking floating point vector +CHECK_FOUR_FLOAT_VEC(__builtin_elementwise_abs((vector4float){-1.123, 2.123, -3.123, 4.123}), ((vector4float){1.123, 2.123, 3.123, 4.123})) +CHECK_FOUR_FLOAT_VEC(__builtin_elementwise_abs((vector4double){-1.123, 2.123, -3.123, 4.123}), ((vector4double){1.123, 2.123, 3.123, 4.123})) +static_assert(__builtin_elementwise_abs((float)-1.123) - (float)1.123 < 1e-6); // making sure one element works +#undef CHECK_FOUR_FLOAT_VEC diff --git a/clang/test/Sema/format-strings-signedness.c b/clang/test/Sema/format-strings-signedness.c index d5a8140d9ef8..773ff412ac17 100644 --- a/clang/test/Sema/format-strings-signedness.c +++ b/clang/test/Sema/format-strings-signedness.c @@ -39,13 +39,13 @@ void test_printf_unsigned_char(unsigned char x) void test_printf_int(int x) { printf("%d", x); // no-warning - printf("%u", x); // expected-warning{{format specifies type 'unsigned int' but the argument has type 'int'}} - printf("%x", x); // expected-warning{{format specifies type 'unsigned int' but the argument has type 'int'}} + printf("%u", x); // expected-warning{{format specifies type 'unsigned int' but the argument has type 'int', which differs in signedness}} + printf("%x", x); // expected-warning{{format specifies type 'unsigned int' but the argument has type 'int', which differs in signedness}} } void test_printf_unsigned(unsigned x) { - printf("%d", x); // expected-warning{{format specifies type 'int' but the argument has type 'unsigned int'}} + printf("%d", x); // expected-warning{{format specifies type 'int' but the argument has type 'unsigned int', which differs in signedness}} printf("%u", x); // no-warning printf("%x", x); // no-warning } @@ -53,13 +53,13 @@ void test_printf_unsigned(unsigned x) void test_printf_long(long x) { printf("%ld", x); // no-warning - printf("%lu", x); // expected-warning{{format specifies type 'unsigned long' but the argument has type 'long'}} - printf("%lx", x); // expected-warning{{format specifies type 'unsigned long' but the argument has type 'long'}} + printf("%lu", x); // expected-warning{{format specifies type 'unsigned long' but the argument has type 'long', which differs in signedness}} + printf("%lx", x); // expected-warning{{format specifies type 'unsigned long' but the argument has type 'long', which differs in signedness}} } void test_printf_unsigned_long(unsigned long x) { - printf("%ld", x); // expected-warning{{format specifies type 'long' but the argument has type 'unsigned long'}} + printf("%ld", x); // expected-warning{{format specifies type 'long' but the argument has type 'unsigned long', which differs in signedness}} printf("%lu", x); // no-warning printf("%lx", x); // no-warning } @@ -67,13 +67,13 @@ void test_printf_unsigned_long(unsigned long x) void test_printf_long_long(long long x) { printf("%lld", x); // no-warning - printf("%llu", x); // expected-warning{{format specifies type 'unsigned long long' but the argument has type 'long long'}} - printf("%llx", x); // expected-warning{{format specifies type 'unsigned long long' but the argument has type 'long long'}} + printf("%llu", x); // expected-warning{{format specifies type 'unsigned long long' but the argument has type 'long long', which differs in signedness}} + printf("%llx", x); // expected-warning{{format specifies type 'unsigned long long' but the argument has type 'long long', which differs in signedness}} } void test_printf_unsigned_long_long(unsigned long long x) { - printf("%lld", x); // expected-warning{{format specifies type 'long long' but the argument has type 'unsigned long long'}} + printf("%lld", x); // expected-warning{{format specifies type 'long long' but the argument has type 'unsigned long long', which differs in signedness}} printf("%llu", x); // no-warning printf("%llx", x); // no-warning } @@ -85,8 +85,8 @@ enum enum_int { void test_printf_enum_int(enum enum_int x) { printf("%d", x); // no-warning - printf("%u", x); // expected-warning{{format specifies type 'unsigned int' but the argument has underlying type 'int'}} - printf("%x", x); // expected-warning{{format specifies type 'unsigned int' but the argument has underlying type 'int'}} + printf("%u", x); // expected-warning{{format specifies type 'unsigned int' but the argument has underlying type 'int', which differs in signedness}} + printf("%x", x); // expected-warning{{format specifies type 'unsigned int' but the argument has underlying type 'int', which differs in signedness}} } #ifndef _WIN32 // Disabled due to enums have different underlying type on _WIN32 @@ -96,7 +96,7 @@ enum enum_unsigned { void test_printf_enum_unsigned(enum enum_unsigned x) { - printf("%d", x); // expected-warning{{format specifies type 'int' but the argument has underlying type 'unsigned int'}} + printf("%d", x); // expected-warning{{format specifies type 'int' but the argument has underlying type 'unsigned int', which differs in signedness}} printf("%u", x); // no-warning printf("%x", x); // no-warning } @@ -110,8 +110,8 @@ enum enum_long { void test_printf_enum_long(enum enum_long x) { printf("%ld", x); // no-warning - printf("%lu", x); // expected-warning{{format specifies type 'unsigned long' but the argument has underlying type 'long'}} - printf("%lx", x); // expected-warning{{format specifies type 'unsigned long' but the argument has underlying type 'long'}} + printf("%lu", x); // expected-warning{{format specifies type 'unsigned long' but the argument has underlying type 'long', which differs in signedness}} + printf("%lx", x); // expected-warning{{format specifies type 'unsigned long' but the argument has underlying type 'long', which differs in signedness}} } enum enum_unsigned_long { @@ -120,7 +120,7 @@ enum enum_unsigned_long { void test_printf_enum_unsigned_long(enum enum_unsigned_long x) { - printf("%ld", x); // expected-warning{{format specifies type 'long' but the argument has underlying type 'unsigned long'}} + printf("%ld", x); // expected-warning{{format specifies type 'long' but the argument has underlying type 'unsigned long', which differs in signedness}} printf("%lu", x); // no-warning printf("%lx", x); // no-warning } @@ -136,61 +136,61 @@ void test_scanf_unsigned_char(unsigned char *y) { void test_scanf_int(int *x) { scanf("%d", x); // no-warning - scanf("%u", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'int *'}} - scanf("%x", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'int *'}} + scanf("%u", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'int *', which differs in signedness}} + scanf("%x", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'int *', which differs in signedness}} } void test_scanf_unsigned(unsigned *x) { - scanf("%d", x); // expected-warning{{format specifies type 'int *' but the argument has type 'unsigned int *'}} + scanf("%d", x); // expected-warning{{format specifies type 'int *' but the argument has type 'unsigned int *', which differs in signedness}} scanf("%u", x); // no-warning scanf("%x", x); // no-warning } void test_scanf_long(long *x) { scanf("%ld", x); // no-warning - scanf("%lu", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'long *'}} - scanf("%lx", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'long *'}} + scanf("%lu", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'long *', which differs in signedness}} + scanf("%lx", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'long *', which differs in signedness}} } void test_scanf_unsigned_long(unsigned long *x) { - scanf("%ld", x); // expected-warning{{format specifies type 'long *' but the argument has type 'unsigned long *'}} + scanf("%ld", x); // expected-warning{{format specifies type 'long *' but the argument has type 'unsigned long *', which differs in signedness}} scanf("%lu", x); // no-warning scanf("%lx", x); // no-warning } void test_scanf_longlong(long long *x) { scanf("%lld", x); // no-warning - scanf("%llu", x); // expected-warning{{format specifies type 'unsigned long long *' but the argument has type 'long long *'}} - scanf("%llx", x); // expected-warning{{format specifies type 'unsigned long long *' but the argument has type 'long long *'}} + scanf("%llu", x); // expected-warning{{format specifies type 'unsigned long long *' but the argument has type 'long long *', which differs in signedness}} + scanf("%llx", x); // expected-warning{{format specifies type 'unsigned long long *' but the argument has type 'long long *', which differs in signedness}} } void test_scanf_unsigned_longlong(unsigned long long *x) { - scanf("%lld", x); // expected-warning{{format specifies type 'long long *' but the argument has type 'unsigned long long *'}} + scanf("%lld", x); // expected-warning{{format specifies type 'long long *' but the argument has type 'unsigned long long *', which differs in signedness}} scanf("%llu", x); // no-warning scanf("%llx", x); // no-warning } void test_scanf_enum_int(enum enum_int *x) { scanf("%d", x); // no-warning - scanf("%u", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'enum enum_int *'}} - scanf("%x", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'enum enum_int *'}} + scanf("%u", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'enum enum_int *', which differs in signedness}} + scanf("%x", x); // expected-warning{{format specifies type 'unsigned int *' but the argument has type 'enum enum_int *', which differs in signedness}} } #ifndef _WIN32 // Disabled due to enums have different underlying type on _WIN32 void test_scanf_enum_unsigned(enum enum_unsigned *x) { - scanf("%d", x); // expected-warning{{format specifies type 'int *' but the argument has type 'enum enum_unsigned *'}} + scanf("%d", x); // expected-warning{{format specifies type 'int *' but the argument has type 'enum enum_unsigned *', which differs in signedness}} scanf("%u", x); // no-warning scanf("%x", x); // no-warning } void test_scanf_enum_long(enum enum_long *x) { scanf("%ld", x); // no-warning - scanf("%lu", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'enum enum_long *'}} - scanf("%lx", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'enum enum_long *'}} + scanf("%lu", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'enum enum_long *', which differs in signedness}} + scanf("%lx", x); // expected-warning{{format specifies type 'unsigned long *' but the argument has type 'enum enum_long *', which differs in signedness}} } void test_scanf_enum_unsigned_long(enum enum_unsigned_long *x) { - scanf("%ld", x); // expected-warning{{format specifies type 'long *' but the argument has type 'enum enum_unsigned_long *'}} + scanf("%ld", x); // expected-warning{{format specifies type 'long *' but the argument has type 'enum enum_unsigned_long *', which differs in signedness}} scanf("%lu", x); // no-warning scanf("%lx", x); // no-warning } diff --git a/clang/test/SemaOpenACC/init-construct.cpp b/clang/test/SemaOpenACC/init-construct.cpp index abc7f741e3f4..d55358990518 100644 --- a/clang/test/SemaOpenACC/init-construct.cpp +++ b/clang/test/SemaOpenACC/init-construct.cpp @@ -34,6 +34,12 @@ void uses() { // expected-error@+2{{OpenACC integer expression requires explicit conversion from 'struct ExplicitConvertOnly' to 'int'}} // expected-note@#EXPL_CONV{{conversion to integral type 'int'}} #pragma acc init device_num(Explicit) + + // expected-error@+1{{OpenACC 'device_type' clause on a 'init' construct only permits one architecture}} +#pragma acc init device_type(nvidia, radeon) + + // expected-error@+1{{OpenACC 'device_type' clause on a 'init' construct only permits one architecture}} +#pragma acc init device_type(nonsense, nvidia, radeon) } template<typename T> diff --git a/clang/test/SemaOpenACC/shutdown-construct.cpp b/clang/test/SemaOpenACC/shutdown-construct.cpp index 95cea90ddb74..e08a9680d71f 100644 --- a/clang/test/SemaOpenACC/shutdown-construct.cpp +++ b/clang/test/SemaOpenACC/shutdown-construct.cpp @@ -34,6 +34,12 @@ void uses() { // expected-error@+2{{OpenACC integer expression requires explicit conversion from 'struct ExplicitConvertOnly' to 'int'}} // expected-note@#EXPL_CONV{{conversion to integral type 'int'}} #pragma acc shutdown device_num(Explicit) + + // expected-error@+1{{OpenACC 'device_type' clause on a 'shutdown' construct only permits one architecture}} +#pragma acc shutdown device_type(nvidia, radeon) + + // expected-error@+1{{OpenACC 'device_type' clause on a 'shutdown' construct only permits one architecture}} +#pragma acc shutdown device_type(nonsense, nvidia, radeon) } template<typename T> diff --git a/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp b/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp index 1d91f5f255f1..a56e758fb75d 100644 --- a/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp +++ b/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp @@ -911,9 +911,9 @@ Error handleOverrideImages( /// Transforms all the extracted offloading input files into an image that can /// be registered by the runtime. -Expected<SmallVector<StringRef>> linkAndWrapDeviceFiles( - SmallVectorImpl<SmallVector<OffloadFile>> &LinkerInputFiles, - const InputArgList &Args, char **Argv, int Argc) { +Expected<SmallVector<StringRef>> +linkAndWrapDeviceFiles(ArrayRef<SmallVector<OffloadFile>> LinkerInputFiles, + const InputArgList &Args, char **Argv, int Argc) { llvm::TimeTraceScope TimeScope("Handle all device input"); std::mutex ImageMtx; @@ -1069,147 +1069,6 @@ std::optional<std::string> searchLibrary(StringRef Input, StringRef Root, return searchLibraryBaseName(Input, Root, SearchPaths); } -/// Common redeclaration of needed symbol flags. -enum Symbol : uint32_t { - Sym_None = 0, - Sym_Undefined = 1U << 1, - Sym_Weak = 1U << 2, -}; - -/// Scan the symbols from a BitcodeFile \p Buffer and record if we need to -/// extract any symbols from it. -Expected<bool> getSymbolsFromBitcode(MemoryBufferRef Buffer, OffloadKind Kind, - bool IsArchive, StringSaver &Saver, - DenseMap<StringRef, Symbol> &Syms) { - Expected<IRSymtabFile> IRSymtabOrErr = readIRSymtab(Buffer); - if (!IRSymtabOrErr) - return IRSymtabOrErr.takeError(); - - bool ShouldExtract = !IsArchive; - DenseMap<StringRef, Symbol> TmpSyms; - for (unsigned I = 0; I != IRSymtabOrErr->Mods.size(); ++I) { - for (const auto &Sym : IRSymtabOrErr->TheReader.module_symbols(I)) { - if (Sym.isFormatSpecific() || !Sym.isGlobal()) - continue; - - auto It = Syms.find(Sym.getName()); - bool NewSymbol = It == Syms.end(); - auto OldSym = NewSymbol ? Sym_None : It->second; - - // We will extract if it defines a currenlty undefined non-weak - // symbol. - bool ResolvesStrongReference = - ((OldSym & Sym_Undefined && !(OldSym & Sym_Weak)) && - !Sym.isUndefined()); - // We will extract if it defines a new global symbol visible to the - // host. This is only necessary for code targeting an offloading - // language. - bool NewGlobalSymbol = - ((NewSymbol || (OldSym & Sym_Undefined)) && !Sym.isUndefined() && - !Sym.canBeOmittedFromSymbolTable() && Kind != object::OFK_None && - (Sym.getVisibility() != GlobalValue::HiddenVisibility)); - ShouldExtract |= ResolvesStrongReference | NewGlobalSymbol; - - // Update this symbol in the "table" with the new information. - if (OldSym & Sym_Undefined && !Sym.isUndefined()) - TmpSyms[Saver.save(Sym.getName())] = - static_cast<Symbol>(OldSym & ~Sym_Undefined); - if (Sym.isUndefined() && NewSymbol) - TmpSyms[Saver.save(Sym.getName())] = - static_cast<Symbol>(OldSym | Sym_Undefined); - if (Sym.isWeak()) - TmpSyms[Saver.save(Sym.getName())] = - static_cast<Symbol>(OldSym | Sym_Weak); - } - } - - // If the file gets extracted we update the table with the new symbols. - if (ShouldExtract) - Syms.insert_range(TmpSyms); - - return ShouldExtract; -} - -/// Scan the symbols from an ObjectFile \p Obj and record if we need to extract -/// any symbols from it. -Expected<bool> getSymbolsFromObject(const ObjectFile &Obj, OffloadKind Kind, - bool IsArchive, StringSaver &Saver, - DenseMap<StringRef, Symbol> &Syms) { - bool ShouldExtract = !IsArchive; - DenseMap<StringRef, Symbol> TmpSyms; - for (SymbolRef Sym : Obj.symbols()) { - auto FlagsOrErr = Sym.getFlags(); - if (!FlagsOrErr) - return FlagsOrErr.takeError(); - - if (!(*FlagsOrErr & SymbolRef::SF_Global) || - (*FlagsOrErr & SymbolRef::SF_FormatSpecific)) - continue; - - auto NameOrErr = Sym.getName(); - if (!NameOrErr) - return NameOrErr.takeError(); - - bool NewSymbol = Syms.count(*NameOrErr) == 0; - auto OldSym = NewSymbol ? Sym_None : Syms[*NameOrErr]; - - // We will extract if it defines a currenlty undefined non-weak symbol. - bool ResolvesStrongReference = (OldSym & Sym_Undefined) && - !(OldSym & Sym_Weak) && - !(*FlagsOrErr & SymbolRef::SF_Undefined); - - // We will extract if it defines a new global symbol visible to the - // host. This is only necessary for code targeting an offloading - // language. - bool NewGlobalSymbol = - ((NewSymbol || (OldSym & Sym_Undefined)) && - !(*FlagsOrErr & SymbolRef::SF_Undefined) && Kind != object::OFK_None && - !(*FlagsOrErr & SymbolRef::SF_Hidden)); - ShouldExtract |= ResolvesStrongReference | NewGlobalSymbol; - - // Update this symbol in the "table" with the new information. - if (OldSym & Sym_Undefined && !(*FlagsOrErr & SymbolRef::SF_Undefined)) - TmpSyms[Saver.save(*NameOrErr)] = - static_cast<Symbol>(OldSym & ~Sym_Undefined); - if (*FlagsOrErr & SymbolRef::SF_Undefined && NewSymbol) - TmpSyms[Saver.save(*NameOrErr)] = - static_cast<Symbol>(OldSym | Sym_Undefined); - if (*FlagsOrErr & SymbolRef::SF_Weak) - TmpSyms[Saver.save(*NameOrErr)] = static_cast<Symbol>(OldSym | Sym_Weak); - } - - // If the file gets extracted we update the table with the new symbols. - if (ShouldExtract) - Syms.insert_range(TmpSyms); - - return ShouldExtract; -} - -/// Attempt to 'resolve' symbols found in input files. We use this to -/// determine if an archive member needs to be extracted. An archive member -/// will be extracted if any of the following is true. -/// 1) It defines an undefined symbol in a regular object filie. -/// 2) It defines a global symbol without hidden visibility that has not -/// yet been defined. -Expected<bool> getSymbols(StringRef Image, OffloadKind Kind, bool IsArchive, - StringSaver &Saver, - DenseMap<StringRef, Symbol> &Syms) { - MemoryBufferRef Buffer = MemoryBufferRef(Image, ""); - switch (identify_magic(Image)) { - case file_magic::bitcode: - return getSymbolsFromBitcode(Buffer, Kind, IsArchive, Saver, Syms); - case file_magic::elf_relocatable: { - Expected<std::unique_ptr<ObjectFile>> ObjFile = - ObjectFile::createObjectFile(Buffer); - if (!ObjFile) - return ObjFile.takeError(); - return getSymbolsFromObject(**ObjFile, Kind, IsArchive, Saver, Syms); - } - default: - return false; - } -} - /// Search the input files and libraries for embedded device offloading code /// and add it to the list of files to be linked. Files coming from static /// libraries are only added to the input if they are used by an existing @@ -1279,7 +1138,6 @@ getDeviceInput(const ArgList &Args) { // Link all standard input files and update the list of symbols. MapVector<OffloadFile::TargetID, SmallVector<OffloadFile, 0>> InputFiles; - DenseMap<OffloadFile::TargetID, DenseMap<StringRef, Symbol>> Syms; for (OffloadFile &Binary : ObjectFilesToExtract) { if (!Binary.getBinary()) continue; @@ -1290,12 +1148,6 @@ getDeviceInput(const ArgList &Args) { CompatibleTargets.emplace_back(ID); for (const auto &[Index, ID] : llvm::enumerate(CompatibleTargets)) { - Expected<bool> ExtractOrErr = getSymbols( - Binary.getBinary()->getImage(), Binary.getBinary()->getOffloadKind(), - /*IsArchive=*/false, Saver, Syms[ID]); - if (!ExtractOrErr) - return ExtractOrErr.takeError(); - // If another target needs this binary it must be copied instead. if (Index == CompatibleTargets.size() - 1) InputFiles[ID].emplace_back(std::move(Binary)); @@ -1304,55 +1156,33 @@ getDeviceInput(const ArgList &Args) { } } - // Archive members only extract if they define needed symbols. We do this - // after every regular input file so that libraries may be included out of - // order. This follows 'ld.lld' semantics which are more lenient. - bool Extracted = true; llvm::DenseSet<StringRef> ShouldExtract; for (auto &Arg : Args.getAllArgValues(OPT_should_extract)) ShouldExtract.insert(Arg); - while (Extracted) { - Extracted = false; - for (OffloadFile &Binary : ArchiveFilesToExtract) { - // If the binary was previously extracted it will be set to null. - if (!Binary.getBinary()) - continue; - - SmallVector<OffloadFile::TargetID> CompatibleTargets = {Binary}; - for (const auto &[ID, Input] : InputFiles) - if (object::areTargetsCompatible(Binary, ID)) - CompatibleTargets.emplace_back(ID); - - for (const auto &[Index, ID] : llvm::enumerate(CompatibleTargets)) { - // Only extract an if we have an an object matching this target or it - // was specifically requested. - if (!InputFiles.count(ID) && !ShouldExtract.contains(ID.second)) - continue; - - Expected<bool> ExtractOrErr = - getSymbols(Binary.getBinary()->getImage(), - Binary.getBinary()->getOffloadKind(), - /*IsArchive=*/true, Saver, Syms[ID]); - if (!ExtractOrErr) - return ExtractOrErr.takeError(); - Extracted = *ExtractOrErr; + // We only extract archive members from the fat binary if we find a used or + // requested target. Unlike normal static archive handling, we just extract + // every object file contained in the archive. + for (OffloadFile &Binary : ArchiveFilesToExtract) { + if (!Binary.getBinary()) + continue; - // Skip including the file if it is an archive that does not resolve - // any symbols. - if (!Extracted && !ShouldExtract.contains(ID.second)) - continue; + SmallVector<OffloadFile::TargetID> CompatibleTargets = {Binary}; + for (const auto &[ID, Input] : InputFiles) + if (object::areTargetsCompatible(Binary, ID)) + CompatibleTargets.emplace_back(ID); - // If another target needs this binary it must be copied instead. - if (Index == CompatibleTargets.size() - 1) - InputFiles[ID].emplace_back(std::move(Binary)); - else - InputFiles[ID].emplace_back(Binary.copy()); - } + for (const auto &[Index, ID] : llvm::enumerate(CompatibleTargets)) { + // Only extract an if we have an an object matching this target or it + // was specifically requested. + if (!InputFiles.count(ID) && !ShouldExtract.contains(ID.second)) + continue; - // If we extracted any files we need to check all the symbols again. - if (Extracted) - break; + // If another target needs this binary it must be copied instead. + if (Index == CompatibleTargets.size() - 1) + InputFiles[ID].emplace_back(std::move(Binary)); + else + InputFiles[ID].emplace_back(Binary.copy()); } } diff --git a/clang/unittests/Interpreter/CMakeLists.txt b/clang/unittests/Interpreter/CMakeLists.txt index 1dda9024075a..b6825f9461ad 100644 --- a/clang/unittests/Interpreter/CMakeLists.txt +++ b/clang/unittests/Interpreter/CMakeLists.txt @@ -1,3 +1,34 @@ +if(EMSCRIPTEN) +set(LLVM_COMPONENTS_TO_LINK + "" + ) +set(LLVM_LIBS_TO_LINK + "" + ) +set(CLANG_LIBS_TO_LINK + clangInterpreter + ) +else() +set(LLVM_COMPONENTS_TO_LINK + ${LLVM_TARGETS_TO_BUILD} + Core + MC + OrcJIT + Support + TargetParser + ) +set(LLVM_LIBS_TO_LINK + LLVMTestingSupport + ) +set(CLANG_LIBS_TO_LINK + clangAST + clangBasic + clangInterpreter + clangFrontend + clangSema + ) +endif() + add_distinct_clang_unittest(ClangReplInterpreterTests IncrementalCompilerBuilderTest.cpp IncrementalProcessingTest.cpp @@ -8,24 +39,33 @@ add_distinct_clang_unittest(ClangReplInterpreterTests EXPORT_SYMBOLS CLANG_LIBS - clangAST - clangBasic - clangInterpreter - clangFrontend - clangSema + ${CLANG_LIBS_TO_LINK} LINK_LIBS - LLVMTestingSupport + ${LLVM_LIBS_TO_LINK} LLVM_COMPONENTS - ${LLVM_TARGETS_TO_BUILD} - Core - MC - OrcJIT - Support - TargetParser + ${LLVM_COMPONENTS_TO_LINK} ) +if(EMSCRIPTEN) +# Without the above you try to link to LLVMSupport twice, and end +# up with a duplicate symbol error when creating the main module +get_target_property(LINKED_LIBS ClangReplInterpreterTests LINK_LIBRARIES) +list(REMOVE_ITEM LINKED_LIBS LLVMSupport) +set_target_properties(ClangReplInterpreterTests PROPERTIES LINK_LIBRARIES "${LINKED_LIBS}") +target_link_options(ClangReplInterpreterTests + PUBLIC "SHELL: -s MAIN_MODULE=1" + PUBLIC "SHELL: -s ALLOW_MEMORY_GROWTH=1" + PUBLIC "SHELL: -s STACK_SIZE=32mb" + PUBLIC "SHELL: -s INITIAL_MEMORY=128mb" + PUBLIC "SHELL: --emrun" +) +set_target_properties(ClangReplInterpreterTests PROPERTIES + SUFFIX ".html" +) +endif() + # Exceptions on Windows are not yet supported. if(NOT WIN32) add_subdirectory(ExceptionTests) diff --git a/clang/unittests/Interpreter/CodeCompletionTest.cpp b/clang/unittests/Interpreter/CodeCompletionTest.cpp index 23cfc469695d..ceb683497ac7 100644 --- a/clang/unittests/Interpreter/CodeCompletionTest.cpp +++ b/clang/unittests/Interpreter/CodeCompletionTest.cpp @@ -29,8 +29,14 @@ public: std::unique_ptr<clang::Interpreter> Interp; void SetUp() override { +// FIXME : WebAssembly doesn't currently support Jit (see +// https: // github.com/llvm/llvm-project/pull/150977#discussion_r2237521095). +// so this check of HostSupportsJIT has been skipped +// over until support is added, and HostSupportsJIT can return true. +#ifndef __EMSCRIPTEN__ if (!HostSupportsJIT()) GTEST_SKIP(); +#endif std::unique_ptr<CompilerInstance> CI = cantFail(CB.CreateCpp()); this->Interp = cantFail(clang::Interpreter::create(std::move(CI))); } diff --git a/clang/unittests/Interpreter/IncrementalCompilerBuilderTest.cpp b/clang/unittests/Interpreter/IncrementalCompilerBuilderTest.cpp index c4a40071f55c..7b4633bfc9e7 100644 --- a/clang/unittests/Interpreter/IncrementalCompilerBuilderTest.cpp +++ b/clang/unittests/Interpreter/IncrementalCompilerBuilderTest.cpp @@ -37,6 +37,14 @@ TEST(IncrementalCompilerBuilder, SetCompilerArgs) { } TEST(IncrementalCompilerBuilder, SetTargetTriple) { +// FIXME : This test doesn't current work for Emscripten builds. +// It should be possible to make it work.For details on how it fails and +// the current progress to enable this test see +// the following Github issue https: // +// github.com/llvm/llvm-project/issues/153461 +#ifdef __EMSCRIPTEN__ + GTEST_SKIP() << "Test fails for Emscipten builds"; +#endif auto CB = clang::IncrementalCompilerBuilder(); CB.SetTargetTriple("armv6-none-eabi"); auto CI = cantFail(CB.CreateCpp()); diff --git a/clang/unittests/Interpreter/InterpreterExtensionsTest.cpp b/clang/unittests/Interpreter/InterpreterExtensionsTest.cpp index 1c27cfb2c48f..f50f6e320776 100644 --- a/clang/unittests/Interpreter/InterpreterExtensionsTest.cpp +++ b/clang/unittests/Interpreter/InterpreterExtensionsTest.cpp @@ -75,9 +75,14 @@ struct OutOfProcInterpreter : public Interpreter { }; TEST_F(InterpreterExtensionsTest, FindRuntimeInterface) { +// FIXME : WebAssembly doesn't currently support Jit (see +// https: // github.com/llvm/llvm-project/pull/150977#discussion_r2237521095). +// so this check of HostSupportsJIT has been skipped +// over until support is added, and HostSupportsJIT can return true. +#ifndef __EMSCRIPTEN__ if (!HostSupportsJIT()) GTEST_SKIP(); - +#endif clang::IncrementalCompilerBuilder CB; llvm::Error ErrOut = llvm::Error::success(); auto CI = cantFail(CB.CreateCpp()); diff --git a/clang/unittests/Interpreter/InterpreterTest.cpp b/clang/unittests/Interpreter/InterpreterTest.cpp index 768058b954d4..8639fb668f1f 100644 --- a/clang/unittests/Interpreter/InterpreterTest.cpp +++ b/clang/unittests/Interpreter/InterpreterTest.cpp @@ -147,6 +147,14 @@ TEST_F(InterpreterTest, DeclsAndStatements) { } TEST_F(InterpreterTest, UndoCommand) { +// FIXME : This test doesn't current work for Emscripten builds. +// It should be possible to make it work.For details on how it fails and +// the current progress to enable this test see +// the following Github issue https: // +// github.com/llvm/llvm-project/issues/153461 +#ifdef __EMSCRIPTEN__ + GTEST_SKIP() << "Test fails for Emscipten builds"; +#endif Args ExtraArgs = {"-Xclang", "-diagnostic-log-file", "-Xclang", "-"}; // Create the diagnostic engine with unowned consumer. @@ -256,6 +264,14 @@ static NamedDecl *LookupSingleName(Interpreter &Interp, const char *Name) { } TEST_F(InterpreterTest, InstantiateTemplate) { +// FIXME : This test doesn't current work for Emscripten builds. +// It should be possible to make it work.For details on how it fails and +// the current progress to enable this test see +// the following Github issue https: // +// github.com/llvm/llvm-project/issues/153461 +#ifdef __EMSCRIPTEN__ + GTEST_SKIP() << "Test fails for Emscipten builds"; +#endif // FIXME: We cannot yet handle delayed template parsing. If we run with // -fdelayed-template-parsing we try adding the newly created decl to the // active PTU which causes an assert. @@ -295,6 +311,14 @@ TEST_F(InterpreterTest, InstantiateTemplate) { } TEST_F(InterpreterTest, Value) { +// FIXME : This test doesn't current work for Emscripten builds. +// It should be possible to make it work.For details on how it fails and +// the current progress to enable this test see +// the following Github issue https: // +// github.com/llvm/llvm-project/issues/153461 +#ifdef __EMSCRIPTEN__ + GTEST_SKIP() << "Test fails for Emscipten builds"; +#endif std::vector<const char *> Args = {"-fno-sized-deallocation"}; std::unique_ptr<Interpreter> Interp = createInterpreter(Args); diff --git a/clang/unittests/Interpreter/InterpreterTestFixture.h b/clang/unittests/Interpreter/InterpreterTestFixture.h index 113599ff9889..b088fa4a5f89 100644 --- a/clang/unittests/Interpreter/InterpreterTestFixture.h +++ b/clang/unittests/Interpreter/InterpreterTestFixture.h @@ -38,8 +38,14 @@ protected: } void SetUp() override { +// FIXME : WebAssembly doesn't currently support Jit (see +// https: // github.com/llvm/llvm-project/pull/150977#discussion_r2237521095). +// so this check of HostSupportsJIT has been skipped +// over until support is added, and HostSupportsJIT can return true. +#ifndef __EMSCRIPTEN__ if (!HostSupportsJIT()) GTEST_SKIP(); +#endif } void TearDown() override {} diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp index e2da20efaba5..af2dcf6bfa98 100644 --- a/clang/utils/TableGen/SveEmitter.cpp +++ b/clang/utils/TableGen/SveEmitter.cpp @@ -972,10 +972,10 @@ Intrinsic::Intrinsic(StringRef Name, StringRef Proto, uint64_t MergeTy, BaseType(BT, 'd'), Flags(Flags), ImmChecks(Checks) { auto FormatGuard = [](StringRef Guard, StringRef Base) -> std::string { + if (Guard.empty() || Guard == Base) + return Guard.str(); if (Guard.contains('|')) return Base.str() + ",(" + Guard.str() + ")"; - if (Guard.empty() || Guard == Base || Guard.starts_with(Base.str() + ",")) - return Guard.str(); return Base.str() + "," + Guard.str(); }; |