Merge branch 'main' into users/mingmingl-llvm/samplefdo-profile-formatusers/mingmingl-llvm/samplefdo-profile-format

15 files changed, 1199 insertions, 1177 deletions

diff --git a/clang/test/CodeGenHLSL/builtins/asint16.hlsl b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
index 1d35125bfb8c..8a1513012fd9 100644
--- a/clang/test/CodeGenHLSL/builtins/asint16.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/asint16.hlsl
@@ -1,60 +1,60 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - | FileCheck %s

-

-//CHECK-LABEL: define {{.*}}test_ints

-//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT: bitcast

-//CHECK: entry:

-//CHECK-NEXT: ret i16 [[VAL]]

-int16_t test_int(int16_t p0)

-{

-    return asint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_uint

-//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT:bitcast

-//CHECK: entry:

-//CHECK-NEXT: ret i16 [[VAL]]

-int16_t test_uint(uint16_t p0)

-{

-    return asint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_half

-//CHECK-SAME: {{.*}}(half {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK: [[RES:%.*]] = bitcast half [[VAL]] to i16

-//CHECK-NEXT : ret i16 [[RES]]

-int16_t test_half(half p0)

-{

-    return asint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_vector_int

-//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT: bitcast

-//CHECK: entry:

-//CHECK-NEXT: ret <4 x i16> [[VAL]]

-int16_t4 test_vector_int(int16_t4 p0)

-{

-    return asint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_vector_uint

-//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT: bitcast

-//CHECK-NEXT: entry:

-//CHECK-NEXT: ret <4 x i16> [[VAL]]

-int16_t4 test_vector_uint(uint16_t4 p0)

-{

-    return asint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}fn

-//CHECK-SAME: {{.*}}(<4 x half> {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK: [[RES:%.*]] = bitcast <4 x half> [[VAL]] to <4 x i16>

-//CHECK-NEXT: ret <4 x i16> [[RES]]

-int16_t4 fn(half4 p1)

-{

-    return asint16(p1);

-}

-

+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - | FileCheck %s
+
+//CHECK-LABEL: define {{.*}}test_ints
+//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: entry:
+//CHECK-NEXT: ret i16 [[VAL]]
+int16_t test_int(int16_t p0)
+{
+    return asint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_uint
+//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT:bitcast
+//CHECK: entry:
+//CHECK-NEXT: ret i16 [[VAL]]
+int16_t test_uint(uint16_t p0)
+{
+    return asint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_half
+//CHECK-SAME: {{.*}}(half {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast half [[VAL]] to i16
+//CHECK-NEXT : ret i16 [[RES]]
+int16_t test_half(half p0)
+{
+    return asint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_vector_int
+//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: entry:
+//CHECK-NEXT: ret <4 x i16> [[VAL]]
+int16_t4 test_vector_int(int16_t4 p0)
+{
+    return asint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_vector_uint
+//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK-NEXT: entry:
+//CHECK-NEXT: ret <4 x i16> [[VAL]]
+int16_t4 test_vector_uint(uint16_t4 p0)
+{
+    return asint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}fn
+//CHECK-SAME: {{.*}}(<4 x half> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast <4 x half> [[VAL]] to <4 x i16>
+//CHECK-NEXT: ret <4 x i16> [[RES]]
+int16_t4 fn(half4 p1)
+{
+    return asint16(p1);
+}
+
diff --git a/clang/test/CodeGenHLSL/builtins/asuint16.hlsl b/clang/test/CodeGenHLSL/builtins/asuint16.hlsl
index 3ed7de9dffbe..6d44377df2ff 100644
--- a/clang/test/CodeGenHLSL/builtins/asuint16.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/asuint16.hlsl
@@ -1,60 +1,60 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - | FileCheck %s

-

-//CHECK-LABEL: define {{.*}}test_ints

-//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT: bitcast

-//CHECK: entry:

-//CHECK: ret i16 [[VAL]]

-uint16_t test_int(int16_t p0)

-{

-    return asuint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_uint

-//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT: bitcast

-//CHECK: entry:

-//CHECK-NEXT: ret i16 [[VAL]]

-uint16_t test_uint(uint16_t p0)

-{

-    return asuint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_half

-//CHECK-SAME: {{.*}}(half {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK: [[RES:%.*]] = bitcast half [[VAL]] to i16

-//CHECK-NEXT: ret i16 [[RES]]

-uint16_t test_half(half p0)

-{

-    return asuint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_vector_int

-//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT: bitcast

-//CHECK: entry:

-//CHECK-NEXT: ret <4 x i16> [[VAL]]

-uint16_t4 test_vector_int(int16_t4 p0)

-{

-    return asuint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}test_vector_uint

-//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK-NOT: bitcast

-//CHECK: entry:

-//CHECK-NEXT: ret <4 x i16> [[VAL]]

-uint16_t4 test_vector_uint(uint16_t4 p0)

-{

-    return asuint16(p0);

-}

-

-//CHECK-LABEL: define {{.*}}fn

-//CHECK-SAME: {{.*}}(<4 x half> {{.*}} [[VAL:%.*]]){{.*}}

-//CHECK: [[RES:%.*]] = bitcast <4 x half> [[VAL]] to <4 x i16>

-//CHECK-NEXT: ret <4 x i16> [[RES]]

-uint16_t4 fn(half4 p1)

-{

-    return asuint16(p1);

-}

-

+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - | FileCheck %s
+
+//CHECK-LABEL: define {{.*}}test_ints
+//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: entry:
+//CHECK: ret i16 [[VAL]]
+uint16_t test_int(int16_t p0)
+{
+    return asuint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_uint
+//CHECK-SAME: {{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: entry:
+//CHECK-NEXT: ret i16 [[VAL]]
+uint16_t test_uint(uint16_t p0)
+{
+    return asuint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_half
+//CHECK-SAME: {{.*}}(half {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast half [[VAL]] to i16
+//CHECK-NEXT: ret i16 [[RES]]
+uint16_t test_half(half p0)
+{
+    return asuint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_vector_int
+//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: entry:
+//CHECK-NEXT: ret <4 x i16> [[VAL]]
+uint16_t4 test_vector_int(int16_t4 p0)
+{
+    return asuint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}test_vector_uint
+//CHECK-SAME: {{.*}}(<4 x i16> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK-NOT: bitcast
+//CHECK: entry:
+//CHECK-NEXT: ret <4 x i16> [[VAL]]
+uint16_t4 test_vector_uint(uint16_t4 p0)
+{
+    return asuint16(p0);
+}
+
+//CHECK-LABEL: define {{.*}}fn
+//CHECK-SAME: {{.*}}(<4 x half> {{.*}} [[VAL:%.*]]){{.*}}
+//CHECK: [[RES:%.*]] = bitcast <4 x half> [[VAL]] to <4 x i16>
+//CHECK-NEXT: ret <4 x i16> [[RES]]
+uint16_t4 fn(half4 p1)
+{
+    return asuint16(p1);
+}
+
diff --git a/clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl b/clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl
index 5ab1f80e1bfc..43b6e78a09f8 100644
--- a/clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl
@@ -1,123 +1,123 @@
-// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK

-

-// CHECK-LABEL: test_atan2_double

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32

-float test_atan2_double (double p0, double p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_double2

-// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32

-float2 test_atan2_double2 (double2 p0, double2 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_double3

-// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32

-float3 test_atan2_double3 (double3 p0, double3 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_double4

-// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32

-float4 test_atan2_double4 (double4 p0, double4 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32

-float test_atan2_int (int p0, int p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int2

-// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32

-float2 test_atan2_int2 (int2 p0, int2 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int3

-// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32

-float3 test_atan2_int3 (int3 p0, int3 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int4

-// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32

-float4 test_atan2_int4 (int4 p0, int4 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32

-float test_atan2_uint (uint p0, uint p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint2

-// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32

-float2 test_atan2_uint2 (uint2 p0, uint2 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint3

-// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32

-float3 test_atan2_uint3 (uint3 p0, uint3 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint4

-// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32

-float4 test_atan2_uint4 (uint4 p0, uint4 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int64_t

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32

-float test_atan2_int64_t (int64_t p0, int64_t p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int64_t2

-// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32

-float2 test_atan2_int64_t2 (int64_t2 p0, int64_t2 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int64_t3

-// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32

-float3 test_atan2_int64_t3 (int64_t3 p0, int64_t3 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_int64_t4

-// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32

-float4 test_atan2_int64_t4 (int64_t4 p0, int64_t4 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint64_t

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32

-float test_atan2_uint64_t (uint64_t p0, uint64_t p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint64_t2

-// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32

-float2 test_atan2_uint64_t2 (uint64_t2 p0, uint64_t2 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint64_t3

-// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32

-float3 test_atan2_uint64_t3 (uint64_t3 p0, uint64_t3 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_uint64_t4

-// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32

-float4 test_atan2_uint64_t4 (uint64_t4 p0, uint64_t4 p1) {

-  return atan2(p0, p1);

-}

+// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK
+
+// CHECK-LABEL: test_atan2_double
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32
+float test_atan2_double (double p0, double p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_double2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32
+float2 test_atan2_double2 (double2 p0, double2 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_double3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32
+float3 test_atan2_double3 (double3 p0, double3 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_double4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32
+float4 test_atan2_double4 (double4 p0, double4 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32
+float test_atan2_int (int p0, int p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32
+float2 test_atan2_int2 (int2 p0, int2 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32
+float3 test_atan2_int3 (int3 p0, int3 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32
+float4 test_atan2_int4 (int4 p0, int4 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32
+float test_atan2_uint (uint p0, uint p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32
+float2 test_atan2_uint2 (uint2 p0, uint2 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32
+float3 test_atan2_uint3 (uint3 p0, uint3 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32
+float4 test_atan2_uint4 (uint4 p0, uint4 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int64_t
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32
+float test_atan2_int64_t (int64_t p0, int64_t p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int64_t2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32
+float2 test_atan2_int64_t2 (int64_t2 p0, int64_t2 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int64_t3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32
+float3 test_atan2_int64_t3 (int64_t3 p0, int64_t3 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_int64_t4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32
+float4 test_atan2_int64_t4 (int64_t4 p0, int64_t4 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint64_t
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32
+float test_atan2_uint64_t (uint64_t p0, uint64_t p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint64_t2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32
+float2 test_atan2_uint64_t2 (uint64_t2 p0, uint64_t2 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint64_t3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32
+float3 test_atan2_uint64_t3 (uint64_t3 p0, uint64_t3 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_uint64_t4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32
+float4 test_atan2_uint64_t4 (uint64_t4 p0, uint64_t4 p1) {
+  return atan2(p0, p1);
+}
diff --git a/clang/test/CodeGenHLSL/builtins/atan2.hlsl b/clang/test/CodeGenHLSL/builtins/atan2.hlsl
index 53d115641e72..6c93f57be6b3 100644
--- a/clang/test/CodeGenHLSL/builtins/atan2.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/atan2.hlsl
@@ -1,59 +1,59 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ 

-// RUN:   --check-prefixes=CHECK,NATIVE_HALF

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF

-

-// CHECK-LABEL: test_atan2_half

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.atan2.f16

-// NO_HALF: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32

-half test_atan2_half (half p0, half p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_half2

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.atan2.v2f16

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32

-half2 test_atan2_half2 (half2 p0, half2 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_half3

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.atan2.v3f16

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32

-half3 test_atan2_half3 (half3 p0, half3 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_half4

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.atan2.v4f16

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32

-half4 test_atan2_half4 (half4 p0, half4 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_float

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32

-float test_atan2_float (float p0, float p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_float2

-// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32

-float2 test_atan2_float2 (float2 p0, float2 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_float3

-// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32

-float3 test_atan2_float3 (float3 p0, float3 p1) {

-  return atan2(p0, p1);

-}

-

-// CHECK-LABEL: test_atan2_float4

-// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32

-float4 test_atan2_float4 (float4 p0, float4 p1) {

-  return atan2(p0, p1);

-}

+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ 
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+
+// CHECK-LABEL: test_atan2_half
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.atan2.f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32
+half test_atan2_half (half p0, half p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_half2
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.atan2.v2f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32
+half2 test_atan2_half2 (half2 p0, half2 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_half3
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.atan2.v3f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32
+half3 test_atan2_half3 (half3 p0, half3 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_half4
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.atan2.v4f16
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32
+half4 test_atan2_half4 (half4 p0, half4 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_float
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.atan2.f32
+float test_atan2_float (float p0, float p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_float2
+// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.atan2.v2f32
+float2 test_atan2_float2 (float2 p0, float2 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_float3
+// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.atan2.v3f32
+float3 test_atan2_float3 (float3 p0, float3 p1) {
+  return atan2(p0, p1);
+}
+
+// CHECK-LABEL: test_atan2_float4
+// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.atan2.v4f32
+float4 test_atan2_float4 (float4 p0, float4 p1) {
+  return atan2(p0, p1);
+}
diff --git a/clang/test/CodeGenHLSL/builtins/cross.hlsl b/clang/test/CodeGenHLSL/builtins/cross.hlsl
index 89ac383e2517..873cb6db3042 100644
--- a/clang/test/CodeGenHLSL/builtins/cross.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/cross.hlsl
@@ -1,37 +1,37 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \

-// RUN:   --check-prefixes=CHECK,NATIVE_HALF \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \

-// RUN:   --check-prefixes=CHECK,NATIVE_HALF \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-

-// NATIVE_HALF: define [[FNATTRS]] <3 x half> @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.[[TARGET]].cross.v3f16(<3 x half>

-// NATIVE_HALF: ret <3 x half> %hlsl.cross

-// NO_HALF: define [[FNATTRS]] <3 x float> @

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].cross.v3f32(<3 x float>

-// NO_HALF: ret <3 x float> %hlsl.cross

-half3 test_cross_half3(half3 p0, half3 p1)

-{

-    return cross(p0, p1);

-}

-

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.cross = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].cross.v3f32(

-// CHECK: ret <3 x float> %hlsl.cross

-float3 test_cross_float3(float3 p0, float3 p1)

-{

-    return cross(p0, p1);

-}

+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+
+// NATIVE_HALF: define [[FNATTRS]] <3 x half> @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.[[TARGET]].cross.v3f16(<3 x half>
+// NATIVE_HALF: ret <3 x half> %hlsl.cross
+// NO_HALF: define [[FNATTRS]] <3 x float> @
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].cross.v3f32(<3 x float>
+// NO_HALF: ret <3 x float> %hlsl.cross
+half3 test_cross_half3(half3 p0, half3 p1)
+{
+    return cross(p0, p1);
+}
+
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.cross = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].cross.v3f32(
+// CHECK: ret <3 x float> %hlsl.cross
+float3 test_cross_float3(float3 p0, float3 p1)
+{
+    return cross(p0, p1);
+}
diff --git a/clang/test/CodeGenHLSL/builtins/dot2add.hlsl b/clang/test/CodeGenHLSL/builtins/dot2add.hlsl
index 7c3a48e47630..e80ffba2bcfd 100644
--- a/clang/test/CodeGenHLSL/builtins/dot2add.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/dot2add.hlsl
@@ -1,175 +1,175 @@
-// RUN: %clang_cc1 -finclude-default-header -fnative-half-type -triple \

-// RUN:   dxil-pc-shadermodel6.4-compute %s -emit-llvm -o - | \

-// RUN:   FileCheck %s --check-prefixes=CHECK,CHECK-DXIL

-// RUN: %clang_cc1 -finclude-default-header -fnative-half-type -triple \

-// RUN:   spirv-pc-vulkan-compute %s -emit-llvm -o - | \

-// RUN:   FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV

-

-// Test basic lowering to runtime function call.

-

-// CHECK-LABEL: define {{.*}}test_default_parameter_type

-float test_default_parameter_type(half2 p1, half2 p2, float p3) {

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_float_arg2_type

-float test_float_arg2_type(half2 p1, float2 p2, float p3) {

-  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_float_arg1_type

-float test_float_arg1_type(float2 p1, half2 p2, float p3) {

-  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_double_arg3_type

-float test_double_arg3_type(half2 p1, half2 p2, double p3) {

-  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn double %{{.*}} to float

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_float_arg1_arg2_type

-float test_float_arg1_arg2_type(float2 p1, float2 p2, float p3) {

-  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>

-  // CHECK:  %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_double_arg1_arg2_type

-float test_double_arg1_arg2_type(double2 p1, double2 p2, float p3) {

-  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %{{.*}} to <2 x half>

-  // CHECK:  %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %{{.*}} to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_int16_arg1_arg2_type

-float test_int16_arg1_arg2_type(int16_t2 p1, int16_t2 p2, float p3) {

-  // CHECK:  %conv = sitofp <2 x i16> %{{.*}} to <2 x half>

-  // CHECK:  %conv1 = sitofp <2 x i16> %{{.*}} to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_int32_arg1_arg2_type

-float test_int32_arg1_arg2_type(int32_t2 p1, int32_t2 p2, float p3) {

-  // CHECK:  %conv = sitofp <2 x i32> %{{.*}} to <2 x half>

-  // CHECK:  %conv1 = sitofp <2 x i32> %{{.*}} to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_int64_arg1_arg2_type

-float test_int64_arg1_arg2_type(int64_t2 p1, int64_t2 p2, float p3) {

-  // CHECK:  %conv = sitofp <2 x i64> %{{.*}} to <2 x half>

-  // CHECK:  %conv1 = sitofp <2 x i64> %{{.*}} to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

-

-// CHECK-LABEL: define {{.*}}test_bool_arg1_arg2_type

-float test_bool_arg1_arg2_type(bool2 p1, bool2 p2, float p3) {

-  // CHECK:  %loadedv = trunc <2 x i32> %{{.*}} to <2 x i1>

-  // CHECK:  %conv = uitofp <2 x i1> %loadedv to <2 x half>

-  // CHECK:  %loadedv1 = trunc <2 x i32> %{{.*}} to <2 x i1>

-  // CHECK:  %conv2 = uitofp <2 x i1> %loadedv1 to <2 x half>

-  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})

-  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float

-  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4

-  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]

-  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0

-  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1

-  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])

-  // CHECK:  ret float %[[RES]]

-  return dot2add(p1, p2, p3);

-}

+// RUN: %clang_cc1 -finclude-default-header -fnative-half-type -triple \
+// RUN:   dxil-pc-shadermodel6.4-compute %s -emit-llvm -o - | \
+// RUN:   FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
+// RUN: %clang_cc1 -finclude-default-header -fnative-half-type -triple \
+// RUN:   spirv-pc-vulkan-compute %s -emit-llvm -o - | \
+// RUN:   FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
+
+// Test basic lowering to runtime function call.
+
+// CHECK-LABEL: define {{.*}}test_default_parameter_type
+float test_default_parameter_type(half2 p1, half2 p2, float p3) {
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_float_arg2_type
+float test_float_arg2_type(half2 p1, float2 p2, float p3) {
+  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_float_arg1_type
+float test_float_arg1_type(float2 p1, half2 p2, float p3) {
+  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_double_arg3_type
+float test_double_arg3_type(half2 p1, half2 p2, double p3) {
+  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn double %{{.*}} to float
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_float_arg1_arg2_type
+float test_float_arg1_arg2_type(float2 p1, float2 p2, float p3) {
+  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>
+  // CHECK:  %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %{{.*}} to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_double_arg1_arg2_type
+float test_double_arg1_arg2_type(double2 p1, double2 p2, float p3) {
+  // CHECK:  %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %{{.*}} to <2 x half>
+  // CHECK:  %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %{{.*}} to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_int16_arg1_arg2_type
+float test_int16_arg1_arg2_type(int16_t2 p1, int16_t2 p2, float p3) {
+  // CHECK:  %conv = sitofp <2 x i16> %{{.*}} to <2 x half>
+  // CHECK:  %conv1 = sitofp <2 x i16> %{{.*}} to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_int32_arg1_arg2_type
+float test_int32_arg1_arg2_type(int32_t2 p1, int32_t2 p2, float p3) {
+  // CHECK:  %conv = sitofp <2 x i32> %{{.*}} to <2 x half>
+  // CHECK:  %conv1 = sitofp <2 x i32> %{{.*}} to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_int64_arg1_arg2_type
+float test_int64_arg1_arg2_type(int64_t2 p1, int64_t2 p2, float p3) {
+  // CHECK:  %conv = sitofp <2 x i64> %{{.*}} to <2 x half>
+  // CHECK:  %conv1 = sitofp <2 x i64> %{{.*}} to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
+
+// CHECK-LABEL: define {{.*}}test_bool_arg1_arg2_type
+float test_bool_arg1_arg2_type(bool2 p1, bool2 p2, float p3) {
+  // CHECK:  %loadedv = trunc <2 x i32> %{{.*}} to <2 x i1>
+  // CHECK:  %conv = uitofp <2 x i1> %loadedv to <2 x half>
+  // CHECK:  %loadedv1 = trunc <2 x i32> %{{.*}} to <2 x i1>
+  // CHECK:  %conv2 = uitofp <2 x i1> %loadedv1 to <2 x half>
+  // CHECK-SPIRV:  %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
+  // CHECK-SPIRV:  %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
+  // CHECK-SPIRV:  %[[C:.*]] = load float, ptr %c.addr.i, align 4
+  // CHECK-SPIRV:  %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
+  // CHECK-DXIL:  %[[AX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[AY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[BX:.*]] = extractelement <2 x half> %{{.*}}, i32 0
+  // CHECK-DXIL:  %[[BY:.*]] = extractelement <2 x half> %{{.*}}, i32 1
+  // CHECK-DXIL:  %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add(float %{{.*}}, half %[[AX]], half %[[AY]], half %[[BX]], half %[[BY]])
+  // CHECK:  ret float %[[RES]]
+  return dot2add(p1, p2, p3);
+}
diff --git a/clang/test/CodeGenHLSL/builtins/dst.hlsl b/clang/test/CodeGenHLSL/builtins/dst.hlsl
index 3d4e90969f10..a0840c66e5da 100644
--- a/clang/test/CodeGenHLSL/builtins/dst.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/dst.hlsl
@@ -1,51 +1,51 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -o - | FileCheck %s

-

-

-// CHECK-LABEL: define {{.*}} <4 x float> @{{[A-Za-z1-9_]+}}dst_impl{{[A-Za-z1-9_]*}}(

-// CHECK-SAME: <4 x float> {{[A-Za-z )(]*}} [[P:%.*]], <4 x float> {{[A-Za-z )(]*}} [[Q:%.*]]) #[[ATTR0:[0-9]+]] { 

-// CHECK: [[VECEXT:%.*]] = extractelement <4 x float> [[PADDR:%.*]], i32 1

-// CHECK: [[VECEXT1:%.*]] = extractelement <4 x float> [[QADDR:%.*]], i32 1

-// CHECK: [[MULRES:%.*]] = fmul {{[A-Za-z ]*}} float [[VECEXT]], [[VECEXT1]]

-// CHECK: [[VECINIT:%.*]] = insertelement <4 x float> <float 1.000000e+00, float poison, float poison, float poison>, float [[MULRES]], i32 1

-// CHECK: [[VECINIT2:%.*]] = extractelement <4 x float> [[PADDR2:%.*]], i32 2

-// CHECK: [[VECINIT3:%.*]] = insertelement <4 x float> [[VECINIT]], float [[VECINIT2]], i32 2

-// CHECK: [[VECINIT4:%.*]] = extractelement <4 x float> [[QADDR3:%.*]], i32 3

-// CHECK: [[VECINIT5:%.*]] = insertelement <4 x float> [[VECINIT3]], float [[VECINIT4]], i32 3

-// CHECK-NEXT: ret <4 x float> [[VECINIT5]]

-float4 dstWithFloat(float4 p1, float4 p2)

-{

-    return dst(p1, p2);

-}

-

-// CHECK-LABEL: define {{.*}} <4 x half> @{{[A-Za-z1-9_]+}}dst_impl{{[A-Za-z1-9_]*}}(

-// CHECK-SAME: <4 x half> {{[A-Za-z )(]*}} [[P:%.*]], <4 x half> {{[A-Za-z )(]*}} [[Q:%.*]]) #[[ATTR0]] {

-// CHECK: [[VECEXT:%.*]] = extractelement <4 x half> [[PADDR:%.*]], i32 1

-// CHECK: [[VECEXT1:%.*]] = extractelement <4 x half> [[QADDR:%.*]], i32 1

-// CHECK: [[MULRES:%.*]] = fmul {{[A-Za-z ]*}} half [[VECEXT]], [[VECEXT1]]

-// CHECK: [[VECINIT:%.*]] = insertelement <4 x half> <half 0xH3C00, half poison, half poison, half poison>, half [[MULRES]], i32 1

-// CHECK: [[VECINIT2:%.*]] = extractelement <4 x half> [[PADDR2:%.*]], i32 2

-// CHECK: [[VECINIT3:%.*]] = insertelement <4 x half> [[VECINIT]], half [[VECINIT2]], i32 2

-// CHECK: [[VECINIT4:%.*]] = extractelement <4 x half> [[QADDR3:%.*]], i32 3

-// CHECK: [[VECINIT5:%.*]] = insertelement <4 x half> [[VECINIT3]], half [[VECINIT4]], i32 3

-// CHECK-NEXT: ret <4 x half> [[VECINIT5]]

-half4 dstwithHalf(half4 p1, half4 p2)

-{

-    return dst(p1, p2);

-}

-

-// CHECK-LABEL: define {{.*}} <4 x double> @{{[A-Za-z1-9_]+}}dst_impl{{[A-Za-z1-9_]*}}(

-// CHECK-SAME: <4 x double> {{[A-Za-z )(]*}} [[P:%.*]], <4 x double> {{[A-Za-z )(]*}} [[Q:%.*]]) #[[ATTR0:[0-9]+]] {

-// CHECK: [[VECEXT:%.*]] = extractelement <4 x double> [[PADDR:%.*]], i32 1

-// CHECK: [[VECEXT1:%.*]] = extractelement <4 x double> [[QADDR:%.*]], i32 1

-// CHECK: [[MULRES:%.*]] = fmul {{[A-Za-z ]*}} double [[VECEXT]], [[VECEXT1]]

-// CHECK: [[VECINIT:%.*]] = insertelement <4 x double> <double 1.000000e+00, double poison, double poison, double poison>, double [[MULRES]], i32 1

-// CHECK: [[VECINIT2:%.*]] = extractelement <4 x double> [[PADDR2:%.*]], i32 2

-// CHECK: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT]], double [[VECINIT2]], i32 2

-// CHECK: [[VECINIT4:%.*]] = extractelement <4 x double> [[QADDR3:%.*]], i32 3

-// CHECK: [[VECINIT5:%.*]] = insertelement <4 x double> [[VECINIT3]], double [[VECINIT4]], i32 3

-// CHECK-NEXT: ret <4 x double> [[VECINIT5]]

-double4 dstWithDouble(double4 p1, double4 p2)

-{

-    return dst(p1, p2);

-}

-

+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -o - | FileCheck %s
+
+
+// CHECK-LABEL: define {{.*}} <4 x float> @{{[A-Za-z1-9_]+}}dst_impl{{[A-Za-z1-9_]*}}(
+// CHECK-SAME: <4 x float> {{[A-Za-z )(]*}} [[P:%.*]], <4 x float> {{[A-Za-z )(]*}} [[Q:%.*]]) #[[ATTR0:[0-9]+]] { 
+// CHECK: [[VECEXT:%.*]] = extractelement <4 x float> [[PADDR:%.*]], i32 1
+// CHECK: [[VECEXT1:%.*]] = extractelement <4 x float> [[QADDR:%.*]], i32 1
+// CHECK: [[MULRES:%.*]] = fmul {{[A-Za-z ]*}} float [[VECEXT]], [[VECEXT1]]
+// CHECK: [[VECINIT:%.*]] = insertelement <4 x float> <float 1.000000e+00, float poison, float poison, float poison>, float [[MULRES]], i32 1
+// CHECK: [[VECINIT2:%.*]] = extractelement <4 x float> [[PADDR2:%.*]], i32 2
+// CHECK: [[VECINIT3:%.*]] = insertelement <4 x float> [[VECINIT]], float [[VECINIT2]], i32 2
+// CHECK: [[VECINIT4:%.*]] = extractelement <4 x float> [[QADDR3:%.*]], i32 3
+// CHECK: [[VECINIT5:%.*]] = insertelement <4 x float> [[VECINIT3]], float [[VECINIT4]], i32 3
+// CHECK-NEXT: ret <4 x float> [[VECINIT5]]
+float4 dstWithFloat(float4 p1, float4 p2)
+{
+    return dst(p1, p2);
+}
+
+// CHECK-LABEL: define {{.*}} <4 x half> @{{[A-Za-z1-9_]+}}dst_impl{{[A-Za-z1-9_]*}}(
+// CHECK-SAME: <4 x half> {{[A-Za-z )(]*}} [[P:%.*]], <4 x half> {{[A-Za-z )(]*}} [[Q:%.*]]) #[[ATTR0]] {
+// CHECK: [[VECEXT:%.*]] = extractelement <4 x half> [[PADDR:%.*]], i32 1
+// CHECK: [[VECEXT1:%.*]] = extractelement <4 x half> [[QADDR:%.*]], i32 1
+// CHECK: [[MULRES:%.*]] = fmul {{[A-Za-z ]*}} half [[VECEXT]], [[VECEXT1]]
+// CHECK: [[VECINIT:%.*]] = insertelement <4 x half> <half 0xH3C00, half poison, half poison, half poison>, half [[MULRES]], i32 1
+// CHECK: [[VECINIT2:%.*]] = extractelement <4 x half> [[PADDR2:%.*]], i32 2
+// CHECK: [[VECINIT3:%.*]] = insertelement <4 x half> [[VECINIT]], half [[VECINIT2]], i32 2
+// CHECK: [[VECINIT4:%.*]] = extractelement <4 x half> [[QADDR3:%.*]], i32 3
+// CHECK: [[VECINIT5:%.*]] = insertelement <4 x half> [[VECINIT3]], half [[VECINIT4]], i32 3
+// CHECK-NEXT: ret <4 x half> [[VECINIT5]]
+half4 dstwithHalf(half4 p1, half4 p2)
+{
+    return dst(p1, p2);
+}
+
+// CHECK-LABEL: define {{.*}} <4 x double> @{{[A-Za-z1-9_]+}}dst_impl{{[A-Za-z1-9_]*}}(
+// CHECK-SAME: <4 x double> {{[A-Za-z )(]*}} [[P:%.*]], <4 x double> {{[A-Za-z )(]*}} [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK: [[VECEXT:%.*]] = extractelement <4 x double> [[PADDR:%.*]], i32 1
+// CHECK: [[VECEXT1:%.*]] = extractelement <4 x double> [[QADDR:%.*]], i32 1
+// CHECK: [[MULRES:%.*]] = fmul {{[A-Za-z ]*}} double [[VECEXT]], [[VECEXT1]]
+// CHECK: [[VECINIT:%.*]] = insertelement <4 x double> <double 1.000000e+00, double poison, double poison, double poison>, double [[MULRES]], i32 1
+// CHECK: [[VECINIT2:%.*]] = extractelement <4 x double> [[PADDR2:%.*]], i32 2
+// CHECK: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT]], double [[VECINIT2]], i32 2
+// CHECK: [[VECINIT4:%.*]] = extractelement <4 x double> [[QADDR3:%.*]], i32 3
+// CHECK: [[VECINIT5:%.*]] = insertelement <4 x double> [[VECINIT3]], double [[VECINIT4]], i32 3
+// CHECK-NEXT: ret <4 x double> [[VECINIT5]]
+double4 dstWithDouble(double4 p1, double4 p2)
+{
+    return dst(p1, p2);
+}
+
diff --git a/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl b/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
index 24114b11c760..116de8eb857a 100644
--- a/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
@@ -2,28 +2,33 @@
 
 using handle_float_t = __hlsl_resource_t [[hlsl::resource_class(UAV)]] [[hlsl::contained_type(float)]];
 
+struct CustomResource {
+  handle_float_t h;
+};
+
+// CHECK: %struct.CustomResource = type { target("dx.TypedBuffer", float, 1, 0, 0) }
 // CHECK: %"class.hlsl::RWBuffer" = type { target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
 // CHECK: %"class.hlsl::StructuredBuffer" = type { target("dx.RawBuffer", %struct.MyStruct, 0, 0)
 // CHECK: %struct.MyStruct = type <{ <4 x float>, <2 x i32> }>
 
-// CHECK: define hidden void @_Z2faU9_Res_u_CTfu17__hlsl_resource_t(target("dx.TypedBuffer", float, 1, 0, 0) %a)
-// CHECK: call void @_Z4foo1U9_Res_u_CTfu17__hlsl_resource_t(target("dx.TypedBuffer", float, 1, 0, 0) %0)
-// CHECK: declare hidden void @_Z4foo1U9_Res_u_CTfu17__hlsl_resource_t(target("dx.TypedBuffer", float, 1, 0, 0))
+// CHECK: define hidden void @_Z2fa14CustomResource(ptr noundef byval(%struct.CustomResource) align 1 %a)
+// CHECK: call void @_Z4foo114CustomResource(ptr noundef byval(%struct.CustomResource) align 1 %agg.tmp)
+// CHECK: declare hidden void @_Z4foo114CustomResource(ptr noundef byval(%struct.CustomResource) align 1)
 
-void foo1(handle_float_t res);
+void foo1(CustomResource res);
 
-void fa(handle_float_t a) {
+void fa(CustomResource a) {
     foo1(a);
 }
 
-// CHECK: define hidden void @_Z2fbU9_Res_u_CTfu17__hlsl_resource_t(target("dx.TypedBuffer", float, 1, 0, 0) %a)
-void fb(handle_float_t a) {
-    handle_float_t b = a;
+// CHECK: define hidden void @_Z2fb14CustomResource(ptr noundef byval(%struct.CustomResource) align 1 %a)
+void fb(CustomResource a) {
+    CustomResource b = a;
 }
 
-// CHECK: define hidden void @_Z2fcN4hlsl8RWBufferIDv4_fEE(ptr noundef byval(%"class.hlsl::RWBuffer") align 4 %a)
-// CHECK: call void @_Z4foo2N4hlsl8RWBufferIDv4_fEE(ptr noundef byval(%"class.hlsl::RWBuffer") align 4 %agg.tmp)
-// CHECK: declare hidden void @_Z4foo2N4hlsl8RWBufferIDv4_fEE(ptr noundef byval(%"class.hlsl::RWBuffer") align 4)
+// CHECK: define hidden void @_Z2fcN4hlsl8RWBufferIDv4_fEE(ptr dead_on_return noundef %a)
+// CHECK: call void @_Z4foo2N4hlsl8RWBufferIDv4_fEE(ptr dead_on_return noundef %{{.*}})
+// CHECK: declare hidden void @_Z4foo2N4hlsl8RWBufferIDv4_fEE(ptr dead_on_return noundef)
 void foo2(RWBuffer<float4> buf);
 
 void fc(RWBuffer<float4> a) {
@@ -39,9 +44,9 @@ struct MyStruct {
   int2 i;
 };
 
-// CHECK: define hidden void @_Z2feN4hlsl16StructuredBufferI8MyStructEE(ptr noundef byval(%"class.hlsl::StructuredBuffer") align 4 %a)
-// CHECK: call void @_Z4foo3N4hlsl16StructuredBufferI8MyStructEE(ptr noundef byval(%"class.hlsl::StructuredBuffer") align 4 %agg.tmp)
-// CHECK: declare hidden void @_Z4foo3N4hlsl16StructuredBufferI8MyStructEE(ptr noundef byval(%"class.hlsl::StructuredBuffer") align 4)
+// CHECK: define hidden void @_Z2feN4hlsl16StructuredBufferI8MyStructEE(ptr dead_on_return noundef %a)
+// CHECK: call void @_Z4foo3N4hlsl16StructuredBufferI8MyStructEE(ptr dead_on_return noundef %{{.*}})
+// CHECK: declare hidden void @_Z4foo3N4hlsl16StructuredBufferI8MyStructEE(ptr dead_on_return noundef)
 void foo3(StructuredBuffer<MyStruct> buf);
 
 void fe(StructuredBuffer<MyStruct> a) {
diff --git a/clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl b/clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
index f39cba9ace6e..cfc0ed4c7f7c 100644
--- a/clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
@@ -3,18 +3,18 @@
 // RUN:   -o - | FileCheck %s
 
 // CHECK: define hidden noundef i1 @
-// CHECK: %dx.isinf = call i1 @llvm.dx.isinf.f32(
-// CHECK: ret i1 %dx.isinf
+// CHECK: %hlsl.isinf = call i1 @llvm.dx.isinf.f32(
+// CHECK: ret i1 %hlsl.isinf
 bool test_isinf_double(double p0) { return isinf(p0); }
 // CHECK: define hidden noundef <2 x i1> @
-// CHECK: %dx.isinf = call <2 x i1> @llvm.dx.isinf.v2f32
-// CHECK: ret <2 x i1> %dx.isinf
+// CHECK: %hlsl.isinf = call <2 x i1> @llvm.dx.isinf.v2f32
+// CHECK: ret <2 x i1> %hlsl.isinf
 bool2 test_isinf_double2(double2 p0) { return isinf(p0); }
 // CHECK: define hidden noundef <3 x i1> @
-// CHECK: %dx.isinf = call <3 x i1> @llvm.dx.isinf.v3f32
-// CHECK: ret <3 x i1> %dx.isinf
+// CHECK: %hlsl.isinf = call <3 x i1> @llvm.dx.isinf.v3f32
+// CHECK: ret <3 x i1> %hlsl.isinf
 bool3 test_isinf_double3(double3 p0) { return isinf(p0); }
 // CHECK: define hidden noundef <4 x i1> @
-// CHECK: %dx.isinf = call <4 x i1> @llvm.dx.isinf.v4f32
-// CHECK: ret <4 x i1> %dx.isinf
+// CHECK: %hlsl.isinf = call <4 x i1> @llvm.dx.isinf.v4f32
+// CHECK: ret <4 x i1> %hlsl.isinf
 bool4 test_isinf_double4(double4 p0) { return isinf(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/isinf.hlsl b/clang/test/CodeGenHLSL/builtins/isinf.hlsl
index 4d53daaafb69..dc869a64a65b 100644
--- a/clang/test/CodeGenHLSL/builtins/isinf.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/isinf.hlsl
@@ -1,45 +1,62 @@
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ 
-// RUN:   --check-prefixes=CHECK,NATIVE_HALF
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,DXCHECK,NATIVE_HALF
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,DXCHECK,NO_HALF
 
-// CHECK: define hidden noundef i1 @
-// NATIVE_HALF: %dx.isinf = call i1 @llvm.dx.isinf.f16(
-// NO_HALF: %dx.isinf = call i1 @llvm.dx.isinf.f32(
-// CHECK: ret i1 %dx.isinf
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,SPVCHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,SPVCHECK,NO_HALF
+
+// DXCHECK: define hidden [[FN_TYPE:]]noundef i1 @
+// SPVCHECK: define hidden [[FN_TYPE:spir_func ]]noundef i1 @
+// DXCHECK: %hlsl.isinf = call i1 @llvm.[[ICF:dx]].isinf.f32(
+// SPVCHECK: %hlsl.isinf = call i1 @llvm.[[ICF:spv]].isinf.f32(
+// CHECK: ret i1 %hlsl.isinf
+bool test_isinf_float(float p0) { return isinf(p0); }
+
+// CHECK: define hidden [[FN_TYPE]]noundef i1 @
+// NATIVE_HALF: %hlsl.isinf = call i1 @llvm.[[ICF]].isinf.f16(
+// NO_HALF: %hlsl.isinf = call i1 @llvm.[[ICF]].isinf.f32(
+// CHECK: ret i1 %hlsl.isinf
 bool test_isinf_half(half p0) { return isinf(p0); }
-// CHECK: define hidden noundef <2 x i1> @
-// NATIVE_HALF: %dx.isinf = call <2 x i1> @llvm.dx.isinf.v2f16
-// NO_HALF: %dx.isinf = call <2 x i1> @llvm.dx.isinf.v2f32(
-// CHECK: ret <2 x i1> %dx.isinf
+
+// CHECK: define hidden [[FN_TYPE]]noundef <2 x i1> @
+// NATIVE_HALF: %hlsl.isinf = call <2 x i1> @llvm.[[ICF]].isinf.v2f16
+// NO_HALF: %hlsl.isinf = call <2 x i1> @llvm.[[ICF]].isinf.v2f32(
+// CHECK: ret <2 x i1> %hlsl.isinf
 bool2 test_isinf_half2(half2 p0) { return isinf(p0); }
-// NATIVE_HALF: define hidden noundef <3 x i1> @
-// NATIVE_HALF: %dx.isinf = call <3 x i1> @llvm.dx.isinf.v3f16
-// NO_HALF: %dx.isinf = call <3 x i1> @llvm.dx.isinf.v3f32(
-// CHECK: ret <3 x i1> %dx.isinf
+
+// NATIVE_HALF: define hidden [[FN_TYPE]]noundef <3 x i1> @
+// NATIVE_HALF: %hlsl.isinf = call <3 x i1> @llvm.[[ICF]].isinf.v3f16
+// NO_HALF: %hlsl.isinf = call <3 x i1> @llvm.[[ICF]].isinf.v3f32(
+// CHECK: ret <3 x i1> %hlsl.isinf
 bool3 test_isinf_half3(half3 p0) { return isinf(p0); }
-// NATIVE_HALF: define hidden noundef <4 x i1> @
-// NATIVE_HALF: %dx.isinf = call <4 x i1> @llvm.dx.isinf.v4f16
-// NO_HALF: %dx.isinf = call <4 x i1> @llvm.dx.isinf.v4f32(
-// CHECK: ret <4 x i1> %dx.isinf
+
+// NATIVE_HALF: define hidden [[FN_TYPE]]noundef <4 x i1> @
+// NATIVE_HALF: %hlsl.isinf = call <4 x i1> @llvm.[[ICF]].isinf.v4f16
+// NO_HALF: %hlsl.isinf = call <4 x i1> @llvm.[[ICF]].isinf.v4f32(
+// CHECK: ret <4 x i1> %hlsl.isinf
 bool4 test_isinf_half4(half4 p0) { return isinf(p0); }
 
-// CHECK: define hidden noundef i1 @
-// CHECK: %dx.isinf = call i1 @llvm.dx.isinf.f32(
-// CHECK: ret i1 %dx.isinf
-bool test_isinf_float(float p0) { return isinf(p0); }
-// CHECK: define hidden noundef <2 x i1> @
-// CHECK: %dx.isinf = call <2 x i1> @llvm.dx.isinf.v2f32
-// CHECK: ret <2 x i1> %dx.isinf
+
+// CHECK: define hidden [[FN_TYPE]]noundef <2 x i1> @
+// CHECK: %hlsl.isinf = call <2 x i1> @llvm.[[ICF]].isinf.v2f32
+// CHECK: ret <2 x i1> %hlsl.isinf
 bool2 test_isinf_float2(float2 p0) { return isinf(p0); }
-// CHECK: define hidden noundef <3 x i1> @
-// CHECK: %dx.isinf = call <3 x i1> @llvm.dx.isinf.v3f32
-// CHECK: ret <3 x i1> %dx.isinf
+
+// CHECK: define hidden [[FN_TYPE]]noundef <3 x i1> @
+// CHECK: %hlsl.isinf = call <3 x i1> @llvm.[[ICF]].isinf.v3f32
+// CHECK: ret <3 x i1> %hlsl.isinf
 bool3 test_isinf_float3(float3 p0) { return isinf(p0); }
-// CHECK: define hidden noundef <4 x i1> @
-// CHECK: %dx.isinf = call <4 x i1> @llvm.dx.isinf.v4f32
-// CHECK: ret <4 x i1> %dx.isinf
+
+// CHECK: define hidden [[FN_TYPE]]noundef <4 x i1> @
+// CHECK: %hlsl.isinf = call <4 x i1> @llvm.[[ICF]].isinf.v4f32
+// CHECK: ret <4 x i1> %hlsl.isinf
 bool4 test_isinf_float4(float4 p0) { return isinf(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl b/clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
index 52ff7da94c4f..adaf69d99407 100644
--- a/clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
@@ -1,156 +1,156 @@
-// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float

-// CHECK: ret float

-float test_normalize_double(double p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>

-// CHECK: ret <2 x float> %hlsl.normalize

-float2 test_normalize_double2(double2 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(

-// CHECK: ret <3 x float> %hlsl.normalize

-float3 test_normalize_double3(double3 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(

-// CHECK: ret <4 x float> %hlsl.normalize

-float4 test_length_double4(double4 p0)

-{

-    return normalize(p0);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float

-// CHECK: ret float

-float test_normalize_int(int p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>

-// CHECK: ret <2 x float> %hlsl.normalize

-float2 test_normalize_int2(int2 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(

-// CHECK: ret <3 x float> %hlsl.normalize

-float3 test_normalize_int3(int3 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(

-// CHECK: ret <4 x float> %hlsl.normalize

-float4 test_length_int4(int4 p0)

-{

-    return normalize(p0);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float

-// CHECK: ret float

-float test_normalize_uint(uint p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>

-

-// CHECK: ret <2 x float> %hlsl.normalize

-float2 test_normalize_uint2(uint2 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(

-// CHECK: ret <3 x float> %hlsl.normalize

-float3 test_normalize_uint3(uint3 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(

-// CHECK: ret <4 x float> %hlsl.normalize

-float4 test_length_uint4(uint4 p0)

-{

-    return normalize(p0);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float

-// CHECK: ret float

-float test_normalize_int64_t(int64_t p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>

-

-// CHECK: ret <2 x float> %hlsl.normalize

-float2 test_normalize_int64_t2(int64_t2 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(

-// CHECK: ret <3 x float> %hlsl.normalize

-float3 test_normalize_int64_t3(int64_t3 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(

-// CHECK: ret <4 x float> %hlsl.normalize

-float4 test_length_int64_t4(int64_t4 p0)

-{

-    return normalize(p0);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float

-// CHECK: ret float

-float test_normalize_uint64_t(uint64_t p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>

-

-// CHECK: ret <2 x float> %hlsl.normalize

-float2 test_normalize_uint64_t2(uint64_t2 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(

-// CHECK: ret <3 x float> %hlsl.normalize

-float3 test_normalize_uint64_t3(uint64_t3 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(

-// CHECK: ret <4 x float> %hlsl.normalize

-float4 test_length_uint64_t4(uint64_t4 p0)

-{

-    return normalize(p0);

-}

+// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float
+// CHECK: ret float
+float test_normalize_double(double p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
+// CHECK: ret <2 x float> %hlsl.normalize
+float2 test_normalize_double2(double2 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(
+// CHECK: ret <3 x float> %hlsl.normalize
+float3 test_normalize_double3(double3 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(
+// CHECK: ret <4 x float> %hlsl.normalize
+float4 test_length_double4(double4 p0)
+{
+    return normalize(p0);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float
+// CHECK: ret float
+float test_normalize_int(int p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
+// CHECK: ret <2 x float> %hlsl.normalize
+float2 test_normalize_int2(int2 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(
+// CHECK: ret <3 x float> %hlsl.normalize
+float3 test_normalize_int3(int3 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(
+// CHECK: ret <4 x float> %hlsl.normalize
+float4 test_length_int4(int4 p0)
+{
+    return normalize(p0);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float
+// CHECK: ret float
+float test_normalize_uint(uint p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
+
+// CHECK: ret <2 x float> %hlsl.normalize
+float2 test_normalize_uint2(uint2 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(
+// CHECK: ret <3 x float> %hlsl.normalize
+float3 test_normalize_uint3(uint3 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(
+// CHECK: ret <4 x float> %hlsl.normalize
+float4 test_length_uint4(uint4 p0)
+{
+    return normalize(p0);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float
+// CHECK: ret float
+float test_normalize_int64_t(int64_t p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
+
+// CHECK: ret <2 x float> %hlsl.normalize
+float2 test_normalize_int64_t2(int64_t2 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(
+// CHECK: ret <3 x float> %hlsl.normalize
+float3 test_normalize_int64_t3(int64_t3 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(
+// CHECK: ret <4 x float> %hlsl.normalize
+float4 test_length_int64_t4(int64_t4 p0)
+{
+    return normalize(p0);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float
+// CHECK: ret float
+float test_normalize_uint64_t(uint64_t p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
+
+// CHECK: ret <2 x float> %hlsl.normalize
+float2 test_normalize_uint64_t2(uint64_t2 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(
+// CHECK: ret <3 x float> %hlsl.normalize
+float3 test_normalize_uint64_t3(uint64_t3 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(
+// CHECK: ret <4 x float> %hlsl.normalize
+float4 test_length_uint64_t4(uint64_t4 p0)
+{
+    return normalize(p0);
+}
diff --git a/clang/test/CodeGenHLSL/builtins/normalize.hlsl b/clang/test/CodeGenHLSL/builtins/normalize.hlsl
index cc2378756a50..85937346ead6 100644
--- a/clang/test/CodeGenHLSL/builtins/normalize.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/normalize.hlsl
@@ -1,85 +1,85 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \

-// RUN:   --check-prefixes=CHECK,NATIVE_HALF \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \

-// RUN:   --check-prefixes=CHECK,NATIVE_HALF \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-

-// NATIVE_HALF: define [[FNATTRS]] half @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.[[TARGET]].normalize.f16(half

-// NO_HALF: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float

-// NATIVE_HALF: ret half

-// NO_HALF: ret float

-half test_normalize_half(half p0)

-{

-    return normalize(p0);

-}

-// NATIVE_HALF: define [[FNATTRS]] <2 x half> @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.[[TARGET]].normalize.v2f16(<2 x half>

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>

-// NATIVE_HALF: ret <2 x half> %hlsl.normalize

-// NO_HALF: ret <2 x float> %hlsl.normalize

-half2 test_normalize_half2(half2 p0)

-{

-    return normalize(p0);

-}

-// NATIVE_HALF: define [[FNATTRS]] <3 x half> @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.[[TARGET]].normalize.v3f16(<3 x half>

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(<3 x float>

-// NATIVE_HALF: ret <3 x half> %hlsl.normalize

-// NO_HALF: ret <3 x float> %hlsl.normalize

-half3 test_normalize_half3(half3 p0)

-{

-    return normalize(p0);

-}

-// NATIVE_HALF: define [[FNATTRS]] <4 x half> @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.[[TARGET]].normalize.v4f16(<4 x half>

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(<4 x float>

-// NATIVE_HALF: ret <4 x half> %hlsl.normalize

-// NO_HALF: ret <4 x float> %hlsl.normalize

-half4 test_normalize_half4(half4 p0)

-{

-    return normalize(p0);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float

-// CHECK: ret float

-float test_normalize_float(float p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>

-

-// CHECK: ret <2 x float> %hlsl.normalize

-float2 test_normalize_float2(float2 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(

-// CHECK: ret <3 x float> %hlsl.normalize

-float3 test_normalize_float3(float3 p0)

-{

-    return normalize(p0);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(

-// CHECK: ret <4 x float> %hlsl.normalize

-float4 test_length_float4(float4 p0)

-{

-    return normalize(p0);

-}

+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+
+// NATIVE_HALF: define [[FNATTRS]] half @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.[[TARGET]].normalize.f16(half
+// NO_HALF: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float
+// NATIVE_HALF: ret half
+// NO_HALF: ret float
+half test_normalize_half(half p0)
+{
+    return normalize(p0);
+}
+// NATIVE_HALF: define [[FNATTRS]] <2 x half> @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.[[TARGET]].normalize.v2f16(<2 x half>
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
+// NATIVE_HALF: ret <2 x half> %hlsl.normalize
+// NO_HALF: ret <2 x float> %hlsl.normalize
+half2 test_normalize_half2(half2 p0)
+{
+    return normalize(p0);
+}
+// NATIVE_HALF: define [[FNATTRS]] <3 x half> @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.[[TARGET]].normalize.v3f16(<3 x half>
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(<3 x float>
+// NATIVE_HALF: ret <3 x half> %hlsl.normalize
+// NO_HALF: ret <3 x float> %hlsl.normalize
+half3 test_normalize_half3(half3 p0)
+{
+    return normalize(p0);
+}
+// NATIVE_HALF: define [[FNATTRS]] <4 x half> @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.[[TARGET]].normalize.v4f16(<4 x half>
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(<4 x float>
+// NATIVE_HALF: ret <4 x half> %hlsl.normalize
+// NO_HALF: ret <4 x float> %hlsl.normalize
+half4 test_normalize_half4(half4 p0)
+{
+    return normalize(p0);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].normalize.f32(float
+// CHECK: ret float
+float test_normalize_float(float p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
+
+// CHECK: ret <2 x float> %hlsl.normalize
+float2 test_normalize_float2(float2 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].normalize.v3f32(
+// CHECK: ret <3 x float> %hlsl.normalize
+float3 test_normalize_float3(float3 p0)
+{
+    return normalize(p0);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.normalize = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].normalize.v4f32(
+// CHECK: ret <4 x float> %hlsl.normalize
+float4 test_length_float4(float4 p0)
+{
+    return normalize(p0);
+}
diff --git a/clang/test/CodeGenHLSL/builtins/or.hlsl b/clang/test/CodeGenHLSL/builtins/or.hlsl
index 66cc5572a75b..0a09cd2459ff 100644
--- a/clang/test/CodeGenHLSL/builtins/or.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/or.hlsl
@@ -1,80 +1,80 @@
-// RUN: %clang_cc1 -finclude-default-header -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s

-

-//CHECK-LABEL: define hidden noundef i1 @_Z14test_or_scalarbb(

-//CHECK-SAME: i1 noundef [[X:%.*]], i1 noundef [[Y:%.*]]) #[[ATTR0:[0-9]+]] {

-//CHECK-NEXT:  entry:

-//CHECK:         [[HLSL_OR:%.*]] = or i1 [[A:%.*]], [[B:%.*]]

-//CHECK:         ret i1 [[HLSL_OR]]

-bool test_or_scalar(bool x, bool y)

-{

-    return or(x, y);

-}

-

-//CHECK-LABEL: define hidden noundef <2 x i1> @_Z13test_or_bool2Dv2_bS_(

-//CHECK-SAME: <2 x i1> noundef [[X:%.*]], <2 x i1> noundef [[Y:%.*]]) #[[ATTR0]] {

-//CHECK-NEXT:  entry:

-//CHECK:         [[HLSL_OR:%.*]] = or <2 x i1> [[A:%.*]], [[B:%.*]]

-//CHECK:         ret <2 x i1> [[HLSL_OR]]

-bool2 test_or_bool2(bool2 x, bool2 y)

-{

-    return or(x, y);

-}

-

-//CHECK-LABEL: define hidden noundef <3 x i1> @_Z13test_or_bool3Dv3_bS_(

-//CHECK-SAME: <3 x i1> noundef [[X:%.*]], <3 x i1> noundef [[Y:%.*]]) #[[ATTR0]] {

-//CHECK-NEXT:  entry:

-//CHECK:         [[HLSL_OR:%.*]] = or <3 x i1> [[A:%.*]], [[B:%.*]]

-//CHECK:         ret <3 x i1> [[HLSL_OR]]

-bool3 test_or_bool3(bool3 x, bool3 y)

-{

-    return or(x, y);

-}

-

-//CHECK-LABEL: define hidden noundef <4 x i1> @_Z13test_or_bool4Dv4_bS_(

-//CHECK-SAME: <4 x i1> noundef [[X:%.*]], <4 x i1> noundef [[Y:%.*]]) #[[ATTR0]] {

-//CHECK-NEXT:  entry:

-//CHECK:         [[HLSL_OR:%.*]] = or <4 x i1> [[A:%.*]], [[B:%.*]]

-//CHECK:         ret <4 x i1> [[HLSL_OR]]

-bool4 test_or_bool4(bool4 x, bool4 y)

-{

-    return or(x, y);

-}

-

-//CHECK-LABEL: define hidden noundef i1 @_Z11test_or_intii(

-//CHECK-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0]] {

-//CHECK-NEXT:  entry:

-//CHECK:         [[TOBBOL:%.*]] = icmp ne i32 [[A:%.*]], 0

-//CHECK:         [[TOBBOL1:%.*]] = icmp ne i32 [[B:%.*]], 0

-//CHECK:         [[HLSL_OR:%.*]] = or i1 [[TOBBOL]], [[TOBBOL1]]

-//CHECK:         ret i1 [[HLSL_OR]]

-bool test_or_int(int x, int y)

-{

-    return or(x, y);

-}

-

-//CHECK-LABEL: define hidden noundef <4 x i1> @_Z12test_or_int4Dv4_iS_(

-//CHECK-SAME: <4 x i32> noundef [[X:%.*]], <4 x i32> noundef [[Y:%.*]]) #[[ATTR0]] {

-//CHECK-NEXT:  entry:

-//CHECK:         [[TOBOOL:%.*]] = icmp ne <4 x i32> [[A:%.*]], zeroinitializer

-//CHECK:         [[TOBOOL1:%.*]] = icmp ne <4 x i32> [[B:%.*]], zeroinitializer

-//CHECK:         [[HLSL_OR:%.*]] = or <4 x i1> [[TOBOOL]], [[TOBOOL1]]

-//CHECK:         ret <4 x i1> [[HLSL_OR]]

-bool4 test_or_int4(int4 x, int4 y)

-{

-    return or(x, y);

-}

-

-//CHECK-LABEL: define hidden noundef <4 x i1> @_Z14test_or_float4Dv4_fS_(

-//CHECK-SAME: <4 x float> noundef nofpclass(nan inf) [[X:%.*]], <4 x float> noundef nofpclass(nan inf) [[Y:%.*]]) #[[ATTR0]] {

-//CHECK-NEXT:  entry:

-//CHECK:         [[TOBOOL:%.*]] =  fcmp reassoc nnan ninf nsz arcp afn une <4 x float> [[A:%.*]], zeroinitializer

-//CHECK:         [[TOBOOL1:%.*]] = fcmp reassoc nnan ninf nsz arcp afn une <4 x float> [[B:%.*]], zeroinitializer

-//CHECK:         [[HLSL_OR:%.*]] = or <4 x i1> [[TOBOOL]], [[TOBOOL1]]

-//CHECK:         ret <4 x i1> [[HLSL_OR]]

-bool4 test_or_float4(float4 x, float4 y)

-{

-    return or(x, y);

-}

-

+// RUN: %clang_cc1 -finclude-default-header -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s
+
+//CHECK-LABEL: define hidden noundef i1 @_Z14test_or_scalarbb(
+//CHECK-SAME: i1 noundef [[X:%.*]], i1 noundef [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
+//CHECK-NEXT:  entry:
+//CHECK:         [[HLSL_OR:%.*]] = or i1 [[A:%.*]], [[B:%.*]]
+//CHECK:         ret i1 [[HLSL_OR]]
+bool test_or_scalar(bool x, bool y)
+{
+    return or(x, y);
+}
+
+//CHECK-LABEL: define hidden noundef <2 x i1> @_Z13test_or_bool2Dv2_bS_(
+//CHECK-SAME: <2 x i1> noundef [[X:%.*]], <2 x i1> noundef [[Y:%.*]]) #[[ATTR0]] {
+//CHECK-NEXT:  entry:
+//CHECK:         [[HLSL_OR:%.*]] = or <2 x i1> [[A:%.*]], [[B:%.*]]
+//CHECK:         ret <2 x i1> [[HLSL_OR]]
+bool2 test_or_bool2(bool2 x, bool2 y)
+{
+    return or(x, y);
+}
+
+//CHECK-LABEL: define hidden noundef <3 x i1> @_Z13test_or_bool3Dv3_bS_(
+//CHECK-SAME: <3 x i1> noundef [[X:%.*]], <3 x i1> noundef [[Y:%.*]]) #[[ATTR0]] {
+//CHECK-NEXT:  entry:
+//CHECK:         [[HLSL_OR:%.*]] = or <3 x i1> [[A:%.*]], [[B:%.*]]
+//CHECK:         ret <3 x i1> [[HLSL_OR]]
+bool3 test_or_bool3(bool3 x, bool3 y)
+{
+    return or(x, y);
+}
+
+//CHECK-LABEL: define hidden noundef <4 x i1> @_Z13test_or_bool4Dv4_bS_(
+//CHECK-SAME: <4 x i1> noundef [[X:%.*]], <4 x i1> noundef [[Y:%.*]]) #[[ATTR0]] {
+//CHECK-NEXT:  entry:
+//CHECK:         [[HLSL_OR:%.*]] = or <4 x i1> [[A:%.*]], [[B:%.*]]
+//CHECK:         ret <4 x i1> [[HLSL_OR]]
+bool4 test_or_bool4(bool4 x, bool4 y)
+{
+    return or(x, y);
+}
+
+//CHECK-LABEL: define hidden noundef i1 @_Z11test_or_intii(
+//CHECK-SAME: i32 noundef [[X:%.*]], i32 noundef [[Y:%.*]]) #[[ATTR0]] {
+//CHECK-NEXT:  entry:
+//CHECK:         [[TOBBOL:%.*]] = icmp ne i32 [[A:%.*]], 0
+//CHECK:         [[TOBBOL1:%.*]] = icmp ne i32 [[B:%.*]], 0
+//CHECK:         [[HLSL_OR:%.*]] = or i1 [[TOBBOL]], [[TOBBOL1]]
+//CHECK:         ret i1 [[HLSL_OR]]
+bool test_or_int(int x, int y)
+{
+    return or(x, y);
+}
+
+//CHECK-LABEL: define hidden noundef <4 x i1> @_Z12test_or_int4Dv4_iS_(
+//CHECK-SAME: <4 x i32> noundef [[X:%.*]], <4 x i32> noundef [[Y:%.*]]) #[[ATTR0]] {
+//CHECK-NEXT:  entry:
+//CHECK:         [[TOBOOL:%.*]] = icmp ne <4 x i32> [[A:%.*]], zeroinitializer
+//CHECK:         [[TOBOOL1:%.*]] = icmp ne <4 x i32> [[B:%.*]], zeroinitializer
+//CHECK:         [[HLSL_OR:%.*]] = or <4 x i1> [[TOBOOL]], [[TOBOOL1]]
+//CHECK:         ret <4 x i1> [[HLSL_OR]]
+bool4 test_or_int4(int4 x, int4 y)
+{
+    return or(x, y);
+}
+
+//CHECK-LABEL: define hidden noundef <4 x i1> @_Z14test_or_float4Dv4_fS_(
+//CHECK-SAME: <4 x float> noundef nofpclass(nan inf) [[X:%.*]], <4 x float> noundef nofpclass(nan inf) [[Y:%.*]]) #[[ATTR0]] {
+//CHECK-NEXT:  entry:
+//CHECK:         [[TOBOOL:%.*]] =  fcmp reassoc nnan ninf nsz arcp afn une <4 x float> [[A:%.*]], zeroinitializer
+//CHECK:         [[TOBOOL1:%.*]] = fcmp reassoc nnan ninf nsz arcp afn une <4 x float> [[B:%.*]], zeroinitializer
+//CHECK:         [[HLSL_OR:%.*]] = or <4 x i1> [[TOBOOL]], [[TOBOOL1]]
+//CHECK:         ret <4 x i1> [[HLSL_OR]]
+bool4 test_or_float4(float4 x, float4 y)
+{
+    return or(x, y);
+}
+
diff --git a/clang/test/CodeGenHLSL/builtins/step-overloads.hlsl b/clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
index f55a8f8aff92..6c4e09de7121 100644
--- a/clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
@@ -1,153 +1,153 @@
-// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float

-// CHECK: ret float

-float test_step_double(double p0, double p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(

-// CHECK: ret <2 x float> %hlsl.step

-float2 test_step_double2(double2 p0, double2 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(

-// CHECK: ret <3 x float> %hlsl.step

-float3 test_step_double3(double3 p0, double3 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(

-// CHECK: ret <4 x float> %hlsl.step

-float4 test_step_double4(double4 p0, double4 p1)

-{

-    return step(p0, p1);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float

-// CHECK: ret float

-float test_step_int(int p0, int p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(

-// CHECK: ret <2 x float> %hlsl.step

-float2 test_step_int2(int2 p0, int2 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(

-// CHECK: ret <3 x float> %hlsl.step

-float3 test_step_int3(int3 p0, int3 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(

-// CHECK: ret <4 x float> %hlsl.step

-float4 test_step_int4(int4 p0, int4 p1)

-{

-    return step(p0, p1);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float

-// CHECK: ret float

-float test_step_uint(uint p0, uint p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(

-// CHECK: ret <2 x float> %hlsl.step

-float2 test_step_uint2(uint2 p0, uint2 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(

-// CHECK: ret <3 x float> %hlsl.step

-float3 test_step_uint3(uint3 p0, uint3 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(

-// CHECK: ret <4 x float> %hlsl.step

-float4 test_step_uint4(uint4 p0, uint4 p1)

-{

-    return step(p0, p1);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float

-// CHECK: ret float

-float test_step_int64_t(int64_t p0, int64_t p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(

-// CHECK: ret <2 x float> %hlsl.step

-float2 test_step_int64_t2(int64_t2 p0, int64_t2 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(

-// CHECK: ret <3 x float> %hlsl.step

-float3 test_step_int64_t3(int64_t3 p0, int64_t3 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(

-// CHECK: ret <4 x float> %hlsl.step

-float4 test_step_int64_t4(int64_t4 p0, int64_t4 p1)

-{

-    return step(p0, p1);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float

-// CHECK: ret float

-float test_step_uint64_t(uint64_t p0, uint64_t p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(

-// CHECK: ret <2 x float> %hlsl.step

-float2 test_step_uint64_t2(uint64_t2 p0, uint64_t2 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(

-// CHECK: ret <3 x float> %hlsl.step

-float3 test_step_uint64_t3(uint64_t3 p0, uint64_t3 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(

-// CHECK: ret <4 x float> %hlsl.step

-float4 test_step_uint64_t4(uint64_t4 p0, uint64_t4 p1)

-{

-    return step(p0, p1);

-}

+// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float
+// CHECK: ret float
+float test_step_double(double p0, double p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(
+// CHECK: ret <2 x float> %hlsl.step
+float2 test_step_double2(double2 p0, double2 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(
+// CHECK: ret <3 x float> %hlsl.step
+float3 test_step_double3(double3 p0, double3 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(
+// CHECK: ret <4 x float> %hlsl.step
+float4 test_step_double4(double4 p0, double4 p1)
+{
+    return step(p0, p1);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float
+// CHECK: ret float
+float test_step_int(int p0, int p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(
+// CHECK: ret <2 x float> %hlsl.step
+float2 test_step_int2(int2 p0, int2 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(
+// CHECK: ret <3 x float> %hlsl.step
+float3 test_step_int3(int3 p0, int3 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(
+// CHECK: ret <4 x float> %hlsl.step
+float4 test_step_int4(int4 p0, int4 p1)
+{
+    return step(p0, p1);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float
+// CHECK: ret float
+float test_step_uint(uint p0, uint p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(
+// CHECK: ret <2 x float> %hlsl.step
+float2 test_step_uint2(uint2 p0, uint2 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(
+// CHECK: ret <3 x float> %hlsl.step
+float3 test_step_uint3(uint3 p0, uint3 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(
+// CHECK: ret <4 x float> %hlsl.step
+float4 test_step_uint4(uint4 p0, uint4 p1)
+{
+    return step(p0, p1);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float
+// CHECK: ret float
+float test_step_int64_t(int64_t p0, int64_t p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(
+// CHECK: ret <2 x float> %hlsl.step
+float2 test_step_int64_t2(int64_t2 p0, int64_t2 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(
+// CHECK: ret <3 x float> %hlsl.step
+float3 test_step_int64_t3(int64_t3 p0, int64_t3 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(
+// CHECK: ret <4 x float> %hlsl.step
+float4 test_step_int64_t4(int64_t4 p0, int64_t4 p1)
+{
+    return step(p0, p1);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float
+// CHECK: ret float
+float test_step_uint64_t(uint64_t p0, uint64_t p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(
+// CHECK: ret <2 x float> %hlsl.step
+float2 test_step_uint64_t2(uint64_t2 p0, uint64_t2 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(
+// CHECK: ret <3 x float> %hlsl.step
+float3 test_step_uint64_t3(uint64_t3 p0, uint64_t3 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(
+// CHECK: ret <4 x float> %hlsl.step
+float4 test_step_uint64_t4(uint64_t4 p0, uint64_t4 p1)
+{
+    return step(p0, p1);
+}
diff --git a/clang/test/CodeGenHLSL/builtins/step.hlsl b/clang/test/CodeGenHLSL/builtins/step.hlsl
index be0ffbd79464..6f6588a026a4 100644
--- a/clang/test/CodeGenHLSL/builtins/step.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/step.hlsl
@@ -1,84 +1,84 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \

-// RUN:   --check-prefixes=CHECK,NATIVE_HALF \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \

-// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \

-// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \

-// RUN:   --check-prefixes=CHECK,NATIVE_HALF \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \

-// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \

-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \

-// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv

-

-// NATIVE_HALF: define [[FNATTRS]] half @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.[[TARGET]].step.f16(half

-// NO_HALF: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float

-// NATIVE_HALF: ret half

-// NO_HALF: ret float

-half test_step_half(half p0, half p1)

-{

-    return step(p0, p1);

-}

-// NATIVE_HALF: define [[FNATTRS]] <2 x half> @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.[[TARGET]].step.v2f16(<2 x half>

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(<2 x float>

-// NATIVE_HALF: ret <2 x half> %hlsl.step

-// NO_HALF: ret <2 x float> %hlsl.step

-half2 test_step_half2(half2 p0, half2 p1)

-{

-    return step(p0, p1);

-}

-// NATIVE_HALF: define [[FNATTRS]] <3 x half> @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.[[TARGET]].step.v3f16(<3 x half>

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(<3 x float>

-// NATIVE_HALF: ret <3 x half> %hlsl.step

-// NO_HALF: ret <3 x float> %hlsl.step

-half3 test_step_half3(half3 p0, half3 p1)

-{

-    return step(p0, p1);

-}

-// NATIVE_HALF: define [[FNATTRS]] <4 x half> @

-// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.[[TARGET]].step.v4f16(<4 x half>

-// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(<4 x float>

-// NATIVE_HALF: ret <4 x half> %hlsl.step

-// NO_HALF: ret <4 x float> %hlsl.step

-half4 test_step_half4(half4 p0, half4 p1)

-{

-    return step(p0, p1);

-}

-

-// CHECK: define [[FNATTRS]] float @

-// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float

-// CHECK: ret float

-float test_step_float(float p0, float p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <2 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(

-// CHECK: ret <2 x float> %hlsl.step

-float2 test_step_float2(float2 p0, float2 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <3 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(

-// CHECK: ret <3 x float> %hlsl.step

-float3 test_step_float3(float3 p0, float3 p1)

-{

-    return step(p0, p1);

-}

-// CHECK: define [[FNATTRS]] <4 x float> @

-// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(

-// CHECK: ret <4 x float> %hlsl.step

-float4 test_step_float4(float4 p0, float4 p1)

-{

-    return step(p0, p1);

-}

+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="hidden noundef nofpclass(nan inf)" -DTARGET=dx
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -DTARGET=spv
+
+// NATIVE_HALF: define [[FNATTRS]] half @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.[[TARGET]].step.f16(half
+// NO_HALF: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float
+// NATIVE_HALF: ret half
+// NO_HALF: ret float
+half test_step_half(half p0, half p1)
+{
+    return step(p0, p1);
+}
+// NATIVE_HALF: define [[FNATTRS]] <2 x half> @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.[[TARGET]].step.v2f16(<2 x half>
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(<2 x float>
+// NATIVE_HALF: ret <2 x half> %hlsl.step
+// NO_HALF: ret <2 x float> %hlsl.step
+half2 test_step_half2(half2 p0, half2 p1)
+{
+    return step(p0, p1);
+}
+// NATIVE_HALF: define [[FNATTRS]] <3 x half> @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.[[TARGET]].step.v3f16(<3 x half>
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(<3 x float>
+// NATIVE_HALF: ret <3 x half> %hlsl.step
+// NO_HALF: ret <3 x float> %hlsl.step
+half3 test_step_half3(half3 p0, half3 p1)
+{
+    return step(p0, p1);
+}
+// NATIVE_HALF: define [[FNATTRS]] <4 x half> @
+// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.[[TARGET]].step.v4f16(<4 x half>
+// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(<4 x float>
+// NATIVE_HALF: ret <4 x half> %hlsl.step
+// NO_HALF: ret <4 x float> %hlsl.step
+half4 test_step_half4(half4 p0, half4 p1)
+{
+    return step(p0, p1);
+}
+
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].step.f32(float
+// CHECK: ret float
+float test_step_float(float p0, float p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].step.v2f32(
+// CHECK: ret <2 x float> %hlsl.step
+float2 test_step_float2(float2 p0, float2 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].step.v3f32(
+// CHECK: ret <3 x float> %hlsl.step
+float3 test_step_float3(float3 p0, float3 p1)
+{
+    return step(p0, p1);
+}
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.step = call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].step.v4f32(
+// CHECK: ret <4 x float> %hlsl.step
+float4 test_step_float4(float4 p0, float4 p1)
+{
+    return step(p0, p1);
+}