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authorMatt Devereau <matthew.devereau@arm.com>2022-07-29 14:07:31 +0000
committerMatt Devereau <matthew.devereau@arm.com>2022-08-25 13:07:37 +0000
commit30b045aba603e61239ff121de908597c536d2c8e (patch)
tree71d245ccced97cba2b2579d89aec6cb789ec0872 /clang/lib/CodeGen/CodeGenModule.cpp
parentb50f02490e4679fc1acb0c120a57123a3badaccf (diff)
[AArch64][SVE] Extend LD1RQ ISel patterns to cover missing addressing modes
Add some missing patterns for ld1rq's scalar + scalar addressing mode. Also, adds the scalar + imm and scalar + scalar addressing modes for the patterns added in https://reviews.llvm.org/D130010 Differential Revision: https://reviews.llvm.org/D130993
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
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