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authorAlex Bradbury <asb@igalia.com>2023-03-14 17:55:11 +0000
committerAlex Bradbury <asb@igalia.com>2023-03-14 17:55:11 +0000
commit084e4138930d84b2e76b20c4f36d832abad61696 (patch)
tree33e3395768fe9c9cce41f238e7bfa53314aee700 /clang/lib/CodeGen/CodeGenModule.cpp
parenta51e4026900af39208267c1c2aaea300d0ae8427 (diff)
[RISCV] Fix regression due to interaction of MachineOutliner and MachineCopyPropagation
D144535 enabled machine copy propagation for RISC-V and added it to the pass pipeline in addPreEmitPass2 (after the MachineOutliner). Unfortunately, the MachineCopyPropagation pass is unable to correctly analyse outlined functions, and will delete copy instructions where a register is set that is intended to be live-out. RISCVInstrInfo::buildOutlinedFrame will directly insert a JALR, while a similar function going through the normal codegen path would have a PseudoRet with operands indicating registers that are live-out. This patch does the simplest fix, which is to run MachineCopyPropagation before the MachineOutliner. Differential Revision: https://reviews.llvm.org/D146037
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
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